interrupt.S 5.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255
  1. /*
  2. * File: arch/blackfin/mach-common/interrupt.S
  3. * Based on:
  4. * Author: D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>
  5. * Kenneth Albanowski <kjahds@kjahds.com>
  6. *
  7. * Created: ?
  8. * Description: Interrupt Entries
  9. *
  10. * Modified:
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <asm/blackfin.h>
  31. #include <asm/mach/irq.h>
  32. #include <linux/autoconf.h>
  33. #include <linux/linkage.h>
  34. #include <asm/entry.h>
  35. #include <asm/asm-offsets.h>
  36. #include <asm/mach-common/context.S>
  37. #ifdef CONFIG_I_ENTRY_L1
  38. .section .l1.text
  39. #else
  40. .text
  41. #endif
  42. .align 4 /* just in case */
  43. /*
  44. * initial interrupt handlers
  45. */
  46. #ifndef CONFIG_KGDB
  47. /* interrupt routine for emulation - 0 */
  48. /* Currently used only if GDB stub is not in - invalid */
  49. /* gdb-stub set the evt itself */
  50. /* save registers for post-mortem only */
  51. ENTRY(_evt_emulation)
  52. SAVE_ALL_SYS
  53. #ifdef CONFIG_FRAME_POINTER
  54. fp = 0;
  55. #endif
  56. r0 = IRQ_EMU;
  57. r1 = sp;
  58. SP += -12;
  59. call _irq_panic;
  60. SP += 12;
  61. /* - GDB stub fills this in by itself (if defined) */
  62. rte;
  63. ENDPROC(_evt_emulation)
  64. #endif
  65. /* Common interrupt entry code. First we do CLI, then push
  66. * RETI, to keep interrupts disabled, but to allow this state to be changed
  67. * by local_bh_enable.
  68. * R0 contains the interrupt number, while R1 may contain the value of IPEND,
  69. * or garbage if IPEND won't be needed by the ISR. */
  70. __common_int_entry:
  71. [--sp] = fp;
  72. [--sp] = usp;
  73. [--sp] = i0;
  74. [--sp] = i1;
  75. [--sp] = i2;
  76. [--sp] = i3;
  77. [--sp] = m0;
  78. [--sp] = m1;
  79. [--sp] = m2;
  80. [--sp] = m3;
  81. [--sp] = l0;
  82. [--sp] = l1;
  83. [--sp] = l2;
  84. [--sp] = l3;
  85. [--sp] = b0;
  86. [--sp] = b1;
  87. [--sp] = b2;
  88. [--sp] = b3;
  89. [--sp] = a0.x;
  90. [--sp] = a0.w;
  91. [--sp] = a1.x;
  92. [--sp] = a1.w;
  93. [--sp] = LC0;
  94. [--sp] = LC1;
  95. [--sp] = LT0;
  96. [--sp] = LT1;
  97. [--sp] = LB0;
  98. [--sp] = LB1;
  99. [--sp] = ASTAT;
  100. [--sp] = r0; /* Skip reserved */
  101. [--sp] = RETS;
  102. r2 = RETI;
  103. [--sp] = r2;
  104. [--sp] = RETX;
  105. [--sp] = RETN;
  106. [--sp] = RETE;
  107. [--sp] = SEQSTAT;
  108. [--sp] = r1; /* IPEND - R1 may or may not be set up before jumping here. */
  109. /* Switch to other method of keeping interrupts disabled. */
  110. #ifdef CONFIG_DEBUG_HWERR
  111. r1 = 0x3f;
  112. sti r1;
  113. #else
  114. cli r1;
  115. #endif
  116. [--sp] = RETI; /* orig_pc */
  117. /* Clear all L registers. */
  118. r1 = 0 (x);
  119. l0 = r1;
  120. l1 = r1;
  121. l2 = r1;
  122. l3 = r1;
  123. #ifdef CONFIG_FRAME_POINTER
  124. fp = 0;
  125. #endif
  126. #ifdef ANOMALY_05000283
  127. cc = r7 == r7;
  128. p5.h = 0xffc0;
  129. p5.l = 0x0014;
  130. if cc jump 1f;
  131. r7.l = W[p5];
  132. 1:
  133. #endif
  134. r1 = sp;
  135. SP += -12;
  136. call _do_irq;
  137. SP += 12;
  138. call _return_from_int;
  139. .Lcommon_restore_context:
  140. RESTORE_CONTEXT
  141. rti;
  142. /* interrupt routine for ivhw - 5 */
  143. ENTRY(_evt_ivhw)
  144. SAVE_CONTEXT
  145. #ifdef CONFIG_FRAME_POINTER
  146. fp = 0;
  147. #endif
  148. #ifdef ANOMALY_05000283
  149. cc = r7 == r7;
  150. p5.h = 0xffc0;
  151. p5.l = 0x0014;
  152. if cc jump 1f;
  153. r7.l = W[p5];
  154. 1:
  155. #endif
  156. p0.l = lo(TBUFCTL);
  157. p0.h = hi(TBUFCTL);
  158. r0 = 1;
  159. [p0] = r0;
  160. r0 = IRQ_HWERR;
  161. r1 = sp;
  162. #ifdef CONFIG_HARDWARE_PM
  163. r7 = SEQSTAT;
  164. r7 = r7 >>> 0xe;
  165. r6 = 0x1F;
  166. r7 = r7 & r6;
  167. r5 = 0x12;
  168. cc = r7 == r5;
  169. if cc jump .Lcall_do_ovf; /* deal with performance counter overflow */
  170. #endif
  171. SP += -12;
  172. call _irq_panic;
  173. SP += 12;
  174. rti;
  175. #ifdef CONFIG_HARDWARE_PM
  176. .Lcall_do_ovf:
  177. SP += -12;
  178. call _pm_overflow;
  179. SP += 12;
  180. jump .Lcommon_restore_context;
  181. #endif
  182. /* interrupt routine for evt2 - 2. This is NMI. */
  183. ENTRY(_evt_evt2)
  184. SAVE_CONTEXT
  185. #ifdef CONFIG_FRAME_POINTER
  186. fp = 0;
  187. #endif
  188. #ifdef ANOMALY_05000283
  189. cc = r7 == r7;
  190. p5.h = 0xffc0;
  191. p5.l = 0x0014;
  192. if cc jump 1f;
  193. r7.l = W[p5];
  194. 1:
  195. #endif
  196. r0 = IRQ_NMI;
  197. r1 = sp;
  198. SP += -12;
  199. call _asm_do_IRQ;
  200. SP += 12;
  201. RESTORE_CONTEXT
  202. rtn;
  203. /* interrupt routine for core timer - 6 */
  204. ENTRY(_evt_timer)
  205. TIMER_INTERRUPT_ENTRY(EVT_IVTMR_P)
  206. /* interrupt routine for evt7 - 7 */
  207. ENTRY(_evt_evt7)
  208. INTERRUPT_ENTRY(EVT_IVG7_P)
  209. ENTRY(_evt_evt8)
  210. INTERRUPT_ENTRY(EVT_IVG8_P)
  211. ENTRY(_evt_evt9)
  212. INTERRUPT_ENTRY(EVT_IVG9_P)
  213. ENTRY(_evt_evt10)
  214. INTERRUPT_ENTRY(EVT_IVG10_P)
  215. ENTRY(_evt_evt11)
  216. INTERRUPT_ENTRY(EVT_IVG11_P)
  217. ENTRY(_evt_evt12)
  218. INTERRUPT_ENTRY(EVT_IVG12_P)
  219. ENTRY(_evt_evt13)
  220. INTERRUPT_ENTRY(EVT_IVG13_P)
  221. /* interrupt routine for system_call - 15 */
  222. ENTRY(_evt_system_call)
  223. SAVE_CONTEXT_SYSCALL
  224. #ifdef CONFIG_FRAME_POINTER
  225. fp = 0;
  226. #endif
  227. call _system_call;
  228. jump .Lcommon_restore_context;
  229. ENDPROC(_evt_system_call)