mmp-sspa.c 12 KB

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  1. /*
  2. * linux/sound/soc/pxa/mmp-sspa.c
  3. * Base on pxa2xx-ssp.c
  4. *
  5. * Copyright (C) 2011 Marvell International Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. *
  21. */
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/delay.h>
  26. #include <linux/clk.h>
  27. #include <linux/slab.h>
  28. #include <linux/pxa2xx_ssp.h>
  29. #include <linux/io.h>
  30. #include <sound/core.h>
  31. #include <sound/pcm.h>
  32. #include <sound/initval.h>
  33. #include <sound/pcm_params.h>
  34. #include <sound/soc.h>
  35. #include <sound/pxa2xx-lib.h>
  36. #include "mmp-sspa.h"
  37. /*
  38. * SSPA audio private data
  39. */
  40. struct sspa_priv {
  41. struct ssp_device *sspa;
  42. struct pxa2xx_pcm_dma_params *dma_params;
  43. struct clk *audio_clk;
  44. struct clk *sysclk;
  45. int dai_fmt;
  46. int running_cnt;
  47. };
  48. static void mmp_sspa_write_reg(struct ssp_device *sspa, u32 reg, u32 val)
  49. {
  50. __raw_writel(val, sspa->mmio_base + reg);
  51. }
  52. static u32 mmp_sspa_read_reg(struct ssp_device *sspa, u32 reg)
  53. {
  54. return __raw_readl(sspa->mmio_base + reg);
  55. }
  56. static void mmp_sspa_tx_enable(struct ssp_device *sspa)
  57. {
  58. unsigned int sspa_sp;
  59. sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
  60. sspa_sp |= SSPA_SP_S_EN;
  61. sspa_sp |= SSPA_SP_WEN;
  62. mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
  63. }
  64. static void mmp_sspa_tx_disable(struct ssp_device *sspa)
  65. {
  66. unsigned int sspa_sp;
  67. sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
  68. sspa_sp &= ~SSPA_SP_S_EN;
  69. sspa_sp |= SSPA_SP_WEN;
  70. mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
  71. }
  72. static void mmp_sspa_rx_enable(struct ssp_device *sspa)
  73. {
  74. unsigned int sspa_sp;
  75. sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
  76. sspa_sp |= SSPA_SP_S_EN;
  77. sspa_sp |= SSPA_SP_WEN;
  78. mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
  79. }
  80. static void mmp_sspa_rx_disable(struct ssp_device *sspa)
  81. {
  82. unsigned int sspa_sp;
  83. sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
  84. sspa_sp &= ~SSPA_SP_S_EN;
  85. sspa_sp |= SSPA_SP_WEN;
  86. mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
  87. }
  88. static int mmp_sspa_startup(struct snd_pcm_substream *substream,
  89. struct snd_soc_dai *dai)
  90. {
  91. struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai);
  92. clk_enable(priv->sysclk);
  93. clk_enable(priv->sspa->clk);
  94. return 0;
  95. }
  96. static void mmp_sspa_shutdown(struct snd_pcm_substream *substream,
  97. struct snd_soc_dai *dai)
  98. {
  99. struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai);
  100. clk_disable(priv->sspa->clk);
  101. clk_disable(priv->sysclk);
  102. return;
  103. }
  104. /*
  105. * Set the SSP ports SYSCLK.
  106. */
  107. static int mmp_sspa_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
  108. int clk_id, unsigned int freq, int dir)
  109. {
  110. struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
  111. int ret = 0;
  112. switch (clk_id) {
  113. case MMP_SSPA_CLK_AUDIO:
  114. ret = clk_set_rate(priv->audio_clk, freq);
  115. if (ret)
  116. return ret;
  117. break;
  118. case MMP_SSPA_CLK_PLL:
  119. case MMP_SSPA_CLK_VCXO:
  120. /* not support yet */
  121. return -EINVAL;
  122. default:
  123. return -EINVAL;
  124. }
  125. return 0;
  126. }
  127. static int mmp_sspa_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
  128. int source, unsigned int freq_in,
  129. unsigned int freq_out)
  130. {
  131. struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
  132. int ret = 0;
  133. switch (pll_id) {
  134. case MMP_SYSCLK:
  135. ret = clk_set_rate(priv->sysclk, freq_out);
  136. if (ret)
  137. return ret;
  138. break;
  139. case MMP_SSPA_CLK:
  140. ret = clk_set_rate(priv->sspa->clk, freq_out);
  141. if (ret)
  142. return ret;
  143. break;
  144. default:
  145. return -ENODEV;
  146. }
  147. return 0;
  148. }
  149. /*
  150. * Set up the sspa dai format. The sspa port must be inactive
  151. * before calling this function as the physical
  152. * interface format is changed.
  153. */
  154. static int mmp_sspa_set_dai_fmt(struct snd_soc_dai *cpu_dai,
  155. unsigned int fmt)
  156. {
  157. struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(cpu_dai);
  158. struct ssp_device *sspa = sspa_priv->sspa;
  159. u32 sspa_sp, sspa_ctrl;
  160. /* check if we need to change anything at all */
  161. if (sspa_priv->dai_fmt == fmt)
  162. return 0;
  163. /* we can only change the settings if the port is not in use */
  164. if ((mmp_sspa_read_reg(sspa, SSPA_TXSP) & SSPA_SP_S_EN) ||
  165. (mmp_sspa_read_reg(sspa, SSPA_RXSP) & SSPA_SP_S_EN)) {
  166. dev_err(&sspa->pdev->dev,
  167. "can't change hardware dai format: stream is in use\n");
  168. return -EINVAL;
  169. }
  170. /* reset port settings */
  171. sspa_sp = SSPA_SP_WEN | SSPA_SP_S_RST | SSPA_SP_FFLUSH;
  172. sspa_ctrl = 0;
  173. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  174. case SND_SOC_DAIFMT_CBS_CFS:
  175. sspa_sp |= SSPA_SP_MSL;
  176. break;
  177. case SND_SOC_DAIFMT_CBM_CFM:
  178. break;
  179. default:
  180. return -EINVAL;
  181. }
  182. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  183. case SND_SOC_DAIFMT_NB_NF:
  184. sspa_sp |= SSPA_SP_FSP;
  185. break;
  186. default:
  187. return -EINVAL;
  188. }
  189. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  190. case SND_SOC_DAIFMT_I2S:
  191. sspa_sp |= SSPA_TXSP_FPER(63);
  192. sspa_sp |= SSPA_SP_FWID(31);
  193. sspa_ctrl |= SSPA_CTL_XDATDLY(1);
  194. break;
  195. default:
  196. return -EINVAL;
  197. }
  198. mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
  199. mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
  200. sspa_sp &= ~(SSPA_SP_S_RST | SSPA_SP_FFLUSH);
  201. mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
  202. mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
  203. /*
  204. * FIXME: hw issue, for the tx serial port,
  205. * can not config the master/slave mode;
  206. * so must clean this bit.
  207. * The master/slave mode has been set in the
  208. * rx port.
  209. */
  210. sspa_sp &= ~SSPA_SP_MSL;
  211. mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
  212. mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
  213. mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);
  214. /* Since we are configuring the timings for the format by hand
  215. * we have to defer some things until hw_params() where we
  216. * know parameters like the sample size.
  217. */
  218. sspa_priv->dai_fmt = fmt;
  219. return 0;
  220. }
  221. /*
  222. * Set the SSPA audio DMA parameters and sample size.
  223. * Can be called multiple times by oss emulation.
  224. */
  225. static int mmp_sspa_hw_params(struct snd_pcm_substream *substream,
  226. struct snd_pcm_hw_params *params,
  227. struct snd_soc_dai *dai)
  228. {
  229. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  230. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  231. struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
  232. struct ssp_device *sspa = sspa_priv->sspa;
  233. struct pxa2xx_pcm_dma_params *dma_params;
  234. u32 sspa_ctrl;
  235. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  236. sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_TXCTL);
  237. else
  238. sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_RXCTL);
  239. sspa_ctrl &= ~SSPA_CTL_XFRLEN1_MASK;
  240. sspa_ctrl |= SSPA_CTL_XFRLEN1(params_channels(params) - 1);
  241. sspa_ctrl &= ~SSPA_CTL_XWDLEN1_MASK;
  242. sspa_ctrl |= SSPA_CTL_XWDLEN1(SSPA_CTL_32_BITS);
  243. sspa_ctrl &= ~SSPA_CTL_XSSZ1_MASK;
  244. switch (params_format(params)) {
  245. case SNDRV_PCM_FORMAT_S8:
  246. sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_8_BITS);
  247. break;
  248. case SNDRV_PCM_FORMAT_S16_LE:
  249. sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_16_BITS);
  250. break;
  251. case SNDRV_PCM_FORMAT_S20_3LE:
  252. sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_20_BITS);
  253. break;
  254. case SNDRV_PCM_FORMAT_S24_3LE:
  255. sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_24_BITS);
  256. break;
  257. case SNDRV_PCM_FORMAT_S32_LE:
  258. sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_32_BITS);
  259. break;
  260. default:
  261. return -EINVAL;
  262. }
  263. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  264. mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
  265. mmp_sspa_write_reg(sspa, SSPA_TXFIFO_LL, 0x1);
  266. } else {
  267. mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);
  268. mmp_sspa_write_reg(sspa, SSPA_RXFIFO_UL, 0x0);
  269. }
  270. dma_params = &sspa_priv->dma_params[substream->stream];
  271. dma_params->dev_addr = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  272. (sspa->phys_base + SSPA_TXD) :
  273. (sspa->phys_base + SSPA_RXD);
  274. snd_soc_dai_set_dma_data(cpu_dai, substream, dma_params);
  275. return 0;
  276. }
  277. static int mmp_sspa_trigger(struct snd_pcm_substream *substream, int cmd,
  278. struct snd_soc_dai *dai)
  279. {
  280. struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
  281. struct ssp_device *sspa = sspa_priv->sspa;
  282. int ret = 0;
  283. switch (cmd) {
  284. case SNDRV_PCM_TRIGGER_START:
  285. case SNDRV_PCM_TRIGGER_RESUME:
  286. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  287. /*
  288. * whatever playback or capture, must enable rx.
  289. * this is a hw issue, so need check if rx has been
  290. * enabled or not; if has been enabled by another
  291. * stream, do not enable again.
  292. */
  293. if (!sspa_priv->running_cnt)
  294. mmp_sspa_rx_enable(sspa);
  295. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  296. mmp_sspa_tx_enable(sspa);
  297. sspa_priv->running_cnt++;
  298. break;
  299. case SNDRV_PCM_TRIGGER_STOP:
  300. case SNDRV_PCM_TRIGGER_SUSPEND:
  301. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  302. sspa_priv->running_cnt--;
  303. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  304. mmp_sspa_tx_disable(sspa);
  305. /* have no capture stream, disable rx port */
  306. if (!sspa_priv->running_cnt)
  307. mmp_sspa_rx_disable(sspa);
  308. break;
  309. default:
  310. ret = -EINVAL;
  311. }
  312. return ret;
  313. }
  314. static int mmp_sspa_probe(struct snd_soc_dai *dai)
  315. {
  316. struct sspa_priv *priv = dev_get_drvdata(dai->dev);
  317. snd_soc_dai_set_drvdata(dai, priv);
  318. return 0;
  319. }
  320. #define MMP_SSPA_RATES SNDRV_PCM_RATE_8000_192000
  321. #define MMP_SSPA_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
  322. SNDRV_PCM_FMTBIT_S16_LE | \
  323. SNDRV_PCM_FMTBIT_S24_LE | \
  324. SNDRV_PCM_FMTBIT_S24_LE | \
  325. SNDRV_PCM_FMTBIT_S32_LE)
  326. static struct snd_soc_dai_ops mmp_sspa_dai_ops = {
  327. .startup = mmp_sspa_startup,
  328. .shutdown = mmp_sspa_shutdown,
  329. .trigger = mmp_sspa_trigger,
  330. .hw_params = mmp_sspa_hw_params,
  331. .set_sysclk = mmp_sspa_set_dai_sysclk,
  332. .set_pll = mmp_sspa_set_dai_pll,
  333. .set_fmt = mmp_sspa_set_dai_fmt,
  334. };
  335. struct snd_soc_dai_driver mmp_sspa_dai = {
  336. .probe = mmp_sspa_probe,
  337. .playback = {
  338. .channels_min = 1,
  339. .channels_max = 128,
  340. .rates = MMP_SSPA_RATES,
  341. .formats = MMP_SSPA_FORMATS,
  342. },
  343. .capture = {
  344. .channels_min = 1,
  345. .channels_max = 2,
  346. .rates = MMP_SSPA_RATES,
  347. .formats = MMP_SSPA_FORMATS,
  348. },
  349. .ops = &mmp_sspa_dai_ops,
  350. };
  351. static int asoc_mmp_sspa_probe(struct platform_device *pdev)
  352. {
  353. struct sspa_priv *priv;
  354. struct resource *res;
  355. priv = devm_kzalloc(&pdev->dev,
  356. sizeof(struct sspa_priv), GFP_KERNEL);
  357. if (!priv)
  358. return -ENOMEM;
  359. priv->sspa = devm_kzalloc(&pdev->dev,
  360. sizeof(struct ssp_device), GFP_KERNEL);
  361. if (priv->sspa == NULL)
  362. return -ENOMEM;
  363. priv->dma_params = devm_kzalloc(&pdev->dev,
  364. 2 * sizeof(struct pxa2xx_pcm_dma_params), GFP_KERNEL);
  365. if (priv->dma_params == NULL)
  366. return -ENOMEM;
  367. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  368. if (res == NULL)
  369. return -ENOMEM;
  370. priv->sspa->mmio_base = devm_ioremap_resource(&pdev->dev, res);
  371. if (IS_ERR(priv->sspa->mmio_base))
  372. return PTR_ERR(priv->sspa->mmio_base);
  373. priv->sspa->clk = devm_clk_get(&pdev->dev, NULL);
  374. if (IS_ERR(priv->sspa->clk))
  375. return PTR_ERR(priv->sspa->clk);
  376. priv->audio_clk = clk_get(NULL, "mmp-audio");
  377. if (IS_ERR(priv->audio_clk))
  378. return PTR_ERR(priv->audio_clk);
  379. priv->sysclk = clk_get(NULL, "mmp-sysclk");
  380. if (IS_ERR(priv->sysclk)) {
  381. clk_put(priv->audio_clk);
  382. return PTR_ERR(priv->sysclk);
  383. }
  384. clk_enable(priv->audio_clk);
  385. priv->dai_fmt = (unsigned int) -1;
  386. platform_set_drvdata(pdev, priv);
  387. return snd_soc_register_dai(&pdev->dev, &mmp_sspa_dai);
  388. }
  389. static int asoc_mmp_sspa_remove(struct platform_device *pdev)
  390. {
  391. struct sspa_priv *priv = platform_get_drvdata(pdev);
  392. clk_disable(priv->audio_clk);
  393. clk_put(priv->audio_clk);
  394. clk_put(priv->sysclk);
  395. snd_soc_unregister_dai(&pdev->dev);
  396. return 0;
  397. }
  398. static struct platform_driver asoc_mmp_sspa_driver = {
  399. .driver = {
  400. .name = "mmp-sspa-dai",
  401. .owner = THIS_MODULE,
  402. },
  403. .probe = asoc_mmp_sspa_probe,
  404. .remove = asoc_mmp_sspa_remove,
  405. };
  406. module_platform_driver(asoc_mmp_sspa_driver);
  407. MODULE_AUTHOR("Leo Yan <leoy@marvell.com>");
  408. MODULE_DESCRIPTION("MMP SSPA SoC Interface");
  409. MODULE_LICENSE("GPL");