davinci-pcm.c 26 KB

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  1. /*
  2. * ALSA PCM interface for the TI DAVINCI processor
  3. *
  4. * Author: Vladimir Barinov, <vbarinov@embeddedalley.com>
  5. * Copyright: (C) 2007 MontaVista Software, Inc., <source@mvista.com>
  6. * added SRAM ping/pong (C) 2008 Troy Kisky <troy.kisky@boundarydevices.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/slab.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/kernel.h>
  18. #include <linux/genalloc.h>
  19. #include <sound/core.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/soc.h>
  23. #include <asm/dma.h>
  24. #include "davinci-pcm.h"
  25. #ifdef DEBUG
  26. static void print_buf_info(int slot, char *name)
  27. {
  28. struct edmacc_param p;
  29. if (slot < 0)
  30. return;
  31. edma_read_slot(slot, &p);
  32. printk(KERN_DEBUG "%s: 0x%x, opt=%x, src=%x, a_b_cnt=%x dst=%x\n",
  33. name, slot, p.opt, p.src, p.a_b_cnt, p.dst);
  34. printk(KERN_DEBUG " src_dst_bidx=%x link_bcntrld=%x src_dst_cidx=%x ccnt=%x\n",
  35. p.src_dst_bidx, p.link_bcntrld, p.src_dst_cidx, p.ccnt);
  36. }
  37. #else
  38. static void print_buf_info(int slot, char *name)
  39. {
  40. }
  41. #endif
  42. #define DAVINCI_PCM_FMTBITS (\
  43. SNDRV_PCM_FMTBIT_S8 |\
  44. SNDRV_PCM_FMTBIT_U8 |\
  45. SNDRV_PCM_FMTBIT_S16_LE |\
  46. SNDRV_PCM_FMTBIT_S16_BE |\
  47. SNDRV_PCM_FMTBIT_U16_LE |\
  48. SNDRV_PCM_FMTBIT_U16_BE |\
  49. SNDRV_PCM_FMTBIT_S24_LE |\
  50. SNDRV_PCM_FMTBIT_S24_BE |\
  51. SNDRV_PCM_FMTBIT_U24_LE |\
  52. SNDRV_PCM_FMTBIT_U24_BE |\
  53. SNDRV_PCM_FMTBIT_S32_LE |\
  54. SNDRV_PCM_FMTBIT_S32_BE |\
  55. SNDRV_PCM_FMTBIT_U32_LE |\
  56. SNDRV_PCM_FMTBIT_U32_BE)
  57. static struct snd_pcm_hardware pcm_hardware_playback = {
  58. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  59. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  60. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME|
  61. SNDRV_PCM_INFO_BATCH),
  62. .formats = DAVINCI_PCM_FMTBITS,
  63. .rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT,
  64. .rate_min = 8000,
  65. .rate_max = 192000,
  66. .channels_min = 2,
  67. .channels_max = 384,
  68. .buffer_bytes_max = 128 * 1024,
  69. .period_bytes_min = 32,
  70. .period_bytes_max = 8 * 1024,
  71. .periods_min = 16,
  72. .periods_max = 255,
  73. .fifo_size = 0,
  74. };
  75. static struct snd_pcm_hardware pcm_hardware_capture = {
  76. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  77. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  78. SNDRV_PCM_INFO_PAUSE |
  79. SNDRV_PCM_INFO_BATCH),
  80. .formats = DAVINCI_PCM_FMTBITS,
  81. .rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT,
  82. .rate_min = 8000,
  83. .rate_max = 192000,
  84. .channels_min = 2,
  85. .channels_max = 384,
  86. .buffer_bytes_max = 128 * 1024,
  87. .period_bytes_min = 32,
  88. .period_bytes_max = 8 * 1024,
  89. .periods_min = 16,
  90. .periods_max = 255,
  91. .fifo_size = 0,
  92. };
  93. /*
  94. * How ping/pong works....
  95. *
  96. * Playback:
  97. * ram_params - copys 2*ping_size from start of SDRAM to iram,
  98. * links to ram_link2
  99. * ram_link2 - copys rest of SDRAM to iram in ping_size units,
  100. * links to ram_link
  101. * ram_link - copys entire SDRAM to iram in ping_size uints,
  102. * links to self
  103. *
  104. * asp_params - same as asp_link[0]
  105. * asp_link[0] - copys from lower half of iram to asp port
  106. * links to asp_link[1], triggers iram copy event on completion
  107. * asp_link[1] - copys from upper half of iram to asp port
  108. * links to asp_link[0], triggers iram copy event on completion
  109. * triggers interrupt only needed to let upper SOC levels update position
  110. * in stream on completion
  111. *
  112. * When playback is started:
  113. * ram_params started
  114. * asp_params started
  115. *
  116. * Capture:
  117. * ram_params - same as ram_link,
  118. * links to ram_link
  119. * ram_link - same as playback
  120. * links to self
  121. *
  122. * asp_params - same as playback
  123. * asp_link[0] - same as playback
  124. * asp_link[1] - same as playback
  125. *
  126. * When capture is started:
  127. * asp_params started
  128. */
  129. struct davinci_runtime_data {
  130. spinlock_t lock;
  131. int period; /* current DMA period */
  132. int asp_channel; /* Master DMA channel */
  133. int asp_link[2]; /* asp parameter link channel, ping/pong */
  134. struct davinci_pcm_dma_params *params; /* DMA params */
  135. int ram_channel;
  136. int ram_link;
  137. int ram_link2;
  138. struct edmacc_param asp_params;
  139. struct edmacc_param ram_params;
  140. };
  141. static void davinci_pcm_period_elapsed(struct snd_pcm_substream *substream)
  142. {
  143. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  144. struct snd_pcm_runtime *runtime = substream->runtime;
  145. prtd->period++;
  146. if (unlikely(prtd->period >= runtime->periods))
  147. prtd->period = 0;
  148. }
  149. static void davinci_pcm_period_reset(struct snd_pcm_substream *substream)
  150. {
  151. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  152. prtd->period = 0;
  153. }
  154. /*
  155. * Not used with ping/pong
  156. */
  157. static void davinci_pcm_enqueue_dma(struct snd_pcm_substream *substream)
  158. {
  159. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  160. struct snd_pcm_runtime *runtime = substream->runtime;
  161. unsigned int period_size;
  162. unsigned int dma_offset;
  163. dma_addr_t dma_pos;
  164. dma_addr_t src, dst;
  165. unsigned short src_bidx, dst_bidx;
  166. unsigned short src_cidx, dst_cidx;
  167. unsigned int data_type;
  168. unsigned short acnt;
  169. unsigned int count;
  170. unsigned int fifo_level;
  171. period_size = snd_pcm_lib_period_bytes(substream);
  172. dma_offset = prtd->period * period_size;
  173. dma_pos = runtime->dma_addr + dma_offset;
  174. fifo_level = prtd->params->fifo_level;
  175. pr_debug("davinci_pcm: audio_set_dma_params_play channel = %d "
  176. "dma_ptr = %x period_size=%x\n", prtd->asp_link[0], dma_pos,
  177. period_size);
  178. data_type = prtd->params->data_type;
  179. count = period_size / data_type;
  180. if (fifo_level)
  181. count /= fifo_level;
  182. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  183. src = dma_pos;
  184. dst = prtd->params->dma_addr;
  185. src_bidx = data_type;
  186. dst_bidx = 0;
  187. src_cidx = data_type * fifo_level;
  188. dst_cidx = 0;
  189. } else {
  190. src = prtd->params->dma_addr;
  191. dst = dma_pos;
  192. src_bidx = 0;
  193. dst_bidx = data_type;
  194. src_cidx = 0;
  195. dst_cidx = data_type * fifo_level;
  196. }
  197. acnt = prtd->params->acnt;
  198. edma_set_src(prtd->asp_link[0], src, INCR, W8BIT);
  199. edma_set_dest(prtd->asp_link[0], dst, INCR, W8BIT);
  200. edma_set_src_index(prtd->asp_link[0], src_bidx, src_cidx);
  201. edma_set_dest_index(prtd->asp_link[0], dst_bidx, dst_cidx);
  202. if (!fifo_level)
  203. edma_set_transfer_params(prtd->asp_link[0], acnt, count, 1, 0,
  204. ASYNC);
  205. else
  206. edma_set_transfer_params(prtd->asp_link[0], acnt, fifo_level,
  207. count, fifo_level,
  208. ABSYNC);
  209. }
  210. static void davinci_pcm_dma_irq(unsigned link, u16 ch_status, void *data)
  211. {
  212. struct snd_pcm_substream *substream = data;
  213. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  214. print_buf_info(prtd->ram_channel, "i ram_channel");
  215. pr_debug("davinci_pcm: link=%d, status=0x%x\n", link, ch_status);
  216. if (unlikely(ch_status != DMA_COMPLETE))
  217. return;
  218. if (snd_pcm_running(substream)) {
  219. spin_lock(&prtd->lock);
  220. if (prtd->ram_channel < 0) {
  221. /* No ping/pong must fix up link dma data*/
  222. davinci_pcm_enqueue_dma(substream);
  223. }
  224. davinci_pcm_period_elapsed(substream);
  225. spin_unlock(&prtd->lock);
  226. snd_pcm_period_elapsed(substream);
  227. }
  228. }
  229. #ifdef CONFIG_GENERIC_ALLOCATOR
  230. static int allocate_sram(struct snd_pcm_substream *substream,
  231. struct gen_pool *sram_pool, unsigned size,
  232. struct snd_pcm_hardware *ppcm)
  233. {
  234. struct snd_dma_buffer *buf = &substream->dma_buffer;
  235. struct snd_dma_buffer *iram_dma = NULL;
  236. dma_addr_t iram_phys = 0;
  237. void *iram_virt = NULL;
  238. if (buf->private_data || !size)
  239. return 0;
  240. ppcm->period_bytes_max = size;
  241. iram_virt = (void *)gen_pool_alloc(sram_pool, size);
  242. if (!iram_virt)
  243. goto exit1;
  244. iram_phys = gen_pool_virt_to_phys(sram_pool, (unsigned)iram_virt);
  245. iram_dma = kzalloc(sizeof(*iram_dma), GFP_KERNEL);
  246. if (!iram_dma)
  247. goto exit2;
  248. iram_dma->area = iram_virt;
  249. iram_dma->addr = iram_phys;
  250. memset(iram_dma->area, 0, size);
  251. iram_dma->bytes = size;
  252. buf->private_data = iram_dma;
  253. return 0;
  254. exit2:
  255. if (iram_virt)
  256. gen_pool_free(sram_pool, (unsigned)iram_virt, size);
  257. exit1:
  258. return -ENOMEM;
  259. }
  260. static void davinci_free_sram(struct snd_pcm_substream *substream,
  261. struct snd_dma_buffer *iram_dma)
  262. {
  263. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  264. struct gen_pool *sram_pool = prtd->params->sram_pool;
  265. gen_pool_free(sram_pool, (unsigned) iram_dma->area, iram_dma->bytes);
  266. }
  267. #else
  268. static int allocate_sram(struct snd_pcm_substream *substream,
  269. struct gen_pool *sram_pool, unsigned size,
  270. struct snd_pcm_hardware *ppcm)
  271. {
  272. return 0;
  273. }
  274. static void davinci_free_sram(struct snd_pcm_substream *substream,
  275. struct snd_dma_buffer *iram_dma)
  276. {
  277. }
  278. #endif
  279. /*
  280. * Only used with ping/pong.
  281. * This is called after runtime->dma_addr, period_bytes and data_type are valid
  282. */
  283. static int ping_pong_dma_setup(struct snd_pcm_substream *substream)
  284. {
  285. unsigned short ram_src_cidx, ram_dst_cidx;
  286. struct snd_pcm_runtime *runtime = substream->runtime;
  287. struct davinci_runtime_data *prtd = runtime->private_data;
  288. struct snd_dma_buffer *iram_dma =
  289. (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  290. struct davinci_pcm_dma_params *params = prtd->params;
  291. unsigned int data_type = params->data_type;
  292. unsigned int acnt = params->acnt;
  293. /* divide by 2 for ping/pong */
  294. unsigned int ping_size = snd_pcm_lib_period_bytes(substream) >> 1;
  295. unsigned int fifo_level = prtd->params->fifo_level;
  296. unsigned int count;
  297. if ((data_type == 0) || (data_type > 4)) {
  298. printk(KERN_ERR "%s: data_type=%i\n", __func__, data_type);
  299. return -EINVAL;
  300. }
  301. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  302. dma_addr_t asp_src_pong = iram_dma->addr + ping_size;
  303. ram_src_cidx = ping_size;
  304. ram_dst_cidx = -ping_size;
  305. edma_set_src(prtd->asp_link[1], asp_src_pong, INCR, W8BIT);
  306. edma_set_src_index(prtd->asp_link[0], data_type,
  307. data_type * fifo_level);
  308. edma_set_src_index(prtd->asp_link[1], data_type,
  309. data_type * fifo_level);
  310. edma_set_src(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
  311. } else {
  312. dma_addr_t asp_dst_pong = iram_dma->addr + ping_size;
  313. ram_src_cidx = -ping_size;
  314. ram_dst_cidx = ping_size;
  315. edma_set_dest(prtd->asp_link[1], asp_dst_pong, INCR, W8BIT);
  316. edma_set_dest_index(prtd->asp_link[0], data_type,
  317. data_type * fifo_level);
  318. edma_set_dest_index(prtd->asp_link[1], data_type,
  319. data_type * fifo_level);
  320. edma_set_dest(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
  321. }
  322. if (!fifo_level) {
  323. count = ping_size / data_type;
  324. edma_set_transfer_params(prtd->asp_link[0], acnt, count,
  325. 1, 0, ASYNC);
  326. edma_set_transfer_params(prtd->asp_link[1], acnt, count,
  327. 1, 0, ASYNC);
  328. } else {
  329. count = ping_size / (data_type * fifo_level);
  330. edma_set_transfer_params(prtd->asp_link[0], acnt, fifo_level,
  331. count, fifo_level, ABSYNC);
  332. edma_set_transfer_params(prtd->asp_link[1], acnt, fifo_level,
  333. count, fifo_level, ABSYNC);
  334. }
  335. edma_set_src_index(prtd->ram_link, ping_size, ram_src_cidx);
  336. edma_set_dest_index(prtd->ram_link, ping_size, ram_dst_cidx);
  337. edma_set_transfer_params(prtd->ram_link, ping_size, 2,
  338. runtime->periods, 2, ASYNC);
  339. /* init master params */
  340. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  341. edma_read_slot(prtd->ram_link, &prtd->ram_params);
  342. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  343. struct edmacc_param p_ram;
  344. /* Copy entire iram buffer before playback started */
  345. prtd->ram_params.a_b_cnt = (1 << 16) | (ping_size << 1);
  346. /* 0 dst_bidx */
  347. prtd->ram_params.src_dst_bidx = (ping_size << 1);
  348. /* 0 dst_cidx */
  349. prtd->ram_params.src_dst_cidx = (ping_size << 1);
  350. prtd->ram_params.ccnt = 1;
  351. /* Skip 1st period */
  352. edma_read_slot(prtd->ram_link, &p_ram);
  353. p_ram.src += (ping_size << 1);
  354. p_ram.ccnt -= 1;
  355. edma_write_slot(prtd->ram_link2, &p_ram);
  356. /*
  357. * When 1st started, ram -> iram dma channel will fill the
  358. * entire iram. Then, whenever a ping/pong asp buffer finishes,
  359. * 1/2 iram will be filled.
  360. */
  361. prtd->ram_params.link_bcntrld =
  362. EDMA_CHAN_SLOT(prtd->ram_link2) << 5;
  363. }
  364. return 0;
  365. }
  366. /* 1 asp tx or rx channel using 2 parameter channels
  367. * 1 ram to/from iram channel using 1 parameter channel
  368. *
  369. * Playback
  370. * ram copy channel kicks off first,
  371. * 1st ram copy of entire iram buffer completion kicks off asp channel
  372. * asp tcc always kicks off ram copy of 1/2 iram buffer
  373. *
  374. * Record
  375. * asp channel starts, tcc kicks off ram copy
  376. */
  377. static int request_ping_pong(struct snd_pcm_substream *substream,
  378. struct davinci_runtime_data *prtd,
  379. struct snd_dma_buffer *iram_dma)
  380. {
  381. dma_addr_t asp_src_ping;
  382. dma_addr_t asp_dst_ping;
  383. int ret;
  384. struct davinci_pcm_dma_params *params = prtd->params;
  385. /* Request ram master channel */
  386. ret = prtd->ram_channel = edma_alloc_channel(EDMA_CHANNEL_ANY,
  387. davinci_pcm_dma_irq, substream,
  388. prtd->params->ram_chan_q);
  389. if (ret < 0)
  390. goto exit1;
  391. /* Request ram link channel */
  392. ret = prtd->ram_link = edma_alloc_slot(
  393. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  394. if (ret < 0)
  395. goto exit2;
  396. ret = prtd->asp_link[1] = edma_alloc_slot(
  397. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  398. if (ret < 0)
  399. goto exit3;
  400. prtd->ram_link2 = -1;
  401. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  402. ret = prtd->ram_link2 = edma_alloc_slot(
  403. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  404. if (ret < 0)
  405. goto exit4;
  406. }
  407. /* circle ping-pong buffers */
  408. edma_link(prtd->asp_link[0], prtd->asp_link[1]);
  409. edma_link(prtd->asp_link[1], prtd->asp_link[0]);
  410. /* circle ram buffers */
  411. edma_link(prtd->ram_link, prtd->ram_link);
  412. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  413. asp_src_ping = iram_dma->addr;
  414. asp_dst_ping = params->dma_addr; /* fifo */
  415. } else {
  416. asp_src_ping = params->dma_addr; /* fifo */
  417. asp_dst_ping = iram_dma->addr;
  418. }
  419. /* ping */
  420. edma_set_src(prtd->asp_link[0], asp_src_ping, INCR, W16BIT);
  421. edma_set_dest(prtd->asp_link[0], asp_dst_ping, INCR, W16BIT);
  422. edma_set_src_index(prtd->asp_link[0], 0, 0);
  423. edma_set_dest_index(prtd->asp_link[0], 0, 0);
  424. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  425. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f) | TCINTEN);
  426. prtd->asp_params.opt |= TCCHEN |
  427. EDMA_TCC(prtd->ram_channel & 0x3f);
  428. edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
  429. /* pong */
  430. edma_set_src(prtd->asp_link[1], asp_src_ping, INCR, W16BIT);
  431. edma_set_dest(prtd->asp_link[1], asp_dst_ping, INCR, W16BIT);
  432. edma_set_src_index(prtd->asp_link[1], 0, 0);
  433. edma_set_dest_index(prtd->asp_link[1], 0, 0);
  434. edma_read_slot(prtd->asp_link[1], &prtd->asp_params);
  435. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f));
  436. /* interrupt after every pong completion */
  437. prtd->asp_params.opt |= TCINTEN | TCCHEN |
  438. EDMA_TCC(prtd->ram_channel & 0x3f);
  439. edma_write_slot(prtd->asp_link[1], &prtd->asp_params);
  440. /* ram */
  441. edma_set_src(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
  442. edma_set_dest(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
  443. pr_debug("%s: audio dma channels/slots in use for ram:%u %u %u,"
  444. "for asp:%u %u %u\n", __func__,
  445. prtd->ram_channel, prtd->ram_link, prtd->ram_link2,
  446. prtd->asp_channel, prtd->asp_link[0],
  447. prtd->asp_link[1]);
  448. return 0;
  449. exit4:
  450. edma_free_channel(prtd->asp_link[1]);
  451. prtd->asp_link[1] = -1;
  452. exit3:
  453. edma_free_channel(prtd->ram_link);
  454. prtd->ram_link = -1;
  455. exit2:
  456. edma_free_channel(prtd->ram_channel);
  457. prtd->ram_channel = -1;
  458. exit1:
  459. return ret;
  460. }
  461. static int davinci_pcm_dma_request(struct snd_pcm_substream *substream)
  462. {
  463. struct snd_dma_buffer *iram_dma;
  464. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  465. struct davinci_pcm_dma_params *params = prtd->params;
  466. int ret;
  467. if (!params)
  468. return -ENODEV;
  469. /* Request asp master DMA channel */
  470. ret = prtd->asp_channel = edma_alloc_channel(params->channel,
  471. davinci_pcm_dma_irq, substream,
  472. prtd->params->asp_chan_q);
  473. if (ret < 0)
  474. goto exit1;
  475. /* Request asp link channels */
  476. ret = prtd->asp_link[0] = edma_alloc_slot(
  477. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  478. if (ret < 0)
  479. goto exit2;
  480. iram_dma = (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  481. if (iram_dma) {
  482. if (request_ping_pong(substream, prtd, iram_dma) == 0)
  483. return 0;
  484. printk(KERN_WARNING "%s: dma channel allocation failed,"
  485. "not using sram\n", __func__);
  486. }
  487. /* Issue transfer completion IRQ when the channel completes a
  488. * transfer, then always reload from the same slot (by a kind
  489. * of loopback link). The completion IRQ handler will update
  490. * the reload slot with a new buffer.
  491. *
  492. * REVISIT save p_ram here after setting up everything except
  493. * the buffer and its length (ccnt) ... use it as a template
  494. * so davinci_pcm_enqueue_dma() takes less time in IRQ.
  495. */
  496. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  497. prtd->asp_params.opt |= TCINTEN |
  498. EDMA_TCC(EDMA_CHAN_SLOT(prtd->asp_channel));
  499. prtd->asp_params.link_bcntrld = EDMA_CHAN_SLOT(prtd->asp_link[0]) << 5;
  500. edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
  501. return 0;
  502. exit2:
  503. edma_free_channel(prtd->asp_channel);
  504. prtd->asp_channel = -1;
  505. exit1:
  506. return ret;
  507. }
  508. static int davinci_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  509. {
  510. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  511. int ret = 0;
  512. spin_lock(&prtd->lock);
  513. switch (cmd) {
  514. case SNDRV_PCM_TRIGGER_START:
  515. edma_start(prtd->asp_channel);
  516. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
  517. prtd->ram_channel >= 0) {
  518. /* copy 1st iram buffer */
  519. edma_start(prtd->ram_channel);
  520. }
  521. break;
  522. case SNDRV_PCM_TRIGGER_RESUME:
  523. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  524. edma_resume(prtd->asp_channel);
  525. break;
  526. case SNDRV_PCM_TRIGGER_STOP:
  527. case SNDRV_PCM_TRIGGER_SUSPEND:
  528. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  529. edma_pause(prtd->asp_channel);
  530. break;
  531. default:
  532. ret = -EINVAL;
  533. break;
  534. }
  535. spin_unlock(&prtd->lock);
  536. return ret;
  537. }
  538. static int davinci_pcm_prepare(struct snd_pcm_substream *substream)
  539. {
  540. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  541. davinci_pcm_period_reset(substream);
  542. if (prtd->ram_channel >= 0) {
  543. int ret = ping_pong_dma_setup(substream);
  544. if (ret < 0)
  545. return ret;
  546. edma_write_slot(prtd->ram_channel, &prtd->ram_params);
  547. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  548. print_buf_info(prtd->ram_channel, "ram_channel");
  549. print_buf_info(prtd->ram_link, "ram_link");
  550. print_buf_info(prtd->ram_link2, "ram_link2");
  551. print_buf_info(prtd->asp_channel, "asp_channel");
  552. print_buf_info(prtd->asp_link[0], "asp_link[0]");
  553. print_buf_info(prtd->asp_link[1], "asp_link[1]");
  554. /*
  555. * There is a phase offset of 2 periods between the position
  556. * used by dma setup and the position reported in the pointer
  557. * function.
  558. *
  559. * The phase offset, when not using ping-pong buffers, is due to
  560. * the two consecutive calls to davinci_pcm_enqueue_dma() below.
  561. *
  562. * Whereas here, with ping-pong buffers, the phase is due to
  563. * there being an entire buffer transfer complete before the
  564. * first dma completion event triggers davinci_pcm_dma_irq().
  565. */
  566. davinci_pcm_period_elapsed(substream);
  567. davinci_pcm_period_elapsed(substream);
  568. return 0;
  569. }
  570. davinci_pcm_enqueue_dma(substream);
  571. davinci_pcm_period_elapsed(substream);
  572. /* Copy self-linked parameter RAM entry into master channel */
  573. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  574. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  575. davinci_pcm_enqueue_dma(substream);
  576. davinci_pcm_period_elapsed(substream);
  577. return 0;
  578. }
  579. static snd_pcm_uframes_t
  580. davinci_pcm_pointer(struct snd_pcm_substream *substream)
  581. {
  582. struct snd_pcm_runtime *runtime = substream->runtime;
  583. struct davinci_runtime_data *prtd = runtime->private_data;
  584. unsigned int offset;
  585. int asp_count;
  586. unsigned int period_size = snd_pcm_lib_period_bytes(substream);
  587. /*
  588. * There is a phase offset of 2 periods between the position used by dma
  589. * setup and the position reported in the pointer function. Either +2 in
  590. * the dma setup or -2 here in the pointer function (with wrapping,
  591. * both) accounts for this offset -- choose the latter since it makes
  592. * the first-time setup clearer.
  593. */
  594. spin_lock(&prtd->lock);
  595. asp_count = prtd->period - 2;
  596. spin_unlock(&prtd->lock);
  597. if (asp_count < 0)
  598. asp_count += runtime->periods;
  599. asp_count *= period_size;
  600. offset = bytes_to_frames(runtime, asp_count);
  601. if (offset >= runtime->buffer_size)
  602. offset = 0;
  603. return offset;
  604. }
  605. static int davinci_pcm_open(struct snd_pcm_substream *substream)
  606. {
  607. struct snd_pcm_runtime *runtime = substream->runtime;
  608. struct davinci_runtime_data *prtd;
  609. struct snd_pcm_hardware *ppcm;
  610. int ret = 0;
  611. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  612. struct davinci_pcm_dma_params *pa;
  613. struct davinci_pcm_dma_params *params;
  614. pa = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
  615. if (!pa)
  616. return -ENODEV;
  617. params = &pa[substream->stream];
  618. ppcm = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
  619. &pcm_hardware_playback : &pcm_hardware_capture;
  620. allocate_sram(substream, params->sram_pool, params->sram_size, ppcm);
  621. snd_soc_set_runtime_hwparams(substream, ppcm);
  622. /* ensure that buffer size is a multiple of period size */
  623. ret = snd_pcm_hw_constraint_integer(runtime,
  624. SNDRV_PCM_HW_PARAM_PERIODS);
  625. if (ret < 0)
  626. return ret;
  627. prtd = kzalloc(sizeof(struct davinci_runtime_data), GFP_KERNEL);
  628. if (prtd == NULL)
  629. return -ENOMEM;
  630. spin_lock_init(&prtd->lock);
  631. prtd->params = params;
  632. prtd->asp_channel = -1;
  633. prtd->asp_link[0] = prtd->asp_link[1] = -1;
  634. prtd->ram_channel = -1;
  635. prtd->ram_link = -1;
  636. prtd->ram_link2 = -1;
  637. runtime->private_data = prtd;
  638. ret = davinci_pcm_dma_request(substream);
  639. if (ret) {
  640. printk(KERN_ERR "davinci_pcm: Failed to get dma channels\n");
  641. kfree(prtd);
  642. }
  643. return ret;
  644. }
  645. static int davinci_pcm_close(struct snd_pcm_substream *substream)
  646. {
  647. struct snd_pcm_runtime *runtime = substream->runtime;
  648. struct davinci_runtime_data *prtd = runtime->private_data;
  649. if (prtd->ram_channel >= 0)
  650. edma_stop(prtd->ram_channel);
  651. if (prtd->asp_channel >= 0)
  652. edma_stop(prtd->asp_channel);
  653. if (prtd->asp_link[0] >= 0)
  654. edma_unlink(prtd->asp_link[0]);
  655. if (prtd->asp_link[1] >= 0)
  656. edma_unlink(prtd->asp_link[1]);
  657. if (prtd->ram_link >= 0)
  658. edma_unlink(prtd->ram_link);
  659. if (prtd->asp_link[0] >= 0)
  660. edma_free_slot(prtd->asp_link[0]);
  661. if (prtd->asp_link[1] >= 0)
  662. edma_free_slot(prtd->asp_link[1]);
  663. if (prtd->asp_channel >= 0)
  664. edma_free_channel(prtd->asp_channel);
  665. if (prtd->ram_link >= 0)
  666. edma_free_slot(prtd->ram_link);
  667. if (prtd->ram_link2 >= 0)
  668. edma_free_slot(prtd->ram_link2);
  669. if (prtd->ram_channel >= 0)
  670. edma_free_channel(prtd->ram_channel);
  671. kfree(prtd);
  672. return 0;
  673. }
  674. static int davinci_pcm_hw_params(struct snd_pcm_substream *substream,
  675. struct snd_pcm_hw_params *hw_params)
  676. {
  677. return snd_pcm_lib_malloc_pages(substream,
  678. params_buffer_bytes(hw_params));
  679. }
  680. static int davinci_pcm_hw_free(struct snd_pcm_substream *substream)
  681. {
  682. return snd_pcm_lib_free_pages(substream);
  683. }
  684. static int davinci_pcm_mmap(struct snd_pcm_substream *substream,
  685. struct vm_area_struct *vma)
  686. {
  687. struct snd_pcm_runtime *runtime = substream->runtime;
  688. return dma_mmap_writecombine(substream->pcm->card->dev, vma,
  689. runtime->dma_area,
  690. runtime->dma_addr,
  691. runtime->dma_bytes);
  692. }
  693. static struct snd_pcm_ops davinci_pcm_ops = {
  694. .open = davinci_pcm_open,
  695. .close = davinci_pcm_close,
  696. .ioctl = snd_pcm_lib_ioctl,
  697. .hw_params = davinci_pcm_hw_params,
  698. .hw_free = davinci_pcm_hw_free,
  699. .prepare = davinci_pcm_prepare,
  700. .trigger = davinci_pcm_trigger,
  701. .pointer = davinci_pcm_pointer,
  702. .mmap = davinci_pcm_mmap,
  703. };
  704. static int davinci_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream,
  705. size_t size)
  706. {
  707. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  708. struct snd_dma_buffer *buf = &substream->dma_buffer;
  709. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  710. buf->dev.dev = pcm->card->dev;
  711. buf->private_data = NULL;
  712. buf->area = dma_alloc_writecombine(pcm->card->dev, size,
  713. &buf->addr, GFP_KERNEL);
  714. pr_debug("davinci_pcm: preallocate_dma_buffer: area=%p, addr=%p, "
  715. "size=%d\n", (void *) buf->area, (void *) buf->addr, size);
  716. if (!buf->area)
  717. return -ENOMEM;
  718. buf->bytes = size;
  719. return 0;
  720. }
  721. static void davinci_pcm_free(struct snd_pcm *pcm)
  722. {
  723. struct snd_pcm_substream *substream;
  724. struct snd_dma_buffer *buf;
  725. int stream;
  726. for (stream = 0; stream < 2; stream++) {
  727. struct snd_dma_buffer *iram_dma;
  728. substream = pcm->streams[stream].substream;
  729. if (!substream)
  730. continue;
  731. buf = &substream->dma_buffer;
  732. if (!buf->area)
  733. continue;
  734. dma_free_writecombine(pcm->card->dev, buf->bytes,
  735. buf->area, buf->addr);
  736. buf->area = NULL;
  737. iram_dma = buf->private_data;
  738. if (iram_dma) {
  739. davinci_free_sram(substream, iram_dma);
  740. kfree(iram_dma);
  741. }
  742. }
  743. }
  744. static u64 davinci_pcm_dmamask = DMA_BIT_MASK(32);
  745. static int davinci_pcm_new(struct snd_soc_pcm_runtime *rtd)
  746. {
  747. struct snd_card *card = rtd->card->snd_card;
  748. struct snd_pcm *pcm = rtd->pcm;
  749. int ret;
  750. if (!card->dev->dma_mask)
  751. card->dev->dma_mask = &davinci_pcm_dmamask;
  752. if (!card->dev->coherent_dma_mask)
  753. card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
  754. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
  755. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  756. SNDRV_PCM_STREAM_PLAYBACK,
  757. pcm_hardware_playback.buffer_bytes_max);
  758. if (ret)
  759. return ret;
  760. }
  761. if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
  762. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  763. SNDRV_PCM_STREAM_CAPTURE,
  764. pcm_hardware_capture.buffer_bytes_max);
  765. if (ret)
  766. return ret;
  767. }
  768. return 0;
  769. }
  770. static struct snd_soc_platform_driver davinci_soc_platform = {
  771. .ops = &davinci_pcm_ops,
  772. .pcm_new = davinci_pcm_new,
  773. .pcm_free = davinci_pcm_free,
  774. };
  775. int davinci_soc_platform_register(struct device *dev)
  776. {
  777. return snd_soc_register_platform(dev, &davinci_soc_platform);
  778. }
  779. EXPORT_SYMBOL_GPL(davinci_soc_platform_register);
  780. void davinci_soc_platform_unregister(struct device *dev)
  781. {
  782. snd_soc_unregister_platform(dev);
  783. }
  784. EXPORT_SYMBOL_GPL(davinci_soc_platform_unregister);
  785. MODULE_AUTHOR("Vladimir Barinov");
  786. MODULE_DESCRIPTION("TI DAVINCI PCM DMA module");
  787. MODULE_LICENSE("GPL");