wm8737.c 20 KB

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  1. /*
  2. * wm8737.c -- WM8737 ALSA SoC Audio driver
  3. *
  4. * Copyright 2010 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/init.h>
  15. #include <linux/delay.h>
  16. #include <linux/pm.h>
  17. #include <linux/i2c.h>
  18. #include <linux/regmap.h>
  19. #include <linux/regulator/consumer.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/slab.h>
  22. #include <linux/of_device.h>
  23. #include <sound/core.h>
  24. #include <sound/pcm.h>
  25. #include <sound/pcm_params.h>
  26. #include <sound/soc.h>
  27. #include <sound/soc-dapm.h>
  28. #include <sound/initval.h>
  29. #include <sound/tlv.h>
  30. #include "wm8737.h"
  31. #define WM8737_NUM_SUPPLIES 4
  32. static const char *wm8737_supply_names[WM8737_NUM_SUPPLIES] = {
  33. "DCVDD",
  34. "DBVDD",
  35. "AVDD",
  36. "MVDD",
  37. };
  38. /* codec private data */
  39. struct wm8737_priv {
  40. struct regmap *regmap;
  41. struct regulator_bulk_data supplies[WM8737_NUM_SUPPLIES];
  42. unsigned int mclk;
  43. };
  44. static const struct reg_default wm8737_reg_defaults[] = {
  45. { 0, 0x00C3 }, /* R0 - Left PGA volume */
  46. { 1, 0x00C3 }, /* R1 - Right PGA volume */
  47. { 2, 0x0007 }, /* R2 - AUDIO path L */
  48. { 3, 0x0007 }, /* R3 - AUDIO path R */
  49. { 4, 0x0000 }, /* R4 - 3D Enhance */
  50. { 5, 0x0000 }, /* R5 - ADC Control */
  51. { 6, 0x0000 }, /* R6 - Power Management */
  52. { 7, 0x000A }, /* R7 - Audio Format */
  53. { 8, 0x0000 }, /* R8 - Clocking */
  54. { 9, 0x000F }, /* R9 - MIC Preamp Control */
  55. { 10, 0x0003 }, /* R10 - Misc Bias Control */
  56. { 11, 0x0000 }, /* R11 - Noise Gate */
  57. { 12, 0x007C }, /* R12 - ALC1 */
  58. { 13, 0x0000 }, /* R13 - ALC2 */
  59. { 14, 0x0032 }, /* R14 - ALC3 */
  60. };
  61. static bool wm8737_volatile(struct device *dev, unsigned int reg)
  62. {
  63. switch (reg) {
  64. case WM8737_RESET:
  65. return true;
  66. default:
  67. return false;
  68. }
  69. }
  70. static int wm8737_reset(struct snd_soc_codec *codec)
  71. {
  72. return snd_soc_write(codec, WM8737_RESET, 0);
  73. }
  74. static const unsigned int micboost_tlv[] = {
  75. TLV_DB_RANGE_HEAD(4),
  76. 0, 0, TLV_DB_SCALE_ITEM(1300, 0, 0),
  77. 1, 1, TLV_DB_SCALE_ITEM(1800, 0, 0),
  78. 2, 2, TLV_DB_SCALE_ITEM(2800, 0, 0),
  79. 3, 3, TLV_DB_SCALE_ITEM(3300, 0, 0),
  80. };
  81. static const DECLARE_TLV_DB_SCALE(pga_tlv, -9750, 50, 1);
  82. static const DECLARE_TLV_DB_SCALE(adc_tlv, -600, 600, 0);
  83. static const DECLARE_TLV_DB_SCALE(ng_tlv, -7800, 600, 0);
  84. static const DECLARE_TLV_DB_SCALE(alc_max_tlv, -1200, 600, 0);
  85. static const DECLARE_TLV_DB_SCALE(alc_target_tlv, -1800, 100, 0);
  86. static const char *micbias_enum_text[] = {
  87. "25%",
  88. "50%",
  89. "75%",
  90. "100%",
  91. };
  92. static const struct soc_enum micbias_enum =
  93. SOC_ENUM_SINGLE(WM8737_MIC_PREAMP_CONTROL, 0, 4, micbias_enum_text);
  94. static const char *low_cutoff_text[] = {
  95. "Low", "High"
  96. };
  97. static const struct soc_enum low_3d =
  98. SOC_ENUM_SINGLE(WM8737_3D_ENHANCE, 6, 2, low_cutoff_text);
  99. static const char *high_cutoff_text[] = {
  100. "High", "Low"
  101. };
  102. static const struct soc_enum high_3d =
  103. SOC_ENUM_SINGLE(WM8737_3D_ENHANCE, 5, 2, high_cutoff_text);
  104. static const char *alc_fn_text[] = {
  105. "Disabled", "Right", "Left", "Stereo"
  106. };
  107. static const struct soc_enum alc_fn =
  108. SOC_ENUM_SINGLE(WM8737_ALC1, 7, 4, alc_fn_text);
  109. static const char *alc_hold_text[] = {
  110. "0", "2.67ms", "5.33ms", "10.66ms", "21.32ms", "42.64ms", "85.28ms",
  111. "170.56ms", "341.12ms", "682.24ms", "1.364s", "2.728s", "5.458s",
  112. "10.916s", "21.832s", "43.691s"
  113. };
  114. static const struct soc_enum alc_hold =
  115. SOC_ENUM_SINGLE(WM8737_ALC2, 0, 16, alc_hold_text);
  116. static const char *alc_atk_text[] = {
  117. "8.4ms", "16.8ms", "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms",
  118. "1.075s", "2.15s", "4.3s", "8.6s"
  119. };
  120. static const struct soc_enum alc_atk =
  121. SOC_ENUM_SINGLE(WM8737_ALC3, 0, 11, alc_atk_text);
  122. static const char *alc_dcy_text[] = {
  123. "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms", "1.075s", "2.15s",
  124. "4.3s", "8.6s", "17.2s", "34.41s"
  125. };
  126. static const struct soc_enum alc_dcy =
  127. SOC_ENUM_SINGLE(WM8737_ALC3, 4, 11, alc_dcy_text);
  128. static const struct snd_kcontrol_new wm8737_snd_controls[] = {
  129. SOC_DOUBLE_R_TLV("Mic Boost Volume", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
  130. 6, 3, 0, micboost_tlv),
  131. SOC_DOUBLE_R("Mic Boost Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
  132. 4, 1, 0),
  133. SOC_DOUBLE("Mic ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
  134. 3, 1, 0),
  135. SOC_DOUBLE_R_TLV("Capture Volume", WM8737_LEFT_PGA_VOLUME,
  136. WM8737_RIGHT_PGA_VOLUME, 0, 255, 0, pga_tlv),
  137. SOC_DOUBLE("Capture ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
  138. 2, 1, 0),
  139. SOC_DOUBLE("INPUT1 DC Bias Switch", WM8737_MISC_BIAS_CONTROL, 0, 1, 1, 0),
  140. SOC_ENUM("Mic PGA Bias", micbias_enum),
  141. SOC_SINGLE("ADC Low Power Switch", WM8737_ADC_CONTROL, 2, 1, 0),
  142. SOC_SINGLE("High Pass Filter Switch", WM8737_ADC_CONTROL, 0, 1, 1),
  143. SOC_DOUBLE("Polarity Invert Switch", WM8737_ADC_CONTROL, 5, 6, 1, 0),
  144. SOC_SINGLE("3D Switch", WM8737_3D_ENHANCE, 0, 1, 0),
  145. SOC_SINGLE("3D Depth", WM8737_3D_ENHANCE, 1, 15, 0),
  146. SOC_ENUM("3D Low Cut-off", low_3d),
  147. SOC_ENUM("3D High Cut-off", low_3d),
  148. SOC_SINGLE_TLV("3D ADC Volume", WM8737_3D_ENHANCE, 7, 1, 1, adc_tlv),
  149. SOC_SINGLE("Noise Gate Switch", WM8737_NOISE_GATE, 0, 1, 0),
  150. SOC_SINGLE_TLV("Noise Gate Threshold Volume", WM8737_NOISE_GATE, 2, 7, 0,
  151. ng_tlv),
  152. SOC_ENUM("ALC", alc_fn),
  153. SOC_SINGLE_TLV("ALC Max Gain Volume", WM8737_ALC1, 4, 7, 0, alc_max_tlv),
  154. SOC_SINGLE_TLV("ALC Target Volume", WM8737_ALC1, 0, 15, 0, alc_target_tlv),
  155. SOC_ENUM("ALC Hold Time", alc_hold),
  156. SOC_SINGLE("ALC ZC Switch", WM8737_ALC2, 4, 1, 0),
  157. SOC_ENUM("ALC Attack Time", alc_atk),
  158. SOC_ENUM("ALC Decay Time", alc_dcy),
  159. };
  160. static const char *linsel_text[] = {
  161. "LINPUT1", "LINPUT2", "LINPUT3", "LINPUT1 DC",
  162. };
  163. static const struct soc_enum linsel_enum =
  164. SOC_ENUM_SINGLE(WM8737_AUDIO_PATH_L, 7, 4, linsel_text);
  165. static const struct snd_kcontrol_new linsel_mux =
  166. SOC_DAPM_ENUM("LINSEL", linsel_enum);
  167. static const char *rinsel_text[] = {
  168. "RINPUT1", "RINPUT2", "RINPUT3", "RINPUT1 DC",
  169. };
  170. static const struct soc_enum rinsel_enum =
  171. SOC_ENUM_SINGLE(WM8737_AUDIO_PATH_R, 7, 4, rinsel_text);
  172. static const struct snd_kcontrol_new rinsel_mux =
  173. SOC_DAPM_ENUM("RINSEL", rinsel_enum);
  174. static const char *bypass_text[] = {
  175. "Direct", "Preamp"
  176. };
  177. static const struct soc_enum lbypass_enum =
  178. SOC_ENUM_SINGLE(WM8737_MIC_PREAMP_CONTROL, 2, 2, bypass_text);
  179. static const struct snd_kcontrol_new lbypass_mux =
  180. SOC_DAPM_ENUM("Left Bypass", lbypass_enum);
  181. static const struct soc_enum rbypass_enum =
  182. SOC_ENUM_SINGLE(WM8737_MIC_PREAMP_CONTROL, 3, 2, bypass_text);
  183. static const struct snd_kcontrol_new rbypass_mux =
  184. SOC_DAPM_ENUM("Left Bypass", rbypass_enum);
  185. static const struct snd_soc_dapm_widget wm8737_dapm_widgets[] = {
  186. SND_SOC_DAPM_INPUT("LINPUT1"),
  187. SND_SOC_DAPM_INPUT("LINPUT2"),
  188. SND_SOC_DAPM_INPUT("LINPUT3"),
  189. SND_SOC_DAPM_INPUT("RINPUT1"),
  190. SND_SOC_DAPM_INPUT("RINPUT2"),
  191. SND_SOC_DAPM_INPUT("RINPUT3"),
  192. SND_SOC_DAPM_INPUT("LACIN"),
  193. SND_SOC_DAPM_INPUT("RACIN"),
  194. SND_SOC_DAPM_MUX("LINSEL", SND_SOC_NOPM, 0, 0, &linsel_mux),
  195. SND_SOC_DAPM_MUX("RINSEL", SND_SOC_NOPM, 0, 0, &rinsel_mux),
  196. SND_SOC_DAPM_MUX("Left Preamp Mux", SND_SOC_NOPM, 0, 0, &lbypass_mux),
  197. SND_SOC_DAPM_MUX("Right Preamp Mux", SND_SOC_NOPM, 0, 0, &rbypass_mux),
  198. SND_SOC_DAPM_PGA("PGAL", WM8737_POWER_MANAGEMENT, 5, 0, NULL, 0),
  199. SND_SOC_DAPM_PGA("PGAR", WM8737_POWER_MANAGEMENT, 4, 0, NULL, 0),
  200. SND_SOC_DAPM_DAC("ADCL", NULL, WM8737_POWER_MANAGEMENT, 3, 0),
  201. SND_SOC_DAPM_DAC("ADCR", NULL, WM8737_POWER_MANAGEMENT, 2, 0),
  202. SND_SOC_DAPM_AIF_OUT("AIF", "Capture", 0, WM8737_POWER_MANAGEMENT, 6, 0),
  203. };
  204. static const struct snd_soc_dapm_route intercon[] = {
  205. { "LINSEL", "LINPUT1", "LINPUT1" },
  206. { "LINSEL", "LINPUT2", "LINPUT2" },
  207. { "LINSEL", "LINPUT3", "LINPUT3" },
  208. { "LINSEL", "LINPUT1 DC", "LINPUT1" },
  209. { "RINSEL", "RINPUT1", "RINPUT1" },
  210. { "RINSEL", "RINPUT2", "RINPUT2" },
  211. { "RINSEL", "RINPUT3", "RINPUT3" },
  212. { "RINSEL", "RINPUT1 DC", "RINPUT1" },
  213. { "Left Preamp Mux", "Preamp", "LINSEL" },
  214. { "Left Preamp Mux", "Direct", "LACIN" },
  215. { "Right Preamp Mux", "Preamp", "RINSEL" },
  216. { "Right Preamp Mux", "Direct", "RACIN" },
  217. { "PGAL", NULL, "Left Preamp Mux" },
  218. { "PGAR", NULL, "Right Preamp Mux" },
  219. { "ADCL", NULL, "PGAL" },
  220. { "ADCR", NULL, "PGAR" },
  221. { "AIF", NULL, "ADCL" },
  222. { "AIF", NULL, "ADCR" },
  223. };
  224. static int wm8737_add_widgets(struct snd_soc_codec *codec)
  225. {
  226. struct snd_soc_dapm_context *dapm = &codec->dapm;
  227. snd_soc_dapm_new_controls(dapm, wm8737_dapm_widgets,
  228. ARRAY_SIZE(wm8737_dapm_widgets));
  229. snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
  230. return 0;
  231. }
  232. /* codec mclk clock divider coefficients */
  233. static const struct {
  234. u32 mclk;
  235. u32 rate;
  236. u8 usb;
  237. u8 sr;
  238. } coeff_div[] = {
  239. { 12288000, 8000, 0, 0x4 },
  240. { 12288000, 12000, 0, 0x8 },
  241. { 12288000, 16000, 0, 0xa },
  242. { 12288000, 24000, 0, 0x1c },
  243. { 12288000, 32000, 0, 0xc },
  244. { 12288000, 48000, 0, 0 },
  245. { 12288000, 96000, 0, 0xe },
  246. { 11289600, 8000, 0, 0x14 },
  247. { 11289600, 11025, 0, 0x18 },
  248. { 11289600, 22050, 0, 0x1a },
  249. { 11289600, 44100, 0, 0x10 },
  250. { 11289600, 88200, 0, 0x1e },
  251. { 18432000, 8000, 0, 0x5 },
  252. { 18432000, 12000, 0, 0x9 },
  253. { 18432000, 16000, 0, 0xb },
  254. { 18432000, 24000, 0, 0x1b },
  255. { 18432000, 32000, 0, 0xd },
  256. { 18432000, 48000, 0, 0x1 },
  257. { 18432000, 96000, 0, 0x1f },
  258. { 16934400, 8000, 0, 0x15 },
  259. { 16934400, 11025, 0, 0x19 },
  260. { 16934400, 22050, 0, 0x1b },
  261. { 16934400, 44100, 0, 0x11 },
  262. { 16934400, 88200, 0, 0x1f },
  263. { 12000000, 8000, 1, 0x4 },
  264. { 12000000, 11025, 1, 0x19 },
  265. { 12000000, 12000, 1, 0x8 },
  266. { 12000000, 16000, 1, 0xa },
  267. { 12000000, 22050, 1, 0x1b },
  268. { 12000000, 24000, 1, 0x1c },
  269. { 12000000, 32000, 1, 0xc },
  270. { 12000000, 44100, 1, 0x11 },
  271. { 12000000, 48000, 1, 0x0 },
  272. { 12000000, 88200, 1, 0x1f },
  273. { 12000000, 96000, 1, 0xe },
  274. };
  275. static int wm8737_hw_params(struct snd_pcm_substream *substream,
  276. struct snd_pcm_hw_params *params,
  277. struct snd_soc_dai *dai)
  278. {
  279. struct snd_soc_codec *codec = dai->codec;
  280. struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
  281. int i;
  282. u16 clocking = 0;
  283. u16 af = 0;
  284. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  285. if (coeff_div[i].rate != params_rate(params))
  286. continue;
  287. if (coeff_div[i].mclk == wm8737->mclk)
  288. break;
  289. if (coeff_div[i].mclk == wm8737->mclk * 2) {
  290. clocking |= WM8737_CLKDIV2;
  291. break;
  292. }
  293. }
  294. if (i == ARRAY_SIZE(coeff_div)) {
  295. dev_err(codec->dev, "%dHz MCLK can't support %dHz\n",
  296. wm8737->mclk, params_rate(params));
  297. return -EINVAL;
  298. }
  299. clocking |= coeff_div[i].usb | (coeff_div[i].sr << WM8737_SR_SHIFT);
  300. switch (params_format(params)) {
  301. case SNDRV_PCM_FORMAT_S16_LE:
  302. break;
  303. case SNDRV_PCM_FORMAT_S20_3LE:
  304. af |= 0x8;
  305. break;
  306. case SNDRV_PCM_FORMAT_S24_LE:
  307. af |= 0x10;
  308. break;
  309. case SNDRV_PCM_FORMAT_S32_LE:
  310. af |= 0x18;
  311. break;
  312. default:
  313. return -EINVAL;
  314. }
  315. snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT, WM8737_WL_MASK, af);
  316. snd_soc_update_bits(codec, WM8737_CLOCKING,
  317. WM8737_USB_MODE | WM8737_CLKDIV2 | WM8737_SR_MASK,
  318. clocking);
  319. return 0;
  320. }
  321. static int wm8737_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  322. int clk_id, unsigned int freq, int dir)
  323. {
  324. struct snd_soc_codec *codec = codec_dai->codec;
  325. struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
  326. int i;
  327. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  328. if (freq == coeff_div[i].mclk ||
  329. freq == coeff_div[i].mclk * 2) {
  330. wm8737->mclk = freq;
  331. return 0;
  332. }
  333. }
  334. dev_err(codec->dev, "MCLK rate %dHz not supported\n", freq);
  335. return -EINVAL;
  336. }
  337. static int wm8737_set_dai_fmt(struct snd_soc_dai *codec_dai,
  338. unsigned int fmt)
  339. {
  340. struct snd_soc_codec *codec = codec_dai->codec;
  341. u16 af = 0;
  342. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  343. case SND_SOC_DAIFMT_CBM_CFM:
  344. af |= WM8737_MS;
  345. break;
  346. case SND_SOC_DAIFMT_CBS_CFS:
  347. break;
  348. default:
  349. return -EINVAL;
  350. }
  351. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  352. case SND_SOC_DAIFMT_I2S:
  353. af |= 0x2;
  354. break;
  355. case SND_SOC_DAIFMT_RIGHT_J:
  356. break;
  357. case SND_SOC_DAIFMT_LEFT_J:
  358. af |= 0x1;
  359. break;
  360. case SND_SOC_DAIFMT_DSP_A:
  361. af |= 0x3;
  362. break;
  363. case SND_SOC_DAIFMT_DSP_B:
  364. af |= 0x13;
  365. break;
  366. default:
  367. return -EINVAL;
  368. }
  369. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  370. case SND_SOC_DAIFMT_NB_NF:
  371. break;
  372. case SND_SOC_DAIFMT_NB_IF:
  373. af |= WM8737_LRP;
  374. break;
  375. default:
  376. return -EINVAL;
  377. }
  378. snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT,
  379. WM8737_FORMAT_MASK | WM8737_LRP | WM8737_MS, af);
  380. return 0;
  381. }
  382. static int wm8737_set_bias_level(struct snd_soc_codec *codec,
  383. enum snd_soc_bias_level level)
  384. {
  385. struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
  386. int ret;
  387. switch (level) {
  388. case SND_SOC_BIAS_ON:
  389. break;
  390. case SND_SOC_BIAS_PREPARE:
  391. /* VMID at 2*75k */
  392. snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
  393. WM8737_VMIDSEL_MASK, 0);
  394. break;
  395. case SND_SOC_BIAS_STANDBY:
  396. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  397. ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
  398. wm8737->supplies);
  399. if (ret != 0) {
  400. dev_err(codec->dev,
  401. "Failed to enable supplies: %d\n",
  402. ret);
  403. return ret;
  404. }
  405. regcache_sync(wm8737->regmap);
  406. /* Fast VMID ramp at 2*2.5k */
  407. snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
  408. WM8737_VMIDSEL_MASK, 0x4);
  409. /* Bring VMID up */
  410. snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT,
  411. WM8737_VMID_MASK |
  412. WM8737_VREF_MASK,
  413. WM8737_VMID_MASK |
  414. WM8737_VREF_MASK);
  415. msleep(500);
  416. }
  417. /* VMID at 2*300k */
  418. snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
  419. WM8737_VMIDSEL_MASK, 2);
  420. break;
  421. case SND_SOC_BIAS_OFF:
  422. snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT,
  423. WM8737_VMID_MASK | WM8737_VREF_MASK, 0);
  424. regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies),
  425. wm8737->supplies);
  426. break;
  427. }
  428. codec->dapm.bias_level = level;
  429. return 0;
  430. }
  431. #define WM8737_RATES SNDRV_PCM_RATE_8000_96000
  432. #define WM8737_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  433. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  434. static const struct snd_soc_dai_ops wm8737_dai_ops = {
  435. .hw_params = wm8737_hw_params,
  436. .set_sysclk = wm8737_set_dai_sysclk,
  437. .set_fmt = wm8737_set_dai_fmt,
  438. };
  439. static struct snd_soc_dai_driver wm8737_dai = {
  440. .name = "wm8737",
  441. .capture = {
  442. .stream_name = "Capture",
  443. .channels_min = 2, /* Mono modes not yet supported */
  444. .channels_max = 2,
  445. .rates = WM8737_RATES,
  446. .formats = WM8737_FORMATS,
  447. },
  448. .ops = &wm8737_dai_ops,
  449. };
  450. #ifdef CONFIG_PM
  451. static int wm8737_suspend(struct snd_soc_codec *codec)
  452. {
  453. wm8737_set_bias_level(codec, SND_SOC_BIAS_OFF);
  454. return 0;
  455. }
  456. static int wm8737_resume(struct snd_soc_codec *codec)
  457. {
  458. wm8737_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  459. return 0;
  460. }
  461. #else
  462. #define wm8737_suspend NULL
  463. #define wm8737_resume NULL
  464. #endif
  465. static int wm8737_probe(struct snd_soc_codec *codec)
  466. {
  467. struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
  468. int ret;
  469. ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
  470. if (ret != 0) {
  471. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  472. return ret;
  473. }
  474. ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
  475. wm8737->supplies);
  476. if (ret != 0) {
  477. dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
  478. goto err_get;
  479. }
  480. ret = wm8737_reset(codec);
  481. if (ret < 0) {
  482. dev_err(codec->dev, "Failed to issue reset\n");
  483. goto err_enable;
  484. }
  485. snd_soc_update_bits(codec, WM8737_LEFT_PGA_VOLUME, WM8737_LVU,
  486. WM8737_LVU);
  487. snd_soc_update_bits(codec, WM8737_RIGHT_PGA_VOLUME, WM8737_RVU,
  488. WM8737_RVU);
  489. wm8737_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  490. /* Bias level configuration will have done an extra enable */
  491. regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
  492. snd_soc_add_codec_controls(codec, wm8737_snd_controls,
  493. ARRAY_SIZE(wm8737_snd_controls));
  494. wm8737_add_widgets(codec);
  495. return 0;
  496. err_enable:
  497. regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
  498. err_get:
  499. return ret;
  500. }
  501. static int wm8737_remove(struct snd_soc_codec *codec)
  502. {
  503. wm8737_set_bias_level(codec, SND_SOC_BIAS_OFF);
  504. return 0;
  505. }
  506. static struct snd_soc_codec_driver soc_codec_dev_wm8737 = {
  507. .probe = wm8737_probe,
  508. .remove = wm8737_remove,
  509. .suspend = wm8737_suspend,
  510. .resume = wm8737_resume,
  511. .set_bias_level = wm8737_set_bias_level,
  512. };
  513. static const struct of_device_id wm8737_of_match[] = {
  514. { .compatible = "wlf,wm8737", },
  515. { }
  516. };
  517. MODULE_DEVICE_TABLE(of, wm8737_of_match);
  518. static const struct regmap_config wm8737_regmap = {
  519. .reg_bits = 7,
  520. .val_bits = 9,
  521. .max_register = WM8737_MAX_REGISTER,
  522. .reg_defaults = wm8737_reg_defaults,
  523. .num_reg_defaults = ARRAY_SIZE(wm8737_reg_defaults),
  524. .cache_type = REGCACHE_RBTREE,
  525. .volatile_reg = wm8737_volatile,
  526. };
  527. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  528. static int wm8737_i2c_probe(struct i2c_client *i2c,
  529. const struct i2c_device_id *id)
  530. {
  531. struct wm8737_priv *wm8737;
  532. int ret, i;
  533. wm8737 = devm_kzalloc(&i2c->dev, sizeof(struct wm8737_priv),
  534. GFP_KERNEL);
  535. if (wm8737 == NULL)
  536. return -ENOMEM;
  537. for (i = 0; i < ARRAY_SIZE(wm8737->supplies); i++)
  538. wm8737->supplies[i].supply = wm8737_supply_names[i];
  539. ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8737->supplies),
  540. wm8737->supplies);
  541. if (ret != 0) {
  542. dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
  543. return ret;
  544. }
  545. wm8737->regmap = devm_regmap_init_i2c(i2c, &wm8737_regmap);
  546. if (IS_ERR(wm8737->regmap))
  547. return PTR_ERR(wm8737->regmap);
  548. i2c_set_clientdata(i2c, wm8737);
  549. ret = snd_soc_register_codec(&i2c->dev,
  550. &soc_codec_dev_wm8737, &wm8737_dai, 1);
  551. return ret;
  552. }
  553. static int wm8737_i2c_remove(struct i2c_client *client)
  554. {
  555. snd_soc_unregister_codec(&client->dev);
  556. return 0;
  557. }
  558. static const struct i2c_device_id wm8737_i2c_id[] = {
  559. { "wm8737", 0 },
  560. { }
  561. };
  562. MODULE_DEVICE_TABLE(i2c, wm8737_i2c_id);
  563. static struct i2c_driver wm8737_i2c_driver = {
  564. .driver = {
  565. .name = "wm8737",
  566. .owner = THIS_MODULE,
  567. .of_match_table = wm8737_of_match,
  568. },
  569. .probe = wm8737_i2c_probe,
  570. .remove = wm8737_i2c_remove,
  571. .id_table = wm8737_i2c_id,
  572. };
  573. #endif
  574. #if defined(CONFIG_SPI_MASTER)
  575. static int wm8737_spi_probe(struct spi_device *spi)
  576. {
  577. struct wm8737_priv *wm8737;
  578. int ret, i;
  579. wm8737 = devm_kzalloc(&spi->dev, sizeof(struct wm8737_priv),
  580. GFP_KERNEL);
  581. if (wm8737 == NULL)
  582. return -ENOMEM;
  583. for (i = 0; i < ARRAY_SIZE(wm8737->supplies); i++)
  584. wm8737->supplies[i].supply = wm8737_supply_names[i];
  585. ret = devm_regulator_bulk_get(&spi->dev, ARRAY_SIZE(wm8737->supplies),
  586. wm8737->supplies);
  587. if (ret != 0) {
  588. dev_err(&spi->dev, "Failed to request supplies: %d\n", ret);
  589. return ret;
  590. }
  591. wm8737->regmap = devm_regmap_init_spi(spi, &wm8737_regmap);
  592. if (IS_ERR(wm8737->regmap))
  593. return PTR_ERR(wm8737->regmap);
  594. spi_set_drvdata(spi, wm8737);
  595. ret = snd_soc_register_codec(&spi->dev,
  596. &soc_codec_dev_wm8737, &wm8737_dai, 1);
  597. return ret;
  598. }
  599. static int wm8737_spi_remove(struct spi_device *spi)
  600. {
  601. snd_soc_unregister_codec(&spi->dev);
  602. return 0;
  603. }
  604. static struct spi_driver wm8737_spi_driver = {
  605. .driver = {
  606. .name = "wm8737",
  607. .owner = THIS_MODULE,
  608. .of_match_table = wm8737_of_match,
  609. },
  610. .probe = wm8737_spi_probe,
  611. .remove = wm8737_spi_remove,
  612. };
  613. #endif /* CONFIG_SPI_MASTER */
  614. static int __init wm8737_modinit(void)
  615. {
  616. int ret;
  617. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  618. ret = i2c_add_driver(&wm8737_i2c_driver);
  619. if (ret != 0) {
  620. printk(KERN_ERR "Failed to register WM8737 I2C driver: %d\n",
  621. ret);
  622. }
  623. #endif
  624. #if defined(CONFIG_SPI_MASTER)
  625. ret = spi_register_driver(&wm8737_spi_driver);
  626. if (ret != 0) {
  627. printk(KERN_ERR "Failed to register WM8737 SPI driver: %d\n",
  628. ret);
  629. }
  630. #endif
  631. return 0;
  632. }
  633. module_init(wm8737_modinit);
  634. static void __exit wm8737_exit(void)
  635. {
  636. #if defined(CONFIG_SPI_MASTER)
  637. spi_unregister_driver(&wm8737_spi_driver);
  638. #endif
  639. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  640. i2c_del_driver(&wm8737_i2c_driver);
  641. #endif
  642. }
  643. module_exit(wm8737_exit);
  644. MODULE_DESCRIPTION("ASoC WM8737 driver");
  645. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  646. MODULE_LICENSE("GPL");