tlv320aic26.c 12 KB

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  1. /*
  2. * Texas Instruments TLV320AIC26 low power audio CODEC
  3. * ALSA SoC CODEC driver
  4. *
  5. * Copyright (C) 2008 Secret Lab Technologies Ltd.
  6. */
  7. #include <linux/module.h>
  8. #include <linux/moduleparam.h>
  9. #include <linux/init.h>
  10. #include <linux/delay.h>
  11. #include <linux/pm.h>
  12. #include <linux/device.h>
  13. #include <linux/sysfs.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/slab.h>
  16. #include <sound/core.h>
  17. #include <sound/pcm.h>
  18. #include <sound/pcm_params.h>
  19. #include <sound/soc.h>
  20. #include <sound/initval.h>
  21. #include "tlv320aic26.h"
  22. MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver");
  23. MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
  24. MODULE_LICENSE("GPL");
  25. /* AIC26 driver private data */
  26. struct aic26 {
  27. struct spi_device *spi;
  28. struct snd_soc_codec codec;
  29. int master;
  30. int datfm;
  31. int mclk;
  32. /* Keyclick parameters */
  33. int keyclick_amplitude;
  34. int keyclick_freq;
  35. int keyclick_len;
  36. };
  37. /* ---------------------------------------------------------------------
  38. * Register access routines
  39. */
  40. static unsigned int aic26_reg_read(struct snd_soc_codec *codec,
  41. unsigned int reg)
  42. {
  43. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  44. u16 *cache = codec->reg_cache;
  45. u16 cmd, value;
  46. u8 buffer[2];
  47. int rc;
  48. if (reg >= AIC26_NUM_REGS) {
  49. WARN_ON_ONCE(1);
  50. return 0;
  51. }
  52. /* Do SPI transfer; first 16bits are command; remaining is
  53. * register contents */
  54. cmd = AIC26_READ_COMMAND_WORD(reg);
  55. buffer[0] = (cmd >> 8) & 0xff;
  56. buffer[1] = cmd & 0xff;
  57. rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2);
  58. if (rc) {
  59. dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
  60. return -EIO;
  61. }
  62. value = (buffer[0] << 8) | buffer[1];
  63. /* Update the cache before returning with the value */
  64. cache[reg] = value;
  65. return value;
  66. }
  67. static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec,
  68. unsigned int reg)
  69. {
  70. u16 *cache = codec->reg_cache;
  71. if (reg >= AIC26_NUM_REGS) {
  72. WARN_ON_ONCE(1);
  73. return 0;
  74. }
  75. return cache[reg];
  76. }
  77. static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg,
  78. unsigned int value)
  79. {
  80. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  81. u16 *cache = codec->reg_cache;
  82. u16 cmd;
  83. u8 buffer[4];
  84. int rc;
  85. if (reg >= AIC26_NUM_REGS) {
  86. WARN_ON_ONCE(1);
  87. return -EINVAL;
  88. }
  89. /* Do SPI transfer; first 16bits are command; remaining is data
  90. * to write into register */
  91. cmd = AIC26_WRITE_COMMAND_WORD(reg);
  92. buffer[0] = (cmd >> 8) & 0xff;
  93. buffer[1] = cmd & 0xff;
  94. buffer[2] = value >> 8;
  95. buffer[3] = value;
  96. rc = spi_write(aic26->spi, buffer, 4);
  97. if (rc) {
  98. dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
  99. return -EIO;
  100. }
  101. /* update cache before returning */
  102. cache[reg] = value;
  103. return 0;
  104. }
  105. /* ---------------------------------------------------------------------
  106. * Digital Audio Interface Operations
  107. */
  108. static int aic26_hw_params(struct snd_pcm_substream *substream,
  109. struct snd_pcm_hw_params *params,
  110. struct snd_soc_dai *dai)
  111. {
  112. struct snd_soc_codec *codec = dai->codec;
  113. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  114. int fsref, divisor, wlen, pval, jval, dval, qval;
  115. u16 reg;
  116. dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n",
  117. substream, params);
  118. dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params),
  119. params_format(params));
  120. switch (params_rate(params)) {
  121. case 8000: fsref = 48000; divisor = AIC26_DIV_6; break;
  122. case 11025: fsref = 44100; divisor = AIC26_DIV_4; break;
  123. case 12000: fsref = 48000; divisor = AIC26_DIV_4; break;
  124. case 16000: fsref = 48000; divisor = AIC26_DIV_3; break;
  125. case 22050: fsref = 44100; divisor = AIC26_DIV_2; break;
  126. case 24000: fsref = 48000; divisor = AIC26_DIV_2; break;
  127. case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break;
  128. case 44100: fsref = 44100; divisor = AIC26_DIV_1; break;
  129. case 48000: fsref = 48000; divisor = AIC26_DIV_1; break;
  130. default:
  131. dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL;
  132. }
  133. /* select data word length */
  134. switch (params_format(params)) {
  135. case SNDRV_PCM_FORMAT_S8: wlen = AIC26_WLEN_16; break;
  136. case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break;
  137. case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break;
  138. case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break;
  139. default:
  140. dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
  141. }
  142. /**
  143. * Configure PLL
  144. * fsref = (mclk * PLLM) / 2048
  145. * where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal)
  146. */
  147. pval = 1;
  148. /* compute J portion of multiplier */
  149. jval = fsref / (aic26->mclk / 2048);
  150. /* compute fractional DDDD component of multiplier */
  151. dval = fsref - (jval * (aic26->mclk / 2048));
  152. dval = (10000 * dval) / (aic26->mclk / 2048);
  153. dev_dbg(&aic26->spi->dev, "Setting PLLM to %d.%04d\n", jval, dval);
  154. qval = 0;
  155. reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
  156. aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg);
  157. reg = dval << 2;
  158. aic26_reg_write(codec, AIC26_REG_PLL_PROG2, reg);
  159. /* Audio Control 3 (master mode, fsref rate) */
  160. reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3);
  161. reg &= ~0xf800;
  162. if (aic26->master)
  163. reg |= 0x0800;
  164. if (fsref == 48000)
  165. reg |= 0x2000;
  166. aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
  167. /* Audio Control 1 (FSref divisor) */
  168. reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1);
  169. reg &= ~0x0fff;
  170. reg |= wlen | aic26->datfm | (divisor << 3) | divisor;
  171. aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL1, reg);
  172. return 0;
  173. }
  174. /**
  175. * aic26_mute - Mute control to reduce noise when changing audio format
  176. */
  177. static int aic26_mute(struct snd_soc_dai *dai, int mute)
  178. {
  179. struct snd_soc_codec *codec = dai->codec;
  180. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  181. u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN);
  182. dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n",
  183. dai, mute);
  184. if (mute)
  185. reg |= 0x8080;
  186. else
  187. reg &= ~0x8080;
  188. aic26_reg_write(codec, AIC26_REG_DAC_GAIN, reg);
  189. return 0;
  190. }
  191. static int aic26_set_sysclk(struct snd_soc_dai *codec_dai,
  192. int clk_id, unsigned int freq, int dir)
  193. {
  194. struct snd_soc_codec *codec = codec_dai->codec;
  195. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  196. dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i,"
  197. " freq=%i, dir=%i)\n",
  198. codec_dai, clk_id, freq, dir);
  199. /* MCLK needs to fall between 2MHz and 50 MHz */
  200. if ((freq < 2000000) || (freq > 50000000))
  201. return -EINVAL;
  202. aic26->mclk = freq;
  203. return 0;
  204. }
  205. static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
  206. {
  207. struct snd_soc_codec *codec = codec_dai->codec;
  208. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  209. dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n",
  210. codec_dai, fmt);
  211. /* set master/slave audio interface */
  212. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  213. case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break;
  214. case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break;
  215. default:
  216. dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL;
  217. }
  218. /* interface format */
  219. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  220. case SND_SOC_DAIFMT_I2S: aic26->datfm = AIC26_DATFM_I2S; break;
  221. case SND_SOC_DAIFMT_DSP_A: aic26->datfm = AIC26_DATFM_DSP; break;
  222. case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break;
  223. case SND_SOC_DAIFMT_LEFT_J: aic26->datfm = AIC26_DATFM_LEFTJ; break;
  224. default:
  225. dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
  226. }
  227. return 0;
  228. }
  229. /* ---------------------------------------------------------------------
  230. * Digital Audio Interface Definition
  231. */
  232. #define AIC26_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
  233. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
  234. SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
  235. SNDRV_PCM_RATE_48000)
  236. #define AIC26_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |\
  237. SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE)
  238. static const struct snd_soc_dai_ops aic26_dai_ops = {
  239. .hw_params = aic26_hw_params,
  240. .digital_mute = aic26_mute,
  241. .set_sysclk = aic26_set_sysclk,
  242. .set_fmt = aic26_set_fmt,
  243. };
  244. static struct snd_soc_dai_driver aic26_dai = {
  245. .name = "tlv320aic26-hifi",
  246. .playback = {
  247. .stream_name = "Playback",
  248. .channels_min = 2,
  249. .channels_max = 2,
  250. .rates = AIC26_RATES,
  251. .formats = AIC26_FORMATS,
  252. },
  253. .capture = {
  254. .stream_name = "Capture",
  255. .channels_min = 2,
  256. .channels_max = 2,
  257. .rates = AIC26_RATES,
  258. .formats = AIC26_FORMATS,
  259. },
  260. .ops = &aic26_dai_ops,
  261. };
  262. /* ---------------------------------------------------------------------
  263. * ALSA controls
  264. */
  265. static const char *aic26_capture_src_text[] = {"Mic", "Aux"};
  266. static const struct soc_enum aic26_capture_src_enum =
  267. SOC_ENUM_SINGLE(AIC26_REG_AUDIO_CTRL1, 12, 2, aic26_capture_src_text);
  268. static const struct snd_kcontrol_new aic26_snd_controls[] = {
  269. /* Output */
  270. SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1),
  271. SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1),
  272. SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0),
  273. SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1),
  274. SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0),
  275. SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0),
  276. SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0),
  277. SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0),
  278. SOC_ENUM("Capture Source", aic26_capture_src_enum),
  279. };
  280. /* ---------------------------------------------------------------------
  281. * SPI device portion of driver: sysfs files for debugging
  282. */
  283. static ssize_t aic26_keyclick_show(struct device *dev,
  284. struct device_attribute *attr, char *buf)
  285. {
  286. struct aic26 *aic26 = dev_get_drvdata(dev);
  287. int val, amp, freq, len;
  288. val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
  289. amp = (val >> 12) & 0x7;
  290. freq = (125 << ((val >> 8) & 0x7)) >> 1;
  291. len = 2 * (1 + ((val >> 4) & 0xf));
  292. return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len);
  293. }
  294. /* Any write to the keyclick attribute will trigger the keyclick event */
  295. static ssize_t aic26_keyclick_set(struct device *dev,
  296. struct device_attribute *attr,
  297. const char *buf, size_t count)
  298. {
  299. struct aic26 *aic26 = dev_get_drvdata(dev);
  300. int val;
  301. val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
  302. val |= 0x8000;
  303. aic26_reg_write(&aic26->codec, AIC26_REG_AUDIO_CTRL2, val);
  304. return count;
  305. }
  306. static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set);
  307. /* ---------------------------------------------------------------------
  308. * SoC CODEC portion of driver: probe and release routines
  309. */
  310. static int aic26_probe(struct snd_soc_codec *codec)
  311. {
  312. int ret, err, i, reg;
  313. dev_info(codec->dev, "Probing AIC26 SoC CODEC driver\n");
  314. /* Reset the codec to power on defaults */
  315. aic26_reg_write(codec, AIC26_REG_RESET, 0xBB00);
  316. /* Power up CODEC */
  317. aic26_reg_write(codec, AIC26_REG_POWER_CTRL, 0);
  318. /* Audio Control 3 (master mode, fsref rate) */
  319. reg = aic26_reg_read(codec, AIC26_REG_AUDIO_CTRL3);
  320. reg &= ~0xf800;
  321. reg |= 0x0800; /* set master mode */
  322. aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
  323. /* Fill register cache */
  324. for (i = 0; i < codec->driver->reg_cache_size; i++)
  325. aic26_reg_read(codec, i);
  326. /* Register the sysfs files for debugging */
  327. /* Create SysFS files */
  328. ret = device_create_file(codec->dev, &dev_attr_keyclick);
  329. if (ret)
  330. dev_info(codec->dev, "error creating sysfs files\n");
  331. /* register controls */
  332. dev_dbg(codec->dev, "Registering controls\n");
  333. err = snd_soc_add_codec_controls(codec, aic26_snd_controls,
  334. ARRAY_SIZE(aic26_snd_controls));
  335. WARN_ON(err < 0);
  336. return 0;
  337. }
  338. static struct snd_soc_codec_driver aic26_soc_codec_dev = {
  339. .probe = aic26_probe,
  340. .read = aic26_reg_read,
  341. .write = aic26_reg_write,
  342. .reg_cache_size = AIC26_NUM_REGS,
  343. .reg_word_size = sizeof(u16),
  344. };
  345. /* ---------------------------------------------------------------------
  346. * SPI device portion of driver: probe and release routines and SPI
  347. * driver registration.
  348. */
  349. static int aic26_spi_probe(struct spi_device *spi)
  350. {
  351. struct aic26 *aic26;
  352. int ret;
  353. dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n");
  354. /* Allocate driver data */
  355. aic26 = devm_kzalloc(&spi->dev, sizeof *aic26, GFP_KERNEL);
  356. if (!aic26)
  357. return -ENOMEM;
  358. /* Initialize the driver data */
  359. aic26->spi = spi;
  360. dev_set_drvdata(&spi->dev, aic26);
  361. aic26->master = 1;
  362. ret = snd_soc_register_codec(&spi->dev,
  363. &aic26_soc_codec_dev, &aic26_dai, 1);
  364. return ret;
  365. }
  366. static int aic26_spi_remove(struct spi_device *spi)
  367. {
  368. snd_soc_unregister_codec(&spi->dev);
  369. return 0;
  370. }
  371. static struct spi_driver aic26_spi = {
  372. .driver = {
  373. .name = "tlv320aic26-codec",
  374. .owner = THIS_MODULE,
  375. },
  376. .probe = aic26_spi_probe,
  377. .remove = aic26_spi_remove,
  378. };
  379. module_spi_driver(aic26_spi);