da732x.c 50 KB

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  1. /*
  2. * da732x.c --- Dialog DA732X ALSA SoC Audio Driver
  3. *
  4. * Copyright (C) 2012 Dialog Semiconductor GmbH
  5. *
  6. * Author: Michal Hajduk <Michal.Hajduk@diasemi.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/init.h>
  15. #include <linux/delay.h>
  16. #include <linux/pm.h>
  17. #include <linux/i2c.h>
  18. #include <linux/regmap.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/slab.h>
  21. #include <linux/sysfs.h>
  22. #include <sound/core.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/initval.h>
  28. #include <sound/tlv.h>
  29. #include <asm/div64.h>
  30. #include "da732x.h"
  31. #include "da732x_reg.h"
  32. struct da732x_priv {
  33. struct regmap *regmap;
  34. struct snd_soc_codec *codec;
  35. unsigned int sysclk;
  36. bool pll_en;
  37. };
  38. /*
  39. * da732x register cache - default settings
  40. */
  41. static struct reg_default da732x_reg_cache[] = {
  42. { DA732X_REG_REF1 , 0x02 },
  43. { DA732X_REG_BIAS_EN , 0x80 },
  44. { DA732X_REG_BIAS1 , 0x00 },
  45. { DA732X_REG_BIAS2 , 0x00 },
  46. { DA732X_REG_BIAS3 , 0x00 },
  47. { DA732X_REG_BIAS4 , 0x00 },
  48. { DA732X_REG_MICBIAS2 , 0x00 },
  49. { DA732X_REG_MICBIAS1 , 0x00 },
  50. { DA732X_REG_MICDET , 0x00 },
  51. { DA732X_REG_MIC1_PRE , 0x01 },
  52. { DA732X_REG_MIC1 , 0x40 },
  53. { DA732X_REG_MIC2_PRE , 0x01 },
  54. { DA732X_REG_MIC2 , 0x40 },
  55. { DA732X_REG_AUX1L , 0x75 },
  56. { DA732X_REG_AUX1R , 0x75 },
  57. { DA732X_REG_MIC3_PRE , 0x01 },
  58. { DA732X_REG_MIC3 , 0x40 },
  59. { DA732X_REG_INP_PINBIAS , 0x00 },
  60. { DA732X_REG_INP_ZC_EN , 0x00 },
  61. { DA732X_REG_INP_MUX , 0x50 },
  62. { DA732X_REG_HP_DET , 0x00 },
  63. { DA732X_REG_HPL_DAC_OFFSET , 0x00 },
  64. { DA732X_REG_HPL_DAC_OFF_CNTL , 0x00 },
  65. { DA732X_REG_HPL_OUT_OFFSET , 0x00 },
  66. { DA732X_REG_HPL , 0x40 },
  67. { DA732X_REG_HPL_VOL , 0x0F },
  68. { DA732X_REG_HPR_DAC_OFFSET , 0x00 },
  69. { DA732X_REG_HPR_DAC_OFF_CNTL , 0x00 },
  70. { DA732X_REG_HPR_OUT_OFFSET , 0x00 },
  71. { DA732X_REG_HPR , 0x40 },
  72. { DA732X_REG_HPR_VOL , 0x0F },
  73. { DA732X_REG_LIN2 , 0x4F },
  74. { DA732X_REG_LIN3 , 0x4F },
  75. { DA732X_REG_LIN4 , 0x4F },
  76. { DA732X_REG_OUT_ZC_EN , 0x00 },
  77. { DA732X_REG_HP_LIN1_GNDSEL , 0x00 },
  78. { DA732X_REG_CP_HP1 , 0x0C },
  79. { DA732X_REG_CP_HP2 , 0x03 },
  80. { DA732X_REG_CP_CTRL1 , 0x00 },
  81. { DA732X_REG_CP_CTRL2 , 0x99 },
  82. { DA732X_REG_CP_CTRL3 , 0x25 },
  83. { DA732X_REG_CP_LEVEL_MASK , 0x3F },
  84. { DA732X_REG_CP_DET , 0x00 },
  85. { DA732X_REG_CP_STATUS , 0x00 },
  86. { DA732X_REG_CP_THRESH1 , 0x00 },
  87. { DA732X_REG_CP_THRESH2 , 0x00 },
  88. { DA732X_REG_CP_THRESH3 , 0x00 },
  89. { DA732X_REG_CP_THRESH4 , 0x00 },
  90. { DA732X_REG_CP_THRESH5 , 0x00 },
  91. { DA732X_REG_CP_THRESH6 , 0x00 },
  92. { DA732X_REG_CP_THRESH7 , 0x00 },
  93. { DA732X_REG_CP_THRESH8 , 0x00 },
  94. { DA732X_REG_PLL_DIV_LO , 0x00 },
  95. { DA732X_REG_PLL_DIV_MID , 0x00 },
  96. { DA732X_REG_PLL_DIV_HI , 0x00 },
  97. { DA732X_REG_PLL_CTRL , 0x02 },
  98. { DA732X_REG_CLK_CTRL , 0xaa },
  99. { DA732X_REG_CLK_DSP , 0x07 },
  100. { DA732X_REG_CLK_EN1 , 0x00 },
  101. { DA732X_REG_CLK_EN2 , 0x00 },
  102. { DA732X_REG_CLK_EN3 , 0x00 },
  103. { DA732X_REG_CLK_EN4 , 0x00 },
  104. { DA732X_REG_CLK_EN5 , 0x00 },
  105. { DA732X_REG_AIF_MCLK , 0x00 },
  106. { DA732X_REG_AIFA1 , 0x02 },
  107. { DA732X_REG_AIFA2 , 0x00 },
  108. { DA732X_REG_AIFA3 , 0x08 },
  109. { DA732X_REG_AIFB1 , 0x02 },
  110. { DA732X_REG_AIFB2 , 0x00 },
  111. { DA732X_REG_AIFB3 , 0x08 },
  112. { DA732X_REG_PC_CTRL , 0xC0 },
  113. { DA732X_REG_DATA_ROUTE , 0x00 },
  114. { DA732X_REG_DSP_CTRL , 0x00 },
  115. { DA732X_REG_CIF_CTRL2 , 0x00 },
  116. { DA732X_REG_HANDSHAKE , 0x00 },
  117. { DA732X_REG_SPARE1_OUT , 0x00 },
  118. { DA732X_REG_SPARE2_OUT , 0x00 },
  119. { DA732X_REG_SPARE1_IN , 0x00 },
  120. { DA732X_REG_ADC1_PD , 0x00 },
  121. { DA732X_REG_ADC1_HPF , 0x00 },
  122. { DA732X_REG_ADC1_SEL , 0x00 },
  123. { DA732X_REG_ADC1_EQ12 , 0x00 },
  124. { DA732X_REG_ADC1_EQ34 , 0x00 },
  125. { DA732X_REG_ADC1_EQ5 , 0x00 },
  126. { DA732X_REG_ADC2_PD , 0x00 },
  127. { DA732X_REG_ADC2_HPF , 0x00 },
  128. { DA732X_REG_ADC2_SEL , 0x00 },
  129. { DA732X_REG_ADC2_EQ12 , 0x00 },
  130. { DA732X_REG_ADC2_EQ34 , 0x00 },
  131. { DA732X_REG_ADC2_EQ5 , 0x00 },
  132. { DA732X_REG_DAC1_HPF , 0x00 },
  133. { DA732X_REG_DAC1_L_VOL , 0x00 },
  134. { DA732X_REG_DAC1_R_VOL , 0x00 },
  135. { DA732X_REG_DAC1_SEL , 0x00 },
  136. { DA732X_REG_DAC1_SOFTMUTE , 0x00 },
  137. { DA732X_REG_DAC1_EQ12 , 0x00 },
  138. { DA732X_REG_DAC1_EQ34 , 0x00 },
  139. { DA732X_REG_DAC1_EQ5 , 0x00 },
  140. { DA732X_REG_DAC2_HPF , 0x00 },
  141. { DA732X_REG_DAC2_L_VOL , 0x00 },
  142. { DA732X_REG_DAC2_R_VOL , 0x00 },
  143. { DA732X_REG_DAC2_SEL , 0x00 },
  144. { DA732X_REG_DAC2_SOFTMUTE , 0x00 },
  145. { DA732X_REG_DAC2_EQ12 , 0x00 },
  146. { DA732X_REG_DAC2_EQ34 , 0x00 },
  147. { DA732X_REG_DAC2_EQ5 , 0x00 },
  148. { DA732X_REG_DAC3_HPF , 0x00 },
  149. { DA732X_REG_DAC3_VOL , 0x00 },
  150. { DA732X_REG_DAC3_SEL , 0x00 },
  151. { DA732X_REG_DAC3_SOFTMUTE , 0x00 },
  152. { DA732X_REG_DAC3_EQ12 , 0x00 },
  153. { DA732X_REG_DAC3_EQ34 , 0x00 },
  154. { DA732X_REG_DAC3_EQ5 , 0x00 },
  155. { DA732X_REG_BIQ_BYP , 0x00 },
  156. { DA732X_REG_DMA_CMD , 0x00 },
  157. { DA732X_REG_DMA_ADDR0 , 0x00 },
  158. { DA732X_REG_DMA_ADDR1 , 0x00 },
  159. { DA732X_REG_DMA_DATA0 , 0x00 },
  160. { DA732X_REG_DMA_DATA1 , 0x00 },
  161. { DA732X_REG_DMA_DATA2 , 0x00 },
  162. { DA732X_REG_DMA_DATA3 , 0x00 },
  163. { DA732X_REG_UNLOCK , 0x00 },
  164. };
  165. static inline int da732x_get_input_div(struct snd_soc_codec *codec, int sysclk)
  166. {
  167. int val;
  168. int ret;
  169. if (sysclk < DA732X_MCLK_10MHZ) {
  170. val = DA732X_MCLK_RET_0_10MHZ;
  171. ret = DA732X_MCLK_VAL_0_10MHZ;
  172. } else if ((sysclk >= DA732X_MCLK_10MHZ) &&
  173. (sysclk < DA732X_MCLK_20MHZ)) {
  174. val = DA732X_MCLK_RET_10_20MHZ;
  175. ret = DA732X_MCLK_VAL_10_20MHZ;
  176. } else if ((sysclk >= DA732X_MCLK_20MHZ) &&
  177. (sysclk < DA732X_MCLK_40MHZ)) {
  178. val = DA732X_MCLK_RET_20_40MHZ;
  179. ret = DA732X_MCLK_VAL_20_40MHZ;
  180. } else if ((sysclk >= DA732X_MCLK_40MHZ) &&
  181. (sysclk <= DA732X_MCLK_54MHZ)) {
  182. val = DA732X_MCLK_RET_40_54MHZ;
  183. ret = DA732X_MCLK_VAL_40_54MHZ;
  184. } else {
  185. return -EINVAL;
  186. }
  187. snd_soc_write(codec, DA732X_REG_PLL_CTRL, val);
  188. return ret;
  189. }
  190. static void da732x_set_charge_pump(struct snd_soc_codec *codec, int state)
  191. {
  192. switch (state) {
  193. case DA732X_ENABLE_CP:
  194. snd_soc_write(codec, DA732X_REG_CLK_EN2, DA732X_CP_CLK_EN);
  195. snd_soc_write(codec, DA732X_REG_CP_HP2, DA732X_HP_CP_EN |
  196. DA732X_HP_CP_REG | DA732X_HP_CP_PULSESKIP);
  197. snd_soc_write(codec, DA732X_REG_CP_CTRL1, DA732X_CP_EN |
  198. DA732X_CP_CTRL_CPVDD1);
  199. snd_soc_write(codec, DA732X_REG_CP_CTRL2,
  200. DA732X_CP_MANAGE_MAGNITUDE | DA732X_CP_BOOST);
  201. snd_soc_write(codec, DA732X_REG_CP_CTRL3, DA732X_CP_1MHZ);
  202. break;
  203. case DA732X_DISABLE_CP:
  204. snd_soc_write(codec, DA732X_REG_CLK_EN2, DA732X_CP_CLK_DIS);
  205. snd_soc_write(codec, DA732X_REG_CP_HP2, DA732X_HP_CP_DIS);
  206. snd_soc_write(codec, DA732X_REG_CP_CTRL1, DA723X_CP_DIS);
  207. break;
  208. default:
  209. pr_err(KERN_ERR "Wrong charge pump state\n");
  210. break;
  211. }
  212. }
  213. static const DECLARE_TLV_DB_SCALE(mic_boost_tlv, DA732X_MIC_PRE_VOL_DB_MIN,
  214. DA732X_MIC_PRE_VOL_DB_INC, 0);
  215. static const DECLARE_TLV_DB_SCALE(mic_pga_tlv, DA732X_MIC_VOL_DB_MIN,
  216. DA732X_MIC_VOL_DB_INC, 0);
  217. static const DECLARE_TLV_DB_SCALE(aux_pga_tlv, DA732X_AUX_VOL_DB_MIN,
  218. DA732X_AUX_VOL_DB_INC, 0);
  219. static const DECLARE_TLV_DB_SCALE(hp_pga_tlv, DA732X_HP_VOL_DB_MIN,
  220. DA732X_AUX_VOL_DB_INC, 0);
  221. static const DECLARE_TLV_DB_SCALE(lin2_pga_tlv, DA732X_LIN2_VOL_DB_MIN,
  222. DA732X_LIN2_VOL_DB_INC, 0);
  223. static const DECLARE_TLV_DB_SCALE(lin3_pga_tlv, DA732X_LIN3_VOL_DB_MIN,
  224. DA732X_LIN3_VOL_DB_INC, 0);
  225. static const DECLARE_TLV_DB_SCALE(lin4_pga_tlv, DA732X_LIN4_VOL_DB_MIN,
  226. DA732X_LIN4_VOL_DB_INC, 0);
  227. static const DECLARE_TLV_DB_SCALE(adc_pga_tlv, DA732X_ADC_VOL_DB_MIN,
  228. DA732X_ADC_VOL_DB_INC, 0);
  229. static const DECLARE_TLV_DB_SCALE(dac_pga_tlv, DA732X_DAC_VOL_DB_MIN,
  230. DA732X_DAC_VOL_DB_INC, 0);
  231. static const DECLARE_TLV_DB_SCALE(eq_band_pga_tlv, DA732X_EQ_BAND_VOL_DB_MIN,
  232. DA732X_EQ_BAND_VOL_DB_INC, 0);
  233. static const DECLARE_TLV_DB_SCALE(eq_overall_tlv, DA732X_EQ_OVERALL_VOL_DB_MIN,
  234. DA732X_EQ_OVERALL_VOL_DB_INC, 0);
  235. /* High Pass Filter */
  236. static const char *da732x_hpf_mode[] = {
  237. "Disable", "Music", "Voice",
  238. };
  239. static const char *da732x_hpf_music[] = {
  240. "1.8Hz", "3.75Hz", "7.5Hz", "15Hz",
  241. };
  242. static const char *da732x_hpf_voice[] = {
  243. "2.5Hz", "25Hz", "50Hz", "100Hz",
  244. "150Hz", "200Hz", "300Hz", "400Hz"
  245. };
  246. static const struct soc_enum da732x_dac1_hpf_mode_enum[] = {
  247. SOC_ENUM_SINGLE(DA732X_REG_DAC1_HPF, DA732X_HPF_MODE_SHIFT,
  248. DA732X_HPF_MODE_MAX, da732x_hpf_mode)
  249. };
  250. static const struct soc_enum da732x_dac2_hpf_mode_enum[] = {
  251. SOC_ENUM_SINGLE(DA732X_REG_DAC2_HPF, DA732X_HPF_MODE_SHIFT,
  252. DA732X_HPF_MODE_MAX, da732x_hpf_mode)
  253. };
  254. static const struct soc_enum da732x_dac3_hpf_mode_enum[] = {
  255. SOC_ENUM_SINGLE(DA732X_REG_DAC3_HPF, DA732X_HPF_MODE_SHIFT,
  256. DA732X_HPF_MODE_MAX, da732x_hpf_mode)
  257. };
  258. static const struct soc_enum da732x_adc1_hpf_mode_enum[] = {
  259. SOC_ENUM_SINGLE(DA732X_REG_ADC1_HPF, DA732X_HPF_MODE_SHIFT,
  260. DA732X_HPF_MODE_MAX, da732x_hpf_mode)
  261. };
  262. static const struct soc_enum da732x_adc2_hpf_mode_enum[] = {
  263. SOC_ENUM_SINGLE(DA732X_REG_ADC2_HPF, DA732X_HPF_MODE_SHIFT,
  264. DA732X_HPF_MODE_MAX, da732x_hpf_mode)
  265. };
  266. static const struct soc_enum da732x_dac1_hp_filter_enum[] = {
  267. SOC_ENUM_SINGLE(DA732X_REG_DAC1_HPF, DA732X_HPF_MUSIC_SHIFT,
  268. DA732X_HPF_MUSIC_MAX, da732x_hpf_music)
  269. };
  270. static const struct soc_enum da732x_dac2_hp_filter_enum[] = {
  271. SOC_ENUM_SINGLE(DA732X_REG_DAC2_HPF, DA732X_HPF_MUSIC_SHIFT,
  272. DA732X_HPF_MUSIC_MAX, da732x_hpf_music)
  273. };
  274. static const struct soc_enum da732x_dac3_hp_filter_enum[] = {
  275. SOC_ENUM_SINGLE(DA732X_REG_DAC3_HPF, DA732X_HPF_MUSIC_SHIFT,
  276. DA732X_HPF_MUSIC_MAX, da732x_hpf_music)
  277. };
  278. static const struct soc_enum da732x_adc1_hp_filter_enum[] = {
  279. SOC_ENUM_SINGLE(DA732X_REG_ADC1_HPF, DA732X_HPF_MUSIC_SHIFT,
  280. DA732X_HPF_MUSIC_MAX, da732x_hpf_music)
  281. };
  282. static const struct soc_enum da732x_adc2_hp_filter_enum[] = {
  283. SOC_ENUM_SINGLE(DA732X_REG_ADC2_HPF, DA732X_HPF_MUSIC_SHIFT,
  284. DA732X_HPF_MUSIC_MAX, da732x_hpf_music)
  285. };
  286. static const struct soc_enum da732x_dac1_voice_filter_enum[] = {
  287. SOC_ENUM_SINGLE(DA732X_REG_DAC1_HPF, DA732X_HPF_VOICE_SHIFT,
  288. DA732X_HPF_VOICE_MAX, da732x_hpf_voice)
  289. };
  290. static const struct soc_enum da732x_dac2_voice_filter_enum[] = {
  291. SOC_ENUM_SINGLE(DA732X_REG_DAC2_HPF, DA732X_HPF_VOICE_SHIFT,
  292. DA732X_HPF_VOICE_MAX, da732x_hpf_voice)
  293. };
  294. static const struct soc_enum da732x_dac3_voice_filter_enum[] = {
  295. SOC_ENUM_SINGLE(DA732X_REG_DAC3_HPF, DA732X_HPF_VOICE_SHIFT,
  296. DA732X_HPF_VOICE_MAX, da732x_hpf_voice)
  297. };
  298. static const struct soc_enum da732x_adc1_voice_filter_enum[] = {
  299. SOC_ENUM_SINGLE(DA732X_REG_ADC1_HPF, DA732X_HPF_VOICE_SHIFT,
  300. DA732X_HPF_VOICE_MAX, da732x_hpf_voice)
  301. };
  302. static const struct soc_enum da732x_adc2_voice_filter_enum[] = {
  303. SOC_ENUM_SINGLE(DA732X_REG_ADC2_HPF, DA732X_HPF_VOICE_SHIFT,
  304. DA732X_HPF_VOICE_MAX, da732x_hpf_voice)
  305. };
  306. static int da732x_hpf_set(struct snd_kcontrol *kcontrol,
  307. struct snd_ctl_elem_value *ucontrol)
  308. {
  309. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  310. struct soc_enum *enum_ctrl = (struct soc_enum *)kcontrol->private_value;
  311. unsigned int reg = enum_ctrl->reg;
  312. unsigned int sel = ucontrol->value.integer.value[0];
  313. unsigned int bits;
  314. switch (sel) {
  315. case DA732X_HPF_DISABLED:
  316. bits = DA732X_HPF_DIS;
  317. break;
  318. case DA732X_HPF_VOICE:
  319. bits = DA732X_HPF_VOICE_EN;
  320. break;
  321. case DA732X_HPF_MUSIC:
  322. bits = DA732X_HPF_MUSIC_EN;
  323. break;
  324. default:
  325. return -EINVAL;
  326. }
  327. snd_soc_update_bits(codec, reg, DA732X_HPF_MASK, bits);
  328. return 0;
  329. }
  330. static int da732x_hpf_get(struct snd_kcontrol *kcontrol,
  331. struct snd_ctl_elem_value *ucontrol)
  332. {
  333. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  334. struct soc_enum *enum_ctrl = (struct soc_enum *)kcontrol->private_value;
  335. unsigned int reg = enum_ctrl->reg;
  336. int val;
  337. val = snd_soc_read(codec, reg) & DA732X_HPF_MASK;
  338. switch (val) {
  339. case DA732X_HPF_VOICE_EN:
  340. ucontrol->value.integer.value[0] = DA732X_HPF_VOICE;
  341. break;
  342. case DA732X_HPF_MUSIC_EN:
  343. ucontrol->value.integer.value[0] = DA732X_HPF_MUSIC;
  344. break;
  345. default:
  346. ucontrol->value.integer.value[0] = DA732X_HPF_DISABLED;
  347. break;
  348. }
  349. return 0;
  350. }
  351. static const struct snd_kcontrol_new da732x_snd_controls[] = {
  352. /* Input PGAs */
  353. SOC_SINGLE_RANGE_TLV("MIC1 Boost Volume", DA732X_REG_MIC1_PRE,
  354. DA732X_MICBOOST_SHIFT, DA732X_MICBOOST_MIN,
  355. DA732X_MICBOOST_MAX, 0, mic_boost_tlv),
  356. SOC_SINGLE_RANGE_TLV("MIC2 Boost Volume", DA732X_REG_MIC2_PRE,
  357. DA732X_MICBOOST_SHIFT, DA732X_MICBOOST_MIN,
  358. DA732X_MICBOOST_MAX, 0, mic_boost_tlv),
  359. SOC_SINGLE_RANGE_TLV("MIC3 Boost Volume", DA732X_REG_MIC3_PRE,
  360. DA732X_MICBOOST_SHIFT, DA732X_MICBOOST_MIN,
  361. DA732X_MICBOOST_MAX, 0, mic_boost_tlv),
  362. /* MICs */
  363. SOC_SINGLE("MIC1 Switch", DA732X_REG_MIC1, DA732X_MIC_MUTE_SHIFT,
  364. DA732X_SWITCH_MAX, DA732X_INVERT),
  365. SOC_SINGLE_RANGE_TLV("MIC1 Volume", DA732X_REG_MIC1,
  366. DA732X_MIC_VOL_SHIFT, DA732X_MIC_VOL_VAL_MIN,
  367. DA732X_MIC_VOL_VAL_MAX, 0, mic_pga_tlv),
  368. SOC_SINGLE("MIC2 Switch", DA732X_REG_MIC2, DA732X_MIC_MUTE_SHIFT,
  369. DA732X_SWITCH_MAX, DA732X_INVERT),
  370. SOC_SINGLE_RANGE_TLV("MIC2 Volume", DA732X_REG_MIC2,
  371. DA732X_MIC_VOL_SHIFT, DA732X_MIC_VOL_VAL_MIN,
  372. DA732X_MIC_VOL_VAL_MAX, 0, mic_pga_tlv),
  373. SOC_SINGLE("MIC3 Switch", DA732X_REG_MIC3, DA732X_MIC_MUTE_SHIFT,
  374. DA732X_SWITCH_MAX, DA732X_INVERT),
  375. SOC_SINGLE_RANGE_TLV("MIC3 Volume", DA732X_REG_MIC3,
  376. DA732X_MIC_VOL_SHIFT, DA732X_MIC_VOL_VAL_MIN,
  377. DA732X_MIC_VOL_VAL_MAX, 0, mic_pga_tlv),
  378. /* AUXs */
  379. SOC_SINGLE("AUX1L Switch", DA732X_REG_AUX1L, DA732X_AUX_MUTE_SHIFT,
  380. DA732X_SWITCH_MAX, DA732X_INVERT),
  381. SOC_SINGLE_TLV("AUX1L Volume", DA732X_REG_AUX1L,
  382. DA732X_AUX_VOL_SHIFT, DA732X_AUX_VOL_VAL_MAX,
  383. DA732X_NO_INVERT, aux_pga_tlv),
  384. SOC_SINGLE("AUX1R Switch", DA732X_REG_AUX1R, DA732X_AUX_MUTE_SHIFT,
  385. DA732X_SWITCH_MAX, DA732X_INVERT),
  386. SOC_SINGLE_TLV("AUX1R Volume", DA732X_REG_AUX1R,
  387. DA732X_AUX_VOL_SHIFT, DA732X_AUX_VOL_VAL_MAX,
  388. DA732X_NO_INVERT, aux_pga_tlv),
  389. /* ADCs */
  390. SOC_DOUBLE_TLV("ADC1 Volume", DA732X_REG_ADC1_SEL,
  391. DA732X_ADCL_VOL_SHIFT, DA732X_ADCR_VOL_SHIFT,
  392. DA732X_ADC_VOL_VAL_MAX, DA732X_INVERT, adc_pga_tlv),
  393. SOC_DOUBLE_TLV("ADC2 Volume", DA732X_REG_ADC2_SEL,
  394. DA732X_ADCL_VOL_SHIFT, DA732X_ADCR_VOL_SHIFT,
  395. DA732X_ADC_VOL_VAL_MAX, DA732X_INVERT, adc_pga_tlv),
  396. /* DACs */
  397. SOC_DOUBLE("Digital Playback DAC12 Switch", DA732X_REG_DAC1_SEL,
  398. DA732X_DACL_MUTE_SHIFT, DA732X_DACR_MUTE_SHIFT,
  399. DA732X_SWITCH_MAX, DA732X_INVERT),
  400. SOC_DOUBLE_R_TLV("Digital Playback DAC12 Volume", DA732X_REG_DAC1_L_VOL,
  401. DA732X_REG_DAC1_R_VOL, DA732X_DAC_VOL_SHIFT,
  402. DA732X_DAC_VOL_VAL_MAX, DA732X_INVERT, dac_pga_tlv),
  403. SOC_SINGLE("Digital Playback DAC3 Switch", DA732X_REG_DAC2_SEL,
  404. DA732X_DACL_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
  405. SOC_SINGLE_TLV("Digital Playback DAC3 Volume", DA732X_REG_DAC2_L_VOL,
  406. DA732X_DAC_VOL_SHIFT, DA732X_DAC_VOL_VAL_MAX,
  407. DA732X_INVERT, dac_pga_tlv),
  408. SOC_SINGLE("Digital Playback DAC4 Switch", DA732X_REG_DAC2_SEL,
  409. DA732X_DACR_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
  410. SOC_SINGLE_TLV("Digital Playback DAC4 Volume", DA732X_REG_DAC2_R_VOL,
  411. DA732X_DAC_VOL_SHIFT, DA732X_DAC_VOL_VAL_MAX,
  412. DA732X_INVERT, dac_pga_tlv),
  413. SOC_SINGLE("Digital Playback DAC5 Switch", DA732X_REG_DAC3_SEL,
  414. DA732X_DACL_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
  415. SOC_SINGLE_TLV("Digital Playback DAC5 Volume", DA732X_REG_DAC3_VOL,
  416. DA732X_DAC_VOL_SHIFT, DA732X_DAC_VOL_VAL_MAX,
  417. DA732X_INVERT, dac_pga_tlv),
  418. /* High Pass Filters */
  419. SOC_ENUM_EXT("DAC1 High Pass Filter Mode",
  420. da732x_dac1_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
  421. SOC_ENUM("DAC1 High Pass Filter", da732x_dac1_hp_filter_enum),
  422. SOC_ENUM("DAC1 Voice Filter", da732x_dac1_voice_filter_enum),
  423. SOC_ENUM_EXT("DAC2 High Pass Filter Mode",
  424. da732x_dac2_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
  425. SOC_ENUM("DAC2 High Pass Filter", da732x_dac2_hp_filter_enum),
  426. SOC_ENUM("DAC2 Voice Filter", da732x_dac2_voice_filter_enum),
  427. SOC_ENUM_EXT("DAC3 High Pass Filter Mode",
  428. da732x_dac3_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
  429. SOC_ENUM("DAC3 High Pass Filter", da732x_dac3_hp_filter_enum),
  430. SOC_ENUM("DAC3 Filter Mode", da732x_dac3_voice_filter_enum),
  431. SOC_ENUM_EXT("ADC1 High Pass Filter Mode",
  432. da732x_adc1_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
  433. SOC_ENUM("ADC1 High Pass Filter", da732x_adc1_hp_filter_enum),
  434. SOC_ENUM("ADC1 Voice Filter", da732x_adc1_voice_filter_enum),
  435. SOC_ENUM_EXT("ADC2 High Pass Filter Mode",
  436. da732x_adc2_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
  437. SOC_ENUM("ADC2 High Pass Filter", da732x_adc2_hp_filter_enum),
  438. SOC_ENUM("ADC2 Voice Filter", da732x_adc2_voice_filter_enum),
  439. /* Equalizers */
  440. SOC_SINGLE("ADC1 EQ Switch", DA732X_REG_ADC1_EQ5,
  441. DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
  442. SOC_SINGLE_TLV("ADC1 EQ Band 1 Volume", DA732X_REG_ADC1_EQ12,
  443. DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  444. DA732X_INVERT, eq_band_pga_tlv),
  445. SOC_SINGLE_TLV("ADC1 EQ Band 2 Volume", DA732X_REG_ADC1_EQ12,
  446. DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  447. DA732X_INVERT, eq_band_pga_tlv),
  448. SOC_SINGLE_TLV("ADC1 EQ Band 3 Volume", DA732X_REG_ADC1_EQ34,
  449. DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  450. DA732X_INVERT, eq_band_pga_tlv),
  451. SOC_SINGLE_TLV("ADC1 EQ Band 4 Volume", DA732X_REG_ADC1_EQ34,
  452. DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  453. DA732X_INVERT, eq_band_pga_tlv),
  454. SOC_SINGLE_TLV("ADC1 EQ Band 5 Volume", DA732X_REG_ADC1_EQ5,
  455. DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  456. DA732X_INVERT, eq_band_pga_tlv),
  457. SOC_SINGLE_TLV("ADC1 EQ Overall Volume", DA732X_REG_ADC1_EQ5,
  458. DA732X_EQ_OVERALL_SHIFT, DA732X_EQ_OVERALL_VOL_VAL_MAX,
  459. DA732X_INVERT, eq_overall_tlv),
  460. SOC_SINGLE("ADC2 EQ Switch", DA732X_REG_ADC2_EQ5,
  461. DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
  462. SOC_SINGLE_TLV("ADC2 EQ Band 1 Volume", DA732X_REG_ADC2_EQ12,
  463. DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  464. DA732X_INVERT, eq_band_pga_tlv),
  465. SOC_SINGLE_TLV("ADC2 EQ Band 2 Volume", DA732X_REG_ADC2_EQ12,
  466. DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  467. DA732X_INVERT, eq_band_pga_tlv),
  468. SOC_SINGLE_TLV("ADC2 EQ Band 3 Volume", DA732X_REG_ADC2_EQ34,
  469. DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  470. DA732X_INVERT, eq_band_pga_tlv),
  471. SOC_SINGLE_TLV("ACD2 EQ Band 4 Volume", DA732X_REG_ADC2_EQ34,
  472. DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  473. DA732X_INVERT, eq_band_pga_tlv),
  474. SOC_SINGLE_TLV("ACD2 EQ Band 5 Volume", DA732X_REG_ADC2_EQ5,
  475. DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  476. DA732X_INVERT, eq_band_pga_tlv),
  477. SOC_SINGLE_TLV("ADC2 EQ Overall Volume", DA732X_REG_ADC1_EQ5,
  478. DA732X_EQ_OVERALL_SHIFT, DA732X_EQ_OVERALL_VOL_VAL_MAX,
  479. DA732X_INVERT, eq_overall_tlv),
  480. SOC_SINGLE("DAC1 EQ Switch", DA732X_REG_DAC1_EQ5,
  481. DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
  482. SOC_SINGLE_TLV("DAC1 EQ Band 1 Volume", DA732X_REG_DAC1_EQ12,
  483. DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  484. DA732X_INVERT, eq_band_pga_tlv),
  485. SOC_SINGLE_TLV("DAC1 EQ Band 2 Volume", DA732X_REG_DAC1_EQ12,
  486. DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  487. DA732X_INVERT, eq_band_pga_tlv),
  488. SOC_SINGLE_TLV("DAC1 EQ Band 3 Volume", DA732X_REG_DAC1_EQ34,
  489. DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  490. DA732X_INVERT, eq_band_pga_tlv),
  491. SOC_SINGLE_TLV("DAC1 EQ Band 4 Volume", DA732X_REG_DAC1_EQ34,
  492. DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  493. DA732X_INVERT, eq_band_pga_tlv),
  494. SOC_SINGLE_TLV("DAC1 EQ Band 5 Volume", DA732X_REG_DAC1_EQ5,
  495. DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  496. DA732X_INVERT, eq_band_pga_tlv),
  497. SOC_SINGLE("DAC2 EQ Switch", DA732X_REG_DAC2_EQ5,
  498. DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
  499. SOC_SINGLE_TLV("DAC2 EQ Band 1 Volume", DA732X_REG_DAC2_EQ12,
  500. DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  501. DA732X_INVERT, eq_band_pga_tlv),
  502. SOC_SINGLE_TLV("DAC2 EQ Band 2 Volume", DA732X_REG_DAC2_EQ12,
  503. DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  504. DA732X_INVERT, eq_band_pga_tlv),
  505. SOC_SINGLE_TLV("DAC2 EQ Band 3 Volume", DA732X_REG_DAC2_EQ34,
  506. DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  507. DA732X_INVERT, eq_band_pga_tlv),
  508. SOC_SINGLE_TLV("DAC2 EQ Band 4 Volume", DA732X_REG_DAC2_EQ34,
  509. DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  510. DA732X_INVERT, eq_band_pga_tlv),
  511. SOC_SINGLE_TLV("DAC2 EQ Band 5 Volume", DA732X_REG_DAC2_EQ5,
  512. DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  513. DA732X_INVERT, eq_band_pga_tlv),
  514. SOC_SINGLE("DAC3 EQ Switch", DA732X_REG_DAC3_EQ5,
  515. DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
  516. SOC_SINGLE_TLV("DAC3 EQ Band 1 Volume", DA732X_REG_DAC3_EQ12,
  517. DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  518. DA732X_INVERT, eq_band_pga_tlv),
  519. SOC_SINGLE_TLV("DAC3 EQ Band 2 Volume", DA732X_REG_DAC3_EQ12,
  520. DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  521. DA732X_INVERT, eq_band_pga_tlv),
  522. SOC_SINGLE_TLV("DAC3 EQ Band 3 Volume", DA732X_REG_DAC3_EQ34,
  523. DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  524. DA732X_INVERT, eq_band_pga_tlv),
  525. SOC_SINGLE_TLV("DAC3 EQ Band 4 Volume", DA732X_REG_DAC3_EQ34,
  526. DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  527. DA732X_INVERT, eq_band_pga_tlv),
  528. SOC_SINGLE_TLV("DAC3 EQ Band 5 Volume", DA732X_REG_DAC3_EQ5,
  529. DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
  530. DA732X_INVERT, eq_band_pga_tlv),
  531. /* Lineout 2 Reciever*/
  532. SOC_SINGLE("Lineout 2 Switch", DA732X_REG_LIN2, DA732X_LOUT_MUTE_SHIFT,
  533. DA732X_SWITCH_MAX, DA732X_INVERT),
  534. SOC_SINGLE_TLV("Lineout 2 Volume", DA732X_REG_LIN2,
  535. DA732X_LOUT_VOL_SHIFT, DA732X_LOUT_VOL_VAL_MAX,
  536. DA732X_NO_INVERT, lin2_pga_tlv),
  537. /* Lineout 3 SPEAKER*/
  538. SOC_SINGLE("Lineout 3 Switch", DA732X_REG_LIN3, DA732X_LOUT_MUTE_SHIFT,
  539. DA732X_SWITCH_MAX, DA732X_INVERT),
  540. SOC_SINGLE_TLV("Lineout 3 Volume", DA732X_REG_LIN3,
  541. DA732X_LOUT_VOL_SHIFT, DA732X_LOUT_VOL_VAL_MAX,
  542. DA732X_NO_INVERT, lin3_pga_tlv),
  543. /* Lineout 4 */
  544. SOC_SINGLE("Lineout 4 Switch", DA732X_REG_LIN4, DA732X_LOUT_MUTE_SHIFT,
  545. DA732X_SWITCH_MAX, DA732X_INVERT),
  546. SOC_SINGLE_TLV("Lineout 4 Volume", DA732X_REG_LIN4,
  547. DA732X_LOUT_VOL_SHIFT, DA732X_LOUT_VOL_VAL_MAX,
  548. DA732X_NO_INVERT, lin4_pga_tlv),
  549. /* Headphones */
  550. SOC_DOUBLE_R("Headphone Switch", DA732X_REG_HPR, DA732X_REG_HPL,
  551. DA732X_HP_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
  552. SOC_DOUBLE_R_TLV("Headphone Volume", DA732X_REG_HPL_VOL,
  553. DA732X_REG_HPR_VOL, DA732X_HP_VOL_SHIFT,
  554. DA732X_HP_VOL_VAL_MAX, DA732X_NO_INVERT, hp_pga_tlv),
  555. };
  556. static int da732x_adc_event(struct snd_soc_dapm_widget *w,
  557. struct snd_kcontrol *kcontrol, int event)
  558. {
  559. struct snd_soc_codec *codec = w->codec;
  560. switch (event) {
  561. case SND_SOC_DAPM_POST_PMU:
  562. switch (w->reg) {
  563. case DA732X_REG_ADC1_PD:
  564. snd_soc_update_bits(codec, DA732X_REG_CLK_EN3,
  565. DA732X_ADCA_BB_CLK_EN,
  566. DA732X_ADCA_BB_CLK_EN);
  567. break;
  568. case DA732X_REG_ADC2_PD:
  569. snd_soc_update_bits(codec, DA732X_REG_CLK_EN3,
  570. DA732X_ADCC_BB_CLK_EN,
  571. DA732X_ADCC_BB_CLK_EN);
  572. break;
  573. default:
  574. return -EINVAL;
  575. }
  576. snd_soc_update_bits(codec, w->reg, DA732X_ADC_RST_MASK,
  577. DA732X_ADC_SET_ACT);
  578. snd_soc_update_bits(codec, w->reg, DA732X_ADC_PD_MASK,
  579. DA732X_ADC_ON);
  580. break;
  581. case SND_SOC_DAPM_POST_PMD:
  582. snd_soc_update_bits(codec, w->reg, DA732X_ADC_PD_MASK,
  583. DA732X_ADC_OFF);
  584. snd_soc_update_bits(codec, w->reg, DA732X_ADC_RST_MASK,
  585. DA732X_ADC_SET_RST);
  586. switch (w->reg) {
  587. case DA732X_REG_ADC1_PD:
  588. snd_soc_update_bits(codec, DA732X_REG_CLK_EN3,
  589. DA732X_ADCA_BB_CLK_EN, 0);
  590. break;
  591. case DA732X_REG_ADC2_PD:
  592. snd_soc_update_bits(codec, DA732X_REG_CLK_EN3,
  593. DA732X_ADCC_BB_CLK_EN, 0);
  594. break;
  595. default:
  596. return -EINVAL;
  597. }
  598. break;
  599. default:
  600. return -EINVAL;
  601. }
  602. return 0;
  603. }
  604. static int da732x_out_pga_event(struct snd_soc_dapm_widget *w,
  605. struct snd_kcontrol *kcontrol, int event)
  606. {
  607. struct snd_soc_codec *codec = w->codec;
  608. switch (event) {
  609. case SND_SOC_DAPM_POST_PMU:
  610. snd_soc_update_bits(codec, w->reg,
  611. (1 << w->shift) | DA732X_OUT_HIZ_EN,
  612. (1 << w->shift) | DA732X_OUT_HIZ_EN);
  613. break;
  614. case SND_SOC_DAPM_POST_PMD:
  615. snd_soc_update_bits(codec, w->reg,
  616. (1 << w->shift) | DA732X_OUT_HIZ_EN,
  617. (1 << w->shift) | DA732X_OUT_HIZ_DIS);
  618. break;
  619. default:
  620. return -EINVAL;
  621. }
  622. return 0;
  623. }
  624. static const char *adcl_text[] = {
  625. "AUX1L", "MIC1"
  626. };
  627. static const char *adcr_text[] = {
  628. "AUX1R", "MIC2", "MIC3"
  629. };
  630. static const char *enable_text[] = {
  631. "Disabled",
  632. "Enabled"
  633. };
  634. /* ADC1LMUX */
  635. static const struct soc_enum adc1l_enum =
  636. SOC_ENUM_SINGLE(DA732X_REG_INP_MUX, DA732X_ADC1L_MUX_SEL_SHIFT,
  637. DA732X_ADCL_MUX_MAX, adcl_text);
  638. static const struct snd_kcontrol_new adc1l_mux =
  639. SOC_DAPM_ENUM("ADC Route", adc1l_enum);
  640. /* ADC1RMUX */
  641. static const struct soc_enum adc1r_enum =
  642. SOC_ENUM_SINGLE(DA732X_REG_INP_MUX, DA732X_ADC1R_MUX_SEL_SHIFT,
  643. DA732X_ADCR_MUX_MAX, adcr_text);
  644. static const struct snd_kcontrol_new adc1r_mux =
  645. SOC_DAPM_ENUM("ADC Route", adc1r_enum);
  646. /* ADC2LMUX */
  647. static const struct soc_enum adc2l_enum =
  648. SOC_ENUM_SINGLE(DA732X_REG_INP_MUX, DA732X_ADC2L_MUX_SEL_SHIFT,
  649. DA732X_ADCL_MUX_MAX, adcl_text);
  650. static const struct snd_kcontrol_new adc2l_mux =
  651. SOC_DAPM_ENUM("ADC Route", adc2l_enum);
  652. /* ADC2RMUX */
  653. static const struct soc_enum adc2r_enum =
  654. SOC_ENUM_SINGLE(DA732X_REG_INP_MUX, DA732X_ADC2R_MUX_SEL_SHIFT,
  655. DA732X_ADCR_MUX_MAX, adcr_text);
  656. static const struct snd_kcontrol_new adc2r_mux =
  657. SOC_DAPM_ENUM("ADC Route", adc2r_enum);
  658. static const struct soc_enum da732x_hp_left_output =
  659. SOC_ENUM_SINGLE(DA732X_REG_HPL, DA732X_HP_OUT_DAC_EN_SHIFT,
  660. DA732X_DAC_EN_MAX, enable_text);
  661. static const struct snd_kcontrol_new hpl_mux =
  662. SOC_DAPM_ENUM("HPL Switch", da732x_hp_left_output);
  663. static const struct soc_enum da732x_hp_right_output =
  664. SOC_ENUM_SINGLE(DA732X_REG_HPR, DA732X_HP_OUT_DAC_EN_SHIFT,
  665. DA732X_DAC_EN_MAX, enable_text);
  666. static const struct snd_kcontrol_new hpr_mux =
  667. SOC_DAPM_ENUM("HPR Switch", da732x_hp_right_output);
  668. static const struct soc_enum da732x_speaker_output =
  669. SOC_ENUM_SINGLE(DA732X_REG_LIN3, DA732X_LOUT_DAC_EN_SHIFT,
  670. DA732X_DAC_EN_MAX, enable_text);
  671. static const struct snd_kcontrol_new spk_mux =
  672. SOC_DAPM_ENUM("SPK Switch", da732x_speaker_output);
  673. static const struct soc_enum da732x_lout4_output =
  674. SOC_ENUM_SINGLE(DA732X_REG_LIN4, DA732X_LOUT_DAC_EN_SHIFT,
  675. DA732X_DAC_EN_MAX, enable_text);
  676. static const struct snd_kcontrol_new lout4_mux =
  677. SOC_DAPM_ENUM("LOUT4 Switch", da732x_lout4_output);
  678. static const struct soc_enum da732x_lout2_output =
  679. SOC_ENUM_SINGLE(DA732X_REG_LIN2, DA732X_LOUT_DAC_EN_SHIFT,
  680. DA732X_DAC_EN_MAX, enable_text);
  681. static const struct snd_kcontrol_new lout2_mux =
  682. SOC_DAPM_ENUM("LOUT2 Switch", da732x_lout2_output);
  683. static const struct snd_soc_dapm_widget da732x_dapm_widgets[] = {
  684. /* Supplies */
  685. SND_SOC_DAPM_SUPPLY("ADC1 Supply", DA732X_REG_ADC1_PD, 0,
  686. DA732X_NO_INVERT, da732x_adc_event,
  687. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  688. SND_SOC_DAPM_SUPPLY("ADC2 Supply", DA732X_REG_ADC2_PD, 0,
  689. DA732X_NO_INVERT, da732x_adc_event,
  690. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  691. SND_SOC_DAPM_SUPPLY("DAC1 CLK", DA732X_REG_CLK_EN4,
  692. DA732X_DACA_BB_CLK_SHIFT, DA732X_NO_INVERT,
  693. NULL, 0),
  694. SND_SOC_DAPM_SUPPLY("DAC2 CLK", DA732X_REG_CLK_EN4,
  695. DA732X_DACC_BB_CLK_SHIFT, DA732X_NO_INVERT,
  696. NULL, 0),
  697. SND_SOC_DAPM_SUPPLY("DAC3 CLK", DA732X_REG_CLK_EN5,
  698. DA732X_DACE_BB_CLK_SHIFT, DA732X_NO_INVERT,
  699. NULL, 0),
  700. /* Micbias */
  701. SND_SOC_DAPM_SUPPLY("MICBIAS1", DA732X_REG_MICBIAS1,
  702. DA732X_MICBIAS_EN_SHIFT,
  703. DA732X_NO_INVERT, NULL, 0),
  704. SND_SOC_DAPM_SUPPLY("MICBIAS2", DA732X_REG_MICBIAS2,
  705. DA732X_MICBIAS_EN_SHIFT,
  706. DA732X_NO_INVERT, NULL, 0),
  707. /* Inputs */
  708. SND_SOC_DAPM_INPUT("MIC1"),
  709. SND_SOC_DAPM_INPUT("MIC2"),
  710. SND_SOC_DAPM_INPUT("MIC3"),
  711. SND_SOC_DAPM_INPUT("AUX1L"),
  712. SND_SOC_DAPM_INPUT("AUX1R"),
  713. /* Outputs */
  714. SND_SOC_DAPM_OUTPUT("HPL"),
  715. SND_SOC_DAPM_OUTPUT("HPR"),
  716. SND_SOC_DAPM_OUTPUT("LOUTL"),
  717. SND_SOC_DAPM_OUTPUT("LOUTR"),
  718. SND_SOC_DAPM_OUTPUT("ClassD"),
  719. /* ADCs */
  720. SND_SOC_DAPM_ADC("ADC1L", NULL, DA732X_REG_ADC1_SEL,
  721. DA732X_ADCL_EN_SHIFT, DA732X_NO_INVERT),
  722. SND_SOC_DAPM_ADC("ADC1R", NULL, DA732X_REG_ADC1_SEL,
  723. DA732X_ADCR_EN_SHIFT, DA732X_NO_INVERT),
  724. SND_SOC_DAPM_ADC("ADC2L", NULL, DA732X_REG_ADC2_SEL,
  725. DA732X_ADCL_EN_SHIFT, DA732X_NO_INVERT),
  726. SND_SOC_DAPM_ADC("ADC2R", NULL, DA732X_REG_ADC2_SEL,
  727. DA732X_ADCR_EN_SHIFT, DA732X_NO_INVERT),
  728. /* DACs */
  729. SND_SOC_DAPM_DAC("DAC1L", NULL, DA732X_REG_DAC1_SEL,
  730. DA732X_DACL_EN_SHIFT, DA732X_NO_INVERT),
  731. SND_SOC_DAPM_DAC("DAC1R", NULL, DA732X_REG_DAC1_SEL,
  732. DA732X_DACR_EN_SHIFT, DA732X_NO_INVERT),
  733. SND_SOC_DAPM_DAC("DAC2L", NULL, DA732X_REG_DAC2_SEL,
  734. DA732X_DACL_EN_SHIFT, DA732X_NO_INVERT),
  735. SND_SOC_DAPM_DAC("DAC2R", NULL, DA732X_REG_DAC2_SEL,
  736. DA732X_DACR_EN_SHIFT, DA732X_NO_INVERT),
  737. SND_SOC_DAPM_DAC("DAC3", NULL, DA732X_REG_DAC3_SEL,
  738. DA732X_DACL_EN_SHIFT, DA732X_NO_INVERT),
  739. /* Input Pgas */
  740. SND_SOC_DAPM_PGA("MIC1 PGA", DA732X_REG_MIC1, DA732X_MIC_EN_SHIFT,
  741. 0, NULL, 0),
  742. SND_SOC_DAPM_PGA("MIC2 PGA", DA732X_REG_MIC2, DA732X_MIC_EN_SHIFT,
  743. 0, NULL, 0),
  744. SND_SOC_DAPM_PGA("MIC3 PGA", DA732X_REG_MIC3, DA732X_MIC_EN_SHIFT,
  745. 0, NULL, 0),
  746. SND_SOC_DAPM_PGA("AUX1L PGA", DA732X_REG_AUX1L, DA732X_AUX_EN_SHIFT,
  747. 0, NULL, 0),
  748. SND_SOC_DAPM_PGA("AUX1R PGA", DA732X_REG_AUX1R, DA732X_AUX_EN_SHIFT,
  749. 0, NULL, 0),
  750. SND_SOC_DAPM_PGA_E("HP Left", DA732X_REG_HPL, DA732X_HP_OUT_EN_SHIFT,
  751. 0, NULL, 0, da732x_out_pga_event,
  752. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  753. SND_SOC_DAPM_PGA_E("HP Right", DA732X_REG_HPR, DA732X_HP_OUT_EN_SHIFT,
  754. 0, NULL, 0, da732x_out_pga_event,
  755. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  756. SND_SOC_DAPM_PGA_E("LIN2", DA732X_REG_LIN2, DA732X_LIN_OUT_EN_SHIFT,
  757. 0, NULL, 0, da732x_out_pga_event,
  758. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  759. SND_SOC_DAPM_PGA_E("LIN3", DA732X_REG_LIN3, DA732X_LIN_OUT_EN_SHIFT,
  760. 0, NULL, 0, da732x_out_pga_event,
  761. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  762. SND_SOC_DAPM_PGA_E("LIN4", DA732X_REG_LIN4, DA732X_LIN_OUT_EN_SHIFT,
  763. 0, NULL, 0, da732x_out_pga_event,
  764. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  765. /* MUXs */
  766. SND_SOC_DAPM_MUX("ADC1 Left MUX", SND_SOC_NOPM, 0, 0, &adc1l_mux),
  767. SND_SOC_DAPM_MUX("ADC1 Right MUX", SND_SOC_NOPM, 0, 0, &adc1r_mux),
  768. SND_SOC_DAPM_MUX("ADC2 Left MUX", SND_SOC_NOPM, 0, 0, &adc2l_mux),
  769. SND_SOC_DAPM_MUX("ADC2 Right MUX", SND_SOC_NOPM, 0, 0, &adc2r_mux),
  770. SND_SOC_DAPM_MUX("HP Left MUX", SND_SOC_NOPM, 0, 0, &hpl_mux),
  771. SND_SOC_DAPM_MUX("HP Right MUX", SND_SOC_NOPM, 0, 0, &hpr_mux),
  772. SND_SOC_DAPM_MUX("Speaker MUX", SND_SOC_NOPM, 0, 0, &spk_mux),
  773. SND_SOC_DAPM_MUX("LOUT2 MUX", SND_SOC_NOPM, 0, 0, &lout2_mux),
  774. SND_SOC_DAPM_MUX("LOUT4 MUX", SND_SOC_NOPM, 0, 0, &lout4_mux),
  775. /* AIF interfaces */
  776. SND_SOC_DAPM_AIF_OUT("AIFA Output", "AIFA Capture", 0, DA732X_REG_AIFA3,
  777. DA732X_AIF_EN_SHIFT, 0),
  778. SND_SOC_DAPM_AIF_IN("AIFA Input", "AIFA Playback", 0, DA732X_REG_AIFA3,
  779. DA732X_AIF_EN_SHIFT, 0),
  780. SND_SOC_DAPM_AIF_OUT("AIFB Output", "AIFB Capture", 0, DA732X_REG_AIFB3,
  781. DA732X_AIF_EN_SHIFT, 0),
  782. SND_SOC_DAPM_AIF_IN("AIFB Input", "AIFB Playback", 0, DA732X_REG_AIFB3,
  783. DA732X_AIF_EN_SHIFT, 0),
  784. };
  785. static const struct snd_soc_dapm_route da732x_dapm_routes[] = {
  786. /* Inputs */
  787. {"AUX1L PGA", "NULL", "AUX1L"},
  788. {"AUX1R PGA", "NULL", "AUX1R"},
  789. {"MIC1 PGA", NULL, "MIC1"},
  790. {"MIC2 PGA", "NULL", "MIC2"},
  791. {"MIC3 PGA", "NULL", "MIC3"},
  792. /* Capture Path */
  793. {"ADC1 Left MUX", "MIC1", "MIC1 PGA"},
  794. {"ADC1 Left MUX", "AUX1L", "AUX1L PGA"},
  795. {"ADC1 Right MUX", "AUX1R", "AUX1R PGA"},
  796. {"ADC1 Right MUX", "MIC2", "MIC2 PGA"},
  797. {"ADC1 Right MUX", "MIC3", "MIC3 PGA"},
  798. {"ADC2 Left MUX", "AUX1L", "AUX1L PGA"},
  799. {"ADC2 Left MUX", "MIC1", "MIC1 PGA"},
  800. {"ADC2 Right MUX", "AUX1R", "AUX1R PGA"},
  801. {"ADC2 Right MUX", "MIC2", "MIC2 PGA"},
  802. {"ADC2 Right MUX", "MIC3", "MIC3 PGA"},
  803. {"ADC1L", NULL, "ADC1 Supply"},
  804. {"ADC1R", NULL, "ADC1 Supply"},
  805. {"ADC2L", NULL, "ADC2 Supply"},
  806. {"ADC2R", NULL, "ADC2 Supply"},
  807. {"ADC1L", NULL, "ADC1 Left MUX"},
  808. {"ADC1R", NULL, "ADC1 Right MUX"},
  809. {"ADC2L", NULL, "ADC2 Left MUX"},
  810. {"ADC2R", NULL, "ADC2 Right MUX"},
  811. {"AIFA Output", NULL, "ADC1L"},
  812. {"AIFA Output", NULL, "ADC1R"},
  813. {"AIFB Output", NULL, "ADC2L"},
  814. {"AIFB Output", NULL, "ADC2R"},
  815. {"HP Left MUX", "Enabled", "AIFA Input"},
  816. {"HP Right MUX", "Enabled", "AIFA Input"},
  817. {"Speaker MUX", "Enabled", "AIFB Input"},
  818. {"LOUT2 MUX", "Enabled", "AIFB Input"},
  819. {"LOUT4 MUX", "Enabled", "AIFB Input"},
  820. {"DAC1L", NULL, "DAC1 CLK"},
  821. {"DAC1R", NULL, "DAC1 CLK"},
  822. {"DAC2L", NULL, "DAC2 CLK"},
  823. {"DAC2R", NULL, "DAC2 CLK"},
  824. {"DAC3", NULL, "DAC3 CLK"},
  825. {"DAC1L", NULL, "HP Left MUX"},
  826. {"DAC1R", NULL, "HP Right MUX"},
  827. {"DAC2L", NULL, "Speaker MUX"},
  828. {"DAC2R", NULL, "LOUT4 MUX"},
  829. {"DAC3", NULL, "LOUT2 MUX"},
  830. /* Output Pgas */
  831. {"HP Left", NULL, "DAC1L"},
  832. {"HP Right", NULL, "DAC1R"},
  833. {"LIN3", NULL, "DAC2L"},
  834. {"LIN4", NULL, "DAC2R"},
  835. {"LIN2", NULL, "DAC3"},
  836. /* Outputs */
  837. {"ClassD", NULL, "LIN3"},
  838. {"LOUTL", NULL, "LIN2"},
  839. {"LOUTR", NULL, "LIN4"},
  840. {"HPL", NULL, "HP Left"},
  841. {"HPR", NULL, "HP Right"},
  842. };
  843. static int da732x_hw_params(struct snd_pcm_substream *substream,
  844. struct snd_pcm_hw_params *params,
  845. struct snd_soc_dai *dai)
  846. {
  847. struct snd_soc_codec *codec = dai->codec;
  848. u32 aif = 0;
  849. u32 reg_aif;
  850. u32 fs;
  851. reg_aif = dai->driver->base;
  852. switch (params_format(params)) {
  853. case SNDRV_PCM_FORMAT_S16_LE:
  854. aif |= DA732X_AIF_WORD_16;
  855. break;
  856. case SNDRV_PCM_FORMAT_S20_3LE:
  857. aif |= DA732X_AIF_WORD_20;
  858. break;
  859. case SNDRV_PCM_FORMAT_S24_LE:
  860. aif |= DA732X_AIF_WORD_24;
  861. break;
  862. case SNDRV_PCM_FORMAT_S32_LE:
  863. aif |= DA732X_AIF_WORD_32;
  864. break;
  865. default:
  866. return -EINVAL;
  867. }
  868. switch (params_rate(params)) {
  869. case 8000:
  870. fs = DA732X_SR_8KHZ;
  871. break;
  872. case 11025:
  873. fs = DA732X_SR_11_025KHZ;
  874. break;
  875. case 12000:
  876. fs = DA732X_SR_12KHZ;
  877. break;
  878. case 16000:
  879. fs = DA732X_SR_16KHZ;
  880. break;
  881. case 22050:
  882. fs = DA732X_SR_22_05KHZ;
  883. break;
  884. case 24000:
  885. fs = DA732X_SR_24KHZ;
  886. break;
  887. case 32000:
  888. fs = DA732X_SR_32KHZ;
  889. break;
  890. case 44100:
  891. fs = DA732X_SR_44_1KHZ;
  892. break;
  893. case 48000:
  894. fs = DA732X_SR_48KHZ;
  895. break;
  896. case 88100:
  897. fs = DA732X_SR_88_1KHZ;
  898. break;
  899. case 96000:
  900. fs = DA732X_SR_96KHZ;
  901. break;
  902. default:
  903. return -EINVAL;
  904. }
  905. snd_soc_update_bits(codec, reg_aif, DA732X_AIF_WORD_MASK, aif);
  906. snd_soc_update_bits(codec, DA732X_REG_CLK_CTRL, DA732X_SR1_MASK, fs);
  907. return 0;
  908. }
  909. static int da732x_set_dai_fmt(struct snd_soc_dai *dai, u32 fmt)
  910. {
  911. struct snd_soc_codec *codec = dai->codec;
  912. u32 aif_mclk, pc_count;
  913. u32 reg_aif1, aif1;
  914. u32 reg_aif3, aif3;
  915. switch (dai->id) {
  916. case DA732X_DAI_ID1:
  917. reg_aif1 = DA732X_REG_AIFA1;
  918. reg_aif3 = DA732X_REG_AIFA3;
  919. pc_count = DA732X_PC_PULSE_AIFA | DA732X_PC_RESYNC_NOT_AUT |
  920. DA732X_PC_SAME;
  921. break;
  922. case DA732X_DAI_ID2:
  923. reg_aif1 = DA732X_REG_AIFB1;
  924. reg_aif3 = DA732X_REG_AIFB3;
  925. pc_count = DA732X_PC_PULSE_AIFB | DA732X_PC_RESYNC_NOT_AUT |
  926. DA732X_PC_SAME;
  927. break;
  928. default:
  929. return -EINVAL;
  930. }
  931. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  932. case SND_SOC_DAIFMT_CBS_CFS:
  933. aif1 = DA732X_AIF_SLAVE;
  934. aif_mclk = DA732X_AIFM_FRAME_64 | DA732X_AIFM_SRC_SEL_AIFA;
  935. break;
  936. case SND_SOC_DAIFMT_CBM_CFM:
  937. aif1 = DA732X_AIF_CLK_FROM_SRC;
  938. aif_mclk = DA732X_CLK_GENERATION_AIF_A;
  939. break;
  940. default:
  941. return -EINVAL;
  942. }
  943. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  944. case SND_SOC_DAIFMT_I2S:
  945. aif3 = DA732X_AIF_I2S_MODE;
  946. break;
  947. case SND_SOC_DAIFMT_RIGHT_J:
  948. aif3 = DA732X_AIF_RIGHT_J_MODE;
  949. break;
  950. case SND_SOC_DAIFMT_LEFT_J:
  951. aif3 = DA732X_AIF_LEFT_J_MODE;
  952. break;
  953. case SND_SOC_DAIFMT_DSP_B:
  954. aif3 = DA732X_AIF_DSP_MODE;
  955. break;
  956. default:
  957. return -EINVAL;
  958. }
  959. /* Clock inversion */
  960. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  961. case SND_SOC_DAIFMT_DSP_B:
  962. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  963. case SND_SOC_DAIFMT_NB_NF:
  964. break;
  965. case SND_SOC_DAIFMT_IB_NF:
  966. aif3 |= DA732X_AIF_BCLK_INV;
  967. break;
  968. default:
  969. return -EINVAL;
  970. }
  971. break;
  972. case SND_SOC_DAIFMT_I2S:
  973. case SND_SOC_DAIFMT_RIGHT_J:
  974. case SND_SOC_DAIFMT_LEFT_J:
  975. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  976. case SND_SOC_DAIFMT_NB_NF:
  977. break;
  978. case SND_SOC_DAIFMT_IB_IF:
  979. aif3 |= DA732X_AIF_BCLK_INV | DA732X_AIF_WCLK_INV;
  980. break;
  981. case SND_SOC_DAIFMT_IB_NF:
  982. aif3 |= DA732X_AIF_BCLK_INV;
  983. break;
  984. case SND_SOC_DAIFMT_NB_IF:
  985. aif3 |= DA732X_AIF_WCLK_INV;
  986. break;
  987. default:
  988. return -EINVAL;
  989. }
  990. break;
  991. default:
  992. return -EINVAL;
  993. }
  994. snd_soc_write(codec, DA732X_REG_AIF_MCLK, aif_mclk);
  995. snd_soc_update_bits(codec, reg_aif1, DA732X_AIF1_CLK_MASK, aif1);
  996. snd_soc_update_bits(codec, reg_aif3, DA732X_AIF_BCLK_INV |
  997. DA732X_AIF_WCLK_INV | DA732X_AIF_MODE_MASK, aif3);
  998. snd_soc_write(codec, DA732X_REG_PC_CTRL, pc_count);
  999. return 0;
  1000. }
  1001. static int da732x_set_dai_pll(struct snd_soc_codec *codec, int pll_id,
  1002. int source, unsigned int freq_in,
  1003. unsigned int freq_out)
  1004. {
  1005. struct da732x_priv *da732x = snd_soc_codec_get_drvdata(codec);
  1006. int fref, indiv;
  1007. u8 div_lo, div_mid, div_hi;
  1008. u64 frac_div;
  1009. /* Disable PLL */
  1010. if (freq_out == 0) {
  1011. snd_soc_update_bits(codec, DA732X_REG_PLL_CTRL,
  1012. DA732X_PLL_EN, 0);
  1013. da732x->pll_en = false;
  1014. return 0;
  1015. }
  1016. if (da732x->pll_en)
  1017. return -EBUSY;
  1018. if (source == DA732X_SRCCLK_MCLK) {
  1019. /* Validate Sysclk rate */
  1020. switch (da732x->sysclk) {
  1021. case 11290000:
  1022. case 12288000:
  1023. case 22580000:
  1024. case 24576000:
  1025. case 45160000:
  1026. case 49152000:
  1027. snd_soc_write(codec, DA732X_REG_PLL_CTRL,
  1028. DA732X_PLL_BYPASS);
  1029. return 0;
  1030. default:
  1031. dev_err(codec->dev,
  1032. "Cannot use PLL Bypass, invalid SYSCLK rate\n");
  1033. return -EINVAL;
  1034. }
  1035. }
  1036. indiv = da732x_get_input_div(codec, da732x->sysclk);
  1037. if (indiv < 0)
  1038. return indiv;
  1039. fref = (da732x->sysclk / indiv);
  1040. div_hi = freq_out / fref;
  1041. frac_div = (u64)(freq_out % fref) * 8192ULL;
  1042. do_div(frac_div, fref);
  1043. div_mid = (frac_div >> DA732X_1BYTE_SHIFT) & DA732X_U8_MASK;
  1044. div_lo = (frac_div) & DA732X_U8_MASK;
  1045. snd_soc_write(codec, DA732X_REG_PLL_DIV_LO, div_lo);
  1046. snd_soc_write(codec, DA732X_REG_PLL_DIV_MID, div_mid);
  1047. snd_soc_write(codec, DA732X_REG_PLL_DIV_HI, div_hi);
  1048. snd_soc_update_bits(codec, DA732X_REG_PLL_CTRL, DA732X_PLL_EN,
  1049. DA732X_PLL_EN);
  1050. da732x->pll_en = true;
  1051. return 0;
  1052. }
  1053. static int da732x_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
  1054. unsigned int freq, int dir)
  1055. {
  1056. struct snd_soc_codec *codec = dai->codec;
  1057. struct da732x_priv *da732x = snd_soc_codec_get_drvdata(codec);
  1058. da732x->sysclk = freq;
  1059. return 0;
  1060. }
  1061. #define DA732X_RATES SNDRV_PCM_RATE_8000_96000
  1062. #define DA732X_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  1063. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1064. static struct snd_soc_dai_ops da732x_dai1_ops = {
  1065. .hw_params = da732x_hw_params,
  1066. .set_fmt = da732x_set_dai_fmt,
  1067. .set_sysclk = da732x_set_dai_sysclk,
  1068. };
  1069. static struct snd_soc_dai_ops da732x_dai2_ops = {
  1070. .hw_params = da732x_hw_params,
  1071. .set_fmt = da732x_set_dai_fmt,
  1072. .set_sysclk = da732x_set_dai_sysclk,
  1073. };
  1074. static struct snd_soc_dai_driver da732x_dai[] = {
  1075. {
  1076. .name = "DA732X_AIFA",
  1077. .id = DA732X_DAI_ID1,
  1078. .base = DA732X_REG_AIFA1,
  1079. .playback = {
  1080. .stream_name = "AIFA Playback",
  1081. .channels_min = 1,
  1082. .channels_max = 2,
  1083. .rates = DA732X_RATES,
  1084. .formats = DA732X_FORMATS,
  1085. },
  1086. .capture = {
  1087. .stream_name = "AIFA Capture",
  1088. .channels_min = 1,
  1089. .channels_max = 2,
  1090. .rates = DA732X_RATES,
  1091. .formats = DA732X_FORMATS,
  1092. },
  1093. .ops = &da732x_dai1_ops,
  1094. },
  1095. {
  1096. .name = "DA732X_AIFB",
  1097. .id = DA732X_DAI_ID2,
  1098. .base = DA732X_REG_AIFB1,
  1099. .playback = {
  1100. .stream_name = "AIFB Playback",
  1101. .channels_min = 1,
  1102. .channels_max = 2,
  1103. .rates = DA732X_RATES,
  1104. .formats = DA732X_FORMATS,
  1105. },
  1106. .capture = {
  1107. .stream_name = "AIFB Capture",
  1108. .channels_min = 1,
  1109. .channels_max = 2,
  1110. .rates = DA732X_RATES,
  1111. .formats = DA732X_FORMATS,
  1112. },
  1113. .ops = &da732x_dai2_ops,
  1114. },
  1115. };
  1116. static const struct regmap_config da732x_regmap = {
  1117. .reg_bits = 8,
  1118. .val_bits = 8,
  1119. .max_register = DA732X_MAX_REG,
  1120. .reg_defaults = da732x_reg_cache,
  1121. .num_reg_defaults = ARRAY_SIZE(da732x_reg_cache),
  1122. .cache_type = REGCACHE_RBTREE,
  1123. };
  1124. static void da732x_dac_offset_adjust(struct snd_soc_codec *codec)
  1125. {
  1126. u8 offset[DA732X_HP_DACS];
  1127. u8 sign[DA732X_HP_DACS];
  1128. u8 step = DA732X_DAC_OFFSET_STEP;
  1129. /* Initialize DAC offset calibration circuits and registers */
  1130. snd_soc_write(codec, DA732X_REG_HPL_DAC_OFFSET,
  1131. DA732X_HP_DAC_OFFSET_TRIM_VAL);
  1132. snd_soc_write(codec, DA732X_REG_HPR_DAC_OFFSET,
  1133. DA732X_HP_DAC_OFFSET_TRIM_VAL);
  1134. snd_soc_write(codec, DA732X_REG_HPL_DAC_OFF_CNTL,
  1135. DA732X_HP_DAC_OFF_CALIBRATION |
  1136. DA732X_HP_DAC_OFF_SCALE_STEPS);
  1137. snd_soc_write(codec, DA732X_REG_HPR_DAC_OFF_CNTL,
  1138. DA732X_HP_DAC_OFF_CALIBRATION |
  1139. DA732X_HP_DAC_OFF_SCALE_STEPS);
  1140. /* Wait for voltage stabilization */
  1141. msleep(DA732X_WAIT_FOR_STABILIZATION);
  1142. /* Check DAC offset sign */
  1143. sign[DA732X_HPL_DAC] = (codec->hw_read(codec, DA732X_REG_HPL_DAC_OFF_CNTL) &
  1144. DA732X_HP_DAC_OFF_CNTL_COMPO);
  1145. sign[DA732X_HPR_DAC] = (codec->hw_read(codec, DA732X_REG_HPR_DAC_OFF_CNTL) &
  1146. DA732X_HP_DAC_OFF_CNTL_COMPO);
  1147. /* Binary search DAC offset values (both channels at once) */
  1148. offset[DA732X_HPL_DAC] = sign[DA732X_HPL_DAC] << DA732X_HP_DAC_COMPO_SHIFT;
  1149. offset[DA732X_HPR_DAC] = sign[DA732X_HPR_DAC] << DA732X_HP_DAC_COMPO_SHIFT;
  1150. do {
  1151. offset[DA732X_HPL_DAC] |= step;
  1152. offset[DA732X_HPR_DAC] |= step;
  1153. snd_soc_write(codec, DA732X_REG_HPL_DAC_OFFSET,
  1154. ~offset[DA732X_HPL_DAC] & DA732X_HP_DAC_OFF_MASK);
  1155. snd_soc_write(codec, DA732X_REG_HPR_DAC_OFFSET,
  1156. ~offset[DA732X_HPR_DAC] & DA732X_HP_DAC_OFF_MASK);
  1157. msleep(DA732X_WAIT_FOR_STABILIZATION);
  1158. if ((codec->hw_read(codec, DA732X_REG_HPL_DAC_OFF_CNTL) &
  1159. DA732X_HP_DAC_OFF_CNTL_COMPO) ^ sign[DA732X_HPL_DAC])
  1160. offset[DA732X_HPL_DAC] &= ~step;
  1161. if ((codec->hw_read(codec, DA732X_REG_HPR_DAC_OFF_CNTL) &
  1162. DA732X_HP_DAC_OFF_CNTL_COMPO) ^ sign[DA732X_HPR_DAC])
  1163. offset[DA732X_HPR_DAC] &= ~step;
  1164. step >>= 1;
  1165. } while (step);
  1166. /* Write final DAC offsets to registers */
  1167. snd_soc_write(codec, DA732X_REG_HPL_DAC_OFFSET,
  1168. ~offset[DA732X_HPL_DAC] & DA732X_HP_DAC_OFF_MASK);
  1169. snd_soc_write(codec, DA732X_REG_HPR_DAC_OFFSET,
  1170. ~offset[DA732X_HPR_DAC] & DA732X_HP_DAC_OFF_MASK);
  1171. /* End DAC calibration mode */
  1172. snd_soc_write(codec, DA732X_REG_HPL_DAC_OFF_CNTL,
  1173. DA732X_HP_DAC_OFF_SCALE_STEPS);
  1174. snd_soc_write(codec, DA732X_REG_HPR_DAC_OFF_CNTL,
  1175. DA732X_HP_DAC_OFF_SCALE_STEPS);
  1176. }
  1177. static void da732x_output_offset_adjust(struct snd_soc_codec *codec)
  1178. {
  1179. u8 offset[DA732X_HP_AMPS];
  1180. u8 sign[DA732X_HP_AMPS];
  1181. u8 step = DA732X_OUTPUT_OFFSET_STEP;
  1182. offset[DA732X_HPL_AMP] = DA732X_HP_OUT_TRIM_VAL;
  1183. offset[DA732X_HPR_AMP] = DA732X_HP_OUT_TRIM_VAL;
  1184. /* Initialize output offset calibration circuits and registers */
  1185. snd_soc_write(codec, DA732X_REG_HPL_OUT_OFFSET, DA732X_HP_OUT_TRIM_VAL);
  1186. snd_soc_write(codec, DA732X_REG_HPR_OUT_OFFSET, DA732X_HP_OUT_TRIM_VAL);
  1187. snd_soc_write(codec, DA732X_REG_HPL,
  1188. DA732X_HP_OUT_COMP | DA732X_HP_OUT_EN);
  1189. snd_soc_write(codec, DA732X_REG_HPR,
  1190. DA732X_HP_OUT_COMP | DA732X_HP_OUT_EN);
  1191. /* Wait for voltage stabilization */
  1192. msleep(DA732X_WAIT_FOR_STABILIZATION);
  1193. /* Check output offset sign */
  1194. sign[DA732X_HPL_AMP] = codec->hw_read(codec, DA732X_REG_HPL) &
  1195. DA732X_HP_OUT_COMPO;
  1196. sign[DA732X_HPR_AMP] = codec->hw_read(codec, DA732X_REG_HPR) &
  1197. DA732X_HP_OUT_COMPO;
  1198. snd_soc_write(codec, DA732X_REG_HPL, DA732X_HP_OUT_COMP |
  1199. (sign[DA732X_HPL_AMP] >> DA732X_HP_OUT_COMPO_SHIFT) |
  1200. DA732X_HP_OUT_EN);
  1201. snd_soc_write(codec, DA732X_REG_HPR, DA732X_HP_OUT_COMP |
  1202. (sign[DA732X_HPR_AMP] >> DA732X_HP_OUT_COMPO_SHIFT) |
  1203. DA732X_HP_OUT_EN);
  1204. /* Binary search output offset values (both channels at once) */
  1205. do {
  1206. offset[DA732X_HPL_AMP] |= step;
  1207. offset[DA732X_HPR_AMP] |= step;
  1208. snd_soc_write(codec, DA732X_REG_HPL_OUT_OFFSET,
  1209. offset[DA732X_HPL_AMP]);
  1210. snd_soc_write(codec, DA732X_REG_HPR_OUT_OFFSET,
  1211. offset[DA732X_HPR_AMP]);
  1212. msleep(DA732X_WAIT_FOR_STABILIZATION);
  1213. if ((codec->hw_read(codec, DA732X_REG_HPL) &
  1214. DA732X_HP_OUT_COMPO) ^ sign[DA732X_HPL_AMP])
  1215. offset[DA732X_HPL_AMP] &= ~step;
  1216. if ((codec->hw_read(codec, DA732X_REG_HPR) &
  1217. DA732X_HP_OUT_COMPO) ^ sign[DA732X_HPR_AMP])
  1218. offset[DA732X_HPR_AMP] &= ~step;
  1219. step >>= 1;
  1220. } while (step);
  1221. /* Write final DAC offsets to registers */
  1222. snd_soc_write(codec, DA732X_REG_HPL_OUT_OFFSET, offset[DA732X_HPL_AMP]);
  1223. snd_soc_write(codec, DA732X_REG_HPR_OUT_OFFSET, offset[DA732X_HPR_AMP]);
  1224. }
  1225. static void da732x_hp_dc_offset_cancellation(struct snd_soc_codec *codec)
  1226. {
  1227. /* Make sure that we have Soft Mute enabled */
  1228. snd_soc_write(codec, DA732X_REG_DAC1_SOFTMUTE, DA732X_SOFTMUTE_EN |
  1229. DA732X_GAIN_RAMPED | DA732X_16_SAMPLES);
  1230. snd_soc_write(codec, DA732X_REG_DAC1_SEL, DA732X_DACL_EN |
  1231. DA732X_DACR_EN | DA732X_DACL_SDM | DA732X_DACR_SDM |
  1232. DA732X_DACL_MUTE | DA732X_DACR_MUTE);
  1233. snd_soc_write(codec, DA732X_REG_HPL, DA732X_HP_OUT_DAC_EN |
  1234. DA732X_HP_OUT_MUTE | DA732X_HP_OUT_EN);
  1235. snd_soc_write(codec, DA732X_REG_HPR, DA732X_HP_OUT_EN |
  1236. DA732X_HP_OUT_MUTE | DA732X_HP_OUT_DAC_EN);
  1237. da732x_dac_offset_adjust(codec);
  1238. da732x_output_offset_adjust(codec);
  1239. snd_soc_write(codec, DA732X_REG_DAC1_SEL, DA732X_DACS_DIS);
  1240. snd_soc_write(codec, DA732X_REG_HPL, DA732X_HP_DIS);
  1241. snd_soc_write(codec, DA732X_REG_HPR, DA732X_HP_DIS);
  1242. }
  1243. static int da732x_set_bias_level(struct snd_soc_codec *codec,
  1244. enum snd_soc_bias_level level)
  1245. {
  1246. struct da732x_priv *da732x = snd_soc_codec_get_drvdata(codec);
  1247. switch (level) {
  1248. case SND_SOC_BIAS_ON:
  1249. snd_soc_update_bits(codec, DA732X_REG_BIAS_EN,
  1250. DA732X_BIAS_BOOST_MASK,
  1251. DA732X_BIAS_BOOST_100PC);
  1252. break;
  1253. case SND_SOC_BIAS_PREPARE:
  1254. break;
  1255. case SND_SOC_BIAS_STANDBY:
  1256. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  1257. /* Init Codec */
  1258. snd_soc_write(codec, DA732X_REG_REF1,
  1259. DA732X_VMID_FASTCHG);
  1260. snd_soc_write(codec, DA732X_REG_BIAS_EN,
  1261. DA732X_BIAS_EN);
  1262. mdelay(DA732X_STARTUP_DELAY);
  1263. /* Disable Fast Charge and enable DAC ref voltage */
  1264. snd_soc_write(codec, DA732X_REG_REF1,
  1265. DA732X_REFBUFX2_EN);
  1266. /* Enable bypass DSP routing */
  1267. snd_soc_write(codec, DA732X_REG_DATA_ROUTE,
  1268. DA732X_BYPASS_DSP);
  1269. /* Enable Digital subsystem */
  1270. snd_soc_write(codec, DA732X_REG_DSP_CTRL,
  1271. DA732X_DIGITAL_EN);
  1272. snd_soc_write(codec, DA732X_REG_SPARE1_OUT,
  1273. DA732X_HP_DRIVER_EN |
  1274. DA732X_HP_GATE_LOW |
  1275. DA732X_HP_LOOP_GAIN_CTRL);
  1276. snd_soc_write(codec, DA732X_REG_HP_LIN1_GNDSEL,
  1277. DA732X_HP_OUT_GNDSEL);
  1278. da732x_set_charge_pump(codec, DA732X_ENABLE_CP);
  1279. snd_soc_write(codec, DA732X_REG_CLK_EN1,
  1280. DA732X_SYS3_CLK_EN | DA732X_PC_CLK_EN);
  1281. /* Enable Zero Crossing */
  1282. snd_soc_write(codec, DA732X_REG_INP_ZC_EN,
  1283. DA732X_MIC1_PRE_ZC_EN |
  1284. DA732X_MIC1_ZC_EN |
  1285. DA732X_MIC2_PRE_ZC_EN |
  1286. DA732X_MIC2_ZC_EN |
  1287. DA732X_AUXL_ZC_EN |
  1288. DA732X_AUXR_ZC_EN |
  1289. DA732X_MIC3_PRE_ZC_EN |
  1290. DA732X_MIC3_ZC_EN);
  1291. snd_soc_write(codec, DA732X_REG_OUT_ZC_EN,
  1292. DA732X_HPL_ZC_EN | DA732X_HPR_ZC_EN |
  1293. DA732X_LIN2_ZC_EN | DA732X_LIN3_ZC_EN |
  1294. DA732X_LIN4_ZC_EN);
  1295. da732x_hp_dc_offset_cancellation(codec);
  1296. regcache_cache_only(codec->control_data, false);
  1297. regcache_sync(codec->control_data);
  1298. } else {
  1299. snd_soc_update_bits(codec, DA732X_REG_BIAS_EN,
  1300. DA732X_BIAS_BOOST_MASK,
  1301. DA732X_BIAS_BOOST_50PC);
  1302. snd_soc_update_bits(codec, DA732X_REG_PLL_CTRL,
  1303. DA732X_PLL_EN, 0);
  1304. da732x->pll_en = false;
  1305. }
  1306. break;
  1307. case SND_SOC_BIAS_OFF:
  1308. regcache_cache_only(codec->control_data, true);
  1309. da732x_set_charge_pump(codec, DA732X_DISABLE_CP);
  1310. snd_soc_update_bits(codec, DA732X_REG_BIAS_EN, DA732X_BIAS_EN,
  1311. DA732X_BIAS_DIS);
  1312. da732x->pll_en = false;
  1313. break;
  1314. }
  1315. codec->dapm.bias_level = level;
  1316. return 0;
  1317. }
  1318. static int da732x_probe(struct snd_soc_codec *codec)
  1319. {
  1320. struct da732x_priv *da732x = snd_soc_codec_get_drvdata(codec);
  1321. struct snd_soc_dapm_context *dapm = &codec->dapm;
  1322. int ret = 0;
  1323. da732x->codec = codec;
  1324. dapm->idle_bias_off = false;
  1325. codec->control_data = da732x->regmap;
  1326. ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
  1327. if (ret != 0) {
  1328. dev_err(codec->dev, "Failed to register codec.\n");
  1329. goto err;
  1330. }
  1331. da732x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  1332. err:
  1333. return ret;
  1334. }
  1335. static int da732x_remove(struct snd_soc_codec *codec)
  1336. {
  1337. da732x_set_bias_level(codec, SND_SOC_BIAS_OFF);
  1338. return 0;
  1339. }
  1340. static struct snd_soc_codec_driver soc_codec_dev_da732x = {
  1341. .probe = da732x_probe,
  1342. .remove = da732x_remove,
  1343. .set_bias_level = da732x_set_bias_level,
  1344. .controls = da732x_snd_controls,
  1345. .num_controls = ARRAY_SIZE(da732x_snd_controls),
  1346. .dapm_widgets = da732x_dapm_widgets,
  1347. .num_dapm_widgets = ARRAY_SIZE(da732x_dapm_widgets),
  1348. .dapm_routes = da732x_dapm_routes,
  1349. .num_dapm_routes = ARRAY_SIZE(da732x_dapm_routes),
  1350. .set_pll = da732x_set_dai_pll,
  1351. .reg_cache_size = ARRAY_SIZE(da732x_reg_cache),
  1352. };
  1353. static int da732x_i2c_probe(struct i2c_client *i2c,
  1354. const struct i2c_device_id *id)
  1355. {
  1356. struct da732x_priv *da732x;
  1357. unsigned int reg;
  1358. int ret;
  1359. da732x = devm_kzalloc(&i2c->dev, sizeof(struct da732x_priv),
  1360. GFP_KERNEL);
  1361. if (!da732x)
  1362. return -ENOMEM;
  1363. i2c_set_clientdata(i2c, da732x);
  1364. da732x->regmap = devm_regmap_init_i2c(i2c, &da732x_regmap);
  1365. if (IS_ERR(da732x->regmap)) {
  1366. ret = PTR_ERR(da732x->regmap);
  1367. dev_err(&i2c->dev, "Failed to initialize regmap\n");
  1368. goto err;
  1369. }
  1370. ret = regmap_read(da732x->regmap, DA732X_REG_ID, &reg);
  1371. if (ret < 0) {
  1372. dev_err(&i2c->dev, "Failed to read ID register: %d\n", ret);
  1373. goto err;
  1374. }
  1375. dev_info(&i2c->dev, "Revision: %d.%d\n",
  1376. (reg & DA732X_ID_MAJOR_MASK), (reg & DA732X_ID_MINOR_MASK));
  1377. ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_da732x,
  1378. da732x_dai, ARRAY_SIZE(da732x_dai));
  1379. if (ret != 0)
  1380. dev_err(&i2c->dev, "Failed to register codec.\n");
  1381. err:
  1382. return ret;
  1383. }
  1384. static int da732x_i2c_remove(struct i2c_client *client)
  1385. {
  1386. snd_soc_unregister_codec(&client->dev);
  1387. return 0;
  1388. }
  1389. static const struct i2c_device_id da732x_i2c_id[] = {
  1390. { "da7320", 0},
  1391. { }
  1392. };
  1393. MODULE_DEVICE_TABLE(i2c, da732x_i2c_id);
  1394. static struct i2c_driver da732x_i2c_driver = {
  1395. .driver = {
  1396. .name = "da7320",
  1397. .owner = THIS_MODULE,
  1398. },
  1399. .probe = da732x_i2c_probe,
  1400. .remove = da732x_i2c_remove,
  1401. .id_table = da732x_i2c_id,
  1402. };
  1403. module_i2c_driver(da732x_i2c_driver);
  1404. MODULE_DESCRIPTION("ASoC DA732X driver");
  1405. MODULE_AUTHOR("Michal Hajduk <michal.hajduk@diasemi.com>");
  1406. MODULE_LICENSE("GPL");