cs4270.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757
  1. /*
  2. * CS4270 ALSA SoC (ASoC) codec driver
  3. *
  4. * Author: Timur Tabi <timur@freescale.com>
  5. *
  6. * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
  7. * under the terms of the GNU General Public License version 2. This
  8. * program is licensed "as is" without any warranty of any kind, whether
  9. * express or implied.
  10. *
  11. * This is an ASoC device driver for the Cirrus Logic CS4270 codec.
  12. *
  13. * Current features/limitations:
  14. *
  15. * - Software mode is supported. Stand-alone mode is not supported.
  16. * - Only I2C is supported, not SPI
  17. * - Support for master and slave mode
  18. * - The machine driver's 'startup' function must call
  19. * cs4270_set_dai_sysclk() with the value of MCLK.
  20. * - Only I2S and left-justified modes are supported
  21. * - Power management is supported
  22. */
  23. #include <linux/module.h>
  24. #include <linux/slab.h>
  25. #include <sound/core.h>
  26. #include <sound/soc.h>
  27. #include <sound/initval.h>
  28. #include <linux/i2c.h>
  29. #include <linux/delay.h>
  30. #include <linux/regulator/consumer.h>
  31. #include <linux/of_device.h>
  32. #include <linux/of_gpio.h>
  33. /*
  34. * The codec isn't really big-endian or little-endian, since the I2S
  35. * interface requires data to be sent serially with the MSbit first.
  36. * However, to support BE and LE I2S devices, we specify both here. That
  37. * way, ALSA will always match the bit patterns.
  38. */
  39. #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
  40. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
  41. SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
  42. SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
  43. SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
  44. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
  45. /* CS4270 registers addresses */
  46. #define CS4270_CHIPID 0x01 /* Chip ID */
  47. #define CS4270_PWRCTL 0x02 /* Power Control */
  48. #define CS4270_MODE 0x03 /* Mode Control */
  49. #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */
  50. #define CS4270_TRANS 0x05 /* Transition Control */
  51. #define CS4270_MUTE 0x06 /* Mute Control */
  52. #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */
  53. #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */
  54. #define CS4270_FIRSTREG 0x01
  55. #define CS4270_LASTREG 0x08
  56. #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1)
  57. #define CS4270_I2C_INCR 0x80
  58. /* Bit masks for the CS4270 registers */
  59. #define CS4270_CHIPID_ID 0xF0
  60. #define CS4270_CHIPID_REV 0x0F
  61. #define CS4270_PWRCTL_FREEZE 0x80
  62. #define CS4270_PWRCTL_PDN_ADC 0x20
  63. #define CS4270_PWRCTL_PDN_DAC 0x02
  64. #define CS4270_PWRCTL_PDN 0x01
  65. #define CS4270_PWRCTL_PDN_ALL \
  66. (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN)
  67. #define CS4270_MODE_SPEED_MASK 0x30
  68. #define CS4270_MODE_1X 0x00
  69. #define CS4270_MODE_2X 0x10
  70. #define CS4270_MODE_4X 0x20
  71. #define CS4270_MODE_SLAVE 0x30
  72. #define CS4270_MODE_DIV_MASK 0x0E
  73. #define CS4270_MODE_DIV1 0x00
  74. #define CS4270_MODE_DIV15 0x02
  75. #define CS4270_MODE_DIV2 0x04
  76. #define CS4270_MODE_DIV3 0x06
  77. #define CS4270_MODE_DIV4 0x08
  78. #define CS4270_MODE_POPGUARD 0x01
  79. #define CS4270_FORMAT_FREEZE_A 0x80
  80. #define CS4270_FORMAT_FREEZE_B 0x40
  81. #define CS4270_FORMAT_LOOPBACK 0x20
  82. #define CS4270_FORMAT_DAC_MASK 0x18
  83. #define CS4270_FORMAT_DAC_LJ 0x00
  84. #define CS4270_FORMAT_DAC_I2S 0x08
  85. #define CS4270_FORMAT_DAC_RJ16 0x18
  86. #define CS4270_FORMAT_DAC_RJ24 0x10
  87. #define CS4270_FORMAT_ADC_MASK 0x01
  88. #define CS4270_FORMAT_ADC_LJ 0x00
  89. #define CS4270_FORMAT_ADC_I2S 0x01
  90. #define CS4270_TRANS_ONE_VOL 0x80
  91. #define CS4270_TRANS_SOFT 0x40
  92. #define CS4270_TRANS_ZERO 0x20
  93. #define CS4270_TRANS_INV_ADC_A 0x08
  94. #define CS4270_TRANS_INV_ADC_B 0x10
  95. #define CS4270_TRANS_INV_DAC_A 0x02
  96. #define CS4270_TRANS_INV_DAC_B 0x04
  97. #define CS4270_TRANS_DEEMPH 0x01
  98. #define CS4270_MUTE_AUTO 0x20
  99. #define CS4270_MUTE_ADC_A 0x08
  100. #define CS4270_MUTE_ADC_B 0x10
  101. #define CS4270_MUTE_POLARITY 0x04
  102. #define CS4270_MUTE_DAC_A 0x01
  103. #define CS4270_MUTE_DAC_B 0x02
  104. /* Power-on default values for the registers
  105. *
  106. * This array contains the power-on default values of the registers, with the
  107. * exception of the "CHIPID" register (01h). The lower four bits of that
  108. * register contain the hardware revision, so it is treated as volatile.
  109. */
  110. static const struct reg_default cs4270_reg_defaults[] = {
  111. { 2, 0x00 },
  112. { 3, 0x30 },
  113. { 4, 0x00 },
  114. { 5, 0x60 },
  115. { 6, 0x20 },
  116. { 7, 0x00 },
  117. { 8, 0x00 },
  118. };
  119. static const char *supply_names[] = {
  120. "va", "vd", "vlc"
  121. };
  122. /* Private data for the CS4270 */
  123. struct cs4270_private {
  124. struct regmap *regmap;
  125. unsigned int mclk; /* Input frequency of the MCLK pin */
  126. unsigned int mode; /* The mode (I2S or left-justified) */
  127. unsigned int slave_mode;
  128. unsigned int manual_mute;
  129. /* power domain regulators */
  130. struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
  131. };
  132. /**
  133. * struct cs4270_mode_ratios - clock ratio tables
  134. * @ratio: the ratio of MCLK to the sample rate
  135. * @speed_mode: the Speed Mode bits to set in the Mode Control register for
  136. * this ratio
  137. * @mclk: the Ratio Select bits to set in the Mode Control register for this
  138. * ratio
  139. *
  140. * The data for this chart is taken from Table 5 of the CS4270 reference
  141. * manual.
  142. *
  143. * This table is used to determine how to program the Mode Control register.
  144. * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
  145. * rates the CS4270 currently supports.
  146. *
  147. * @speed_mode is the corresponding bit pattern to be written to the
  148. * MODE bits of the Mode Control Register
  149. *
  150. * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of
  151. * the Mode Control Register.
  152. *
  153. * In situations where a single ratio is represented by multiple speed
  154. * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
  155. * double-speed instead of quad-speed. However, the CS4270 errata states
  156. * that divide-By-1.5 can cause failures, so we avoid that mode where
  157. * possible.
  158. *
  159. * Errata: There is an errata for the CS4270 where divide-by-1.5 does not
  160. * work if Vd is 3.3V. If this effects you, select the
  161. * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
  162. * never select any sample rates that require divide-by-1.5.
  163. */
  164. struct cs4270_mode_ratios {
  165. unsigned int ratio;
  166. u8 speed_mode;
  167. u8 mclk;
  168. };
  169. static struct cs4270_mode_ratios cs4270_mode_ratios[] = {
  170. {64, CS4270_MODE_4X, CS4270_MODE_DIV1},
  171. #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
  172. {96, CS4270_MODE_4X, CS4270_MODE_DIV15},
  173. #endif
  174. {128, CS4270_MODE_2X, CS4270_MODE_DIV1},
  175. {192, CS4270_MODE_4X, CS4270_MODE_DIV3},
  176. {256, CS4270_MODE_1X, CS4270_MODE_DIV1},
  177. {384, CS4270_MODE_2X, CS4270_MODE_DIV3},
  178. {512, CS4270_MODE_1X, CS4270_MODE_DIV2},
  179. {768, CS4270_MODE_1X, CS4270_MODE_DIV3},
  180. {1024, CS4270_MODE_1X, CS4270_MODE_DIV4}
  181. };
  182. /* The number of MCLK/LRCK ratios supported by the CS4270 */
  183. #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
  184. static bool cs4270_reg_is_readable(struct device *dev, unsigned int reg)
  185. {
  186. return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG);
  187. }
  188. static bool cs4270_reg_is_volatile(struct device *dev, unsigned int reg)
  189. {
  190. /* Unreadable registers are considered volatile */
  191. if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
  192. return 1;
  193. return reg == CS4270_CHIPID;
  194. }
  195. /**
  196. * cs4270_set_dai_sysclk - determine the CS4270 samples rates.
  197. * @codec_dai: the codec DAI
  198. * @clk_id: the clock ID (ignored)
  199. * @freq: the MCLK input frequency
  200. * @dir: the clock direction (ignored)
  201. *
  202. * This function is used to tell the codec driver what the input MCLK
  203. * frequency is.
  204. *
  205. * The value of MCLK is used to determine which sample rates are supported
  206. * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
  207. * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
  208. *
  209. * This function calculates the nine ratios and determines which ones match
  210. * a standard sample rate. If there's a match, then it is added to the list
  211. * of supported sample rates.
  212. *
  213. * This function must be called by the machine driver's 'startup' function,
  214. * otherwise the list of supported sample rates will not be available in
  215. * time for ALSA.
  216. *
  217. * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
  218. * theoretically possible sample rates to be enabled. Call it again with a
  219. * proper value set one the external clock is set (most probably you would do
  220. * that from a machine's driver 'hw_param' hook.
  221. */
  222. static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  223. int clk_id, unsigned int freq, int dir)
  224. {
  225. struct snd_soc_codec *codec = codec_dai->codec;
  226. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  227. cs4270->mclk = freq;
  228. return 0;
  229. }
  230. /**
  231. * cs4270_set_dai_fmt - configure the codec for the selected audio format
  232. * @codec_dai: the codec DAI
  233. * @format: a SND_SOC_DAIFMT_x value indicating the data format
  234. *
  235. * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
  236. * codec accordingly.
  237. *
  238. * Currently, this function only supports SND_SOC_DAIFMT_I2S and
  239. * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified
  240. * data for playback only, but ASoC currently does not support different
  241. * formats for playback vs. record.
  242. */
  243. static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai,
  244. unsigned int format)
  245. {
  246. struct snd_soc_codec *codec = codec_dai->codec;
  247. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  248. /* set DAI format */
  249. switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
  250. case SND_SOC_DAIFMT_I2S:
  251. case SND_SOC_DAIFMT_LEFT_J:
  252. cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
  253. break;
  254. default:
  255. dev_err(codec->dev, "invalid dai format\n");
  256. return -EINVAL;
  257. }
  258. /* set master/slave audio interface */
  259. switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
  260. case SND_SOC_DAIFMT_CBS_CFS:
  261. cs4270->slave_mode = 1;
  262. break;
  263. case SND_SOC_DAIFMT_CBM_CFM:
  264. cs4270->slave_mode = 0;
  265. break;
  266. default:
  267. /* all other modes are unsupported by the hardware */
  268. dev_err(codec->dev, "Unknown master/slave configuration\n");
  269. return -EINVAL;
  270. }
  271. return 0;
  272. }
  273. /**
  274. * cs4270_hw_params - program the CS4270 with the given hardware parameters.
  275. * @substream: the audio stream
  276. * @params: the hardware parameters to set
  277. * @dai: the SOC DAI (ignored)
  278. *
  279. * This function programs the hardware with the values provided.
  280. * Specifically, the sample rate and the data format.
  281. *
  282. * The .ops functions are used to provide board-specific data, like input
  283. * frequencies, to this driver. This function takes that information,
  284. * combines it with the hardware parameters provided, and programs the
  285. * hardware accordingly.
  286. */
  287. static int cs4270_hw_params(struct snd_pcm_substream *substream,
  288. struct snd_pcm_hw_params *params,
  289. struct snd_soc_dai *dai)
  290. {
  291. struct snd_soc_codec *codec = dai->codec;
  292. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  293. int ret;
  294. unsigned int i;
  295. unsigned int rate;
  296. unsigned int ratio;
  297. int reg;
  298. /* Figure out which MCLK/LRCK ratio to use */
  299. rate = params_rate(params); /* Sampling rate, in Hz */
  300. ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */
  301. for (i = 0; i < NUM_MCLK_RATIOS; i++) {
  302. if (cs4270_mode_ratios[i].ratio == ratio)
  303. break;
  304. }
  305. if (i == NUM_MCLK_RATIOS) {
  306. /* We did not find a matching ratio */
  307. dev_err(codec->dev, "could not find matching ratio\n");
  308. return -EINVAL;
  309. }
  310. /* Set the sample rate */
  311. reg = snd_soc_read(codec, CS4270_MODE);
  312. reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK);
  313. reg |= cs4270_mode_ratios[i].mclk;
  314. if (cs4270->slave_mode)
  315. reg |= CS4270_MODE_SLAVE;
  316. else
  317. reg |= cs4270_mode_ratios[i].speed_mode;
  318. ret = snd_soc_write(codec, CS4270_MODE, reg);
  319. if (ret < 0) {
  320. dev_err(codec->dev, "i2c write failed\n");
  321. return ret;
  322. }
  323. /* Set the DAI format */
  324. reg = snd_soc_read(codec, CS4270_FORMAT);
  325. reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK);
  326. switch (cs4270->mode) {
  327. case SND_SOC_DAIFMT_I2S:
  328. reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S;
  329. break;
  330. case SND_SOC_DAIFMT_LEFT_J:
  331. reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ;
  332. break;
  333. default:
  334. dev_err(codec->dev, "unknown dai format\n");
  335. return -EINVAL;
  336. }
  337. ret = snd_soc_write(codec, CS4270_FORMAT, reg);
  338. if (ret < 0) {
  339. dev_err(codec->dev, "i2c write failed\n");
  340. return ret;
  341. }
  342. return ret;
  343. }
  344. /**
  345. * cs4270_dai_mute - enable/disable the CS4270 external mute
  346. * @dai: the SOC DAI
  347. * @mute: 0 = disable mute, 1 = enable mute
  348. *
  349. * This function toggles the mute bits in the MUTE register. The CS4270's
  350. * mute capability is intended for external muting circuitry, so if the
  351. * board does not have the MUTEA or MUTEB pins connected to such circuitry,
  352. * then this function will do nothing.
  353. */
  354. static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute)
  355. {
  356. struct snd_soc_codec *codec = dai->codec;
  357. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  358. int reg6;
  359. reg6 = snd_soc_read(codec, CS4270_MUTE);
  360. if (mute)
  361. reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B;
  362. else {
  363. reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B);
  364. reg6 |= cs4270->manual_mute;
  365. }
  366. return snd_soc_write(codec, CS4270_MUTE, reg6);
  367. }
  368. /**
  369. * cs4270_soc_put_mute - put callback for the 'Master Playback switch'
  370. * alsa control.
  371. * @kcontrol: mixer control
  372. * @ucontrol: control element information
  373. *
  374. * This function basically passes the arguments on to the generic
  375. * snd_soc_put_volsw() function and saves the mute information in
  376. * our private data structure. This is because we want to prevent
  377. * cs4270_dai_mute() neglecting the user's decision to manually
  378. * mute the codec's output.
  379. *
  380. * Returns 0 for success.
  381. */
  382. static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol,
  383. struct snd_ctl_elem_value *ucontrol)
  384. {
  385. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  386. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  387. int left = !ucontrol->value.integer.value[0];
  388. int right = !ucontrol->value.integer.value[1];
  389. cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) |
  390. (right ? CS4270_MUTE_DAC_B : 0);
  391. return snd_soc_put_volsw(kcontrol, ucontrol);
  392. }
  393. /* A list of non-DAPM controls that the CS4270 supports */
  394. static const struct snd_kcontrol_new cs4270_snd_controls[] = {
  395. SOC_DOUBLE_R("Master Playback Volume",
  396. CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1),
  397. SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0),
  398. SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0),
  399. SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0),
  400. SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0),
  401. SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1),
  402. SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0),
  403. SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1),
  404. SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1,
  405. snd_soc_get_volsw, cs4270_soc_put_mute),
  406. };
  407. static const struct snd_soc_dai_ops cs4270_dai_ops = {
  408. .hw_params = cs4270_hw_params,
  409. .set_sysclk = cs4270_set_dai_sysclk,
  410. .set_fmt = cs4270_set_dai_fmt,
  411. .digital_mute = cs4270_dai_mute,
  412. };
  413. static struct snd_soc_dai_driver cs4270_dai = {
  414. .name = "cs4270-hifi",
  415. .playback = {
  416. .stream_name = "Playback",
  417. .channels_min = 2,
  418. .channels_max = 2,
  419. .rates = SNDRV_PCM_RATE_CONTINUOUS,
  420. .rate_min = 4000,
  421. .rate_max = 216000,
  422. .formats = CS4270_FORMATS,
  423. },
  424. .capture = {
  425. .stream_name = "Capture",
  426. .channels_min = 2,
  427. .channels_max = 2,
  428. .rates = SNDRV_PCM_RATE_CONTINUOUS,
  429. .rate_min = 4000,
  430. .rate_max = 216000,
  431. .formats = CS4270_FORMATS,
  432. },
  433. .ops = &cs4270_dai_ops,
  434. };
  435. /**
  436. * cs4270_probe - ASoC probe function
  437. * @pdev: platform device
  438. *
  439. * This function is called when ASoC has all the pieces it needs to
  440. * instantiate a sound driver.
  441. */
  442. static int cs4270_probe(struct snd_soc_codec *codec)
  443. {
  444. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  445. int ret;
  446. /* Tell ASoC what kind of I/O to use to read the registers. ASoC will
  447. * then do the I2C transactions itself.
  448. */
  449. ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
  450. if (ret < 0) {
  451. dev_err(codec->dev, "failed to set cache I/O (ret=%i)\n", ret);
  452. return ret;
  453. }
  454. /* Disable auto-mute. This feature appears to be buggy. In some
  455. * situations, auto-mute will not deactivate when it should, so we want
  456. * this feature disabled by default. An application (e.g. alsactl) can
  457. * re-enabled it by using the controls.
  458. */
  459. ret = snd_soc_update_bits(codec, CS4270_MUTE, CS4270_MUTE_AUTO, 0);
  460. if (ret < 0) {
  461. dev_err(codec->dev, "i2c write failed\n");
  462. return ret;
  463. }
  464. /* Disable automatic volume control. The hardware enables, and it
  465. * causes volume change commands to be delayed, sometimes until after
  466. * playback has started. An application (e.g. alsactl) can
  467. * re-enabled it by using the controls.
  468. */
  469. ret = snd_soc_update_bits(codec, CS4270_TRANS,
  470. CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, 0);
  471. if (ret < 0) {
  472. dev_err(codec->dev, "i2c write failed\n");
  473. return ret;
  474. }
  475. ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
  476. cs4270->supplies);
  477. return ret;
  478. }
  479. /**
  480. * cs4270_remove - ASoC remove function
  481. * @pdev: platform device
  482. *
  483. * This function is the counterpart to cs4270_probe().
  484. */
  485. static int cs4270_remove(struct snd_soc_codec *codec)
  486. {
  487. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  488. regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
  489. return 0;
  490. };
  491. #ifdef CONFIG_PM
  492. /* This suspend/resume implementation can handle both - a simple standby
  493. * where the codec remains powered, and a full suspend, where the voltage
  494. * domain the codec is connected to is teared down and/or any other hardware
  495. * reset condition is asserted.
  496. *
  497. * The codec's own power saving features are enabled in the suspend callback,
  498. * and all registers are written back to the hardware when resuming.
  499. */
  500. static int cs4270_soc_suspend(struct snd_soc_codec *codec)
  501. {
  502. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  503. int reg, ret;
  504. reg = snd_soc_read(codec, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL;
  505. if (reg < 0)
  506. return reg;
  507. ret = snd_soc_write(codec, CS4270_PWRCTL, reg);
  508. if (ret < 0)
  509. return ret;
  510. regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies),
  511. cs4270->supplies);
  512. return 0;
  513. }
  514. static int cs4270_soc_resume(struct snd_soc_codec *codec)
  515. {
  516. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  517. int reg, ret;
  518. ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
  519. cs4270->supplies);
  520. if (ret != 0)
  521. return ret;
  522. /* In case the device was put to hard reset during sleep, we need to
  523. * wait 500ns here before any I2C communication. */
  524. ndelay(500);
  525. /* first restore the entire register cache ... */
  526. regcache_sync(cs4270->regmap);
  527. /* ... then disable the power-down bits */
  528. reg = snd_soc_read(codec, CS4270_PWRCTL);
  529. reg &= ~CS4270_PWRCTL_PDN_ALL;
  530. return snd_soc_write(codec, CS4270_PWRCTL, reg);
  531. }
  532. #else
  533. #define cs4270_soc_suspend NULL
  534. #define cs4270_soc_resume NULL
  535. #endif /* CONFIG_PM */
  536. /*
  537. * ASoC codec driver structure
  538. */
  539. static const struct snd_soc_codec_driver soc_codec_device_cs4270 = {
  540. .probe = cs4270_probe,
  541. .remove = cs4270_remove,
  542. .suspend = cs4270_soc_suspend,
  543. .resume = cs4270_soc_resume,
  544. .controls = cs4270_snd_controls,
  545. .num_controls = ARRAY_SIZE(cs4270_snd_controls),
  546. };
  547. /*
  548. * cs4270_of_match - the device tree bindings
  549. */
  550. static const struct of_device_id cs4270_of_match[] = {
  551. { .compatible = "cirrus,cs4270", },
  552. { }
  553. };
  554. MODULE_DEVICE_TABLE(of, cs4270_of_match);
  555. static const struct regmap_config cs4270_regmap = {
  556. .reg_bits = 8,
  557. .val_bits = 8,
  558. .max_register = CS4270_LASTREG,
  559. .reg_defaults = cs4270_reg_defaults,
  560. .num_reg_defaults = ARRAY_SIZE(cs4270_reg_defaults),
  561. .cache_type = REGCACHE_RBTREE,
  562. .readable_reg = cs4270_reg_is_readable,
  563. .volatile_reg = cs4270_reg_is_volatile,
  564. };
  565. /**
  566. * cs4270_i2c_probe - initialize the I2C interface of the CS4270
  567. * @i2c_client: the I2C client object
  568. * @id: the I2C device ID (ignored)
  569. *
  570. * This function is called whenever the I2C subsystem finds a device that
  571. * matches the device ID given via a prior call to i2c_add_driver().
  572. */
  573. static int cs4270_i2c_probe(struct i2c_client *i2c_client,
  574. const struct i2c_device_id *id)
  575. {
  576. struct device_node *np = i2c_client->dev.of_node;
  577. struct cs4270_private *cs4270;
  578. unsigned int val;
  579. int ret, i;
  580. cs4270 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs4270_private),
  581. GFP_KERNEL);
  582. if (!cs4270) {
  583. dev_err(&i2c_client->dev, "could not allocate codec\n");
  584. return -ENOMEM;
  585. }
  586. /* get the power supply regulators */
  587. for (i = 0; i < ARRAY_SIZE(supply_names); i++)
  588. cs4270->supplies[i].supply = supply_names[i];
  589. ret = devm_regulator_bulk_get(&i2c_client->dev,
  590. ARRAY_SIZE(cs4270->supplies),
  591. cs4270->supplies);
  592. if (ret < 0)
  593. return ret;
  594. /* See if we have a way to bring the codec out of reset */
  595. if (np) {
  596. enum of_gpio_flags flags;
  597. int gpio = of_get_named_gpio_flags(np, "reset-gpio", 0, &flags);
  598. if (gpio_is_valid(gpio)) {
  599. ret = devm_gpio_request_one(&i2c_client->dev, gpio,
  600. flags & OF_GPIO_ACTIVE_LOW ?
  601. GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH,
  602. "cs4270 reset");
  603. if (ret < 0)
  604. return ret;
  605. }
  606. }
  607. cs4270->regmap = devm_regmap_init_i2c(i2c_client, &cs4270_regmap);
  608. if (IS_ERR(cs4270->regmap))
  609. return PTR_ERR(cs4270->regmap);
  610. /* Verify that we have a CS4270 */
  611. ret = regmap_read(cs4270->regmap, CS4270_CHIPID, &val);
  612. if (ret < 0) {
  613. dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n",
  614. i2c_client->addr);
  615. return ret;
  616. }
  617. /* The top four bits of the chip ID should be 1100. */
  618. if ((val & 0xF0) != 0xC0) {
  619. dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n",
  620. i2c_client->addr);
  621. return -ENODEV;
  622. }
  623. dev_info(&i2c_client->dev, "found device at i2c address %X\n",
  624. i2c_client->addr);
  625. dev_info(&i2c_client->dev, "hardware revision %X\n", val & 0xF);
  626. i2c_set_clientdata(i2c_client, cs4270);
  627. ret = snd_soc_register_codec(&i2c_client->dev,
  628. &soc_codec_device_cs4270, &cs4270_dai, 1);
  629. return ret;
  630. }
  631. /**
  632. * cs4270_i2c_remove - remove an I2C device
  633. * @i2c_client: the I2C client object
  634. *
  635. * This function is the counterpart to cs4270_i2c_probe().
  636. */
  637. static int cs4270_i2c_remove(struct i2c_client *i2c_client)
  638. {
  639. snd_soc_unregister_codec(&i2c_client->dev);
  640. return 0;
  641. }
  642. /*
  643. * cs4270_id - I2C device IDs supported by this driver
  644. */
  645. static const struct i2c_device_id cs4270_id[] = {
  646. {"cs4270", 0},
  647. {}
  648. };
  649. MODULE_DEVICE_TABLE(i2c, cs4270_id);
  650. /*
  651. * cs4270_i2c_driver - I2C device identification
  652. *
  653. * This structure tells the I2C subsystem how to identify and support a
  654. * given I2C device type.
  655. */
  656. static struct i2c_driver cs4270_i2c_driver = {
  657. .driver = {
  658. .name = "cs4270",
  659. .owner = THIS_MODULE,
  660. .of_match_table = cs4270_of_match,
  661. },
  662. .id_table = cs4270_id,
  663. .probe = cs4270_i2c_probe,
  664. .remove = cs4270_i2c_remove,
  665. };
  666. module_i2c_driver(cs4270_i2c_driver);
  667. MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
  668. MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver");
  669. MODULE_LICENSE("GPL");