patch_hdmi.c 71 KB

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  1. /*
  2. *
  3. * patch_hdmi.c - routines for HDMI/DisplayPort codecs
  4. *
  5. * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  6. * Copyright (c) 2006 ATI Technologies Inc.
  7. * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
  8. * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  9. *
  10. * Authors:
  11. * Wu Fengguang <wfg@linux.intel.com>
  12. *
  13. * Maintained by:
  14. * Wu Fengguang <wfg@linux.intel.com>
  15. *
  16. * This program is free software; you can redistribute it and/or modify it
  17. * under the terms of the GNU General Public License as published by the Free
  18. * Software Foundation; either version 2 of the License, or (at your option)
  19. * any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful, but
  22. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  24. * for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software Foundation,
  28. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  29. */
  30. #include <linux/init.h>
  31. #include <linux/delay.h>
  32. #include <linux/slab.h>
  33. #include <linux/module.h>
  34. #include <sound/core.h>
  35. #include <sound/jack.h>
  36. #include <sound/asoundef.h>
  37. #include <sound/tlv.h>
  38. #include "hda_codec.h"
  39. #include "hda_local.h"
  40. #include "hda_jack.h"
  41. static bool static_hdmi_pcm;
  42. module_param(static_hdmi_pcm, bool, 0644);
  43. MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  44. /*
  45. * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
  46. * could support N independent pipes, each of them can be connected to one or
  47. * more ports (DVI, HDMI or DisplayPort).
  48. *
  49. * The HDA correspondence of pipes/ports are converter/pin nodes.
  50. */
  51. #define MAX_HDMI_CVTS 8
  52. #define MAX_HDMI_PINS 8
  53. struct hdmi_spec_per_cvt {
  54. hda_nid_t cvt_nid;
  55. int assigned;
  56. unsigned int channels_min;
  57. unsigned int channels_max;
  58. u32 rates;
  59. u64 formats;
  60. unsigned int maxbps;
  61. };
  62. /* max. connections to a widget */
  63. #define HDA_MAX_CONNECTIONS 32
  64. struct hdmi_spec_per_pin {
  65. hda_nid_t pin_nid;
  66. int num_mux_nids;
  67. hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  68. struct hda_codec *codec;
  69. struct hdmi_eld sink_eld;
  70. struct delayed_work work;
  71. struct snd_kcontrol *eld_ctl;
  72. int repoll_count;
  73. bool non_pcm;
  74. bool chmap_set; /* channel-map override by ALSA API? */
  75. unsigned char chmap[8]; /* ALSA API channel-map */
  76. };
  77. struct hdmi_spec {
  78. int num_cvts;
  79. struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
  80. hda_nid_t cvt_nids[MAX_HDMI_CVTS];
  81. int num_pins;
  82. struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
  83. struct hda_pcm pcm_rec[MAX_HDMI_PINS];
  84. unsigned int channels_max; /* max over all cvts */
  85. struct hdmi_eld temp_eld;
  86. /*
  87. * Non-generic ATI/NVIDIA specific
  88. */
  89. struct hda_multi_out multiout;
  90. struct hda_pcm_stream pcm_playback;
  91. };
  92. struct hdmi_audio_infoframe {
  93. u8 type; /* 0x84 */
  94. u8 ver; /* 0x01 */
  95. u8 len; /* 0x0a */
  96. u8 checksum;
  97. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  98. u8 SS01_SF24;
  99. u8 CXT04;
  100. u8 CA;
  101. u8 LFEPBL01_LSV36_DM_INH7;
  102. };
  103. struct dp_audio_infoframe {
  104. u8 type; /* 0x84 */
  105. u8 len; /* 0x1b */
  106. u8 ver; /* 0x11 << 2 */
  107. u8 CC02_CT47; /* match with HDMI infoframe from this on */
  108. u8 SS01_SF24;
  109. u8 CXT04;
  110. u8 CA;
  111. u8 LFEPBL01_LSV36_DM_INH7;
  112. };
  113. union audio_infoframe {
  114. struct hdmi_audio_infoframe hdmi;
  115. struct dp_audio_infoframe dp;
  116. u8 bytes[0];
  117. };
  118. /*
  119. * CEA speaker placement:
  120. *
  121. * FLH FCH FRH
  122. * FLW FL FLC FC FRC FR FRW
  123. *
  124. * LFE
  125. * TC
  126. *
  127. * RL RLC RC RRC RR
  128. *
  129. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  130. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  131. */
  132. enum cea_speaker_placement {
  133. FL = (1 << 0), /* Front Left */
  134. FC = (1 << 1), /* Front Center */
  135. FR = (1 << 2), /* Front Right */
  136. FLC = (1 << 3), /* Front Left Center */
  137. FRC = (1 << 4), /* Front Right Center */
  138. RL = (1 << 5), /* Rear Left */
  139. RC = (1 << 6), /* Rear Center */
  140. RR = (1 << 7), /* Rear Right */
  141. RLC = (1 << 8), /* Rear Left Center */
  142. RRC = (1 << 9), /* Rear Right Center */
  143. LFE = (1 << 10), /* Low Frequency Effect */
  144. FLW = (1 << 11), /* Front Left Wide */
  145. FRW = (1 << 12), /* Front Right Wide */
  146. FLH = (1 << 13), /* Front Left High */
  147. FCH = (1 << 14), /* Front Center High */
  148. FRH = (1 << 15), /* Front Right High */
  149. TC = (1 << 16), /* Top Center */
  150. };
  151. /*
  152. * ELD SA bits in the CEA Speaker Allocation data block
  153. */
  154. static int eld_speaker_allocation_bits[] = {
  155. [0] = FL | FR,
  156. [1] = LFE,
  157. [2] = FC,
  158. [3] = RL | RR,
  159. [4] = RC,
  160. [5] = FLC | FRC,
  161. [6] = RLC | RRC,
  162. /* the following are not defined in ELD yet */
  163. [7] = FLW | FRW,
  164. [8] = FLH | FRH,
  165. [9] = TC,
  166. [10] = FCH,
  167. };
  168. struct cea_channel_speaker_allocation {
  169. int ca_index;
  170. int speakers[8];
  171. /* derived values, just for convenience */
  172. int channels;
  173. int spk_mask;
  174. };
  175. /*
  176. * ALSA sequence is:
  177. *
  178. * surround40 surround41 surround50 surround51 surround71
  179. * ch0 front left = = = =
  180. * ch1 front right = = = =
  181. * ch2 rear left = = = =
  182. * ch3 rear right = = = =
  183. * ch4 LFE center center center
  184. * ch5 LFE LFE
  185. * ch6 side left
  186. * ch7 side right
  187. *
  188. * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
  189. */
  190. static int hdmi_channel_mapping[0x32][8] = {
  191. /* stereo */
  192. [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  193. /* 2.1 */
  194. [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  195. /* Dolby Surround */
  196. [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
  197. /* surround40 */
  198. [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
  199. /* 4ch */
  200. [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
  201. /* surround41 */
  202. [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
  203. /* surround50 */
  204. [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
  205. /* surround51 */
  206. [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
  207. /* 7.1 */
  208. [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
  209. };
  210. /*
  211. * This is an ordered list!
  212. *
  213. * The preceding ones have better chances to be selected by
  214. * hdmi_channel_allocation().
  215. */
  216. static struct cea_channel_speaker_allocation channel_allocations[] = {
  217. /* channel: 7 6 5 4 3 2 1 0 */
  218. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  219. /* 2.1 */
  220. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  221. /* Dolby Surround */
  222. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  223. /* surround40 */
  224. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  225. /* surround41 */
  226. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  227. /* surround50 */
  228. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  229. /* surround51 */
  230. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  231. /* 6.1 */
  232. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  233. /* surround71 */
  234. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  235. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  236. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  237. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  238. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  239. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  240. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  241. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  242. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  243. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  244. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  245. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  246. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  247. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  248. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  249. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  250. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  251. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  252. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  253. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  254. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  255. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  256. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  257. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  258. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  259. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  260. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  261. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  262. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  263. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  264. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  265. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  266. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  267. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  268. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  269. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  270. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  271. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  272. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  273. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  274. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  275. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  276. };
  277. /*
  278. * HDMI routines
  279. */
  280. static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
  281. {
  282. int pin_idx;
  283. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  284. if (spec->pins[pin_idx].pin_nid == pin_nid)
  285. return pin_idx;
  286. snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
  287. return -EINVAL;
  288. }
  289. static int hinfo_to_pin_index(struct hdmi_spec *spec,
  290. struct hda_pcm_stream *hinfo)
  291. {
  292. int pin_idx;
  293. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  294. if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
  295. return pin_idx;
  296. snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
  297. return -EINVAL;
  298. }
  299. static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
  300. {
  301. int cvt_idx;
  302. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
  303. if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
  304. return cvt_idx;
  305. snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
  306. return -EINVAL;
  307. }
  308. static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
  309. struct snd_ctl_elem_info *uinfo)
  310. {
  311. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  312. struct hdmi_spec *spec = codec->spec;
  313. struct hdmi_eld *eld;
  314. int pin_idx;
  315. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  316. pin_idx = kcontrol->private_value;
  317. eld = &spec->pins[pin_idx].sink_eld;
  318. mutex_lock(&eld->lock);
  319. uinfo->count = eld->eld_valid ? eld->eld_size : 0;
  320. mutex_unlock(&eld->lock);
  321. return 0;
  322. }
  323. static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
  324. struct snd_ctl_elem_value *ucontrol)
  325. {
  326. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  327. struct hdmi_spec *spec = codec->spec;
  328. struct hdmi_eld *eld;
  329. int pin_idx;
  330. pin_idx = kcontrol->private_value;
  331. eld = &spec->pins[pin_idx].sink_eld;
  332. mutex_lock(&eld->lock);
  333. if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
  334. mutex_unlock(&eld->lock);
  335. snd_BUG();
  336. return -EINVAL;
  337. }
  338. memset(ucontrol->value.bytes.data, 0,
  339. ARRAY_SIZE(ucontrol->value.bytes.data));
  340. if (eld->eld_valid)
  341. memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
  342. eld->eld_size);
  343. mutex_unlock(&eld->lock);
  344. return 0;
  345. }
  346. static struct snd_kcontrol_new eld_bytes_ctl = {
  347. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  348. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  349. .name = "ELD",
  350. .info = hdmi_eld_ctl_info,
  351. .get = hdmi_eld_ctl_get,
  352. };
  353. static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
  354. int device)
  355. {
  356. struct snd_kcontrol *kctl;
  357. struct hdmi_spec *spec = codec->spec;
  358. int err;
  359. kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
  360. if (!kctl)
  361. return -ENOMEM;
  362. kctl->private_value = pin_idx;
  363. kctl->id.device = device;
  364. err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
  365. if (err < 0)
  366. return err;
  367. spec->pins[pin_idx].eld_ctl = kctl;
  368. return 0;
  369. }
  370. #ifdef BE_PARANOID
  371. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  372. int *packet_index, int *byte_index)
  373. {
  374. int val;
  375. val = snd_hda_codec_read(codec, pin_nid, 0,
  376. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  377. *packet_index = val >> 5;
  378. *byte_index = val & 0x1f;
  379. }
  380. #endif
  381. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  382. int packet_index, int byte_index)
  383. {
  384. int val;
  385. val = (packet_index << 5) | (byte_index & 0x1f);
  386. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  387. }
  388. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  389. unsigned char val)
  390. {
  391. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  392. }
  393. static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  394. {
  395. /* Unmute */
  396. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  397. snd_hda_codec_write(codec, pin_nid, 0,
  398. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  399. /* Enable pin out: some machines with GM965 gets broken output when
  400. * the pin is disabled or changed while using with HDMI
  401. */
  402. snd_hda_codec_write(codec, pin_nid, 0,
  403. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  404. }
  405. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
  406. {
  407. return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
  408. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  409. }
  410. static void hdmi_set_channel_count(struct hda_codec *codec,
  411. hda_nid_t cvt_nid, int chs)
  412. {
  413. if (chs != hdmi_get_channel_count(codec, cvt_nid))
  414. snd_hda_codec_write(codec, cvt_nid, 0,
  415. AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  416. }
  417. /*
  418. * Channel mapping routines
  419. */
  420. /*
  421. * Compute derived values in channel_allocations[].
  422. */
  423. static void init_channel_allocations(void)
  424. {
  425. int i, j;
  426. struct cea_channel_speaker_allocation *p;
  427. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  428. p = channel_allocations + i;
  429. p->channels = 0;
  430. p->spk_mask = 0;
  431. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  432. if (p->speakers[j]) {
  433. p->channels++;
  434. p->spk_mask |= p->speakers[j];
  435. }
  436. }
  437. }
  438. static int get_channel_allocation_order(int ca)
  439. {
  440. int i;
  441. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  442. if (channel_allocations[i].ca_index == ca)
  443. break;
  444. }
  445. return i;
  446. }
  447. /*
  448. * The transformation takes two steps:
  449. *
  450. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  451. * spk_mask => (channel_allocations[]) => ai->CA
  452. *
  453. * TODO: it could select the wrong CA from multiple candidates.
  454. */
  455. static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
  456. {
  457. int i;
  458. int ca = 0;
  459. int spk_mask = 0;
  460. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  461. /*
  462. * CA defaults to 0 for basic stereo audio
  463. */
  464. if (channels <= 2)
  465. return 0;
  466. /*
  467. * expand ELD's speaker allocation mask
  468. *
  469. * ELD tells the speaker mask in a compact(paired) form,
  470. * expand ELD's notions to match the ones used by Audio InfoFrame.
  471. */
  472. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  473. if (eld->info.spk_alloc & (1 << i))
  474. spk_mask |= eld_speaker_allocation_bits[i];
  475. }
  476. /* search for the first working match in the CA table */
  477. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  478. if (channels == channel_allocations[i].channels &&
  479. (spk_mask & channel_allocations[i].spk_mask) ==
  480. channel_allocations[i].spk_mask) {
  481. ca = channel_allocations[i].ca_index;
  482. break;
  483. }
  484. }
  485. snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
  486. snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  487. ca, channels, buf);
  488. return ca;
  489. }
  490. static void hdmi_debug_channel_mapping(struct hda_codec *codec,
  491. hda_nid_t pin_nid)
  492. {
  493. #ifdef CONFIG_SND_DEBUG_VERBOSE
  494. int i;
  495. int slot;
  496. for (i = 0; i < 8; i++) {
  497. slot = snd_hda_codec_read(codec, pin_nid, 0,
  498. AC_VERB_GET_HDMI_CHAN_SLOT, i);
  499. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  500. slot >> 4, slot & 0xf);
  501. }
  502. #endif
  503. }
  504. static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
  505. hda_nid_t pin_nid,
  506. bool non_pcm,
  507. int ca)
  508. {
  509. int i;
  510. int err;
  511. int order;
  512. int non_pcm_mapping[8];
  513. order = get_channel_allocation_order(ca);
  514. if (hdmi_channel_mapping[ca][1] == 0) {
  515. for (i = 0; i < channel_allocations[order].channels; i++)
  516. hdmi_channel_mapping[ca][i] = i | (i << 4);
  517. for (; i < 8; i++)
  518. hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
  519. }
  520. if (non_pcm) {
  521. for (i = 0; i < channel_allocations[order].channels; i++)
  522. non_pcm_mapping[i] = i | (i << 4);
  523. for (; i < 8; i++)
  524. non_pcm_mapping[i] = 0xf | (i << 4);
  525. }
  526. for (i = 0; i < 8; i++) {
  527. err = snd_hda_codec_write(codec, pin_nid, 0,
  528. AC_VERB_SET_HDMI_CHAN_SLOT,
  529. non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
  530. if (err) {
  531. snd_printdd(KERN_NOTICE
  532. "HDMI: channel mapping failed\n");
  533. break;
  534. }
  535. }
  536. hdmi_debug_channel_mapping(codec, pin_nid);
  537. }
  538. struct channel_map_table {
  539. unsigned char map; /* ALSA API channel map position */
  540. unsigned char cea_slot; /* CEA slot value */
  541. int spk_mask; /* speaker position bit mask */
  542. };
  543. static struct channel_map_table map_tables[] = {
  544. { SNDRV_CHMAP_FL, 0x00, FL },
  545. { SNDRV_CHMAP_FR, 0x01, FR },
  546. { SNDRV_CHMAP_RL, 0x04, RL },
  547. { SNDRV_CHMAP_RR, 0x05, RR },
  548. { SNDRV_CHMAP_LFE, 0x02, LFE },
  549. { SNDRV_CHMAP_FC, 0x03, FC },
  550. { SNDRV_CHMAP_RLC, 0x06, RLC },
  551. { SNDRV_CHMAP_RRC, 0x07, RRC },
  552. {} /* terminator */
  553. };
  554. /* from ALSA API channel position to speaker bit mask */
  555. static int to_spk_mask(unsigned char c)
  556. {
  557. struct channel_map_table *t = map_tables;
  558. for (; t->map; t++) {
  559. if (t->map == c)
  560. return t->spk_mask;
  561. }
  562. return 0;
  563. }
  564. /* from ALSA API channel position to CEA slot */
  565. static int to_cea_slot(unsigned char c)
  566. {
  567. struct channel_map_table *t = map_tables;
  568. for (; t->map; t++) {
  569. if (t->map == c)
  570. return t->cea_slot;
  571. }
  572. return 0x0f;
  573. }
  574. /* from CEA slot to ALSA API channel position */
  575. static int from_cea_slot(unsigned char c)
  576. {
  577. struct channel_map_table *t = map_tables;
  578. for (; t->map; t++) {
  579. if (t->cea_slot == c)
  580. return t->map;
  581. }
  582. return 0;
  583. }
  584. /* from speaker bit mask to ALSA API channel position */
  585. static int spk_to_chmap(int spk)
  586. {
  587. struct channel_map_table *t = map_tables;
  588. for (; t->map; t++) {
  589. if (t->spk_mask == spk)
  590. return t->map;
  591. }
  592. return 0;
  593. }
  594. /* get the CA index corresponding to the given ALSA API channel map */
  595. static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
  596. {
  597. int i, spks = 0, spk_mask = 0;
  598. for (i = 0; i < chs; i++) {
  599. int mask = to_spk_mask(map[i]);
  600. if (mask) {
  601. spk_mask |= mask;
  602. spks++;
  603. }
  604. }
  605. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  606. if ((chs == channel_allocations[i].channels ||
  607. spks == channel_allocations[i].channels) &&
  608. (spk_mask & channel_allocations[i].spk_mask) ==
  609. channel_allocations[i].spk_mask)
  610. return channel_allocations[i].ca_index;
  611. }
  612. return -1;
  613. }
  614. /* set up the channel slots for the given ALSA API channel map */
  615. static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
  616. hda_nid_t pin_nid,
  617. int chs, unsigned char *map)
  618. {
  619. int i;
  620. for (i = 0; i < 8; i++) {
  621. int val, err;
  622. if (i < chs)
  623. val = to_cea_slot(map[i]);
  624. else
  625. val = 0xf;
  626. val |= (i << 4);
  627. err = snd_hda_codec_write(codec, pin_nid, 0,
  628. AC_VERB_SET_HDMI_CHAN_SLOT, val);
  629. if (err)
  630. return -EINVAL;
  631. }
  632. return 0;
  633. }
  634. /* store ALSA API channel map from the current default map */
  635. static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
  636. {
  637. int i;
  638. for (i = 0; i < 8; i++) {
  639. if (i < channel_allocations[ca].channels)
  640. map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
  641. else
  642. map[i] = 0;
  643. }
  644. }
  645. static void hdmi_setup_channel_mapping(struct hda_codec *codec,
  646. hda_nid_t pin_nid, bool non_pcm, int ca,
  647. int channels, unsigned char *map,
  648. bool chmap_set)
  649. {
  650. if (!non_pcm && chmap_set) {
  651. hdmi_manual_setup_channel_mapping(codec, pin_nid,
  652. channels, map);
  653. } else {
  654. hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
  655. hdmi_setup_fake_chmap(map, ca);
  656. }
  657. }
  658. /*
  659. * Audio InfoFrame routines
  660. */
  661. /*
  662. * Enable Audio InfoFrame Transmission
  663. */
  664. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  665. hda_nid_t pin_nid)
  666. {
  667. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  668. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  669. AC_DIPXMIT_BEST);
  670. }
  671. /*
  672. * Disable Audio InfoFrame Transmission
  673. */
  674. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  675. hda_nid_t pin_nid)
  676. {
  677. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  678. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  679. AC_DIPXMIT_DISABLE);
  680. }
  681. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  682. {
  683. #ifdef CONFIG_SND_DEBUG_VERBOSE
  684. int i;
  685. int size;
  686. size = snd_hdmi_get_eld_size(codec, pin_nid);
  687. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  688. for (i = 0; i < 8; i++) {
  689. size = snd_hda_codec_read(codec, pin_nid, 0,
  690. AC_VERB_GET_HDMI_DIP_SIZE, i);
  691. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  692. }
  693. #endif
  694. }
  695. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  696. {
  697. #ifdef BE_PARANOID
  698. int i, j;
  699. int size;
  700. int pi, bi;
  701. for (i = 0; i < 8; i++) {
  702. size = snd_hda_codec_read(codec, pin_nid, 0,
  703. AC_VERB_GET_HDMI_DIP_SIZE, i);
  704. if (size == 0)
  705. continue;
  706. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  707. for (j = 1; j < 1000; j++) {
  708. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  709. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  710. if (pi != i)
  711. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  712. bi, pi, i);
  713. if (bi == 0) /* byte index wrapped around */
  714. break;
  715. }
  716. snd_printd(KERN_INFO
  717. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  718. i, size, j);
  719. }
  720. #endif
  721. }
  722. static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
  723. {
  724. u8 *bytes = (u8 *)hdmi_ai;
  725. u8 sum = 0;
  726. int i;
  727. hdmi_ai->checksum = 0;
  728. for (i = 0; i < sizeof(*hdmi_ai); i++)
  729. sum += bytes[i];
  730. hdmi_ai->checksum = -sum;
  731. }
  732. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  733. hda_nid_t pin_nid,
  734. u8 *dip, int size)
  735. {
  736. int i;
  737. hdmi_debug_dip_size(codec, pin_nid);
  738. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  739. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  740. for (i = 0; i < size; i++)
  741. hdmi_write_dip_byte(codec, pin_nid, dip[i]);
  742. }
  743. static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
  744. u8 *dip, int size)
  745. {
  746. u8 val;
  747. int i;
  748. if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
  749. != AC_DIPXMIT_BEST)
  750. return false;
  751. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  752. for (i = 0; i < size; i++) {
  753. val = snd_hda_codec_read(codec, pin_nid, 0,
  754. AC_VERB_GET_HDMI_DIP_DATA, 0);
  755. if (val != dip[i])
  756. return false;
  757. }
  758. return true;
  759. }
  760. static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
  761. bool non_pcm,
  762. struct snd_pcm_substream *substream)
  763. {
  764. struct hdmi_spec *spec = codec->spec;
  765. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  766. hda_nid_t pin_nid = per_pin->pin_nid;
  767. int channels = substream->runtime->channels;
  768. struct hdmi_eld *eld;
  769. int ca;
  770. union audio_infoframe ai;
  771. eld = &spec->pins[pin_idx].sink_eld;
  772. if (!eld->monitor_present)
  773. return;
  774. if (!non_pcm && per_pin->chmap_set)
  775. ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
  776. else
  777. ca = hdmi_channel_allocation(eld, channels);
  778. if (ca < 0)
  779. ca = 0;
  780. memset(&ai, 0, sizeof(ai));
  781. if (eld->info.conn_type == 0) { /* HDMI */
  782. struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
  783. hdmi_ai->type = 0x84;
  784. hdmi_ai->ver = 0x01;
  785. hdmi_ai->len = 0x0a;
  786. hdmi_ai->CC02_CT47 = channels - 1;
  787. hdmi_ai->CA = ca;
  788. hdmi_checksum_audio_infoframe(hdmi_ai);
  789. } else if (eld->info.conn_type == 1) { /* DisplayPort */
  790. struct dp_audio_infoframe *dp_ai = &ai.dp;
  791. dp_ai->type = 0x84;
  792. dp_ai->len = 0x1b;
  793. dp_ai->ver = 0x11 << 2;
  794. dp_ai->CC02_CT47 = channels - 1;
  795. dp_ai->CA = ca;
  796. } else {
  797. snd_printd("HDMI: unknown connection type at pin %d\n",
  798. pin_nid);
  799. return;
  800. }
  801. /*
  802. * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
  803. * sizeof(*dp_ai) to avoid partial match/update problems when
  804. * the user switches between HDMI/DP monitors.
  805. */
  806. if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
  807. sizeof(ai))) {
  808. snd_printdd("hdmi_setup_audio_infoframe: "
  809. "pin=%d channels=%d\n",
  810. pin_nid,
  811. channels);
  812. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  813. channels, per_pin->chmap,
  814. per_pin->chmap_set);
  815. hdmi_stop_infoframe_trans(codec, pin_nid);
  816. hdmi_fill_audio_infoframe(codec, pin_nid,
  817. ai.bytes, sizeof(ai));
  818. hdmi_start_infoframe_trans(codec, pin_nid);
  819. } else {
  820. /* For non-pcm audio switch, setup new channel mapping
  821. * accordingly */
  822. if (per_pin->non_pcm != non_pcm)
  823. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  824. channels, per_pin->chmap,
  825. per_pin->chmap_set);
  826. }
  827. per_pin->non_pcm = non_pcm;
  828. }
  829. /*
  830. * Unsolicited events
  831. */
  832. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
  833. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  834. {
  835. struct hdmi_spec *spec = codec->spec;
  836. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  837. int pin_nid;
  838. int pin_idx;
  839. struct hda_jack_tbl *jack;
  840. jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
  841. if (!jack)
  842. return;
  843. pin_nid = jack->nid;
  844. jack->jack_dirty = 1;
  845. _snd_printd(SND_PR_VERBOSE,
  846. "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  847. codec->addr, pin_nid,
  848. !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
  849. pin_idx = pin_nid_to_pin_index(spec, pin_nid);
  850. if (pin_idx < 0)
  851. return;
  852. hdmi_present_sense(&spec->pins[pin_idx], 1);
  853. snd_hda_jack_report_sync(codec);
  854. }
  855. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  856. {
  857. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  858. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  859. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  860. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  861. printk(KERN_INFO
  862. "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  863. codec->addr,
  864. tag,
  865. subtag,
  866. cp_state,
  867. cp_ready);
  868. /* TODO */
  869. if (cp_state)
  870. ;
  871. if (cp_ready)
  872. ;
  873. }
  874. static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  875. {
  876. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  877. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  878. if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
  879. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  880. return;
  881. }
  882. if (subtag == 0)
  883. hdmi_intrinsic_event(codec, res);
  884. else
  885. hdmi_non_intrinsic_event(codec, res);
  886. }
  887. /*
  888. * Callbacks
  889. */
  890. /* HBR should be Non-PCM, 8 channels */
  891. #define is_hbr_format(format) \
  892. ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
  893. static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
  894. hda_nid_t pin_nid, u32 stream_tag, int format)
  895. {
  896. int pinctl;
  897. int new_pinctl = 0;
  898. if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
  899. pinctl = snd_hda_codec_read(codec, pin_nid, 0,
  900. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  901. new_pinctl = pinctl & ~AC_PINCTL_EPT;
  902. if (is_hbr_format(format))
  903. new_pinctl |= AC_PINCTL_EPT_HBR;
  904. else
  905. new_pinctl |= AC_PINCTL_EPT_NATIVE;
  906. snd_printdd("hdmi_setup_stream: "
  907. "NID=0x%x, %spinctl=0x%x\n",
  908. pin_nid,
  909. pinctl == new_pinctl ? "" : "new-",
  910. new_pinctl);
  911. if (pinctl != new_pinctl)
  912. snd_hda_codec_write(codec, pin_nid, 0,
  913. AC_VERB_SET_PIN_WIDGET_CONTROL,
  914. new_pinctl);
  915. }
  916. if (is_hbr_format(format) && !new_pinctl) {
  917. snd_printdd("hdmi_setup_stream: HBR is not supported\n");
  918. return -EINVAL;
  919. }
  920. snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
  921. return 0;
  922. }
  923. /*
  924. * HDA PCM callbacks
  925. */
  926. static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
  927. struct hda_codec *codec,
  928. struct snd_pcm_substream *substream)
  929. {
  930. struct hdmi_spec *spec = codec->spec;
  931. struct snd_pcm_runtime *runtime = substream->runtime;
  932. int pin_idx, cvt_idx, mux_idx = 0;
  933. struct hdmi_spec_per_pin *per_pin;
  934. struct hdmi_eld *eld;
  935. struct hdmi_spec_per_cvt *per_cvt = NULL;
  936. /* Validate hinfo */
  937. pin_idx = hinfo_to_pin_index(spec, hinfo);
  938. if (snd_BUG_ON(pin_idx < 0))
  939. return -EINVAL;
  940. per_pin = &spec->pins[pin_idx];
  941. eld = &per_pin->sink_eld;
  942. /* Dynamically assign converter to stream */
  943. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  944. per_cvt = &spec->cvts[cvt_idx];
  945. /* Must not already be assigned */
  946. if (per_cvt->assigned)
  947. continue;
  948. /* Must be in pin's mux's list of converters */
  949. for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
  950. if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
  951. break;
  952. /* Not in mux list */
  953. if (mux_idx == per_pin->num_mux_nids)
  954. continue;
  955. break;
  956. }
  957. /* No free converters */
  958. if (cvt_idx == spec->num_cvts)
  959. return -ENODEV;
  960. /* Claim converter */
  961. per_cvt->assigned = 1;
  962. hinfo->nid = per_cvt->cvt_nid;
  963. snd_hda_codec_write(codec, per_pin->pin_nid, 0,
  964. AC_VERB_SET_CONNECT_SEL,
  965. mux_idx);
  966. snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
  967. /* Initially set the converter's capabilities */
  968. hinfo->channels_min = per_cvt->channels_min;
  969. hinfo->channels_max = per_cvt->channels_max;
  970. hinfo->rates = per_cvt->rates;
  971. hinfo->formats = per_cvt->formats;
  972. hinfo->maxbps = per_cvt->maxbps;
  973. /* Restrict capabilities by ELD if this isn't disabled */
  974. if (!static_hdmi_pcm && eld->eld_valid) {
  975. snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
  976. if (hinfo->channels_min > hinfo->channels_max ||
  977. !hinfo->rates || !hinfo->formats) {
  978. per_cvt->assigned = 0;
  979. hinfo->nid = 0;
  980. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  981. return -ENODEV;
  982. }
  983. }
  984. /* Store the updated parameters */
  985. runtime->hw.channels_min = hinfo->channels_min;
  986. runtime->hw.channels_max = hinfo->channels_max;
  987. runtime->hw.formats = hinfo->formats;
  988. runtime->hw.rates = hinfo->rates;
  989. snd_pcm_hw_constraint_step(substream->runtime, 0,
  990. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  991. return 0;
  992. }
  993. /*
  994. * HDA/HDMI auto parsing
  995. */
  996. static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
  997. {
  998. struct hdmi_spec *spec = codec->spec;
  999. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1000. hda_nid_t pin_nid = per_pin->pin_nid;
  1001. if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
  1002. snd_printk(KERN_WARNING
  1003. "HDMI: pin %d wcaps %#x "
  1004. "does not support connection list\n",
  1005. pin_nid, get_wcaps(codec, pin_nid));
  1006. return -EINVAL;
  1007. }
  1008. per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
  1009. per_pin->mux_nids,
  1010. HDA_MAX_CONNECTIONS);
  1011. return 0;
  1012. }
  1013. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
  1014. {
  1015. struct hda_codec *codec = per_pin->codec;
  1016. struct hdmi_spec *spec = codec->spec;
  1017. struct hdmi_eld *eld = &spec->temp_eld;
  1018. struct hdmi_eld *pin_eld = &per_pin->sink_eld;
  1019. hda_nid_t pin_nid = per_pin->pin_nid;
  1020. /*
  1021. * Always execute a GetPinSense verb here, even when called from
  1022. * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
  1023. * response's PD bit is not the real PD value, but indicates that
  1024. * the real PD value changed. An older version of the HD-audio
  1025. * specification worked this way. Hence, we just ignore the data in
  1026. * the unsolicited response to avoid custom WARs.
  1027. */
  1028. int present = snd_hda_pin_sense(codec, pin_nid);
  1029. bool update_eld = false;
  1030. bool eld_changed = false;
  1031. pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
  1032. if (pin_eld->monitor_present)
  1033. eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
  1034. else
  1035. eld->eld_valid = false;
  1036. _snd_printd(SND_PR_VERBOSE,
  1037. "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  1038. codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
  1039. if (eld->eld_valid) {
  1040. if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
  1041. &eld->eld_size) < 0)
  1042. eld->eld_valid = false;
  1043. else {
  1044. memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
  1045. if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
  1046. eld->eld_size) < 0)
  1047. eld->eld_valid = false;
  1048. }
  1049. if (eld->eld_valid) {
  1050. snd_hdmi_show_eld(&eld->info);
  1051. update_eld = true;
  1052. }
  1053. else if (repoll) {
  1054. queue_delayed_work(codec->bus->workq,
  1055. &per_pin->work,
  1056. msecs_to_jiffies(300));
  1057. return;
  1058. }
  1059. }
  1060. mutex_lock(&pin_eld->lock);
  1061. if (pin_eld->eld_valid && !eld->eld_valid) {
  1062. update_eld = true;
  1063. eld_changed = true;
  1064. }
  1065. if (update_eld) {
  1066. pin_eld->eld_valid = eld->eld_valid;
  1067. eld_changed = pin_eld->eld_size != eld->eld_size ||
  1068. memcmp(pin_eld->eld_buffer, eld->eld_buffer,
  1069. eld->eld_size) != 0;
  1070. if (eld_changed)
  1071. memcpy(pin_eld->eld_buffer, eld->eld_buffer,
  1072. eld->eld_size);
  1073. pin_eld->eld_size = eld->eld_size;
  1074. pin_eld->info = eld->info;
  1075. }
  1076. mutex_unlock(&pin_eld->lock);
  1077. if (eld_changed)
  1078. snd_ctl_notify(codec->bus->card,
  1079. SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
  1080. &per_pin->eld_ctl->id);
  1081. }
  1082. static void hdmi_repoll_eld(struct work_struct *work)
  1083. {
  1084. struct hdmi_spec_per_pin *per_pin =
  1085. container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
  1086. if (per_pin->repoll_count++ > 6)
  1087. per_pin->repoll_count = 0;
  1088. hdmi_present_sense(per_pin, per_pin->repoll_count);
  1089. }
  1090. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1091. hda_nid_t nid);
  1092. static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  1093. {
  1094. struct hdmi_spec *spec = codec->spec;
  1095. unsigned int caps, config;
  1096. int pin_idx;
  1097. struct hdmi_spec_per_pin *per_pin;
  1098. int err;
  1099. caps = snd_hda_query_pin_caps(codec, pin_nid);
  1100. if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
  1101. return 0;
  1102. config = snd_hda_codec_get_pincfg(codec, pin_nid);
  1103. if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
  1104. return 0;
  1105. if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
  1106. return -E2BIG;
  1107. if (codec->vendor_id == 0x80862807)
  1108. intel_haswell_fixup_connect_list(codec, pin_nid);
  1109. pin_idx = spec->num_pins;
  1110. per_pin = &spec->pins[pin_idx];
  1111. per_pin->pin_nid = pin_nid;
  1112. per_pin->non_pcm = false;
  1113. err = hdmi_read_pin_conn(codec, pin_idx);
  1114. if (err < 0)
  1115. return err;
  1116. spec->num_pins++;
  1117. return 0;
  1118. }
  1119. static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1120. {
  1121. struct hdmi_spec *spec = codec->spec;
  1122. int cvt_idx;
  1123. struct hdmi_spec_per_cvt *per_cvt;
  1124. unsigned int chans;
  1125. int err;
  1126. if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
  1127. return -E2BIG;
  1128. chans = get_wcaps(codec, cvt_nid);
  1129. chans = get_wcaps_channels(chans);
  1130. cvt_idx = spec->num_cvts;
  1131. per_cvt = &spec->cvts[cvt_idx];
  1132. per_cvt->cvt_nid = cvt_nid;
  1133. per_cvt->channels_min = 2;
  1134. if (chans <= 16) {
  1135. per_cvt->channels_max = chans;
  1136. if (chans > spec->channels_max)
  1137. spec->channels_max = chans;
  1138. }
  1139. err = snd_hda_query_supported_pcm(codec, cvt_nid,
  1140. &per_cvt->rates,
  1141. &per_cvt->formats,
  1142. &per_cvt->maxbps);
  1143. if (err < 0)
  1144. return err;
  1145. spec->cvt_nids[spec->num_cvts++] = cvt_nid;
  1146. return 0;
  1147. }
  1148. static int hdmi_parse_codec(struct hda_codec *codec)
  1149. {
  1150. hda_nid_t nid;
  1151. int i, nodes;
  1152. nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
  1153. if (!nid || nodes < 0) {
  1154. snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
  1155. return -EINVAL;
  1156. }
  1157. for (i = 0; i < nodes; i++, nid++) {
  1158. unsigned int caps;
  1159. unsigned int type;
  1160. caps = get_wcaps(codec, nid);
  1161. type = get_wcaps_type(caps);
  1162. if (!(caps & AC_WCAP_DIGITAL))
  1163. continue;
  1164. switch (type) {
  1165. case AC_WID_AUD_OUT:
  1166. hdmi_add_cvt(codec, nid);
  1167. break;
  1168. case AC_WID_PIN:
  1169. hdmi_add_pin(codec, nid);
  1170. break;
  1171. }
  1172. }
  1173. #ifdef CONFIG_PM
  1174. /* We're seeing some problems with unsolicited hot plug events on
  1175. * PantherPoint after S3, if this is not enabled */
  1176. if (codec->vendor_id == 0x80862806)
  1177. codec->bus->power_keep_link_on = 1;
  1178. /*
  1179. * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
  1180. * can be lost and presence sense verb will become inaccurate if the
  1181. * HDA link is powered off at hot plug or hw initialization time.
  1182. */
  1183. else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
  1184. AC_PWRST_EPSS))
  1185. codec->bus->power_keep_link_on = 1;
  1186. #endif
  1187. return 0;
  1188. }
  1189. /*
  1190. */
  1191. static char *get_hdmi_pcm_name(int idx)
  1192. {
  1193. static char names[MAX_HDMI_PINS][8];
  1194. sprintf(&names[idx][0], "HDMI %d", idx);
  1195. return &names[idx][0];
  1196. }
  1197. static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1198. {
  1199. struct hda_spdif_out *spdif;
  1200. bool non_pcm;
  1201. mutex_lock(&codec->spdif_mutex);
  1202. spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
  1203. non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
  1204. mutex_unlock(&codec->spdif_mutex);
  1205. return non_pcm;
  1206. }
  1207. /*
  1208. * HDMI callbacks
  1209. */
  1210. static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1211. struct hda_codec *codec,
  1212. unsigned int stream_tag,
  1213. unsigned int format,
  1214. struct snd_pcm_substream *substream)
  1215. {
  1216. hda_nid_t cvt_nid = hinfo->nid;
  1217. struct hdmi_spec *spec = codec->spec;
  1218. int pin_idx = hinfo_to_pin_index(spec, hinfo);
  1219. hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
  1220. bool non_pcm;
  1221. non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
  1222. hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
  1223. hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
  1224. return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
  1225. }
  1226. static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1227. struct hda_codec *codec,
  1228. struct snd_pcm_substream *substream)
  1229. {
  1230. snd_hda_codec_cleanup_stream(codec, hinfo->nid);
  1231. return 0;
  1232. }
  1233. static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
  1234. struct hda_codec *codec,
  1235. struct snd_pcm_substream *substream)
  1236. {
  1237. struct hdmi_spec *spec = codec->spec;
  1238. int cvt_idx, pin_idx;
  1239. struct hdmi_spec_per_cvt *per_cvt;
  1240. struct hdmi_spec_per_pin *per_pin;
  1241. if (hinfo->nid) {
  1242. cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
  1243. if (snd_BUG_ON(cvt_idx < 0))
  1244. return -EINVAL;
  1245. per_cvt = &spec->cvts[cvt_idx];
  1246. snd_BUG_ON(!per_cvt->assigned);
  1247. per_cvt->assigned = 0;
  1248. hinfo->nid = 0;
  1249. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1250. if (snd_BUG_ON(pin_idx < 0))
  1251. return -EINVAL;
  1252. per_pin = &spec->pins[pin_idx];
  1253. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1254. per_pin->chmap_set = false;
  1255. memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
  1256. }
  1257. return 0;
  1258. }
  1259. static const struct hda_pcm_ops generic_ops = {
  1260. .open = hdmi_pcm_open,
  1261. .close = hdmi_pcm_close,
  1262. .prepare = generic_hdmi_playback_pcm_prepare,
  1263. .cleanup = generic_hdmi_playback_pcm_cleanup,
  1264. };
  1265. /*
  1266. * ALSA API channel-map control callbacks
  1267. */
  1268. static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
  1269. struct snd_ctl_elem_info *uinfo)
  1270. {
  1271. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1272. struct hda_codec *codec = info->private_data;
  1273. struct hdmi_spec *spec = codec->spec;
  1274. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1275. uinfo->count = spec->channels_max;
  1276. uinfo->value.integer.min = 0;
  1277. uinfo->value.integer.max = SNDRV_CHMAP_LAST;
  1278. return 0;
  1279. }
  1280. static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
  1281. unsigned int size, unsigned int __user *tlv)
  1282. {
  1283. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1284. struct hda_codec *codec = info->private_data;
  1285. struct hdmi_spec *spec = codec->spec;
  1286. const unsigned int valid_mask =
  1287. FL | FR | RL | RR | LFE | FC | RLC | RRC;
  1288. unsigned int __user *dst;
  1289. int chs, count = 0;
  1290. if (size < 8)
  1291. return -ENOMEM;
  1292. if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
  1293. return -EFAULT;
  1294. size -= 8;
  1295. dst = tlv + 2;
  1296. for (chs = 2; chs <= spec->channels_max; chs++) {
  1297. int i, c;
  1298. struct cea_channel_speaker_allocation *cap;
  1299. cap = channel_allocations;
  1300. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
  1301. int chs_bytes = chs * 4;
  1302. if (cap->channels != chs)
  1303. continue;
  1304. if (cap->spk_mask & ~valid_mask)
  1305. continue;
  1306. if (size < 8)
  1307. return -ENOMEM;
  1308. if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
  1309. put_user(chs_bytes, dst + 1))
  1310. return -EFAULT;
  1311. dst += 2;
  1312. size -= 8;
  1313. count += 8;
  1314. if (size < chs_bytes)
  1315. return -ENOMEM;
  1316. size -= chs_bytes;
  1317. count += chs_bytes;
  1318. for (c = 7; c >= 0; c--) {
  1319. int spk = cap->speakers[c];
  1320. if (!spk)
  1321. continue;
  1322. if (put_user(spk_to_chmap(spk), dst))
  1323. return -EFAULT;
  1324. dst++;
  1325. }
  1326. }
  1327. }
  1328. if (put_user(count, tlv + 1))
  1329. return -EFAULT;
  1330. return 0;
  1331. }
  1332. static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
  1333. struct snd_ctl_elem_value *ucontrol)
  1334. {
  1335. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1336. struct hda_codec *codec = info->private_data;
  1337. struct hdmi_spec *spec = codec->spec;
  1338. int pin_idx = kcontrol->private_value;
  1339. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1340. int i;
  1341. for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
  1342. ucontrol->value.integer.value[i] = per_pin->chmap[i];
  1343. return 0;
  1344. }
  1345. static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
  1346. struct snd_ctl_elem_value *ucontrol)
  1347. {
  1348. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1349. struct hda_codec *codec = info->private_data;
  1350. struct hdmi_spec *spec = codec->spec;
  1351. int pin_idx = kcontrol->private_value;
  1352. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1353. unsigned int ctl_idx;
  1354. struct snd_pcm_substream *substream;
  1355. unsigned char chmap[8];
  1356. int i, ca, prepared = 0;
  1357. ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1358. substream = snd_pcm_chmap_substream(info, ctl_idx);
  1359. if (!substream || !substream->runtime)
  1360. return 0; /* just for avoiding error from alsactl restore */
  1361. switch (substream->runtime->status->state) {
  1362. case SNDRV_PCM_STATE_OPEN:
  1363. case SNDRV_PCM_STATE_SETUP:
  1364. break;
  1365. case SNDRV_PCM_STATE_PREPARED:
  1366. prepared = 1;
  1367. break;
  1368. default:
  1369. return -EBUSY;
  1370. }
  1371. memset(chmap, 0, sizeof(chmap));
  1372. for (i = 0; i < ARRAY_SIZE(chmap); i++)
  1373. chmap[i] = ucontrol->value.integer.value[i];
  1374. if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
  1375. return 0;
  1376. ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
  1377. if (ca < 0)
  1378. return -EINVAL;
  1379. per_pin->chmap_set = true;
  1380. memcpy(per_pin->chmap, chmap, sizeof(chmap));
  1381. if (prepared)
  1382. hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm,
  1383. substream);
  1384. return 0;
  1385. }
  1386. static int generic_hdmi_build_pcms(struct hda_codec *codec)
  1387. {
  1388. struct hdmi_spec *spec = codec->spec;
  1389. int pin_idx;
  1390. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1391. struct hda_pcm *info;
  1392. struct hda_pcm_stream *pstr;
  1393. info = &spec->pcm_rec[pin_idx];
  1394. info->name = get_hdmi_pcm_name(pin_idx);
  1395. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1396. info->own_chmap = true;
  1397. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1398. pstr->substreams = 1;
  1399. pstr->ops = generic_ops;
  1400. /* other pstr fields are set in open */
  1401. }
  1402. codec->num_pcms = spec->num_pins;
  1403. codec->pcm_info = spec->pcm_rec;
  1404. return 0;
  1405. }
  1406. static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
  1407. {
  1408. char hdmi_str[32] = "HDMI/DP";
  1409. struct hdmi_spec *spec = codec->spec;
  1410. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1411. int pcmdev = spec->pcm_rec[pin_idx].device;
  1412. if (pcmdev > 0)
  1413. sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
  1414. if (!is_jack_detectable(codec, per_pin->pin_nid))
  1415. strncat(hdmi_str, " Phantom",
  1416. sizeof(hdmi_str) - strlen(hdmi_str) - 1);
  1417. return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
  1418. }
  1419. static int generic_hdmi_build_controls(struct hda_codec *codec)
  1420. {
  1421. struct hdmi_spec *spec = codec->spec;
  1422. int err;
  1423. int pin_idx;
  1424. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1425. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1426. err = generic_hdmi_build_jack(codec, pin_idx);
  1427. if (err < 0)
  1428. return err;
  1429. err = snd_hda_create_dig_out_ctls(codec,
  1430. per_pin->pin_nid,
  1431. per_pin->mux_nids[0],
  1432. HDA_PCM_TYPE_HDMI);
  1433. if (err < 0)
  1434. return err;
  1435. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1436. /* add control for ELD Bytes */
  1437. err = hdmi_create_eld_ctl(codec,
  1438. pin_idx,
  1439. spec->pcm_rec[pin_idx].device);
  1440. if (err < 0)
  1441. return err;
  1442. hdmi_present_sense(per_pin, 0);
  1443. }
  1444. /* add channel maps */
  1445. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1446. struct snd_pcm_chmap *chmap;
  1447. struct snd_kcontrol *kctl;
  1448. int i;
  1449. err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
  1450. SNDRV_PCM_STREAM_PLAYBACK,
  1451. NULL, 0, pin_idx, &chmap);
  1452. if (err < 0)
  1453. return err;
  1454. /* override handlers */
  1455. chmap->private_data = codec;
  1456. kctl = chmap->kctl;
  1457. for (i = 0; i < kctl->count; i++)
  1458. kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
  1459. kctl->info = hdmi_chmap_ctl_info;
  1460. kctl->get = hdmi_chmap_ctl_get;
  1461. kctl->put = hdmi_chmap_ctl_put;
  1462. kctl->tlv.c = hdmi_chmap_ctl_tlv;
  1463. }
  1464. return 0;
  1465. }
  1466. static int generic_hdmi_init_per_pins(struct hda_codec *codec)
  1467. {
  1468. struct hdmi_spec *spec = codec->spec;
  1469. int pin_idx;
  1470. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1471. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1472. struct hdmi_eld *eld = &per_pin->sink_eld;
  1473. per_pin->codec = codec;
  1474. mutex_init(&eld->lock);
  1475. INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
  1476. snd_hda_eld_proc_new(codec, eld, pin_idx);
  1477. }
  1478. return 0;
  1479. }
  1480. static int generic_hdmi_init(struct hda_codec *codec)
  1481. {
  1482. struct hdmi_spec *spec = codec->spec;
  1483. int pin_idx;
  1484. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1485. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1486. hda_nid_t pin_nid = per_pin->pin_nid;
  1487. hdmi_init_pin(codec, pin_nid);
  1488. snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
  1489. }
  1490. return 0;
  1491. }
  1492. static void generic_hdmi_free(struct hda_codec *codec)
  1493. {
  1494. struct hdmi_spec *spec = codec->spec;
  1495. int pin_idx;
  1496. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1497. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1498. struct hdmi_eld *eld = &per_pin->sink_eld;
  1499. cancel_delayed_work(&per_pin->work);
  1500. snd_hda_eld_proc_free(codec, eld);
  1501. }
  1502. flush_workqueue(codec->bus->workq);
  1503. kfree(spec);
  1504. }
  1505. static const struct hda_codec_ops generic_hdmi_patch_ops = {
  1506. .init = generic_hdmi_init,
  1507. .free = generic_hdmi_free,
  1508. .build_pcms = generic_hdmi_build_pcms,
  1509. .build_controls = generic_hdmi_build_controls,
  1510. .unsol_event = hdmi_unsol_event,
  1511. };
  1512. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1513. hda_nid_t nid)
  1514. {
  1515. struct hdmi_spec *spec = codec->spec;
  1516. hda_nid_t conns[4];
  1517. int nconns;
  1518. nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
  1519. if (nconns == spec->num_cvts &&
  1520. !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
  1521. return;
  1522. /* override pins connection list */
  1523. snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
  1524. snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
  1525. }
  1526. #define INTEL_VENDOR_NID 0x08
  1527. #define INTEL_GET_VENDOR_VERB 0xf81
  1528. #define INTEL_SET_VENDOR_VERB 0x781
  1529. #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
  1530. #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
  1531. static void intel_haswell_enable_all_pins(struct hda_codec *codec,
  1532. const struct hda_fixup *fix, int action)
  1533. {
  1534. unsigned int vendor_param;
  1535. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1536. return;
  1537. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1538. INTEL_GET_VENDOR_VERB, 0);
  1539. if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
  1540. return;
  1541. vendor_param |= INTEL_EN_ALL_PIN_CVTS;
  1542. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1543. INTEL_SET_VENDOR_VERB, vendor_param);
  1544. if (vendor_param == -1)
  1545. return;
  1546. snd_hda_codec_update_widgets(codec);
  1547. return;
  1548. }
  1549. static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
  1550. {
  1551. unsigned int vendor_param;
  1552. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1553. INTEL_GET_VENDOR_VERB, 0);
  1554. if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
  1555. return;
  1556. /* enable DP1.2 mode */
  1557. vendor_param |= INTEL_EN_DP12;
  1558. snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
  1559. INTEL_SET_VENDOR_VERB, vendor_param);
  1560. }
  1561. /* available models for fixup */
  1562. enum {
  1563. INTEL_HASWELL,
  1564. };
  1565. static const struct hda_model_fixup hdmi_models[] = {
  1566. {.id = INTEL_HASWELL, .name = "Haswell"},
  1567. {}
  1568. };
  1569. static const struct snd_pci_quirk hdmi_fixup_tbl[] = {
  1570. SND_PCI_QUIRK(0x8086, 0x2010, "Haswell", INTEL_HASWELL),
  1571. {} /* terminator */
  1572. };
  1573. static const struct hda_fixup hdmi_fixups[] = {
  1574. [INTEL_HASWELL] = {
  1575. .type = HDA_FIXUP_FUNC,
  1576. .v.func = intel_haswell_enable_all_pins,
  1577. },
  1578. };
  1579. static int patch_generic_hdmi(struct hda_codec *codec)
  1580. {
  1581. struct hdmi_spec *spec;
  1582. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1583. if (spec == NULL)
  1584. return -ENOMEM;
  1585. codec->spec = spec;
  1586. snd_hda_pick_fixup(codec, hdmi_models, hdmi_fixup_tbl, hdmi_fixups);
  1587. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  1588. if (codec->vendor_id == 0x80862807)
  1589. intel_haswell_fixup_enable_dp12(codec);
  1590. if (hdmi_parse_codec(codec) < 0) {
  1591. codec->spec = NULL;
  1592. kfree(spec);
  1593. return -EINVAL;
  1594. }
  1595. codec->patch_ops = generic_hdmi_patch_ops;
  1596. generic_hdmi_init_per_pins(codec);
  1597. init_channel_allocations();
  1598. return 0;
  1599. }
  1600. /*
  1601. * Shared non-generic implementations
  1602. */
  1603. static int simple_playback_build_pcms(struct hda_codec *codec)
  1604. {
  1605. struct hdmi_spec *spec = codec->spec;
  1606. struct hda_pcm *info = spec->pcm_rec;
  1607. unsigned int chans;
  1608. struct hda_pcm_stream *pstr;
  1609. codec->num_pcms = 1;
  1610. codec->pcm_info = info;
  1611. chans = get_wcaps(codec, spec->cvts[0].cvt_nid);
  1612. chans = get_wcaps_channels(chans);
  1613. info->name = get_hdmi_pcm_name(0);
  1614. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1615. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1616. *pstr = spec->pcm_playback;
  1617. pstr->nid = spec->cvts[0].cvt_nid;
  1618. if (pstr->channels_max <= 2 && chans && chans <= 16)
  1619. pstr->channels_max = chans;
  1620. return 0;
  1621. }
  1622. /* unsolicited event for jack sensing */
  1623. static void simple_hdmi_unsol_event(struct hda_codec *codec,
  1624. unsigned int res)
  1625. {
  1626. snd_hda_jack_set_dirty_all(codec);
  1627. snd_hda_jack_report_sync(codec);
  1628. }
  1629. /* generic_hdmi_build_jack can be used for simple_hdmi, too,
  1630. * as long as spec->pins[] is set correctly
  1631. */
  1632. #define simple_hdmi_build_jack generic_hdmi_build_jack
  1633. static int simple_playback_build_controls(struct hda_codec *codec)
  1634. {
  1635. struct hdmi_spec *spec = codec->spec;
  1636. int err;
  1637. err = snd_hda_create_spdif_out_ctls(codec,
  1638. spec->cvts[0].cvt_nid,
  1639. spec->cvts[0].cvt_nid);
  1640. if (err < 0)
  1641. return err;
  1642. return simple_hdmi_build_jack(codec, 0);
  1643. }
  1644. static int simple_playback_init(struct hda_codec *codec)
  1645. {
  1646. struct hdmi_spec *spec = codec->spec;
  1647. hda_nid_t pin = spec->pins[0].pin_nid;
  1648. snd_hda_codec_write(codec, pin, 0,
  1649. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  1650. /* some codecs require to unmute the pin */
  1651. if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
  1652. snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  1653. AMP_OUT_UNMUTE);
  1654. snd_hda_jack_detect_enable(codec, pin, pin);
  1655. return 0;
  1656. }
  1657. static void simple_playback_free(struct hda_codec *codec)
  1658. {
  1659. struct hdmi_spec *spec = codec->spec;
  1660. kfree(spec);
  1661. }
  1662. /*
  1663. * Nvidia specific implementations
  1664. */
  1665. #define Nv_VERB_SET_Channel_Allocation 0xF79
  1666. #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
  1667. #define Nv_VERB_SET_Audio_Protection_On 0xF98
  1668. #define Nv_VERB_SET_Audio_Protection_Off 0xF99
  1669. #define nvhdmi_master_con_nid_7x 0x04
  1670. #define nvhdmi_master_pin_nid_7x 0x05
  1671. static const hda_nid_t nvhdmi_con_nids_7x[4] = {
  1672. /*front, rear, clfe, rear_surr */
  1673. 0x6, 0x8, 0xa, 0xc,
  1674. };
  1675. static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
  1676. /* set audio protect on */
  1677. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1678. /* enable digital output on pin widget */
  1679. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1680. {} /* terminator */
  1681. };
  1682. static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
  1683. /* set audio protect on */
  1684. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1685. /* enable digital output on pin widget */
  1686. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1687. { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1688. { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1689. { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1690. { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1691. {} /* terminator */
  1692. };
  1693. #ifdef LIMITED_RATE_FMT_SUPPORT
  1694. /* support only the safe format and rate */
  1695. #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
  1696. #define SUPPORTED_MAXBPS 16
  1697. #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
  1698. #else
  1699. /* support all rates and formats */
  1700. #define SUPPORTED_RATES \
  1701. (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  1702. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
  1703. SNDRV_PCM_RATE_192000)
  1704. #define SUPPORTED_MAXBPS 24
  1705. #define SUPPORTED_FORMATS \
  1706. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1707. #endif
  1708. static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
  1709. {
  1710. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
  1711. return 0;
  1712. }
  1713. static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
  1714. {
  1715. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
  1716. return 0;
  1717. }
  1718. static unsigned int channels_2_6_8[] = {
  1719. 2, 6, 8
  1720. };
  1721. static unsigned int channels_2_8[] = {
  1722. 2, 8
  1723. };
  1724. static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
  1725. .count = ARRAY_SIZE(channels_2_6_8),
  1726. .list = channels_2_6_8,
  1727. .mask = 0,
  1728. };
  1729. static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
  1730. .count = ARRAY_SIZE(channels_2_8),
  1731. .list = channels_2_8,
  1732. .mask = 0,
  1733. };
  1734. static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1735. struct hda_codec *codec,
  1736. struct snd_pcm_substream *substream)
  1737. {
  1738. struct hdmi_spec *spec = codec->spec;
  1739. struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
  1740. switch (codec->preset->id) {
  1741. case 0x10de0002:
  1742. case 0x10de0003:
  1743. case 0x10de0005:
  1744. case 0x10de0006:
  1745. hw_constraints_channels = &hw_constraints_2_8_channels;
  1746. break;
  1747. case 0x10de0007:
  1748. hw_constraints_channels = &hw_constraints_2_6_8_channels;
  1749. break;
  1750. default:
  1751. break;
  1752. }
  1753. if (hw_constraints_channels != NULL) {
  1754. snd_pcm_hw_constraint_list(substream->runtime, 0,
  1755. SNDRV_PCM_HW_PARAM_CHANNELS,
  1756. hw_constraints_channels);
  1757. } else {
  1758. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1759. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1760. }
  1761. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  1762. }
  1763. static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
  1764. struct hda_codec *codec,
  1765. struct snd_pcm_substream *substream)
  1766. {
  1767. struct hdmi_spec *spec = codec->spec;
  1768. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1769. }
  1770. static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1771. struct hda_codec *codec,
  1772. unsigned int stream_tag,
  1773. unsigned int format,
  1774. struct snd_pcm_substream *substream)
  1775. {
  1776. struct hdmi_spec *spec = codec->spec;
  1777. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  1778. stream_tag, format, substream);
  1779. }
  1780. static const struct hda_pcm_stream simple_pcm_playback = {
  1781. .substreams = 1,
  1782. .channels_min = 2,
  1783. .channels_max = 2,
  1784. .ops = {
  1785. .open = simple_playback_pcm_open,
  1786. .close = simple_playback_pcm_close,
  1787. .prepare = simple_playback_pcm_prepare
  1788. },
  1789. };
  1790. static const struct hda_codec_ops simple_hdmi_patch_ops = {
  1791. .build_controls = simple_playback_build_controls,
  1792. .build_pcms = simple_playback_build_pcms,
  1793. .init = simple_playback_init,
  1794. .free = simple_playback_free,
  1795. .unsol_event = simple_hdmi_unsol_event,
  1796. };
  1797. static int patch_simple_hdmi(struct hda_codec *codec,
  1798. hda_nid_t cvt_nid, hda_nid_t pin_nid)
  1799. {
  1800. struct hdmi_spec *spec;
  1801. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1802. if (!spec)
  1803. return -ENOMEM;
  1804. codec->spec = spec;
  1805. spec->multiout.num_dacs = 0; /* no analog */
  1806. spec->multiout.max_channels = 2;
  1807. spec->multiout.dig_out_nid = cvt_nid;
  1808. spec->num_cvts = 1;
  1809. spec->num_pins = 1;
  1810. spec->cvts[0].cvt_nid = cvt_nid;
  1811. spec->pins[0].pin_nid = pin_nid;
  1812. spec->pcm_playback = simple_pcm_playback;
  1813. codec->patch_ops = simple_hdmi_patch_ops;
  1814. return 0;
  1815. }
  1816. static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
  1817. int channels)
  1818. {
  1819. unsigned int chanmask;
  1820. int chan = channels ? (channels - 1) : 1;
  1821. switch (channels) {
  1822. default:
  1823. case 0:
  1824. case 2:
  1825. chanmask = 0x00;
  1826. break;
  1827. case 4:
  1828. chanmask = 0x08;
  1829. break;
  1830. case 6:
  1831. chanmask = 0x0b;
  1832. break;
  1833. case 8:
  1834. chanmask = 0x13;
  1835. break;
  1836. }
  1837. /* Set the audio infoframe channel allocation and checksum fields. The
  1838. * channel count is computed implicitly by the hardware. */
  1839. snd_hda_codec_write(codec, 0x1, 0,
  1840. Nv_VERB_SET_Channel_Allocation, chanmask);
  1841. snd_hda_codec_write(codec, 0x1, 0,
  1842. Nv_VERB_SET_Info_Frame_Checksum,
  1843. (0x71 - chan - chanmask));
  1844. }
  1845. static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
  1846. struct hda_codec *codec,
  1847. struct snd_pcm_substream *substream)
  1848. {
  1849. struct hdmi_spec *spec = codec->spec;
  1850. int i;
  1851. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
  1852. 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
  1853. for (i = 0; i < 4; i++) {
  1854. /* set the stream id */
  1855. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  1856. AC_VERB_SET_CHANNEL_STREAMID, 0);
  1857. /* set the stream format */
  1858. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  1859. AC_VERB_SET_STREAM_FORMAT, 0);
  1860. }
  1861. /* The audio hardware sends a channel count of 0x7 (8ch) when all the
  1862. * streams are disabled. */
  1863. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  1864. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1865. }
  1866. static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
  1867. struct hda_codec *codec,
  1868. unsigned int stream_tag,
  1869. unsigned int format,
  1870. struct snd_pcm_substream *substream)
  1871. {
  1872. int chs;
  1873. unsigned int dataDCC2, channel_id;
  1874. int i;
  1875. struct hdmi_spec *spec = codec->spec;
  1876. struct hda_spdif_out *spdif;
  1877. mutex_lock(&codec->spdif_mutex);
  1878. spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
  1879. chs = substream->runtime->channels;
  1880. dataDCC2 = 0x2;
  1881. /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
  1882. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
  1883. snd_hda_codec_write(codec,
  1884. nvhdmi_master_con_nid_7x,
  1885. 0,
  1886. AC_VERB_SET_DIGI_CONVERT_1,
  1887. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  1888. /* set the stream id */
  1889. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  1890. AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
  1891. /* set the stream format */
  1892. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  1893. AC_VERB_SET_STREAM_FORMAT, format);
  1894. /* turn on again (if needed) */
  1895. /* enable and set the channel status audio/data flag */
  1896. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
  1897. snd_hda_codec_write(codec,
  1898. nvhdmi_master_con_nid_7x,
  1899. 0,
  1900. AC_VERB_SET_DIGI_CONVERT_1,
  1901. spdif->ctls & 0xff);
  1902. snd_hda_codec_write(codec,
  1903. nvhdmi_master_con_nid_7x,
  1904. 0,
  1905. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  1906. }
  1907. for (i = 0; i < 4; i++) {
  1908. if (chs == 2)
  1909. channel_id = 0;
  1910. else
  1911. channel_id = i * 2;
  1912. /* turn off SPDIF once;
  1913. *otherwise the IEC958 bits won't be updated
  1914. */
  1915. if (codec->spdif_status_reset &&
  1916. (spdif->ctls & AC_DIG1_ENABLE))
  1917. snd_hda_codec_write(codec,
  1918. nvhdmi_con_nids_7x[i],
  1919. 0,
  1920. AC_VERB_SET_DIGI_CONVERT_1,
  1921. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  1922. /* set the stream id */
  1923. snd_hda_codec_write(codec,
  1924. nvhdmi_con_nids_7x[i],
  1925. 0,
  1926. AC_VERB_SET_CHANNEL_STREAMID,
  1927. (stream_tag << 4) | channel_id);
  1928. /* set the stream format */
  1929. snd_hda_codec_write(codec,
  1930. nvhdmi_con_nids_7x[i],
  1931. 0,
  1932. AC_VERB_SET_STREAM_FORMAT,
  1933. format);
  1934. /* turn on again (if needed) */
  1935. /* enable and set the channel status audio/data flag */
  1936. if (codec->spdif_status_reset &&
  1937. (spdif->ctls & AC_DIG1_ENABLE)) {
  1938. snd_hda_codec_write(codec,
  1939. nvhdmi_con_nids_7x[i],
  1940. 0,
  1941. AC_VERB_SET_DIGI_CONVERT_1,
  1942. spdif->ctls & 0xff);
  1943. snd_hda_codec_write(codec,
  1944. nvhdmi_con_nids_7x[i],
  1945. 0,
  1946. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  1947. }
  1948. }
  1949. nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
  1950. mutex_unlock(&codec->spdif_mutex);
  1951. return 0;
  1952. }
  1953. static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
  1954. .substreams = 1,
  1955. .channels_min = 2,
  1956. .channels_max = 8,
  1957. .nid = nvhdmi_master_con_nid_7x,
  1958. .rates = SUPPORTED_RATES,
  1959. .maxbps = SUPPORTED_MAXBPS,
  1960. .formats = SUPPORTED_FORMATS,
  1961. .ops = {
  1962. .open = simple_playback_pcm_open,
  1963. .close = nvhdmi_8ch_7x_pcm_close,
  1964. .prepare = nvhdmi_8ch_7x_pcm_prepare
  1965. },
  1966. };
  1967. static int patch_nvhdmi_2ch(struct hda_codec *codec)
  1968. {
  1969. struct hdmi_spec *spec;
  1970. int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
  1971. nvhdmi_master_pin_nid_7x);
  1972. if (err < 0)
  1973. return err;
  1974. codec->patch_ops.init = nvhdmi_7x_init_2ch;
  1975. /* override the PCM rates, etc, as the codec doesn't give full list */
  1976. spec = codec->spec;
  1977. spec->pcm_playback.rates = SUPPORTED_RATES;
  1978. spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
  1979. spec->pcm_playback.formats = SUPPORTED_FORMATS;
  1980. return 0;
  1981. }
  1982. static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
  1983. {
  1984. struct hdmi_spec *spec = codec->spec;
  1985. int err = simple_playback_build_pcms(codec);
  1986. spec->pcm_rec[0].own_chmap = true;
  1987. return err;
  1988. }
  1989. static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
  1990. {
  1991. struct hdmi_spec *spec = codec->spec;
  1992. struct snd_pcm_chmap *chmap;
  1993. int err;
  1994. err = simple_playback_build_controls(codec);
  1995. if (err < 0)
  1996. return err;
  1997. /* add channel maps */
  1998. err = snd_pcm_add_chmap_ctls(spec->pcm_rec[0].pcm,
  1999. SNDRV_PCM_STREAM_PLAYBACK,
  2000. snd_pcm_alt_chmaps, 8, 0, &chmap);
  2001. if (err < 0)
  2002. return err;
  2003. switch (codec->preset->id) {
  2004. case 0x10de0002:
  2005. case 0x10de0003:
  2006. case 0x10de0005:
  2007. case 0x10de0006:
  2008. chmap->channel_mask = (1U << 2) | (1U << 8);
  2009. break;
  2010. case 0x10de0007:
  2011. chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
  2012. }
  2013. return 0;
  2014. }
  2015. static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
  2016. {
  2017. struct hdmi_spec *spec;
  2018. int err = patch_nvhdmi_2ch(codec);
  2019. if (err < 0)
  2020. return err;
  2021. spec = codec->spec;
  2022. spec->multiout.max_channels = 8;
  2023. spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
  2024. codec->patch_ops.init = nvhdmi_7x_init_8ch;
  2025. codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
  2026. codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
  2027. /* Initialize the audio infoframe channel mask and checksum to something
  2028. * valid */
  2029. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  2030. return 0;
  2031. }
  2032. /*
  2033. * ATI-specific implementations
  2034. *
  2035. * FIXME: we may omit the whole this and use the generic code once after
  2036. * it's confirmed to work.
  2037. */
  2038. #define ATIHDMI_CVT_NID 0x02 /* audio converter */
  2039. #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
  2040. static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  2041. struct hda_codec *codec,
  2042. unsigned int stream_tag,
  2043. unsigned int format,
  2044. struct snd_pcm_substream *substream)
  2045. {
  2046. struct hdmi_spec *spec = codec->spec;
  2047. int chans = substream->runtime->channels;
  2048. int i, err;
  2049. err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
  2050. substream);
  2051. if (err < 0)
  2052. return err;
  2053. snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
  2054. AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
  2055. /* FIXME: XXX */
  2056. for (i = 0; i < chans; i++) {
  2057. snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
  2058. AC_VERB_SET_HDMI_CHAN_SLOT,
  2059. (i << 4) | i);
  2060. }
  2061. return 0;
  2062. }
  2063. static int patch_atihdmi(struct hda_codec *codec)
  2064. {
  2065. struct hdmi_spec *spec;
  2066. int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
  2067. if (err < 0)
  2068. return err;
  2069. spec = codec->spec;
  2070. spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
  2071. return 0;
  2072. }
  2073. /* VIA HDMI Implementation */
  2074. #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
  2075. #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
  2076. static int patch_via_hdmi(struct hda_codec *codec)
  2077. {
  2078. return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
  2079. }
  2080. /*
  2081. * patch entries
  2082. */
  2083. static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
  2084. { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2085. { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2086. { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
  2087. { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
  2088. { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
  2089. { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
  2090. { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
  2091. { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2092. { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2093. { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2094. { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2095. { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
  2096. { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
  2097. { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
  2098. { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
  2099. { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
  2100. { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
  2101. { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
  2102. { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
  2103. { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
  2104. { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
  2105. { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
  2106. { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
  2107. /* 17 is known to be absent */
  2108. { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
  2109. { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
  2110. { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
  2111. { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
  2112. { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
  2113. { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
  2114. { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
  2115. { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
  2116. { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
  2117. { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
  2118. { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
  2119. { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
  2120. { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
  2121. { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2122. { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2123. { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2124. { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2125. { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2126. { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
  2127. { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
  2128. { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
  2129. { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2130. { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
  2131. { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
  2132. { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
  2133. { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
  2134. { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
  2135. {} /* terminator */
  2136. };
  2137. MODULE_ALIAS("snd-hda-codec-id:1002793c");
  2138. MODULE_ALIAS("snd-hda-codec-id:10027919");
  2139. MODULE_ALIAS("snd-hda-codec-id:1002791a");
  2140. MODULE_ALIAS("snd-hda-codec-id:1002aa01");
  2141. MODULE_ALIAS("snd-hda-codec-id:10951390");
  2142. MODULE_ALIAS("snd-hda-codec-id:10951392");
  2143. MODULE_ALIAS("snd-hda-codec-id:10de0002");
  2144. MODULE_ALIAS("snd-hda-codec-id:10de0003");
  2145. MODULE_ALIAS("snd-hda-codec-id:10de0005");
  2146. MODULE_ALIAS("snd-hda-codec-id:10de0006");
  2147. MODULE_ALIAS("snd-hda-codec-id:10de0007");
  2148. MODULE_ALIAS("snd-hda-codec-id:10de000a");
  2149. MODULE_ALIAS("snd-hda-codec-id:10de000b");
  2150. MODULE_ALIAS("snd-hda-codec-id:10de000c");
  2151. MODULE_ALIAS("snd-hda-codec-id:10de000d");
  2152. MODULE_ALIAS("snd-hda-codec-id:10de0010");
  2153. MODULE_ALIAS("snd-hda-codec-id:10de0011");
  2154. MODULE_ALIAS("snd-hda-codec-id:10de0012");
  2155. MODULE_ALIAS("snd-hda-codec-id:10de0013");
  2156. MODULE_ALIAS("snd-hda-codec-id:10de0014");
  2157. MODULE_ALIAS("snd-hda-codec-id:10de0015");
  2158. MODULE_ALIAS("snd-hda-codec-id:10de0016");
  2159. MODULE_ALIAS("snd-hda-codec-id:10de0018");
  2160. MODULE_ALIAS("snd-hda-codec-id:10de0019");
  2161. MODULE_ALIAS("snd-hda-codec-id:10de001a");
  2162. MODULE_ALIAS("snd-hda-codec-id:10de001b");
  2163. MODULE_ALIAS("snd-hda-codec-id:10de001c");
  2164. MODULE_ALIAS("snd-hda-codec-id:10de0040");
  2165. MODULE_ALIAS("snd-hda-codec-id:10de0041");
  2166. MODULE_ALIAS("snd-hda-codec-id:10de0042");
  2167. MODULE_ALIAS("snd-hda-codec-id:10de0043");
  2168. MODULE_ALIAS("snd-hda-codec-id:10de0044");
  2169. MODULE_ALIAS("snd-hda-codec-id:10de0051");
  2170. MODULE_ALIAS("snd-hda-codec-id:10de0067");
  2171. MODULE_ALIAS("snd-hda-codec-id:10de8001");
  2172. MODULE_ALIAS("snd-hda-codec-id:11069f80");
  2173. MODULE_ALIAS("snd-hda-codec-id:11069f81");
  2174. MODULE_ALIAS("snd-hda-codec-id:11069f84");
  2175. MODULE_ALIAS("snd-hda-codec-id:11069f85");
  2176. MODULE_ALIAS("snd-hda-codec-id:17e80047");
  2177. MODULE_ALIAS("snd-hda-codec-id:80860054");
  2178. MODULE_ALIAS("snd-hda-codec-id:80862801");
  2179. MODULE_ALIAS("snd-hda-codec-id:80862802");
  2180. MODULE_ALIAS("snd-hda-codec-id:80862803");
  2181. MODULE_ALIAS("snd-hda-codec-id:80862804");
  2182. MODULE_ALIAS("snd-hda-codec-id:80862805");
  2183. MODULE_ALIAS("snd-hda-codec-id:80862806");
  2184. MODULE_ALIAS("snd-hda-codec-id:80862807");
  2185. MODULE_ALIAS("snd-hda-codec-id:80862880");
  2186. MODULE_ALIAS("snd-hda-codec-id:808629fb");
  2187. MODULE_LICENSE("GPL");
  2188. MODULE_DESCRIPTION("HDMI HD-audio codec");
  2189. MODULE_ALIAS("snd-hda-codec-intelhdmi");
  2190. MODULE_ALIAS("snd-hda-codec-nvhdmi");
  2191. MODULE_ALIAS("snd-hda-codec-atihdmi");
  2192. static struct hda_codec_preset_list intel_list = {
  2193. .preset = snd_hda_preset_hdmi,
  2194. .owner = THIS_MODULE,
  2195. };
  2196. static int __init patch_hdmi_init(void)
  2197. {
  2198. return snd_hda_add_codec_preset(&intel_list);
  2199. }
  2200. static void __exit patch_hdmi_exit(void)
  2201. {
  2202. snd_hda_delete_codec_preset(&intel_list);
  2203. }
  2204. module_init(patch_hdmi_init)
  2205. module_exit(patch_hdmi_exit)