chip.c 19 KB

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  1. /*
  2. * linux/kernel/irq/chip.c
  3. *
  4. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  5. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  6. *
  7. * This file contains the core interrupt handling code, for irq-chip
  8. * based architectures.
  9. *
  10. * Detailed information is available in Documentation/DocBook/genericirq
  11. */
  12. #include <linux/irq.h>
  13. #include <linux/msi.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. #include <trace/events/irq.h>
  18. #include "internals.h"
  19. /**
  20. * irq_set_chip - set the irq chip for an irq
  21. * @irq: irq number
  22. * @chip: pointer to irq chip description structure
  23. */
  24. int irq_set_chip(unsigned int irq, struct irq_chip *chip)
  25. {
  26. unsigned long flags;
  27. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  28. if (!desc)
  29. return -EINVAL;
  30. if (!chip)
  31. chip = &no_irq_chip;
  32. desc->irq_data.chip = chip;
  33. irq_put_desc_unlock(desc, flags);
  34. /*
  35. * For !CONFIG_SPARSE_IRQ make the irq show up in
  36. * allocated_irqs. For the CONFIG_SPARSE_IRQ case, it is
  37. * already marked, and this call is harmless.
  38. */
  39. irq_reserve_irq(irq);
  40. return 0;
  41. }
  42. EXPORT_SYMBOL(irq_set_chip);
  43. /**
  44. * irq_set_type - set the irq trigger type for an irq
  45. * @irq: irq number
  46. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  47. */
  48. int irq_set_irq_type(unsigned int irq, unsigned int type)
  49. {
  50. unsigned long flags;
  51. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  52. int ret = 0;
  53. if (!desc)
  54. return -EINVAL;
  55. type &= IRQ_TYPE_SENSE_MASK;
  56. ret = __irq_set_trigger(desc, irq, type);
  57. irq_put_desc_busunlock(desc, flags);
  58. return ret;
  59. }
  60. EXPORT_SYMBOL(irq_set_irq_type);
  61. /**
  62. * irq_set_handler_data - set irq handler data for an irq
  63. * @irq: Interrupt number
  64. * @data: Pointer to interrupt specific data
  65. *
  66. * Set the hardware irq controller data for an irq
  67. */
  68. int irq_set_handler_data(unsigned int irq, void *data)
  69. {
  70. unsigned long flags;
  71. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  72. if (!desc)
  73. return -EINVAL;
  74. desc->irq_data.handler_data = data;
  75. irq_put_desc_unlock(desc, flags);
  76. return 0;
  77. }
  78. EXPORT_SYMBOL(irq_set_handler_data);
  79. /**
  80. * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
  81. * @irq_base: Interrupt number base
  82. * @irq_offset: Interrupt number offset
  83. * @entry: Pointer to MSI descriptor data
  84. *
  85. * Set the MSI descriptor entry for an irq at offset
  86. */
  87. int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
  88. struct msi_desc *entry)
  89. {
  90. unsigned long flags;
  91. struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  92. if (!desc)
  93. return -EINVAL;
  94. desc->irq_data.msi_desc = entry;
  95. if (entry && !irq_offset)
  96. entry->irq = irq_base;
  97. irq_put_desc_unlock(desc, flags);
  98. return 0;
  99. }
  100. /**
  101. * irq_set_msi_desc - set MSI descriptor data for an irq
  102. * @irq: Interrupt number
  103. * @entry: Pointer to MSI descriptor data
  104. *
  105. * Set the MSI descriptor entry for an irq
  106. */
  107. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  108. {
  109. return irq_set_msi_desc_off(irq, 0, entry);
  110. }
  111. /**
  112. * irq_set_chip_data - set irq chip data for an irq
  113. * @irq: Interrupt number
  114. * @data: Pointer to chip specific data
  115. *
  116. * Set the hardware irq chip data for an irq
  117. */
  118. int irq_set_chip_data(unsigned int irq, void *data)
  119. {
  120. unsigned long flags;
  121. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  122. if (!desc)
  123. return -EINVAL;
  124. desc->irq_data.chip_data = data;
  125. irq_put_desc_unlock(desc, flags);
  126. return 0;
  127. }
  128. EXPORT_SYMBOL(irq_set_chip_data);
  129. struct irq_data *irq_get_irq_data(unsigned int irq)
  130. {
  131. struct irq_desc *desc = irq_to_desc(irq);
  132. return desc ? &desc->irq_data : NULL;
  133. }
  134. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  135. static void irq_state_clr_disabled(struct irq_desc *desc)
  136. {
  137. irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
  138. }
  139. static void irq_state_set_disabled(struct irq_desc *desc)
  140. {
  141. irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
  142. }
  143. static void irq_state_clr_masked(struct irq_desc *desc)
  144. {
  145. irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
  146. }
  147. static void irq_state_set_masked(struct irq_desc *desc)
  148. {
  149. irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
  150. }
  151. int irq_startup(struct irq_desc *desc, bool resend)
  152. {
  153. int ret = 0;
  154. irq_state_clr_disabled(desc);
  155. desc->depth = 0;
  156. if (desc->irq_data.chip->irq_startup) {
  157. ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
  158. irq_state_clr_masked(desc);
  159. } else {
  160. irq_enable(desc);
  161. }
  162. if (resend)
  163. check_irq_resend(desc, desc->irq_data.irq);
  164. return ret;
  165. }
  166. void irq_shutdown(struct irq_desc *desc)
  167. {
  168. irq_state_set_disabled(desc);
  169. desc->depth = 1;
  170. if (desc->irq_data.chip->irq_shutdown)
  171. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  172. else if (desc->irq_data.chip->irq_disable)
  173. desc->irq_data.chip->irq_disable(&desc->irq_data);
  174. else
  175. desc->irq_data.chip->irq_mask(&desc->irq_data);
  176. irq_state_set_masked(desc);
  177. }
  178. void irq_enable(struct irq_desc *desc)
  179. {
  180. irq_state_clr_disabled(desc);
  181. if (desc->irq_data.chip->irq_enable)
  182. desc->irq_data.chip->irq_enable(&desc->irq_data);
  183. else
  184. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  185. irq_state_clr_masked(desc);
  186. }
  187. void irq_disable(struct irq_desc *desc)
  188. {
  189. irq_state_set_disabled(desc);
  190. if (desc->irq_data.chip->irq_disable) {
  191. desc->irq_data.chip->irq_disable(&desc->irq_data);
  192. irq_state_set_masked(desc);
  193. }
  194. }
  195. void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
  196. {
  197. if (desc->irq_data.chip->irq_enable)
  198. desc->irq_data.chip->irq_enable(&desc->irq_data);
  199. else
  200. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  201. cpumask_set_cpu(cpu, desc->percpu_enabled);
  202. }
  203. void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
  204. {
  205. if (desc->irq_data.chip->irq_disable)
  206. desc->irq_data.chip->irq_disable(&desc->irq_data);
  207. else
  208. desc->irq_data.chip->irq_mask(&desc->irq_data);
  209. cpumask_clear_cpu(cpu, desc->percpu_enabled);
  210. }
  211. static inline void mask_ack_irq(struct irq_desc *desc)
  212. {
  213. if (desc->irq_data.chip->irq_mask_ack)
  214. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  215. else {
  216. desc->irq_data.chip->irq_mask(&desc->irq_data);
  217. if (desc->irq_data.chip->irq_ack)
  218. desc->irq_data.chip->irq_ack(&desc->irq_data);
  219. }
  220. irq_state_set_masked(desc);
  221. }
  222. void mask_irq(struct irq_desc *desc)
  223. {
  224. if (desc->irq_data.chip->irq_mask) {
  225. desc->irq_data.chip->irq_mask(&desc->irq_data);
  226. irq_state_set_masked(desc);
  227. }
  228. }
  229. void unmask_irq(struct irq_desc *desc)
  230. {
  231. if (desc->irq_data.chip->irq_unmask) {
  232. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  233. irq_state_clr_masked(desc);
  234. }
  235. }
  236. /*
  237. * handle_nested_irq - Handle a nested irq from a irq thread
  238. * @irq: the interrupt number
  239. *
  240. * Handle interrupts which are nested into a threaded interrupt
  241. * handler. The handler function is called inside the calling
  242. * threads context.
  243. */
  244. void handle_nested_irq(unsigned int irq)
  245. {
  246. struct irq_desc *desc = irq_to_desc(irq);
  247. struct irqaction *action;
  248. irqreturn_t action_ret;
  249. might_sleep();
  250. raw_spin_lock_irq(&desc->lock);
  251. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  252. kstat_incr_irqs_this_cpu(irq, desc);
  253. action = desc->action;
  254. if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
  255. desc->istate |= IRQS_PENDING;
  256. goto out_unlock;
  257. }
  258. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  259. raw_spin_unlock_irq(&desc->lock);
  260. action_ret = action->thread_fn(action->irq, action->dev_id);
  261. if (!noirqdebug)
  262. note_interrupt(irq, desc, action_ret);
  263. raw_spin_lock_irq(&desc->lock);
  264. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  265. out_unlock:
  266. raw_spin_unlock_irq(&desc->lock);
  267. }
  268. EXPORT_SYMBOL_GPL(handle_nested_irq);
  269. static bool irq_check_poll(struct irq_desc *desc)
  270. {
  271. if (!(desc->istate & IRQS_POLL_INPROGRESS))
  272. return false;
  273. return irq_wait_for_poll(desc);
  274. }
  275. /**
  276. * handle_simple_irq - Simple and software-decoded IRQs.
  277. * @irq: the interrupt number
  278. * @desc: the interrupt description structure for this irq
  279. *
  280. * Simple interrupts are either sent from a demultiplexing interrupt
  281. * handler or come from hardware, where no interrupt hardware control
  282. * is necessary.
  283. *
  284. * Note: The caller is expected to handle the ack, clear, mask and
  285. * unmask issues if necessary.
  286. */
  287. void
  288. handle_simple_irq(unsigned int irq, struct irq_desc *desc)
  289. {
  290. raw_spin_lock(&desc->lock);
  291. if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
  292. if (!irq_check_poll(desc))
  293. goto out_unlock;
  294. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  295. kstat_incr_irqs_this_cpu(irq, desc);
  296. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  297. desc->istate |= IRQS_PENDING;
  298. goto out_unlock;
  299. }
  300. handle_irq_event(desc);
  301. out_unlock:
  302. raw_spin_unlock(&desc->lock);
  303. }
  304. EXPORT_SYMBOL_GPL(handle_simple_irq);
  305. /*
  306. * Called unconditionally from handle_level_irq() and only for oneshot
  307. * interrupts from handle_fasteoi_irq()
  308. */
  309. static void cond_unmask_irq(struct irq_desc *desc)
  310. {
  311. /*
  312. * We need to unmask in the following cases:
  313. * - Standard level irq (IRQF_ONESHOT is not set)
  314. * - Oneshot irq which did not wake the thread (caused by a
  315. * spurious interrupt or a primary handler handling it
  316. * completely).
  317. */
  318. if (!irqd_irq_disabled(&desc->irq_data) &&
  319. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
  320. unmask_irq(desc);
  321. }
  322. /**
  323. * handle_level_irq - Level type irq handler
  324. * @irq: the interrupt number
  325. * @desc: the interrupt description structure for this irq
  326. *
  327. * Level type interrupts are active as long as the hardware line has
  328. * the active level. This may require to mask the interrupt and unmask
  329. * it after the associated handler has acknowledged the device, so the
  330. * interrupt line is back to inactive.
  331. */
  332. void
  333. handle_level_irq(unsigned int irq, struct irq_desc *desc)
  334. {
  335. raw_spin_lock(&desc->lock);
  336. mask_ack_irq(desc);
  337. if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
  338. if (!irq_check_poll(desc))
  339. goto out_unlock;
  340. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  341. kstat_incr_irqs_this_cpu(irq, desc);
  342. /*
  343. * If its disabled or no action available
  344. * keep it masked and get out of here
  345. */
  346. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  347. desc->istate |= IRQS_PENDING;
  348. goto out_unlock;
  349. }
  350. handle_irq_event(desc);
  351. cond_unmask_irq(desc);
  352. out_unlock:
  353. raw_spin_unlock(&desc->lock);
  354. }
  355. EXPORT_SYMBOL_GPL(handle_level_irq);
  356. #ifdef CONFIG_IRQ_PREFLOW_FASTEOI
  357. static inline void preflow_handler(struct irq_desc *desc)
  358. {
  359. if (desc->preflow_handler)
  360. desc->preflow_handler(&desc->irq_data);
  361. }
  362. #else
  363. static inline void preflow_handler(struct irq_desc *desc) { }
  364. #endif
  365. /**
  366. * handle_fasteoi_irq - irq handler for transparent controllers
  367. * @irq: the interrupt number
  368. * @desc: the interrupt description structure for this irq
  369. *
  370. * Only a single callback will be issued to the chip: an ->eoi()
  371. * call when the interrupt has been serviced. This enables support
  372. * for modern forms of interrupt handlers, which handle the flow
  373. * details in hardware, transparently.
  374. */
  375. void
  376. handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
  377. {
  378. raw_spin_lock(&desc->lock);
  379. if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
  380. if (!irq_check_poll(desc))
  381. goto out;
  382. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  383. kstat_incr_irqs_this_cpu(irq, desc);
  384. /*
  385. * If its disabled or no action available
  386. * then mask it and get out of here:
  387. */
  388. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  389. desc->istate |= IRQS_PENDING;
  390. mask_irq(desc);
  391. goto out;
  392. }
  393. if (desc->istate & IRQS_ONESHOT)
  394. mask_irq(desc);
  395. preflow_handler(desc);
  396. handle_irq_event(desc);
  397. if (desc->istate & IRQS_ONESHOT)
  398. cond_unmask_irq(desc);
  399. out_eoi:
  400. desc->irq_data.chip->irq_eoi(&desc->irq_data);
  401. out_unlock:
  402. raw_spin_unlock(&desc->lock);
  403. return;
  404. out:
  405. if (!(desc->irq_data.chip->flags & IRQCHIP_EOI_IF_HANDLED))
  406. goto out_eoi;
  407. goto out_unlock;
  408. }
  409. /**
  410. * handle_edge_irq - edge type IRQ handler
  411. * @irq: the interrupt number
  412. * @desc: the interrupt description structure for this irq
  413. *
  414. * Interrupt occures on the falling and/or rising edge of a hardware
  415. * signal. The occurrence is latched into the irq controller hardware
  416. * and must be acked in order to be reenabled. After the ack another
  417. * interrupt can happen on the same source even before the first one
  418. * is handled by the associated event handler. If this happens it
  419. * might be necessary to disable (mask) the interrupt depending on the
  420. * controller hardware. This requires to reenable the interrupt inside
  421. * of the loop which handles the interrupts which have arrived while
  422. * the handler was running. If all pending interrupts are handled, the
  423. * loop is left.
  424. */
  425. void
  426. handle_edge_irq(unsigned int irq, struct irq_desc *desc)
  427. {
  428. raw_spin_lock(&desc->lock);
  429. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  430. /*
  431. * If we're currently running this IRQ, or its disabled,
  432. * we shouldn't process the IRQ. Mark it pending, handle
  433. * the necessary masking and go out
  434. */
  435. if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
  436. irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
  437. if (!irq_check_poll(desc)) {
  438. desc->istate |= IRQS_PENDING;
  439. mask_ack_irq(desc);
  440. goto out_unlock;
  441. }
  442. }
  443. kstat_incr_irqs_this_cpu(irq, desc);
  444. /* Start handling the irq */
  445. desc->irq_data.chip->irq_ack(&desc->irq_data);
  446. do {
  447. if (unlikely(!desc->action)) {
  448. mask_irq(desc);
  449. goto out_unlock;
  450. }
  451. /*
  452. * When another irq arrived while we were handling
  453. * one, we could have masked the irq.
  454. * Renable it, if it was not disabled in meantime.
  455. */
  456. if (unlikely(desc->istate & IRQS_PENDING)) {
  457. if (!irqd_irq_disabled(&desc->irq_data) &&
  458. irqd_irq_masked(&desc->irq_data))
  459. unmask_irq(desc);
  460. }
  461. handle_irq_event(desc);
  462. } while ((desc->istate & IRQS_PENDING) &&
  463. !irqd_irq_disabled(&desc->irq_data));
  464. out_unlock:
  465. raw_spin_unlock(&desc->lock);
  466. }
  467. EXPORT_SYMBOL(handle_edge_irq);
  468. #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
  469. /**
  470. * handle_edge_eoi_irq - edge eoi type IRQ handler
  471. * @irq: the interrupt number
  472. * @desc: the interrupt description structure for this irq
  473. *
  474. * Similar as the above handle_edge_irq, but using eoi and w/o the
  475. * mask/unmask logic.
  476. */
  477. void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc)
  478. {
  479. struct irq_chip *chip = irq_desc_get_chip(desc);
  480. raw_spin_lock(&desc->lock);
  481. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  482. /*
  483. * If we're currently running this IRQ, or its disabled,
  484. * we shouldn't process the IRQ. Mark it pending, handle
  485. * the necessary masking and go out
  486. */
  487. if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
  488. irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
  489. if (!irq_check_poll(desc)) {
  490. desc->istate |= IRQS_PENDING;
  491. goto out_eoi;
  492. }
  493. }
  494. kstat_incr_irqs_this_cpu(irq, desc);
  495. do {
  496. if (unlikely(!desc->action))
  497. goto out_eoi;
  498. handle_irq_event(desc);
  499. } while ((desc->istate & IRQS_PENDING) &&
  500. !irqd_irq_disabled(&desc->irq_data));
  501. out_eoi:
  502. chip->irq_eoi(&desc->irq_data);
  503. raw_spin_unlock(&desc->lock);
  504. }
  505. #endif
  506. /**
  507. * handle_percpu_irq - Per CPU local irq handler
  508. * @irq: the interrupt number
  509. * @desc: the interrupt description structure for this irq
  510. *
  511. * Per CPU interrupts on SMP machines without locking requirements
  512. */
  513. void
  514. handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
  515. {
  516. struct irq_chip *chip = irq_desc_get_chip(desc);
  517. kstat_incr_irqs_this_cpu(irq, desc);
  518. if (chip->irq_ack)
  519. chip->irq_ack(&desc->irq_data);
  520. handle_irq_event_percpu(desc, desc->action);
  521. if (chip->irq_eoi)
  522. chip->irq_eoi(&desc->irq_data);
  523. }
  524. /**
  525. * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
  526. * @irq: the interrupt number
  527. * @desc: the interrupt description structure for this irq
  528. *
  529. * Per CPU interrupts on SMP machines without locking requirements. Same as
  530. * handle_percpu_irq() above but with the following extras:
  531. *
  532. * action->percpu_dev_id is a pointer to percpu variables which
  533. * contain the real device id for the cpu on which this handler is
  534. * called
  535. */
  536. void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc)
  537. {
  538. struct irq_chip *chip = irq_desc_get_chip(desc);
  539. struct irqaction *action = desc->action;
  540. void *dev_id = __this_cpu_ptr(action->percpu_dev_id);
  541. irqreturn_t res;
  542. kstat_incr_irqs_this_cpu(irq, desc);
  543. if (chip->irq_ack)
  544. chip->irq_ack(&desc->irq_data);
  545. trace_irq_handler_entry(irq, action);
  546. res = action->handler(irq, dev_id);
  547. trace_irq_handler_exit(irq, action, res);
  548. if (chip->irq_eoi)
  549. chip->irq_eoi(&desc->irq_data);
  550. }
  551. void
  552. __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  553. const char *name)
  554. {
  555. unsigned long flags;
  556. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  557. if (!desc)
  558. return;
  559. if (!handle) {
  560. handle = handle_bad_irq;
  561. } else {
  562. if (WARN_ON(desc->irq_data.chip == &no_irq_chip))
  563. goto out;
  564. }
  565. /* Uninstall? */
  566. if (handle == handle_bad_irq) {
  567. if (desc->irq_data.chip != &no_irq_chip)
  568. mask_ack_irq(desc);
  569. irq_state_set_disabled(desc);
  570. desc->depth = 1;
  571. }
  572. desc->handle_irq = handle;
  573. desc->name = name;
  574. if (handle != handle_bad_irq && is_chained) {
  575. irq_settings_set_noprobe(desc);
  576. irq_settings_set_norequest(desc);
  577. irq_settings_set_nothread(desc);
  578. irq_startup(desc, true);
  579. }
  580. out:
  581. irq_put_desc_busunlock(desc, flags);
  582. }
  583. EXPORT_SYMBOL_GPL(__irq_set_handler);
  584. void
  585. irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
  586. irq_flow_handler_t handle, const char *name)
  587. {
  588. irq_set_chip(irq, chip);
  589. __irq_set_handler(irq, handle, 0, name);
  590. }
  591. EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
  592. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  593. {
  594. unsigned long flags;
  595. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  596. if (!desc)
  597. return;
  598. irq_settings_clr_and_set(desc, clr, set);
  599. irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
  600. IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
  601. if (irq_settings_has_no_balance_set(desc))
  602. irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
  603. if (irq_settings_is_per_cpu(desc))
  604. irqd_set(&desc->irq_data, IRQD_PER_CPU);
  605. if (irq_settings_can_move_pcntxt(desc))
  606. irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
  607. if (irq_settings_is_level(desc))
  608. irqd_set(&desc->irq_data, IRQD_LEVEL);
  609. irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
  610. irq_put_desc_unlock(desc, flags);
  611. }
  612. EXPORT_SYMBOL_GPL(irq_modify_status);
  613. /**
  614. * irq_cpu_online - Invoke all irq_cpu_online functions.
  615. *
  616. * Iterate through all irqs and invoke the chip.irq_cpu_online()
  617. * for each.
  618. */
  619. void irq_cpu_online(void)
  620. {
  621. struct irq_desc *desc;
  622. struct irq_chip *chip;
  623. unsigned long flags;
  624. unsigned int irq;
  625. for_each_active_irq(irq) {
  626. desc = irq_to_desc(irq);
  627. if (!desc)
  628. continue;
  629. raw_spin_lock_irqsave(&desc->lock, flags);
  630. chip = irq_data_get_irq_chip(&desc->irq_data);
  631. if (chip && chip->irq_cpu_online &&
  632. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  633. !irqd_irq_disabled(&desc->irq_data)))
  634. chip->irq_cpu_online(&desc->irq_data);
  635. raw_spin_unlock_irqrestore(&desc->lock, flags);
  636. }
  637. }
  638. /**
  639. * irq_cpu_offline - Invoke all irq_cpu_offline functions.
  640. *
  641. * Iterate through all irqs and invoke the chip.irq_cpu_offline()
  642. * for each.
  643. */
  644. void irq_cpu_offline(void)
  645. {
  646. struct irq_desc *desc;
  647. struct irq_chip *chip;
  648. unsigned long flags;
  649. unsigned int irq;
  650. for_each_active_irq(irq) {
  651. desc = irq_to_desc(irq);
  652. if (!desc)
  653. continue;
  654. raw_spin_lock_irqsave(&desc->lock, flags);
  655. chip = irq_data_get_irq_chip(&desc->irq_data);
  656. if (chip && chip->irq_cpu_offline &&
  657. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  658. !irqd_irq_disabled(&desc->irq_data)))
  659. chip->irq_cpu_offline(&desc->irq_data);
  660. raw_spin_unlock_irqrestore(&desc->lock, flags);
  661. }
  662. }