omap_wdt.c 9.4 KB

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  1. /*
  2. * omap_wdt.c
  3. *
  4. * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
  5. *
  6. * Author: MontaVista Software, Inc.
  7. * <gdavis@mvista.com> or <source@mvista.com>
  8. *
  9. * 2003 (c) MontaVista Software, Inc. This file is licensed under the
  10. * terms of the GNU General Public License version 2. This program is
  11. * licensed "as is" without any warranty of any kind, whether express
  12. * or implied.
  13. *
  14. * History:
  15. *
  16. * 20030527: George G. Davis <gdavis@mvista.com>
  17. * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
  18. * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
  19. * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
  20. *
  21. * Copyright (c) 2004 Texas Instruments.
  22. * 1. Modified to support OMAP1610 32-KHz watchdog timer
  23. * 2. Ported to 2.6 kernel
  24. *
  25. * Copyright (c) 2005 David Brownell
  26. * Use the driver model and standard identifiers; handle bigger timeouts.
  27. */
  28. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  29. #include <linux/module.h>
  30. #include <linux/types.h>
  31. #include <linux/kernel.h>
  32. #include <linux/mm.h>
  33. #include <linux/watchdog.h>
  34. #include <linux/reboot.h>
  35. #include <linux/init.h>
  36. #include <linux/err.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/moduleparam.h>
  39. #include <linux/io.h>
  40. #include <linux/slab.h>
  41. #include <linux/pm_runtime.h>
  42. #include <linux/platform_data/omap-wd-timer.h>
  43. #include "omap_wdt.h"
  44. static bool nowayout = WATCHDOG_NOWAYOUT;
  45. module_param(nowayout, bool, 0);
  46. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
  47. "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  48. static unsigned timer_margin;
  49. module_param(timer_margin, uint, 0);
  50. MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
  51. struct omap_wdt_dev {
  52. void __iomem *base; /* physical */
  53. struct device *dev;
  54. bool omap_wdt_users;
  55. struct resource *mem;
  56. int wdt_trgr_pattern;
  57. struct mutex lock; /* to avoid races with PM */
  58. };
  59. static void omap_wdt_reload(struct omap_wdt_dev *wdev)
  60. {
  61. void __iomem *base = wdev->base;
  62. /* wait for posted write to complete */
  63. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  64. cpu_relax();
  65. wdev->wdt_trgr_pattern = ~wdev->wdt_trgr_pattern;
  66. __raw_writel(wdev->wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
  67. /* wait for posted write to complete */
  68. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  69. cpu_relax();
  70. /* reloaded WCRR from WLDR */
  71. }
  72. static void omap_wdt_enable(struct omap_wdt_dev *wdev)
  73. {
  74. void __iomem *base = wdev->base;
  75. /* Sequence to enable the watchdog */
  76. __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
  77. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  78. cpu_relax();
  79. __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
  80. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  81. cpu_relax();
  82. }
  83. static void omap_wdt_disable(struct omap_wdt_dev *wdev)
  84. {
  85. void __iomem *base = wdev->base;
  86. /* sequence required to disable watchdog */
  87. __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
  88. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
  89. cpu_relax();
  90. __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
  91. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
  92. cpu_relax();
  93. }
  94. static void omap_wdt_set_timer(struct omap_wdt_dev *wdev,
  95. unsigned int timeout)
  96. {
  97. u32 pre_margin = GET_WLDR_VAL(timeout);
  98. void __iomem *base = wdev->base;
  99. /* just count up at 32 KHz */
  100. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
  101. cpu_relax();
  102. __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
  103. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
  104. cpu_relax();
  105. }
  106. static int omap_wdt_start(struct watchdog_device *wdog)
  107. {
  108. struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
  109. void __iomem *base = wdev->base;
  110. mutex_lock(&wdev->lock);
  111. wdev->omap_wdt_users = true;
  112. pm_runtime_get_sync(wdev->dev);
  113. /* initialize prescaler */
  114. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
  115. cpu_relax();
  116. __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
  117. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
  118. cpu_relax();
  119. omap_wdt_set_timer(wdev, wdog->timeout);
  120. omap_wdt_reload(wdev); /* trigger loading of new timeout value */
  121. omap_wdt_enable(wdev);
  122. mutex_unlock(&wdev->lock);
  123. return 0;
  124. }
  125. static int omap_wdt_stop(struct watchdog_device *wdog)
  126. {
  127. struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
  128. mutex_lock(&wdev->lock);
  129. omap_wdt_disable(wdev);
  130. pm_runtime_put_sync(wdev->dev);
  131. wdev->omap_wdt_users = false;
  132. mutex_unlock(&wdev->lock);
  133. return 0;
  134. }
  135. static int omap_wdt_ping(struct watchdog_device *wdog)
  136. {
  137. struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
  138. mutex_lock(&wdev->lock);
  139. omap_wdt_reload(wdev);
  140. mutex_unlock(&wdev->lock);
  141. return 0;
  142. }
  143. static int omap_wdt_set_timeout(struct watchdog_device *wdog,
  144. unsigned int timeout)
  145. {
  146. struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
  147. mutex_lock(&wdev->lock);
  148. omap_wdt_disable(wdev);
  149. omap_wdt_set_timer(wdev, timeout);
  150. omap_wdt_enable(wdev);
  151. omap_wdt_reload(wdev);
  152. wdog->timeout = timeout;
  153. mutex_unlock(&wdev->lock);
  154. return 0;
  155. }
  156. static const struct watchdog_info omap_wdt_info = {
  157. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
  158. .identity = "OMAP Watchdog",
  159. };
  160. static const struct watchdog_ops omap_wdt_ops = {
  161. .owner = THIS_MODULE,
  162. .start = omap_wdt_start,
  163. .stop = omap_wdt_stop,
  164. .ping = omap_wdt_ping,
  165. .set_timeout = omap_wdt_set_timeout,
  166. };
  167. static int omap_wdt_probe(struct platform_device *pdev)
  168. {
  169. struct omap_wd_timer_platform_data *pdata = pdev->dev.platform_data;
  170. struct watchdog_device *omap_wdt;
  171. struct resource *res, *mem;
  172. struct omap_wdt_dev *wdev;
  173. u32 rs;
  174. int ret;
  175. omap_wdt = devm_kzalloc(&pdev->dev, sizeof(*omap_wdt), GFP_KERNEL);
  176. if (!omap_wdt)
  177. return -ENOMEM;
  178. /* reserve static register mappings */
  179. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  180. if (!res)
  181. return -ENOENT;
  182. mem = devm_request_mem_region(&pdev->dev, res->start,
  183. resource_size(res), pdev->name);
  184. if (!mem)
  185. return -EBUSY;
  186. wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
  187. if (!wdev)
  188. return -ENOMEM;
  189. wdev->omap_wdt_users = false;
  190. wdev->mem = mem;
  191. wdev->dev = &pdev->dev;
  192. wdev->wdt_trgr_pattern = 0x1234;
  193. mutex_init(&wdev->lock);
  194. wdev->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
  195. if (!wdev->base)
  196. return -ENOMEM;
  197. omap_wdt->info = &omap_wdt_info;
  198. omap_wdt->ops = &omap_wdt_ops;
  199. omap_wdt->min_timeout = TIMER_MARGIN_MIN;
  200. omap_wdt->max_timeout = TIMER_MARGIN_MAX;
  201. if (timer_margin >= TIMER_MARGIN_MIN &&
  202. timer_margin <= TIMER_MARGIN_MAX)
  203. omap_wdt->timeout = timer_margin;
  204. else
  205. omap_wdt->timeout = TIMER_MARGIN_DEFAULT;
  206. watchdog_set_drvdata(omap_wdt, wdev);
  207. watchdog_set_nowayout(omap_wdt, nowayout);
  208. platform_set_drvdata(pdev, omap_wdt);
  209. pm_runtime_enable(wdev->dev);
  210. pm_runtime_get_sync(wdev->dev);
  211. if (pdata && pdata->read_reset_sources)
  212. rs = pdata->read_reset_sources();
  213. else
  214. rs = 0;
  215. omap_wdt->bootstatus = (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT)) ?
  216. WDIOF_CARDRESET : 0;
  217. omap_wdt_disable(wdev);
  218. ret = watchdog_register_device(omap_wdt);
  219. if (ret) {
  220. pm_runtime_disable(wdev->dev);
  221. return ret;
  222. }
  223. pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
  224. __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
  225. omap_wdt->timeout);
  226. pm_runtime_put_sync(wdev->dev);
  227. return 0;
  228. }
  229. static void omap_wdt_shutdown(struct platform_device *pdev)
  230. {
  231. struct watchdog_device *wdog = platform_get_drvdata(pdev);
  232. struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
  233. mutex_lock(&wdev->lock);
  234. if (wdev->omap_wdt_users) {
  235. omap_wdt_disable(wdev);
  236. pm_runtime_put_sync(wdev->dev);
  237. }
  238. mutex_unlock(&wdev->lock);
  239. }
  240. static int omap_wdt_remove(struct platform_device *pdev)
  241. {
  242. struct watchdog_device *wdog = platform_get_drvdata(pdev);
  243. struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
  244. pm_runtime_disable(wdev->dev);
  245. watchdog_unregister_device(wdog);
  246. return 0;
  247. }
  248. #ifdef CONFIG_PM
  249. /* REVISIT ... not clear this is the best way to handle system suspend; and
  250. * it's very inappropriate for selective device suspend (e.g. suspending this
  251. * through sysfs rather than by stopping the watchdog daemon). Also, this
  252. * may not play well enough with NOWAYOUT...
  253. */
  254. static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
  255. {
  256. struct watchdog_device *wdog = platform_get_drvdata(pdev);
  257. struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
  258. mutex_lock(&wdev->lock);
  259. if (wdev->omap_wdt_users) {
  260. omap_wdt_disable(wdev);
  261. pm_runtime_put_sync(wdev->dev);
  262. }
  263. mutex_unlock(&wdev->lock);
  264. return 0;
  265. }
  266. static int omap_wdt_resume(struct platform_device *pdev)
  267. {
  268. struct watchdog_device *wdog = platform_get_drvdata(pdev);
  269. struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
  270. mutex_lock(&wdev->lock);
  271. if (wdev->omap_wdt_users) {
  272. pm_runtime_get_sync(wdev->dev);
  273. omap_wdt_enable(wdev);
  274. omap_wdt_reload(wdev);
  275. }
  276. mutex_unlock(&wdev->lock);
  277. return 0;
  278. }
  279. #else
  280. #define omap_wdt_suspend NULL
  281. #define omap_wdt_resume NULL
  282. #endif
  283. static const struct of_device_id omap_wdt_of_match[] = {
  284. { .compatible = "ti,omap3-wdt", },
  285. {},
  286. };
  287. MODULE_DEVICE_TABLE(of, omap_wdt_of_match);
  288. static struct platform_driver omap_wdt_driver = {
  289. .probe = omap_wdt_probe,
  290. .remove = omap_wdt_remove,
  291. .shutdown = omap_wdt_shutdown,
  292. .suspend = omap_wdt_suspend,
  293. .resume = omap_wdt_resume,
  294. .driver = {
  295. .owner = THIS_MODULE,
  296. .name = "omap_wdt",
  297. .of_match_table = omap_wdt_of_match,
  298. },
  299. };
  300. module_platform_driver(omap_wdt_driver);
  301. MODULE_AUTHOR("George G. Davis");
  302. MODULE_LICENSE("GPL");
  303. MODULE_ALIAS("platform:omap_wdt");