max63xx_wdt.c 6.3 KB

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  1. /*
  2. * drivers/char/watchdog/max63xx_wdt.c
  3. *
  4. * Driver for max63{69,70,71,72,73,74} watchdog timers
  5. *
  6. * Copyright (C) 2009 Marc Zyngier <maz@misterjones.org>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. *
  12. * This driver assumes the watchdog pins are memory mapped (as it is
  13. * the case for the Arcom Zeus). Should it be connected over GPIOs or
  14. * another interface, some abstraction will have to be introduced.
  15. */
  16. #include <linux/err.h>
  17. #include <linux/module.h>
  18. #include <linux/moduleparam.h>
  19. #include <linux/types.h>
  20. #include <linux/kernel.h>
  21. #include <linux/miscdevice.h>
  22. #include <linux/watchdog.h>
  23. #include <linux/init.h>
  24. #include <linux/bitops.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/io.h>
  28. #include <linux/slab.h>
  29. #define DEFAULT_HEARTBEAT 60
  30. #define MAX_HEARTBEAT 60
  31. static unsigned int heartbeat = DEFAULT_HEARTBEAT;
  32. static bool nowayout = WATCHDOG_NOWAYOUT;
  33. /*
  34. * Memory mapping: a single byte, 3 first lower bits to select bit 3
  35. * to ping the watchdog.
  36. */
  37. #define MAX6369_WDSET (7 << 0)
  38. #define MAX6369_WDI (1 << 3)
  39. static DEFINE_SPINLOCK(io_lock);
  40. static int nodelay;
  41. static void __iomem *wdt_base;
  42. /*
  43. * The timeout values used are actually the absolute minimum the chip
  44. * offers. Typical values on my board are slightly over twice as long
  45. * (10s setting ends up with a 25s timeout), and can be up to 3 times
  46. * the nominal setting (according to the datasheet). So please take
  47. * these values with a grain of salt. Same goes for the initial delay
  48. * "feature". Only max6373/74 have a few settings without this initial
  49. * delay (selected with the "nodelay" parameter).
  50. *
  51. * I also decided to remove from the tables any timeout smaller than a
  52. * second, as it looked completly overkill...
  53. */
  54. /* Timeouts in second */
  55. struct max63xx_timeout {
  56. u8 wdset;
  57. u8 tdelay;
  58. u8 twd;
  59. };
  60. static struct max63xx_timeout max6369_table[] = {
  61. { 5, 1, 1 },
  62. { 6, 10, 10 },
  63. { 7, 60, 60 },
  64. { },
  65. };
  66. static struct max63xx_timeout max6371_table[] = {
  67. { 6, 60, 3 },
  68. { 7, 60, 60 },
  69. { },
  70. };
  71. static struct max63xx_timeout max6373_table[] = {
  72. { 2, 60, 1 },
  73. { 5, 0, 1 },
  74. { 1, 3, 3 },
  75. { 7, 60, 10 },
  76. { 6, 0, 10 },
  77. { },
  78. };
  79. static struct max63xx_timeout *current_timeout;
  80. static struct max63xx_timeout *
  81. max63xx_select_timeout(struct max63xx_timeout *table, int value)
  82. {
  83. while (table->twd) {
  84. if (value <= table->twd) {
  85. if (nodelay && table->tdelay == 0)
  86. return table;
  87. if (!nodelay)
  88. return table;
  89. }
  90. table++;
  91. }
  92. return NULL;
  93. }
  94. static int max63xx_wdt_ping(struct watchdog_device *wdd)
  95. {
  96. u8 val;
  97. spin_lock(&io_lock);
  98. val = __raw_readb(wdt_base);
  99. __raw_writeb(val | MAX6369_WDI, wdt_base);
  100. __raw_writeb(val & ~MAX6369_WDI, wdt_base);
  101. spin_unlock(&io_lock);
  102. return 0;
  103. }
  104. static int max63xx_wdt_start(struct watchdog_device *wdd)
  105. {
  106. struct max63xx_timeout *entry = watchdog_get_drvdata(wdd);
  107. u8 val;
  108. spin_lock(&io_lock);
  109. val = __raw_readb(wdt_base);
  110. val &= ~MAX6369_WDSET;
  111. val |= entry->wdset;
  112. __raw_writeb(val, wdt_base);
  113. spin_unlock(&io_lock);
  114. /* check for a edge triggered startup */
  115. if (entry->tdelay == 0)
  116. max63xx_wdt_ping(wdd);
  117. return 0;
  118. }
  119. static int max63xx_wdt_stop(struct watchdog_device *wdd)
  120. {
  121. u8 val;
  122. spin_lock(&io_lock);
  123. val = __raw_readb(wdt_base);
  124. val &= ~MAX6369_WDSET;
  125. val |= 3;
  126. __raw_writeb(val, wdt_base);
  127. spin_unlock(&io_lock);
  128. return 0;
  129. }
  130. static const struct watchdog_info max63xx_wdt_info = {
  131. .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
  132. .identity = "max63xx Watchdog",
  133. };
  134. static const struct watchdog_ops max63xx_wdt_ops = {
  135. .owner = THIS_MODULE,
  136. .start = max63xx_wdt_start,
  137. .stop = max63xx_wdt_stop,
  138. .ping = max63xx_wdt_ping,
  139. };
  140. static struct watchdog_device max63xx_wdt_dev = {
  141. .info = &max63xx_wdt_info,
  142. .ops = &max63xx_wdt_ops,
  143. };
  144. static int max63xx_wdt_probe(struct platform_device *pdev)
  145. {
  146. struct resource *wdt_mem;
  147. struct max63xx_timeout *table;
  148. table = (struct max63xx_timeout *)pdev->id_entry->driver_data;
  149. if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
  150. heartbeat = DEFAULT_HEARTBEAT;
  151. dev_info(&pdev->dev, "requesting %ds heartbeat\n", heartbeat);
  152. current_timeout = max63xx_select_timeout(table, heartbeat);
  153. if (!current_timeout) {
  154. dev_err(&pdev->dev, "unable to satisfy heartbeat request\n");
  155. return -EINVAL;
  156. }
  157. dev_info(&pdev->dev, "using %ds heartbeat with %ds initial delay\n",
  158. current_timeout->twd, current_timeout->tdelay);
  159. heartbeat = current_timeout->twd;
  160. wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  161. wdt_base = devm_ioremap_resource(&pdev->dev, wdt_mem);
  162. if (IS_ERR(wdt_base))
  163. return PTR_ERR(wdt_base);
  164. max63xx_wdt_dev.timeout = heartbeat;
  165. watchdog_set_nowayout(&max63xx_wdt_dev, nowayout);
  166. watchdog_set_drvdata(&max63xx_wdt_dev, current_timeout);
  167. return watchdog_register_device(&max63xx_wdt_dev);
  168. }
  169. static int max63xx_wdt_remove(struct platform_device *pdev)
  170. {
  171. watchdog_unregister_device(&max63xx_wdt_dev);
  172. return 0;
  173. }
  174. static struct platform_device_id max63xx_id_table[] = {
  175. { "max6369_wdt", (kernel_ulong_t)max6369_table, },
  176. { "max6370_wdt", (kernel_ulong_t)max6369_table, },
  177. { "max6371_wdt", (kernel_ulong_t)max6371_table, },
  178. { "max6372_wdt", (kernel_ulong_t)max6371_table, },
  179. { "max6373_wdt", (kernel_ulong_t)max6373_table, },
  180. { "max6374_wdt", (kernel_ulong_t)max6373_table, },
  181. { },
  182. };
  183. MODULE_DEVICE_TABLE(platform, max63xx_id_table);
  184. static struct platform_driver max63xx_wdt_driver = {
  185. .probe = max63xx_wdt_probe,
  186. .remove = max63xx_wdt_remove,
  187. .id_table = max63xx_id_table,
  188. .driver = {
  189. .name = "max63xx_wdt",
  190. .owner = THIS_MODULE,
  191. },
  192. };
  193. module_platform_driver(max63xx_wdt_driver);
  194. MODULE_AUTHOR("Marc Zyngier <maz@misterjones.org>");
  195. MODULE_DESCRIPTION("max63xx Watchdog Driver");
  196. module_param(heartbeat, int, 0);
  197. MODULE_PARM_DESC(heartbeat,
  198. "Watchdog heartbeat period in seconds from 1 to "
  199. __MODULE_STRING(MAX_HEARTBEAT) ", default "
  200. __MODULE_STRING(DEFAULT_HEARTBEAT));
  201. module_param(nowayout, bool, 0);
  202. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  203. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  204. module_param(nodelay, int, 0);
  205. MODULE_PARM_DESC(nodelay,
  206. "Force selection of a timeout setting without initial delay "
  207. "(max6373/74 only, default=0)");
  208. MODULE_LICENSE("GPL");
  209. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);