imx2_wdt.c 9.1 KB

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  1. /*
  2. * Watchdog driver for IMX2 and later processors
  3. *
  4. * Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de>
  5. *
  6. * some parts adapted by similar drivers from Darius Augulis and Vladimir
  7. * Zapolskiy, additional improvements by Wim Van Sebroeck.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License version 2 as published by
  11. * the Free Software Foundation.
  12. *
  13. * NOTE: MX1 has a slightly different Watchdog than MX2 and later:
  14. *
  15. * MX1: MX2+:
  16. * ---- -----
  17. * Registers: 32-bit 16-bit
  18. * Stopable timer: Yes No
  19. * Need to enable clk: No Yes
  20. * Halt on suspend: Manual Can be automatic
  21. */
  22. #include <linux/init.h>
  23. #include <linux/kernel.h>
  24. #include <linux/miscdevice.h>
  25. #include <linux/module.h>
  26. #include <linux/moduleparam.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/watchdog.h>
  29. #include <linux/clk.h>
  30. #include <linux/fs.h>
  31. #include <linux/io.h>
  32. #include <linux/uaccess.h>
  33. #include <linux/timer.h>
  34. #include <linux/jiffies.h>
  35. #define DRIVER_NAME "imx2-wdt"
  36. #define IMX2_WDT_WCR 0x00 /* Control Register */
  37. #define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
  38. #define IMX2_WDT_WCR_WRE (1 << 3) /* -> WDOG Reset Enable */
  39. #define IMX2_WDT_WCR_WDE (1 << 2) /* -> Watchdog Enable */
  40. #define IMX2_WDT_WSR 0x02 /* Service Register */
  41. #define IMX2_WDT_SEQ1 0x5555 /* -> service sequence 1 */
  42. #define IMX2_WDT_SEQ2 0xAAAA /* -> service sequence 2 */
  43. #define IMX2_WDT_WRSR 0x04 /* Reset Status Register */
  44. #define IMX2_WDT_WRSR_TOUT (1 << 1) /* -> Reset due to Timeout */
  45. #define IMX2_WDT_MAX_TIME 128
  46. #define IMX2_WDT_DEFAULT_TIME 60 /* in seconds */
  47. #define WDOG_SEC_TO_COUNT(s) ((s * 2 - 1) << 8)
  48. #define IMX2_WDT_STATUS_OPEN 0
  49. #define IMX2_WDT_STATUS_STARTED 1
  50. #define IMX2_WDT_EXPECT_CLOSE 2
  51. static struct {
  52. struct clk *clk;
  53. void __iomem *base;
  54. unsigned timeout;
  55. unsigned long status;
  56. struct timer_list timer; /* Pings the watchdog when closed */
  57. } imx2_wdt;
  58. static struct miscdevice imx2_wdt_miscdev;
  59. static bool nowayout = WATCHDOG_NOWAYOUT;
  60. module_param(nowayout, bool, 0);
  61. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  62. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  63. static unsigned timeout = IMX2_WDT_DEFAULT_TIME;
  64. module_param(timeout, uint, 0);
  65. MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default="
  66. __MODULE_STRING(IMX2_WDT_DEFAULT_TIME) ")");
  67. static const struct watchdog_info imx2_wdt_info = {
  68. .identity = "imx2+ watchdog",
  69. .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
  70. };
  71. static inline void imx2_wdt_setup(void)
  72. {
  73. u16 val = __raw_readw(imx2_wdt.base + IMX2_WDT_WCR);
  74. /* Strip the old watchdog Time-Out value */
  75. val &= ~IMX2_WDT_WCR_WT;
  76. /* Generate reset if WDOG times out */
  77. val &= ~IMX2_WDT_WCR_WRE;
  78. /* Keep Watchdog Disabled */
  79. val &= ~IMX2_WDT_WCR_WDE;
  80. /* Set the watchdog's Time-Out value */
  81. val |= WDOG_SEC_TO_COUNT(imx2_wdt.timeout);
  82. __raw_writew(val, imx2_wdt.base + IMX2_WDT_WCR);
  83. /* enable the watchdog */
  84. val |= IMX2_WDT_WCR_WDE;
  85. __raw_writew(val, imx2_wdt.base + IMX2_WDT_WCR);
  86. }
  87. static inline void imx2_wdt_ping(void)
  88. {
  89. __raw_writew(IMX2_WDT_SEQ1, imx2_wdt.base + IMX2_WDT_WSR);
  90. __raw_writew(IMX2_WDT_SEQ2, imx2_wdt.base + IMX2_WDT_WSR);
  91. }
  92. static void imx2_wdt_timer_ping(unsigned long arg)
  93. {
  94. /* ping it every imx2_wdt.timeout / 2 seconds to prevent reboot */
  95. imx2_wdt_ping();
  96. mod_timer(&imx2_wdt.timer, jiffies + imx2_wdt.timeout * HZ / 2);
  97. }
  98. static void imx2_wdt_start(void)
  99. {
  100. if (!test_and_set_bit(IMX2_WDT_STATUS_STARTED, &imx2_wdt.status)) {
  101. /* at our first start we enable clock and do initialisations */
  102. clk_prepare_enable(imx2_wdt.clk);
  103. imx2_wdt_setup();
  104. } else /* delete the timer that pings the watchdog after close */
  105. del_timer_sync(&imx2_wdt.timer);
  106. /* Watchdog is enabled - time to reload the timeout value */
  107. imx2_wdt_ping();
  108. }
  109. static void imx2_wdt_stop(void)
  110. {
  111. /* we don't need a clk_disable, it cannot be disabled once started.
  112. * We use a timer to ping the watchdog while /dev/watchdog is closed */
  113. imx2_wdt_timer_ping(0);
  114. }
  115. static void imx2_wdt_set_timeout(int new_timeout)
  116. {
  117. u16 val = __raw_readw(imx2_wdt.base + IMX2_WDT_WCR);
  118. /* set the new timeout value in the WSR */
  119. val &= ~IMX2_WDT_WCR_WT;
  120. val |= WDOG_SEC_TO_COUNT(new_timeout);
  121. __raw_writew(val, imx2_wdt.base + IMX2_WDT_WCR);
  122. }
  123. static int imx2_wdt_open(struct inode *inode, struct file *file)
  124. {
  125. if (test_and_set_bit(IMX2_WDT_STATUS_OPEN, &imx2_wdt.status))
  126. return -EBUSY;
  127. imx2_wdt_start();
  128. return nonseekable_open(inode, file);
  129. }
  130. static int imx2_wdt_close(struct inode *inode, struct file *file)
  131. {
  132. if (test_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status) && !nowayout)
  133. imx2_wdt_stop();
  134. else {
  135. dev_crit(imx2_wdt_miscdev.parent,
  136. "Unexpected close: Expect reboot!\n");
  137. imx2_wdt_ping();
  138. }
  139. clear_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status);
  140. clear_bit(IMX2_WDT_STATUS_OPEN, &imx2_wdt.status);
  141. return 0;
  142. }
  143. static long imx2_wdt_ioctl(struct file *file, unsigned int cmd,
  144. unsigned long arg)
  145. {
  146. void __user *argp = (void __user *)arg;
  147. int __user *p = argp;
  148. int new_value;
  149. u16 val;
  150. switch (cmd) {
  151. case WDIOC_GETSUPPORT:
  152. return copy_to_user(argp, &imx2_wdt_info,
  153. sizeof(struct watchdog_info)) ? -EFAULT : 0;
  154. case WDIOC_GETSTATUS:
  155. return put_user(0, p);
  156. case WDIOC_GETBOOTSTATUS:
  157. val = __raw_readw(imx2_wdt.base + IMX2_WDT_WRSR);
  158. new_value = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
  159. return put_user(new_value, p);
  160. case WDIOC_KEEPALIVE:
  161. imx2_wdt_ping();
  162. return 0;
  163. case WDIOC_SETTIMEOUT:
  164. if (get_user(new_value, p))
  165. return -EFAULT;
  166. if ((new_value < 1) || (new_value > IMX2_WDT_MAX_TIME))
  167. return -EINVAL;
  168. imx2_wdt_set_timeout(new_value);
  169. imx2_wdt.timeout = new_value;
  170. imx2_wdt_ping();
  171. /* Fallthrough to return current value */
  172. case WDIOC_GETTIMEOUT:
  173. return put_user(imx2_wdt.timeout, p);
  174. default:
  175. return -ENOTTY;
  176. }
  177. }
  178. static ssize_t imx2_wdt_write(struct file *file, const char __user *data,
  179. size_t len, loff_t *ppos)
  180. {
  181. size_t i;
  182. char c;
  183. if (len == 0) /* Can we see this even ? */
  184. return 0;
  185. clear_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status);
  186. /* scan to see whether or not we got the magic character */
  187. for (i = 0; i != len; i++) {
  188. if (get_user(c, data + i))
  189. return -EFAULT;
  190. if (c == 'V')
  191. set_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status);
  192. }
  193. imx2_wdt_ping();
  194. return len;
  195. }
  196. static const struct file_operations imx2_wdt_fops = {
  197. .owner = THIS_MODULE,
  198. .llseek = no_llseek,
  199. .unlocked_ioctl = imx2_wdt_ioctl,
  200. .open = imx2_wdt_open,
  201. .release = imx2_wdt_close,
  202. .write = imx2_wdt_write,
  203. };
  204. static struct miscdevice imx2_wdt_miscdev = {
  205. .minor = WATCHDOG_MINOR,
  206. .name = "watchdog",
  207. .fops = &imx2_wdt_fops,
  208. };
  209. static int __init imx2_wdt_probe(struct platform_device *pdev)
  210. {
  211. int ret;
  212. struct resource *res;
  213. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  214. if (!res) {
  215. dev_err(&pdev->dev, "can't get device resources\n");
  216. return -ENODEV;
  217. }
  218. imx2_wdt.base = devm_ioremap_resource(&pdev->dev, res);
  219. if (IS_ERR(imx2_wdt.base))
  220. return PTR_ERR(imx2_wdt.base);
  221. imx2_wdt.clk = clk_get(&pdev->dev, NULL);
  222. if (IS_ERR(imx2_wdt.clk)) {
  223. dev_err(&pdev->dev, "can't get Watchdog clock\n");
  224. return PTR_ERR(imx2_wdt.clk);
  225. }
  226. imx2_wdt.timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME);
  227. if (imx2_wdt.timeout != timeout)
  228. dev_warn(&pdev->dev, "Initial timeout out of range! "
  229. "Clamped from %u to %u\n", timeout, imx2_wdt.timeout);
  230. setup_timer(&imx2_wdt.timer, imx2_wdt_timer_ping, 0);
  231. imx2_wdt_miscdev.parent = &pdev->dev;
  232. ret = misc_register(&imx2_wdt_miscdev);
  233. if (ret)
  234. goto fail;
  235. dev_info(&pdev->dev,
  236. "IMX2+ Watchdog Timer enabled. timeout=%ds (nowayout=%d)\n",
  237. imx2_wdt.timeout, nowayout);
  238. return 0;
  239. fail:
  240. imx2_wdt_miscdev.parent = NULL;
  241. clk_put(imx2_wdt.clk);
  242. return ret;
  243. }
  244. static int __exit imx2_wdt_remove(struct platform_device *pdev)
  245. {
  246. misc_deregister(&imx2_wdt_miscdev);
  247. if (test_bit(IMX2_WDT_STATUS_STARTED, &imx2_wdt.status)) {
  248. del_timer_sync(&imx2_wdt.timer);
  249. dev_crit(imx2_wdt_miscdev.parent,
  250. "Device removed: Expect reboot!\n");
  251. } else
  252. clk_put(imx2_wdt.clk);
  253. imx2_wdt_miscdev.parent = NULL;
  254. return 0;
  255. }
  256. static void imx2_wdt_shutdown(struct platform_device *pdev)
  257. {
  258. if (test_bit(IMX2_WDT_STATUS_STARTED, &imx2_wdt.status)) {
  259. /* we are running, we need to delete the timer but will give
  260. * max timeout before reboot will take place */
  261. del_timer_sync(&imx2_wdt.timer);
  262. imx2_wdt_set_timeout(IMX2_WDT_MAX_TIME);
  263. imx2_wdt_ping();
  264. dev_crit(imx2_wdt_miscdev.parent,
  265. "Device shutdown: Expect reboot!\n");
  266. }
  267. }
  268. static const struct of_device_id imx2_wdt_dt_ids[] = {
  269. { .compatible = "fsl,imx21-wdt", },
  270. { /* sentinel */ }
  271. };
  272. static struct platform_driver imx2_wdt_driver = {
  273. .remove = __exit_p(imx2_wdt_remove),
  274. .shutdown = imx2_wdt_shutdown,
  275. .driver = {
  276. .name = DRIVER_NAME,
  277. .owner = THIS_MODULE,
  278. .of_match_table = imx2_wdt_dt_ids,
  279. },
  280. };
  281. module_platform_driver_probe(imx2_wdt_driver, imx2_wdt_probe);
  282. MODULE_AUTHOR("Wolfram Sang");
  283. MODULE_DESCRIPTION("Watchdog driver for IMX2 and later");
  284. MODULE_LICENSE("GPL v2");
  285. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  286. MODULE_ALIAS("platform:" DRIVER_NAME);