at91sam9_wdt.c 6.5 KB

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  1. /*
  2. * Watchdog driver for Atmel AT91SAM9x processors.
  3. *
  4. * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. /*
  12. * The Watchdog Timer Mode Register can be only written to once. If the
  13. * timeout need to be set from Linux, be sure that the bootstrap or the
  14. * bootloader doesn't write to this register.
  15. */
  16. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  17. #include <linux/errno.h>
  18. #include <linux/init.h>
  19. #include <linux/io.h>
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/types.h>
  25. #include <linux/watchdog.h>
  26. #include <linux/jiffies.h>
  27. #include <linux/timer.h>
  28. #include <linux/bitops.h>
  29. #include <linux/uaccess.h>
  30. #include <linux/of.h>
  31. #include "at91sam9_wdt.h"
  32. #define DRV_NAME "AT91SAM9 Watchdog"
  33. #define wdt_read(field) \
  34. __raw_readl(at91wdt_private.base + field)
  35. #define wdt_write(field, val) \
  36. __raw_writel((val), at91wdt_private.base + field)
  37. /* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
  38. * use this to convert a watchdog
  39. * value from/to milliseconds.
  40. */
  41. #define ms_to_ticks(t) (((t << 8) / 1000) - 1)
  42. #define ticks_to_ms(t) (((t + 1) * 1000) >> 8)
  43. /* Hardware timeout in seconds */
  44. #define WDT_HW_TIMEOUT 2
  45. /* Timer heartbeat (500ms) */
  46. #define WDT_TIMEOUT (HZ/2)
  47. /* User land timeout */
  48. #define WDT_HEARTBEAT 15
  49. static int heartbeat;
  50. module_param(heartbeat, int, 0);
  51. MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
  52. "(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
  53. static bool nowayout = WATCHDOG_NOWAYOUT;
  54. module_param(nowayout, bool, 0);
  55. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
  56. "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  57. static struct watchdog_device at91_wdt_dev;
  58. static void at91_ping(unsigned long data);
  59. static struct {
  60. void __iomem *base;
  61. unsigned long next_heartbeat; /* the next_heartbeat for the timer */
  62. struct timer_list timer; /* The timer that pings the watchdog */
  63. } at91wdt_private;
  64. /* ......................................................................... */
  65. /*
  66. * Reload the watchdog timer. (ie, pat the watchdog)
  67. */
  68. static inline void at91_wdt_reset(void)
  69. {
  70. wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
  71. }
  72. /*
  73. * Timer tick
  74. */
  75. static void at91_ping(unsigned long data)
  76. {
  77. if (time_before(jiffies, at91wdt_private.next_heartbeat) ||
  78. (!watchdog_active(&at91_wdt_dev))) {
  79. at91_wdt_reset();
  80. mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
  81. } else
  82. pr_crit("I will reset your machine !\n");
  83. }
  84. static int at91_wdt_ping(struct watchdog_device *wdd)
  85. {
  86. /* calculate when the next userspace timeout will be */
  87. at91wdt_private.next_heartbeat = jiffies + wdd->timeout * HZ;
  88. return 0;
  89. }
  90. static int at91_wdt_start(struct watchdog_device *wdd)
  91. {
  92. /* calculate the next userspace timeout and modify the timer */
  93. at91_wdt_ping(wdd);
  94. mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
  95. return 0;
  96. }
  97. static int at91_wdt_stop(struct watchdog_device *wdd)
  98. {
  99. /* The watchdog timer hardware can not be stopped... */
  100. return 0;
  101. }
  102. static int at91_wdt_set_timeout(struct watchdog_device *wdd, unsigned int new_timeout)
  103. {
  104. wdd->timeout = new_timeout;
  105. return 0;
  106. }
  107. /*
  108. * Set the watchdog time interval in 1/256Hz (write-once)
  109. * Counter is 12 bit.
  110. */
  111. static int at91_wdt_settimeout(unsigned int timeout)
  112. {
  113. unsigned int reg;
  114. unsigned int mr;
  115. /* Check if disabled */
  116. mr = wdt_read(AT91_WDT_MR);
  117. if (mr & AT91_WDT_WDDIS) {
  118. pr_err("sorry, watchdog is disabled\n");
  119. return -EIO;
  120. }
  121. /*
  122. * All counting occurs at SLOW_CLOCK / 128 = 256 Hz
  123. *
  124. * Since WDV is a 12-bit counter, the maximum period is
  125. * 4096 / 256 = 16 seconds.
  126. */
  127. reg = AT91_WDT_WDRSTEN /* causes watchdog reset */
  128. /* | AT91_WDT_WDRPROC causes processor reset only */
  129. | AT91_WDT_WDDBGHLT /* disabled in debug mode */
  130. | AT91_WDT_WDD /* restart at any time */
  131. | (timeout & AT91_WDT_WDV); /* timer value */
  132. wdt_write(AT91_WDT_MR, reg);
  133. return 0;
  134. }
  135. /* ......................................................................... */
  136. static const struct watchdog_info at91_wdt_info = {
  137. .identity = DRV_NAME,
  138. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
  139. WDIOF_MAGICCLOSE,
  140. };
  141. static const struct watchdog_ops at91_wdt_ops = {
  142. .owner = THIS_MODULE,
  143. .start = at91_wdt_start,
  144. .stop = at91_wdt_stop,
  145. .ping = at91_wdt_ping,
  146. .set_timeout = at91_wdt_set_timeout,
  147. };
  148. static struct watchdog_device at91_wdt_dev = {
  149. .info = &at91_wdt_info,
  150. .ops = &at91_wdt_ops,
  151. .timeout = WDT_HEARTBEAT,
  152. .min_timeout = 1,
  153. .max_timeout = 0xFFFF,
  154. };
  155. static int __init at91wdt_probe(struct platform_device *pdev)
  156. {
  157. struct resource *r;
  158. int res;
  159. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  160. if (!r)
  161. return -ENODEV;
  162. at91wdt_private.base = ioremap(r->start, resource_size(r));
  163. if (!at91wdt_private.base) {
  164. dev_err(&pdev->dev, "failed to map registers, aborting.\n");
  165. return -ENOMEM;
  166. }
  167. at91_wdt_dev.parent = &pdev->dev;
  168. watchdog_init_timeout(&at91_wdt_dev, heartbeat, &pdev->dev);
  169. watchdog_set_nowayout(&at91_wdt_dev, nowayout);
  170. /* Set watchdog */
  171. res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000));
  172. if (res)
  173. return res;
  174. res = watchdog_register_device(&at91_wdt_dev);
  175. if (res)
  176. return res;
  177. at91wdt_private.next_heartbeat = jiffies + at91_wdt_dev.timeout * HZ;
  178. setup_timer(&at91wdt_private.timer, at91_ping, 0);
  179. mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
  180. pr_info("enabled (heartbeat=%d sec, nowayout=%d)\n",
  181. at91_wdt_dev.timeout, nowayout);
  182. return 0;
  183. }
  184. static int __exit at91wdt_remove(struct platform_device *pdev)
  185. {
  186. watchdog_unregister_device(&at91_wdt_dev);
  187. pr_warn("I quit now, hardware will probably reboot!\n");
  188. del_timer(&at91wdt_private.timer);
  189. return 0;
  190. }
  191. #if defined(CONFIG_OF)
  192. static const struct of_device_id at91_wdt_dt_ids[] = {
  193. { .compatible = "atmel,at91sam9260-wdt" },
  194. { /* sentinel */ }
  195. };
  196. MODULE_DEVICE_TABLE(of, at91_wdt_dt_ids);
  197. #endif
  198. static struct platform_driver at91wdt_driver = {
  199. .remove = __exit_p(at91wdt_remove),
  200. .driver = {
  201. .name = "at91_wdt",
  202. .owner = THIS_MODULE,
  203. .of_match_table = of_match_ptr(at91_wdt_dt_ids),
  204. },
  205. };
  206. module_platform_driver_probe(at91wdt_driver, at91wdt_probe);
  207. MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
  208. MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
  209. MODULE_LICENSE("GPL");