mxc_w1.c 4.4 KB

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  1. /*
  2. * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. * Copyright 2008 Luotao Fu, kernel@pengutronix.de
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/clk.h>
  23. #include <linux/slab.h>
  24. #include <linux/delay.h>
  25. #include <linux/io.h>
  26. #include "../w1.h"
  27. #include "../w1_int.h"
  28. #include "../w1_log.h"
  29. /* According to the mx27 Datasheet the reset procedure should take up to about
  30. * 1350us. We set the timeout to 500*100us = 50ms for sure */
  31. #define MXC_W1_RESET_TIMEOUT 500
  32. /*
  33. * MXC W1 Register offsets
  34. */
  35. #define MXC_W1_CONTROL 0x00
  36. #define MXC_W1_TIME_DIVIDER 0x02
  37. #define MXC_W1_RESET 0x04
  38. #define MXC_W1_COMMAND 0x06
  39. #define MXC_W1_TXRX 0x08
  40. #define MXC_W1_INTERRUPT 0x0A
  41. #define MXC_W1_INTERRUPT_EN 0x0C
  42. struct mxc_w1_device {
  43. void __iomem *regs;
  44. unsigned int clkdiv;
  45. struct clk *clk;
  46. struct w1_bus_master bus_master;
  47. };
  48. /*
  49. * this is the low level routine to
  50. * reset the device on the One Wire interface
  51. * on the hardware
  52. */
  53. static u8 mxc_w1_ds2_reset_bus(void *data)
  54. {
  55. u8 reg_val;
  56. unsigned int timeout_cnt = 0;
  57. struct mxc_w1_device *dev = data;
  58. __raw_writeb(0x80, (dev->regs + MXC_W1_CONTROL));
  59. while (1) {
  60. reg_val = __raw_readb(dev->regs + MXC_W1_CONTROL);
  61. if (((reg_val >> 7) & 0x1) == 0 ||
  62. timeout_cnt > MXC_W1_RESET_TIMEOUT)
  63. break;
  64. else
  65. timeout_cnt++;
  66. udelay(100);
  67. }
  68. return (reg_val >> 7) & 0x1;
  69. }
  70. /*
  71. * this is the low level routine to read/write a bit on the One Wire
  72. * interface on the hardware. It does write 0 if parameter bit is set
  73. * to 0, otherwise a write 1/read.
  74. */
  75. static u8 mxc_w1_ds2_touch_bit(void *data, u8 bit)
  76. {
  77. struct mxc_w1_device *mdev = data;
  78. void __iomem *ctrl_addr = mdev->regs + MXC_W1_CONTROL;
  79. unsigned int timeout_cnt = 400; /* Takes max. 120us according to
  80. * datasheet.
  81. */
  82. __raw_writeb((1 << (5 - bit)), ctrl_addr);
  83. while (timeout_cnt--) {
  84. if (!((__raw_readb(ctrl_addr) >> (5 - bit)) & 0x1))
  85. break;
  86. udelay(1);
  87. }
  88. return ((__raw_readb(ctrl_addr)) >> 3) & 0x1;
  89. }
  90. static int mxc_w1_probe(struct platform_device *pdev)
  91. {
  92. struct mxc_w1_device *mdev;
  93. struct resource *res;
  94. int err = 0;
  95. mdev = devm_kzalloc(&pdev->dev, sizeof(struct mxc_w1_device),
  96. GFP_KERNEL);
  97. if (!mdev)
  98. return -ENOMEM;
  99. mdev->clk = devm_clk_get(&pdev->dev, NULL);
  100. if (IS_ERR(mdev->clk))
  101. return PTR_ERR(mdev->clk);
  102. mdev->clkdiv = (clk_get_rate(mdev->clk) / 1000000) - 1;
  103. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  104. mdev->regs = devm_request_and_ioremap(&pdev->dev, res);
  105. if (!mdev->regs)
  106. return -EBUSY;
  107. clk_prepare_enable(mdev->clk);
  108. __raw_writeb(mdev->clkdiv, mdev->regs + MXC_W1_TIME_DIVIDER);
  109. mdev->bus_master.data = mdev;
  110. mdev->bus_master.reset_bus = mxc_w1_ds2_reset_bus;
  111. mdev->bus_master.touch_bit = mxc_w1_ds2_touch_bit;
  112. err = w1_add_master_device(&mdev->bus_master);
  113. if (err)
  114. return err;
  115. platform_set_drvdata(pdev, mdev);
  116. return 0;
  117. }
  118. /*
  119. * disassociate the w1 device from the driver
  120. */
  121. static int mxc_w1_remove(struct platform_device *pdev)
  122. {
  123. struct mxc_w1_device *mdev = platform_get_drvdata(pdev);
  124. w1_remove_master_device(&mdev->bus_master);
  125. clk_disable_unprepare(mdev->clk);
  126. platform_set_drvdata(pdev, NULL);
  127. return 0;
  128. }
  129. static struct of_device_id mxc_w1_dt_ids[] = {
  130. { .compatible = "fsl,imx21-owire" },
  131. { /* sentinel */ }
  132. };
  133. MODULE_DEVICE_TABLE(of, mxc_w1_dt_ids);
  134. static struct platform_driver mxc_w1_driver = {
  135. .driver = {
  136. .name = "mxc_w1",
  137. .of_match_table = mxc_w1_dt_ids,
  138. },
  139. .probe = mxc_w1_probe,
  140. .remove = mxc_w1_remove,
  141. };
  142. module_platform_driver(mxc_w1_driver);
  143. MODULE_LICENSE("GPL");
  144. MODULE_AUTHOR("Freescale Semiconductors Inc");
  145. MODULE_DESCRIPTION("Driver for One-Wire on MXC");