dss_features.c 29 KB

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  1. /*
  2. * linux/drivers/video/omap2/dss/dss_features.c
  3. *
  4. * Copyright (C) 2010 Texas Instruments
  5. * Author: Archit Taneja <archit@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/types.h>
  22. #include <linux/err.h>
  23. #include <linux/slab.h>
  24. #include <video/omapdss.h>
  25. #include "dss.h"
  26. #include "dss_features.h"
  27. /* Defines a generic omap register field */
  28. struct dss_reg_field {
  29. u8 start, end;
  30. };
  31. struct dss_param_range {
  32. int min, max;
  33. };
  34. struct omap_dss_features {
  35. const struct dss_reg_field *reg_fields;
  36. const int num_reg_fields;
  37. const enum dss_feat_id *features;
  38. const int num_features;
  39. const int num_mgrs;
  40. const int num_ovls;
  41. const int num_wbs;
  42. const enum omap_display_type *supported_displays;
  43. const enum omap_dss_output_id *supported_outputs;
  44. const enum omap_color_mode *supported_color_modes;
  45. const enum omap_overlay_caps *overlay_caps;
  46. const char * const *clksrc_names;
  47. const struct dss_param_range *dss_params;
  48. const enum omap_dss_rotation_type supported_rotation_types;
  49. const u32 buffer_size_unit;
  50. const u32 burst_size_unit;
  51. };
  52. /* This struct is assigned to one of the below during initialization */
  53. static const struct omap_dss_features *omap_current_dss_features;
  54. static const struct dss_reg_field omap2_dss_reg_fields[] = {
  55. [FEAT_REG_FIRHINC] = { 11, 0 },
  56. [FEAT_REG_FIRVINC] = { 27, 16 },
  57. [FEAT_REG_FIFOLOWTHRESHOLD] = { 8, 0 },
  58. [FEAT_REG_FIFOHIGHTHRESHOLD] = { 24, 16 },
  59. [FEAT_REG_FIFOSIZE] = { 8, 0 },
  60. [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
  61. [FEAT_REG_VERTICALACCU] = { 25, 16 },
  62. [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
  63. [FEAT_REG_DSIPLL_REGN] = { 0, 0 },
  64. [FEAT_REG_DSIPLL_REGM] = { 0, 0 },
  65. [FEAT_REG_DSIPLL_REGM_DISPC] = { 0, 0 },
  66. [FEAT_REG_DSIPLL_REGM_DSI] = { 0, 0 },
  67. };
  68. static const struct dss_reg_field omap3_dss_reg_fields[] = {
  69. [FEAT_REG_FIRHINC] = { 12, 0 },
  70. [FEAT_REG_FIRVINC] = { 28, 16 },
  71. [FEAT_REG_FIFOLOWTHRESHOLD] = { 11, 0 },
  72. [FEAT_REG_FIFOHIGHTHRESHOLD] = { 27, 16 },
  73. [FEAT_REG_FIFOSIZE] = { 10, 0 },
  74. [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
  75. [FEAT_REG_VERTICALACCU] = { 25, 16 },
  76. [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
  77. [FEAT_REG_DSIPLL_REGN] = { 7, 1 },
  78. [FEAT_REG_DSIPLL_REGM] = { 18, 8 },
  79. [FEAT_REG_DSIPLL_REGM_DISPC] = { 22, 19 },
  80. [FEAT_REG_DSIPLL_REGM_DSI] = { 26, 23 },
  81. };
  82. static const struct dss_reg_field omap4_dss_reg_fields[] = {
  83. [FEAT_REG_FIRHINC] = { 12, 0 },
  84. [FEAT_REG_FIRVINC] = { 28, 16 },
  85. [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 },
  86. [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 },
  87. [FEAT_REG_FIFOSIZE] = { 15, 0 },
  88. [FEAT_REG_HORIZONTALACCU] = { 10, 0 },
  89. [FEAT_REG_VERTICALACCU] = { 26, 16 },
  90. [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 8 },
  91. [FEAT_REG_DSIPLL_REGN] = { 8, 1 },
  92. [FEAT_REG_DSIPLL_REGM] = { 20, 9 },
  93. [FEAT_REG_DSIPLL_REGM_DISPC] = { 25, 21 },
  94. [FEAT_REG_DSIPLL_REGM_DSI] = { 30, 26 },
  95. };
  96. static const struct dss_reg_field omap5_dss_reg_fields[] = {
  97. [FEAT_REG_FIRHINC] = { 12, 0 },
  98. [FEAT_REG_FIRVINC] = { 28, 16 },
  99. [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 },
  100. [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 },
  101. [FEAT_REG_FIFOSIZE] = { 15, 0 },
  102. [FEAT_REG_HORIZONTALACCU] = { 10, 0 },
  103. [FEAT_REG_VERTICALACCU] = { 26, 16 },
  104. [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 7 },
  105. [FEAT_REG_DSIPLL_REGN] = { 8, 1 },
  106. [FEAT_REG_DSIPLL_REGM] = { 20, 9 },
  107. [FEAT_REG_DSIPLL_REGM_DISPC] = { 25, 21 },
  108. [FEAT_REG_DSIPLL_REGM_DSI] = { 30, 26 },
  109. };
  110. static const enum omap_display_type omap2_dss_supported_displays[] = {
  111. /* OMAP_DSS_CHANNEL_LCD */
  112. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
  113. /* OMAP_DSS_CHANNEL_DIGIT */
  114. OMAP_DISPLAY_TYPE_VENC,
  115. };
  116. static const enum omap_display_type omap3430_dss_supported_displays[] = {
  117. /* OMAP_DSS_CHANNEL_LCD */
  118. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  119. OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI,
  120. /* OMAP_DSS_CHANNEL_DIGIT */
  121. OMAP_DISPLAY_TYPE_VENC,
  122. };
  123. static const enum omap_display_type omap3630_dss_supported_displays[] = {
  124. /* OMAP_DSS_CHANNEL_LCD */
  125. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  126. OMAP_DISPLAY_TYPE_DSI,
  127. /* OMAP_DSS_CHANNEL_DIGIT */
  128. OMAP_DISPLAY_TYPE_VENC,
  129. };
  130. static const enum omap_display_type omap4_dss_supported_displays[] = {
  131. /* OMAP_DSS_CHANNEL_LCD */
  132. OMAP_DISPLAY_TYPE_DBI | OMAP_DISPLAY_TYPE_DSI,
  133. /* OMAP_DSS_CHANNEL_DIGIT */
  134. OMAP_DISPLAY_TYPE_VENC | OMAP_DISPLAY_TYPE_HDMI,
  135. /* OMAP_DSS_CHANNEL_LCD2 */
  136. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  137. OMAP_DISPLAY_TYPE_DSI,
  138. };
  139. static const enum omap_display_type omap5_dss_supported_displays[] = {
  140. /* OMAP_DSS_CHANNEL_LCD */
  141. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  142. OMAP_DISPLAY_TYPE_DSI,
  143. /* OMAP_DSS_CHANNEL_DIGIT */
  144. OMAP_DISPLAY_TYPE_HDMI | OMAP_DISPLAY_TYPE_DPI,
  145. /* OMAP_DSS_CHANNEL_LCD2 */
  146. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  147. OMAP_DISPLAY_TYPE_DSI,
  148. };
  149. static const enum omap_dss_output_id omap2_dss_supported_outputs[] = {
  150. /* OMAP_DSS_CHANNEL_LCD */
  151. OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI,
  152. /* OMAP_DSS_CHANNEL_DIGIT */
  153. OMAP_DSS_OUTPUT_VENC,
  154. };
  155. static const enum omap_dss_output_id omap3430_dss_supported_outputs[] = {
  156. /* OMAP_DSS_CHANNEL_LCD */
  157. OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
  158. OMAP_DSS_OUTPUT_SDI | OMAP_DSS_OUTPUT_DSI1,
  159. /* OMAP_DSS_CHANNEL_DIGIT */
  160. OMAP_DSS_OUTPUT_VENC,
  161. };
  162. static const enum omap_dss_output_id omap3630_dss_supported_outputs[] = {
  163. /* OMAP_DSS_CHANNEL_LCD */
  164. OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
  165. OMAP_DSS_OUTPUT_DSI1,
  166. /* OMAP_DSS_CHANNEL_DIGIT */
  167. OMAP_DSS_OUTPUT_VENC,
  168. };
  169. static const enum omap_dss_output_id omap4_dss_supported_outputs[] = {
  170. /* OMAP_DSS_CHANNEL_LCD */
  171. OMAP_DSS_OUTPUT_DBI | OMAP_DSS_OUTPUT_DSI1,
  172. /* OMAP_DSS_CHANNEL_DIGIT */
  173. OMAP_DSS_OUTPUT_VENC | OMAP_DSS_OUTPUT_HDMI,
  174. /* OMAP_DSS_CHANNEL_LCD2 */
  175. OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
  176. OMAP_DSS_OUTPUT_DSI2,
  177. };
  178. static const enum omap_dss_output_id omap5_dss_supported_outputs[] = {
  179. /* OMAP_DSS_CHANNEL_LCD */
  180. OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
  181. OMAP_DSS_OUTPUT_DSI1 | OMAP_DSS_OUTPUT_DSI2,
  182. /* OMAP_DSS_CHANNEL_DIGIT */
  183. OMAP_DSS_OUTPUT_HDMI | OMAP_DSS_OUTPUT_DPI,
  184. /* OMAP_DSS_CHANNEL_LCD2 */
  185. OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
  186. OMAP_DSS_OUTPUT_DSI1,
  187. /* OMAP_DSS_CHANNEL_LCD3 */
  188. OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
  189. OMAP_DSS_OUTPUT_DSI2,
  190. };
  191. static const enum omap_color_mode omap2_dss_supported_color_modes[] = {
  192. /* OMAP_DSS_GFX */
  193. OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
  194. OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
  195. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
  196. OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
  197. /* OMAP_DSS_VIDEO1 */
  198. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  199. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
  200. OMAP_DSS_COLOR_UYVY,
  201. /* OMAP_DSS_VIDEO2 */
  202. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  203. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
  204. OMAP_DSS_COLOR_UYVY,
  205. };
  206. static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
  207. /* OMAP_DSS_GFX */
  208. OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
  209. OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
  210. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
  211. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  212. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
  213. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
  214. /* OMAP_DSS_VIDEO1 */
  215. OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
  216. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
  217. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
  218. /* OMAP_DSS_VIDEO2 */
  219. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
  220. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  221. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
  222. OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
  223. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
  224. };
  225. static const enum omap_color_mode omap4_dss_supported_color_modes[] = {
  226. /* OMAP_DSS_GFX */
  227. OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
  228. OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
  229. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
  230. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  231. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
  232. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 |
  233. OMAP_DSS_COLOR_ARGB16_1555 | OMAP_DSS_COLOR_RGBX16 |
  234. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_XRGB16_1555,
  235. /* OMAP_DSS_VIDEO1 */
  236. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
  237. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
  238. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
  239. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
  240. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
  241. OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
  242. OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
  243. OMAP_DSS_COLOR_RGBX32,
  244. /* OMAP_DSS_VIDEO2 */
  245. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
  246. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
  247. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
  248. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
  249. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
  250. OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
  251. OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
  252. OMAP_DSS_COLOR_RGBX32,
  253. /* OMAP_DSS_VIDEO3 */
  254. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
  255. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
  256. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
  257. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
  258. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
  259. OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
  260. OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
  261. OMAP_DSS_COLOR_RGBX32,
  262. /* OMAP_DSS_WB */
  263. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
  264. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
  265. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
  266. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
  267. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
  268. OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
  269. OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
  270. OMAP_DSS_COLOR_RGBX32,
  271. };
  272. static const enum omap_overlay_caps omap2_dss_overlay_caps[] = {
  273. /* OMAP_DSS_GFX */
  274. OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
  275. /* OMAP_DSS_VIDEO1 */
  276. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
  277. OMAP_DSS_OVL_CAP_REPLICATION,
  278. /* OMAP_DSS_VIDEO2 */
  279. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
  280. OMAP_DSS_OVL_CAP_REPLICATION,
  281. };
  282. static const enum omap_overlay_caps omap3430_dss_overlay_caps[] = {
  283. /* OMAP_DSS_GFX */
  284. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_POS |
  285. OMAP_DSS_OVL_CAP_REPLICATION,
  286. /* OMAP_DSS_VIDEO1 */
  287. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
  288. OMAP_DSS_OVL_CAP_REPLICATION,
  289. /* OMAP_DSS_VIDEO2 */
  290. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  291. OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
  292. };
  293. static const enum omap_overlay_caps omap3630_dss_overlay_caps[] = {
  294. /* OMAP_DSS_GFX */
  295. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
  296. OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
  297. /* OMAP_DSS_VIDEO1 */
  298. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
  299. OMAP_DSS_OVL_CAP_REPLICATION,
  300. /* OMAP_DSS_VIDEO2 */
  301. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  302. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_POS |
  303. OMAP_DSS_OVL_CAP_REPLICATION,
  304. };
  305. static const enum omap_overlay_caps omap4_dss_overlay_caps[] = {
  306. /* OMAP_DSS_GFX */
  307. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
  308. OMAP_DSS_OVL_CAP_ZORDER | OMAP_DSS_OVL_CAP_POS |
  309. OMAP_DSS_OVL_CAP_REPLICATION,
  310. /* OMAP_DSS_VIDEO1 */
  311. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  312. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
  313. OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
  314. /* OMAP_DSS_VIDEO2 */
  315. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  316. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
  317. OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
  318. /* OMAP_DSS_VIDEO3 */
  319. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  320. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
  321. OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
  322. };
  323. static const char * const omap2_dss_clk_source_names[] = {
  324. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "N/A",
  325. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "N/A",
  326. [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK1",
  327. };
  328. static const char * const omap3_dss_clk_source_names[] = {
  329. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DSI1_PLL_FCLK",
  330. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DSI2_PLL_FCLK",
  331. [OMAP_DSS_CLK_SRC_FCK] = "DSS1_ALWON_FCLK",
  332. };
  333. static const char * const omap4_dss_clk_source_names[] = {
  334. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "PLL1_CLK1",
  335. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "PLL1_CLK2",
  336. [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK",
  337. [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "PLL2_CLK1",
  338. [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "PLL2_CLK2",
  339. };
  340. static const char * const omap5_dss_clk_source_names[] = {
  341. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DPLL_DSI1_A_CLK1",
  342. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DPLL_DSI1_A_CLK2",
  343. [OMAP_DSS_CLK_SRC_FCK] = "DSS_CLK",
  344. [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "DPLL_DSI1_C_CLK1",
  345. [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "DPLL_DSI1_C_CLK2",
  346. };
  347. static const struct dss_param_range omap2_dss_param_range[] = {
  348. [FEAT_PARAM_DSS_FCK] = { 0, 173000000 },
  349. [FEAT_PARAM_DSS_PCD] = { 2, 255 },
  350. [FEAT_PARAM_DSIPLL_REGN] = { 0, 0 },
  351. [FEAT_PARAM_DSIPLL_REGM] = { 0, 0 },
  352. [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, 0 },
  353. [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, 0 },
  354. [FEAT_PARAM_DSIPLL_FINT] = { 0, 0 },
  355. [FEAT_PARAM_DSIPLL_LPDIV] = { 0, 0 },
  356. [FEAT_PARAM_DOWNSCALE] = { 1, 2 },
  357. /*
  358. * Assuming the line width buffer to be 768 pixels as OMAP2 DISPC
  359. * scaler cannot scale a image with width more than 768.
  360. */
  361. [FEAT_PARAM_LINEWIDTH] = { 1, 768 },
  362. };
  363. static const struct dss_param_range omap3_dss_param_range[] = {
  364. [FEAT_PARAM_DSS_FCK] = { 0, 173000000 },
  365. [FEAT_PARAM_DSS_PCD] = { 1, 255 },
  366. [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 7) - 1 },
  367. [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 11) - 1 },
  368. [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 4) - 1 },
  369. [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 4) - 1 },
  370. [FEAT_PARAM_DSIPLL_FINT] = { 750000, 2100000 },
  371. [FEAT_PARAM_DSIPLL_LPDIV] = { 1, (1 << 13) - 1},
  372. [FEAT_PARAM_DSI_FCK] = { 0, 173000000 },
  373. [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
  374. [FEAT_PARAM_LINEWIDTH] = { 1, 1024 },
  375. };
  376. static const struct dss_param_range omap4_dss_param_range[] = {
  377. [FEAT_PARAM_DSS_FCK] = { 0, 186000000 },
  378. [FEAT_PARAM_DSS_PCD] = { 1, 255 },
  379. [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 },
  380. [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 },
  381. [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 },
  382. [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 },
  383. [FEAT_PARAM_DSIPLL_FINT] = { 500000, 2500000 },
  384. [FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
  385. [FEAT_PARAM_DSI_FCK] = { 0, 170000000 },
  386. [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
  387. [FEAT_PARAM_LINEWIDTH] = { 1, 2048 },
  388. };
  389. static const struct dss_param_range omap5_dss_param_range[] = {
  390. [FEAT_PARAM_DSS_FCK] = { 0, 200000000 },
  391. [FEAT_PARAM_DSS_PCD] = { 1, 255 },
  392. [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 },
  393. [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 },
  394. [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 },
  395. [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 },
  396. [FEAT_PARAM_DSIPLL_FINT] = { 500000, 2500000 },
  397. [FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
  398. [FEAT_PARAM_DSI_FCK] = { 0, 170000000 },
  399. [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
  400. [FEAT_PARAM_LINEWIDTH] = { 1, 2048 },
  401. };
  402. static const enum dss_feat_id omap2_dss_feat_list[] = {
  403. FEAT_LCDENABLEPOL,
  404. FEAT_LCDENABLESIGNAL,
  405. FEAT_PCKFREEENABLE,
  406. FEAT_FUNCGATED,
  407. FEAT_ROWREPEATENABLE,
  408. FEAT_RESIZECONF,
  409. };
  410. static const enum dss_feat_id omap3430_dss_feat_list[] = {
  411. FEAT_LCDENABLEPOL,
  412. FEAT_LCDENABLESIGNAL,
  413. FEAT_PCKFREEENABLE,
  414. FEAT_FUNCGATED,
  415. FEAT_LINEBUFFERSPLIT,
  416. FEAT_ROWREPEATENABLE,
  417. FEAT_RESIZECONF,
  418. FEAT_DSI_PLL_FREQSEL,
  419. FEAT_DSI_REVERSE_TXCLKESC,
  420. FEAT_VENC_REQUIRES_TV_DAC_CLK,
  421. FEAT_CPR,
  422. FEAT_PRELOAD,
  423. FEAT_FIR_COEF_V,
  424. FEAT_ALPHA_FIXED_ZORDER,
  425. FEAT_FIFO_MERGE,
  426. FEAT_OMAP3_DSI_FIFO_BUG,
  427. FEAT_DPI_USES_VDDS_DSI,
  428. };
  429. static const enum dss_feat_id am35xx_dss_feat_list[] = {
  430. FEAT_LCDENABLEPOL,
  431. FEAT_LCDENABLESIGNAL,
  432. FEAT_PCKFREEENABLE,
  433. FEAT_FUNCGATED,
  434. FEAT_LINEBUFFERSPLIT,
  435. FEAT_ROWREPEATENABLE,
  436. FEAT_RESIZECONF,
  437. FEAT_DSI_PLL_FREQSEL,
  438. FEAT_DSI_REVERSE_TXCLKESC,
  439. FEAT_VENC_REQUIRES_TV_DAC_CLK,
  440. FEAT_CPR,
  441. FEAT_PRELOAD,
  442. FEAT_FIR_COEF_V,
  443. FEAT_ALPHA_FIXED_ZORDER,
  444. FEAT_FIFO_MERGE,
  445. FEAT_OMAP3_DSI_FIFO_BUG,
  446. };
  447. static const enum dss_feat_id omap3630_dss_feat_list[] = {
  448. FEAT_LCDENABLEPOL,
  449. FEAT_LCDENABLESIGNAL,
  450. FEAT_PCKFREEENABLE,
  451. FEAT_FUNCGATED,
  452. FEAT_LINEBUFFERSPLIT,
  453. FEAT_ROWREPEATENABLE,
  454. FEAT_RESIZECONF,
  455. FEAT_DSI_PLL_PWR_BUG,
  456. FEAT_DSI_PLL_FREQSEL,
  457. FEAT_CPR,
  458. FEAT_PRELOAD,
  459. FEAT_FIR_COEF_V,
  460. FEAT_ALPHA_FIXED_ZORDER,
  461. FEAT_FIFO_MERGE,
  462. FEAT_OMAP3_DSI_FIFO_BUG,
  463. FEAT_DPI_USES_VDDS_DSI,
  464. };
  465. static const enum dss_feat_id omap4430_es1_0_dss_feat_list[] = {
  466. FEAT_MGR_LCD2,
  467. FEAT_CORE_CLK_DIV,
  468. FEAT_LCD_CLK_SRC,
  469. FEAT_DSI_DCS_CMD_CONFIG_VC,
  470. FEAT_DSI_VC_OCP_WIDTH,
  471. FEAT_DSI_GNQ,
  472. FEAT_HANDLE_UV_SEPARATE,
  473. FEAT_ATTR2,
  474. FEAT_CPR,
  475. FEAT_PRELOAD,
  476. FEAT_FIR_COEF_V,
  477. FEAT_ALPHA_FREE_ZORDER,
  478. FEAT_FIFO_MERGE,
  479. FEAT_BURST_2D,
  480. };
  481. static const enum dss_feat_id omap4430_es2_0_1_2_dss_feat_list[] = {
  482. FEAT_MGR_LCD2,
  483. FEAT_CORE_CLK_DIV,
  484. FEAT_LCD_CLK_SRC,
  485. FEAT_DSI_DCS_CMD_CONFIG_VC,
  486. FEAT_DSI_VC_OCP_WIDTH,
  487. FEAT_DSI_GNQ,
  488. FEAT_HDMI_CTS_SWMODE,
  489. FEAT_HANDLE_UV_SEPARATE,
  490. FEAT_ATTR2,
  491. FEAT_CPR,
  492. FEAT_PRELOAD,
  493. FEAT_FIR_COEF_V,
  494. FEAT_ALPHA_FREE_ZORDER,
  495. FEAT_FIFO_MERGE,
  496. FEAT_BURST_2D,
  497. };
  498. static const enum dss_feat_id omap4_dss_feat_list[] = {
  499. FEAT_MGR_LCD2,
  500. FEAT_CORE_CLK_DIV,
  501. FEAT_LCD_CLK_SRC,
  502. FEAT_DSI_DCS_CMD_CONFIG_VC,
  503. FEAT_DSI_VC_OCP_WIDTH,
  504. FEAT_DSI_GNQ,
  505. FEAT_HDMI_CTS_SWMODE,
  506. FEAT_HDMI_AUDIO_USE_MCLK,
  507. FEAT_HANDLE_UV_SEPARATE,
  508. FEAT_ATTR2,
  509. FEAT_CPR,
  510. FEAT_PRELOAD,
  511. FEAT_FIR_COEF_V,
  512. FEAT_ALPHA_FREE_ZORDER,
  513. FEAT_FIFO_MERGE,
  514. FEAT_BURST_2D,
  515. };
  516. static const enum dss_feat_id omap5_dss_feat_list[] = {
  517. FEAT_MGR_LCD2,
  518. FEAT_CORE_CLK_DIV,
  519. FEAT_LCD_CLK_SRC,
  520. FEAT_DSI_DCS_CMD_CONFIG_VC,
  521. FEAT_DSI_VC_OCP_WIDTH,
  522. FEAT_DSI_GNQ,
  523. FEAT_HDMI_CTS_SWMODE,
  524. FEAT_HDMI_AUDIO_USE_MCLK,
  525. FEAT_HANDLE_UV_SEPARATE,
  526. FEAT_ATTR2,
  527. FEAT_CPR,
  528. FEAT_PRELOAD,
  529. FEAT_FIR_COEF_V,
  530. FEAT_ALPHA_FREE_ZORDER,
  531. FEAT_FIFO_MERGE,
  532. FEAT_BURST_2D,
  533. FEAT_DSI_PLL_SELFREQDCO,
  534. FEAT_DSI_PLL_REFSEL,
  535. FEAT_DSI_PHY_DCC,
  536. };
  537. /* OMAP2 DSS Features */
  538. static const struct omap_dss_features omap2_dss_features = {
  539. .reg_fields = omap2_dss_reg_fields,
  540. .num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields),
  541. .features = omap2_dss_feat_list,
  542. .num_features = ARRAY_SIZE(omap2_dss_feat_list),
  543. .num_mgrs = 2,
  544. .num_ovls = 3,
  545. .supported_displays = omap2_dss_supported_displays,
  546. .supported_outputs = omap2_dss_supported_outputs,
  547. .supported_color_modes = omap2_dss_supported_color_modes,
  548. .overlay_caps = omap2_dss_overlay_caps,
  549. .clksrc_names = omap2_dss_clk_source_names,
  550. .dss_params = omap2_dss_param_range,
  551. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
  552. .buffer_size_unit = 1,
  553. .burst_size_unit = 8,
  554. };
  555. /* OMAP3 DSS Features */
  556. static const struct omap_dss_features omap3430_dss_features = {
  557. .reg_fields = omap3_dss_reg_fields,
  558. .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
  559. .features = omap3430_dss_feat_list,
  560. .num_features = ARRAY_SIZE(omap3430_dss_feat_list),
  561. .num_mgrs = 2,
  562. .num_ovls = 3,
  563. .supported_displays = omap3430_dss_supported_displays,
  564. .supported_outputs = omap3430_dss_supported_outputs,
  565. .supported_color_modes = omap3_dss_supported_color_modes,
  566. .overlay_caps = omap3430_dss_overlay_caps,
  567. .clksrc_names = omap3_dss_clk_source_names,
  568. .dss_params = omap3_dss_param_range,
  569. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
  570. .buffer_size_unit = 1,
  571. .burst_size_unit = 8,
  572. };
  573. /*
  574. * AM35xx DSS Features. This is basically OMAP3 DSS Features without the
  575. * vdds_dsi regulator.
  576. */
  577. static const struct omap_dss_features am35xx_dss_features = {
  578. .reg_fields = omap3_dss_reg_fields,
  579. .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
  580. .features = am35xx_dss_feat_list,
  581. .num_features = ARRAY_SIZE(am35xx_dss_feat_list),
  582. .num_mgrs = 2,
  583. .num_ovls = 3,
  584. .supported_displays = omap3430_dss_supported_displays,
  585. .supported_outputs = omap3430_dss_supported_outputs,
  586. .supported_color_modes = omap3_dss_supported_color_modes,
  587. .overlay_caps = omap3430_dss_overlay_caps,
  588. .clksrc_names = omap3_dss_clk_source_names,
  589. .dss_params = omap3_dss_param_range,
  590. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
  591. .buffer_size_unit = 1,
  592. .burst_size_unit = 8,
  593. };
  594. static const struct omap_dss_features omap3630_dss_features = {
  595. .reg_fields = omap3_dss_reg_fields,
  596. .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
  597. .features = omap3630_dss_feat_list,
  598. .num_features = ARRAY_SIZE(omap3630_dss_feat_list),
  599. .num_mgrs = 2,
  600. .num_ovls = 3,
  601. .supported_displays = omap3630_dss_supported_displays,
  602. .supported_outputs = omap3630_dss_supported_outputs,
  603. .supported_color_modes = omap3_dss_supported_color_modes,
  604. .overlay_caps = omap3630_dss_overlay_caps,
  605. .clksrc_names = omap3_dss_clk_source_names,
  606. .dss_params = omap3_dss_param_range,
  607. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
  608. .buffer_size_unit = 1,
  609. .burst_size_unit = 8,
  610. };
  611. /* OMAP4 DSS Features */
  612. /* For OMAP4430 ES 1.0 revision */
  613. static const struct omap_dss_features omap4430_es1_0_dss_features = {
  614. .reg_fields = omap4_dss_reg_fields,
  615. .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
  616. .features = omap4430_es1_0_dss_feat_list,
  617. .num_features = ARRAY_SIZE(omap4430_es1_0_dss_feat_list),
  618. .num_mgrs = 3,
  619. .num_ovls = 4,
  620. .num_wbs = 1,
  621. .supported_displays = omap4_dss_supported_displays,
  622. .supported_outputs = omap4_dss_supported_outputs,
  623. .supported_color_modes = omap4_dss_supported_color_modes,
  624. .overlay_caps = omap4_dss_overlay_caps,
  625. .clksrc_names = omap4_dss_clk_source_names,
  626. .dss_params = omap4_dss_param_range,
  627. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
  628. .buffer_size_unit = 16,
  629. .burst_size_unit = 16,
  630. };
  631. /* For OMAP4430 ES 2.0, 2.1 and 2.2 revisions */
  632. static const struct omap_dss_features omap4430_es2_0_1_2_dss_features = {
  633. .reg_fields = omap4_dss_reg_fields,
  634. .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
  635. .features = omap4430_es2_0_1_2_dss_feat_list,
  636. .num_features = ARRAY_SIZE(omap4430_es2_0_1_2_dss_feat_list),
  637. .num_mgrs = 3,
  638. .num_ovls = 4,
  639. .num_wbs = 1,
  640. .supported_displays = omap4_dss_supported_displays,
  641. .supported_outputs = omap4_dss_supported_outputs,
  642. .supported_color_modes = omap4_dss_supported_color_modes,
  643. .overlay_caps = omap4_dss_overlay_caps,
  644. .clksrc_names = omap4_dss_clk_source_names,
  645. .dss_params = omap4_dss_param_range,
  646. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
  647. .buffer_size_unit = 16,
  648. .burst_size_unit = 16,
  649. };
  650. /* For all the other OMAP4 versions */
  651. static const struct omap_dss_features omap4_dss_features = {
  652. .reg_fields = omap4_dss_reg_fields,
  653. .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
  654. .features = omap4_dss_feat_list,
  655. .num_features = ARRAY_SIZE(omap4_dss_feat_list),
  656. .num_mgrs = 3,
  657. .num_ovls = 4,
  658. .num_wbs = 1,
  659. .supported_displays = omap4_dss_supported_displays,
  660. .supported_outputs = omap4_dss_supported_outputs,
  661. .supported_color_modes = omap4_dss_supported_color_modes,
  662. .overlay_caps = omap4_dss_overlay_caps,
  663. .clksrc_names = omap4_dss_clk_source_names,
  664. .dss_params = omap4_dss_param_range,
  665. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
  666. .buffer_size_unit = 16,
  667. .burst_size_unit = 16,
  668. };
  669. /* OMAP5 DSS Features */
  670. static const struct omap_dss_features omap5_dss_features = {
  671. .reg_fields = omap5_dss_reg_fields,
  672. .num_reg_fields = ARRAY_SIZE(omap5_dss_reg_fields),
  673. .features = omap5_dss_feat_list,
  674. .num_features = ARRAY_SIZE(omap5_dss_feat_list),
  675. .num_mgrs = 3,
  676. .num_ovls = 4,
  677. .supported_displays = omap5_dss_supported_displays,
  678. .supported_outputs = omap5_dss_supported_outputs,
  679. .supported_color_modes = omap4_dss_supported_color_modes,
  680. .overlay_caps = omap4_dss_overlay_caps,
  681. .clksrc_names = omap5_dss_clk_source_names,
  682. .dss_params = omap5_dss_param_range,
  683. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
  684. .buffer_size_unit = 16,
  685. .burst_size_unit = 16,
  686. };
  687. #if defined(CONFIG_OMAP4_DSS_HDMI)
  688. /* HDMI OMAP4 Functions*/
  689. static const struct ti_hdmi_ip_ops omap4_hdmi_functions = {
  690. .video_configure = ti_hdmi_4xxx_basic_configure,
  691. .phy_enable = ti_hdmi_4xxx_phy_enable,
  692. .phy_disable = ti_hdmi_4xxx_phy_disable,
  693. .read_edid = ti_hdmi_4xxx_read_edid,
  694. .detect = ti_hdmi_4xxx_detect,
  695. .pll_enable = ti_hdmi_4xxx_pll_enable,
  696. .pll_disable = ti_hdmi_4xxx_pll_disable,
  697. .video_enable = ti_hdmi_4xxx_wp_video_start,
  698. .video_disable = ti_hdmi_4xxx_wp_video_stop,
  699. .dump_wrapper = ti_hdmi_4xxx_wp_dump,
  700. .dump_core = ti_hdmi_4xxx_core_dump,
  701. .dump_pll = ti_hdmi_4xxx_pll_dump,
  702. .dump_phy = ti_hdmi_4xxx_phy_dump,
  703. #if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
  704. .audio_enable = ti_hdmi_4xxx_wp_audio_enable,
  705. .audio_disable = ti_hdmi_4xxx_wp_audio_disable,
  706. .audio_start = ti_hdmi_4xxx_audio_start,
  707. .audio_stop = ti_hdmi_4xxx_audio_stop,
  708. .audio_config = ti_hdmi_4xxx_audio_config,
  709. .audio_get_dma_port = ti_hdmi_4xxx_audio_get_dma_port,
  710. #endif
  711. };
  712. void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data,
  713. enum omapdss_version version)
  714. {
  715. switch (version) {
  716. case OMAPDSS_VER_OMAP4430_ES1:
  717. case OMAPDSS_VER_OMAP4430_ES2:
  718. case OMAPDSS_VER_OMAP4:
  719. ip_data->ops = &omap4_hdmi_functions;
  720. break;
  721. default:
  722. ip_data->ops = NULL;
  723. }
  724. WARN_ON(ip_data->ops == NULL);
  725. }
  726. #endif
  727. /* Functions returning values related to a DSS feature */
  728. int dss_feat_get_num_mgrs(void)
  729. {
  730. return omap_current_dss_features->num_mgrs;
  731. }
  732. EXPORT_SYMBOL(dss_feat_get_num_mgrs);
  733. int dss_feat_get_num_ovls(void)
  734. {
  735. return omap_current_dss_features->num_ovls;
  736. }
  737. EXPORT_SYMBOL(dss_feat_get_num_ovls);
  738. int dss_feat_get_num_wbs(void)
  739. {
  740. return omap_current_dss_features->num_wbs;
  741. }
  742. unsigned long dss_feat_get_param_min(enum dss_range_param param)
  743. {
  744. return omap_current_dss_features->dss_params[param].min;
  745. }
  746. unsigned long dss_feat_get_param_max(enum dss_range_param param)
  747. {
  748. return omap_current_dss_features->dss_params[param].max;
  749. }
  750. enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel)
  751. {
  752. return omap_current_dss_features->supported_displays[channel];
  753. }
  754. EXPORT_SYMBOL(dss_feat_get_supported_displays);
  755. enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel)
  756. {
  757. return omap_current_dss_features->supported_outputs[channel];
  758. }
  759. EXPORT_SYMBOL(dss_feat_get_supported_outputs);
  760. enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)
  761. {
  762. return omap_current_dss_features->supported_color_modes[plane];
  763. }
  764. EXPORT_SYMBOL(dss_feat_get_supported_color_modes);
  765. enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane)
  766. {
  767. return omap_current_dss_features->overlay_caps[plane];
  768. }
  769. bool dss_feat_color_mode_supported(enum omap_plane plane,
  770. enum omap_color_mode color_mode)
  771. {
  772. return omap_current_dss_features->supported_color_modes[plane] &
  773. color_mode;
  774. }
  775. const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id)
  776. {
  777. return omap_current_dss_features->clksrc_names[id];
  778. }
  779. u32 dss_feat_get_buffer_size_unit(void)
  780. {
  781. return omap_current_dss_features->buffer_size_unit;
  782. }
  783. u32 dss_feat_get_burst_size_unit(void)
  784. {
  785. return omap_current_dss_features->burst_size_unit;
  786. }
  787. /* DSS has_feature check */
  788. bool dss_has_feature(enum dss_feat_id id)
  789. {
  790. int i;
  791. const enum dss_feat_id *features = omap_current_dss_features->features;
  792. const int num_features = omap_current_dss_features->num_features;
  793. for (i = 0; i < num_features; i++) {
  794. if (features[i] == id)
  795. return true;
  796. }
  797. return false;
  798. }
  799. void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end)
  800. {
  801. if (id >= omap_current_dss_features->num_reg_fields)
  802. BUG();
  803. *start = omap_current_dss_features->reg_fields[id].start;
  804. *end = omap_current_dss_features->reg_fields[id].end;
  805. }
  806. bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type)
  807. {
  808. return omap_current_dss_features->supported_rotation_types & rot_type;
  809. }
  810. void dss_features_init(enum omapdss_version version)
  811. {
  812. switch (version) {
  813. case OMAPDSS_VER_OMAP24xx:
  814. omap_current_dss_features = &omap2_dss_features;
  815. break;
  816. case OMAPDSS_VER_OMAP34xx_ES1:
  817. case OMAPDSS_VER_OMAP34xx_ES3:
  818. omap_current_dss_features = &omap3430_dss_features;
  819. break;
  820. case OMAPDSS_VER_OMAP3630:
  821. omap_current_dss_features = &omap3630_dss_features;
  822. break;
  823. case OMAPDSS_VER_OMAP4430_ES1:
  824. omap_current_dss_features = &omap4430_es1_0_dss_features;
  825. break;
  826. case OMAPDSS_VER_OMAP4430_ES2:
  827. omap_current_dss_features = &omap4430_es2_0_1_2_dss_features;
  828. break;
  829. case OMAPDSS_VER_OMAP4:
  830. omap_current_dss_features = &omap4_dss_features;
  831. break;
  832. case OMAPDSS_VER_OMAP5:
  833. omap_current_dss_features = &omap5_dss_features;
  834. break;
  835. case OMAPDSS_VER_AM35xx:
  836. omap_current_dss_features = &am35xx_dss_features;
  837. break;
  838. default:
  839. DSSWARN("Unsupported OMAP version");
  840. break;
  841. }
  842. }