panel-tpo-td043mtea1.c 14 KB

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  1. /*
  2. * LCD panel driver for TPO TD043MTEA1
  3. *
  4. * Author: Gražvydas Ignotas <notasas@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/delay.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/regulator/consumer.h>
  15. #include <linux/gpio.h>
  16. #include <linux/err.h>
  17. #include <linux/slab.h>
  18. #include <video/omapdss.h>
  19. #define TPO_R02_MODE(x) ((x) & 7)
  20. #define TPO_R02_MODE_800x480 7
  21. #define TPO_R02_NCLK_RISING BIT(3)
  22. #define TPO_R02_HSYNC_HIGH BIT(4)
  23. #define TPO_R02_VSYNC_HIGH BIT(5)
  24. #define TPO_R03_NSTANDBY BIT(0)
  25. #define TPO_R03_EN_CP_CLK BIT(1)
  26. #define TPO_R03_EN_VGL_PUMP BIT(2)
  27. #define TPO_R03_EN_PWM BIT(3)
  28. #define TPO_R03_DRIVING_CAP_100 BIT(4)
  29. #define TPO_R03_EN_PRE_CHARGE BIT(6)
  30. #define TPO_R03_SOFTWARE_CTL BIT(7)
  31. #define TPO_R04_NFLIP_H BIT(0)
  32. #define TPO_R04_NFLIP_V BIT(1)
  33. #define TPO_R04_CP_CLK_FREQ_1H BIT(2)
  34. #define TPO_R04_VGL_FREQ_1H BIT(4)
  35. #define TPO_R03_VAL_NORMAL (TPO_R03_NSTANDBY | TPO_R03_EN_CP_CLK | \
  36. TPO_R03_EN_VGL_PUMP | TPO_R03_EN_PWM | \
  37. TPO_R03_DRIVING_CAP_100 | TPO_R03_EN_PRE_CHARGE | \
  38. TPO_R03_SOFTWARE_CTL)
  39. #define TPO_R03_VAL_STANDBY (TPO_R03_DRIVING_CAP_100 | \
  40. TPO_R03_EN_PRE_CHARGE | TPO_R03_SOFTWARE_CTL)
  41. static const u16 tpo_td043_def_gamma[12] = {
  42. 105, 315, 381, 431, 490, 537, 579, 686, 780, 837, 880, 1023
  43. };
  44. struct tpo_td043_device {
  45. struct spi_device *spi;
  46. struct regulator *vcc_reg;
  47. int nreset_gpio;
  48. u16 gamma[12];
  49. u32 mode;
  50. u32 hmirror:1;
  51. u32 vmirror:1;
  52. u32 powered_on:1;
  53. u32 spi_suspended:1;
  54. u32 power_on_resume:1;
  55. };
  56. /* used to pass spi_device from SPI to DSS portion of the driver */
  57. static struct tpo_td043_device *g_tpo_td043;
  58. static int tpo_td043_write(struct spi_device *spi, u8 addr, u8 data)
  59. {
  60. struct spi_message m;
  61. struct spi_transfer xfer;
  62. u16 w;
  63. int r;
  64. spi_message_init(&m);
  65. memset(&xfer, 0, sizeof(xfer));
  66. w = ((u16)addr << 10) | (1 << 8) | data;
  67. xfer.tx_buf = &w;
  68. xfer.bits_per_word = 16;
  69. xfer.len = 2;
  70. spi_message_add_tail(&xfer, &m);
  71. r = spi_sync(spi, &m);
  72. if (r < 0)
  73. dev_warn(&spi->dev, "failed to write to LCD reg (%d)\n", r);
  74. return r;
  75. }
  76. static void tpo_td043_write_gamma(struct spi_device *spi, u16 gamma[12])
  77. {
  78. u8 i, val;
  79. /* gamma bits [9:8] */
  80. for (val = i = 0; i < 4; i++)
  81. val |= (gamma[i] & 0x300) >> ((i + 1) * 2);
  82. tpo_td043_write(spi, 0x11, val);
  83. for (val = i = 0; i < 4; i++)
  84. val |= (gamma[i+4] & 0x300) >> ((i + 1) * 2);
  85. tpo_td043_write(spi, 0x12, val);
  86. for (val = i = 0; i < 4; i++)
  87. val |= (gamma[i+8] & 0x300) >> ((i + 1) * 2);
  88. tpo_td043_write(spi, 0x13, val);
  89. /* gamma bits [7:0] */
  90. for (val = i = 0; i < 12; i++)
  91. tpo_td043_write(spi, 0x14 + i, gamma[i] & 0xff);
  92. }
  93. static int tpo_td043_write_mirror(struct spi_device *spi, bool h, bool v)
  94. {
  95. u8 reg4 = TPO_R04_NFLIP_H | TPO_R04_NFLIP_V | \
  96. TPO_R04_CP_CLK_FREQ_1H | TPO_R04_VGL_FREQ_1H;
  97. if (h)
  98. reg4 &= ~TPO_R04_NFLIP_H;
  99. if (v)
  100. reg4 &= ~TPO_R04_NFLIP_V;
  101. return tpo_td043_write(spi, 4, reg4);
  102. }
  103. static int tpo_td043_set_hmirror(struct omap_dss_device *dssdev, bool enable)
  104. {
  105. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  106. tpo_td043->hmirror = enable;
  107. return tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
  108. tpo_td043->vmirror);
  109. }
  110. static bool tpo_td043_get_hmirror(struct omap_dss_device *dssdev)
  111. {
  112. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  113. return tpo_td043->hmirror;
  114. }
  115. static ssize_t tpo_td043_vmirror_show(struct device *dev,
  116. struct device_attribute *attr, char *buf)
  117. {
  118. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  119. return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->vmirror);
  120. }
  121. static ssize_t tpo_td043_vmirror_store(struct device *dev,
  122. struct device_attribute *attr, const char *buf, size_t count)
  123. {
  124. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  125. int val;
  126. int ret;
  127. ret = kstrtoint(buf, 0, &val);
  128. if (ret < 0)
  129. return ret;
  130. val = !!val;
  131. ret = tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror, val);
  132. if (ret < 0)
  133. return ret;
  134. tpo_td043->vmirror = val;
  135. return count;
  136. }
  137. static ssize_t tpo_td043_mode_show(struct device *dev,
  138. struct device_attribute *attr, char *buf)
  139. {
  140. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  141. return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->mode);
  142. }
  143. static ssize_t tpo_td043_mode_store(struct device *dev,
  144. struct device_attribute *attr, const char *buf, size_t count)
  145. {
  146. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  147. long val;
  148. int ret;
  149. ret = kstrtol(buf, 0, &val);
  150. if (ret != 0 || val & ~7)
  151. return -EINVAL;
  152. tpo_td043->mode = val;
  153. val |= TPO_R02_NCLK_RISING;
  154. tpo_td043_write(tpo_td043->spi, 2, val);
  155. return count;
  156. }
  157. static ssize_t tpo_td043_gamma_show(struct device *dev,
  158. struct device_attribute *attr, char *buf)
  159. {
  160. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  161. ssize_t len = 0;
  162. int ret;
  163. int i;
  164. for (i = 0; i < ARRAY_SIZE(tpo_td043->gamma); i++) {
  165. ret = snprintf(buf + len, PAGE_SIZE - len, "%u ",
  166. tpo_td043->gamma[i]);
  167. if (ret < 0)
  168. return ret;
  169. len += ret;
  170. }
  171. buf[len - 1] = '\n';
  172. return len;
  173. }
  174. static ssize_t tpo_td043_gamma_store(struct device *dev,
  175. struct device_attribute *attr, const char *buf, size_t count)
  176. {
  177. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  178. unsigned int g[12];
  179. int ret;
  180. int i;
  181. ret = sscanf(buf, "%u %u %u %u %u %u %u %u %u %u %u %u",
  182. &g[0], &g[1], &g[2], &g[3], &g[4], &g[5],
  183. &g[6], &g[7], &g[8], &g[9], &g[10], &g[11]);
  184. if (ret != 12)
  185. return -EINVAL;
  186. for (i = 0; i < 12; i++)
  187. tpo_td043->gamma[i] = g[i];
  188. tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
  189. return count;
  190. }
  191. static DEVICE_ATTR(vmirror, S_IRUGO | S_IWUSR,
  192. tpo_td043_vmirror_show, tpo_td043_vmirror_store);
  193. static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR,
  194. tpo_td043_mode_show, tpo_td043_mode_store);
  195. static DEVICE_ATTR(gamma, S_IRUGO | S_IWUSR,
  196. tpo_td043_gamma_show, tpo_td043_gamma_store);
  197. static struct attribute *tpo_td043_attrs[] = {
  198. &dev_attr_vmirror.attr,
  199. &dev_attr_mode.attr,
  200. &dev_attr_gamma.attr,
  201. NULL,
  202. };
  203. static struct attribute_group tpo_td043_attr_group = {
  204. .attrs = tpo_td043_attrs,
  205. };
  206. static const struct omap_video_timings tpo_td043_timings = {
  207. .x_res = 800,
  208. .y_res = 480,
  209. .pixel_clock = 36000,
  210. .hsw = 1,
  211. .hfp = 68,
  212. .hbp = 214,
  213. .vsw = 1,
  214. .vfp = 39,
  215. .vbp = 34,
  216. .vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
  217. .hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
  218. .data_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
  219. .de_level = OMAPDSS_SIG_ACTIVE_HIGH,
  220. .sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
  221. };
  222. static int tpo_td043_power_on(struct tpo_td043_device *tpo_td043)
  223. {
  224. int nreset_gpio = tpo_td043->nreset_gpio;
  225. int r;
  226. if (tpo_td043->powered_on)
  227. return 0;
  228. r = regulator_enable(tpo_td043->vcc_reg);
  229. if (r != 0)
  230. return r;
  231. /* wait for panel to stabilize */
  232. msleep(160);
  233. if (gpio_is_valid(nreset_gpio))
  234. gpio_set_value(nreset_gpio, 1);
  235. tpo_td043_write(tpo_td043->spi, 2,
  236. TPO_R02_MODE(tpo_td043->mode) | TPO_R02_NCLK_RISING);
  237. tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_NORMAL);
  238. tpo_td043_write(tpo_td043->spi, 0x20, 0xf0);
  239. tpo_td043_write(tpo_td043->spi, 0x21, 0xf0);
  240. tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
  241. tpo_td043->vmirror);
  242. tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
  243. tpo_td043->powered_on = 1;
  244. return 0;
  245. }
  246. static void tpo_td043_power_off(struct tpo_td043_device *tpo_td043)
  247. {
  248. int nreset_gpio = tpo_td043->nreset_gpio;
  249. if (!tpo_td043->powered_on)
  250. return;
  251. tpo_td043_write(tpo_td043->spi, 3,
  252. TPO_R03_VAL_STANDBY | TPO_R03_EN_PWM);
  253. if (gpio_is_valid(nreset_gpio))
  254. gpio_set_value(nreset_gpio, 0);
  255. /* wait for at least 2 vsyncs before cutting off power */
  256. msleep(50);
  257. tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_STANDBY);
  258. regulator_disable(tpo_td043->vcc_reg);
  259. tpo_td043->powered_on = 0;
  260. }
  261. static int tpo_td043_enable_dss(struct omap_dss_device *dssdev)
  262. {
  263. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  264. int r;
  265. if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
  266. return 0;
  267. omapdss_dpi_set_timings(dssdev, &dssdev->panel.timings);
  268. omapdss_dpi_set_data_lines(dssdev, dssdev->phy.dpi.data_lines);
  269. r = omapdss_dpi_display_enable(dssdev);
  270. if (r)
  271. goto err0;
  272. if (dssdev->platform_enable) {
  273. r = dssdev->platform_enable(dssdev);
  274. if (r)
  275. goto err1;
  276. }
  277. /*
  278. * If we are resuming from system suspend, SPI clocks might not be
  279. * enabled yet, so we'll program the LCD from SPI PM resume callback.
  280. */
  281. if (!tpo_td043->spi_suspended) {
  282. r = tpo_td043_power_on(tpo_td043);
  283. if (r)
  284. goto err1;
  285. }
  286. dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
  287. return 0;
  288. err1:
  289. omapdss_dpi_display_disable(dssdev);
  290. err0:
  291. return r;
  292. }
  293. static void tpo_td043_disable_dss(struct omap_dss_device *dssdev)
  294. {
  295. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  296. if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  297. return;
  298. if (dssdev->platform_disable)
  299. dssdev->platform_disable(dssdev);
  300. omapdss_dpi_display_disable(dssdev);
  301. if (!tpo_td043->spi_suspended)
  302. tpo_td043_power_off(tpo_td043);
  303. }
  304. static int tpo_td043_enable(struct omap_dss_device *dssdev)
  305. {
  306. dev_dbg(&dssdev->dev, "enable\n");
  307. return tpo_td043_enable_dss(dssdev);
  308. }
  309. static void tpo_td043_disable(struct omap_dss_device *dssdev)
  310. {
  311. dev_dbg(&dssdev->dev, "disable\n");
  312. tpo_td043_disable_dss(dssdev);
  313. dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
  314. }
  315. static int tpo_td043_probe(struct omap_dss_device *dssdev)
  316. {
  317. struct tpo_td043_device *tpo_td043 = g_tpo_td043;
  318. int nreset_gpio = dssdev->reset_gpio;
  319. int ret = 0;
  320. dev_dbg(&dssdev->dev, "probe\n");
  321. if (tpo_td043 == NULL) {
  322. dev_err(&dssdev->dev, "missing tpo_td043_device\n");
  323. return -ENODEV;
  324. }
  325. dssdev->panel.timings = tpo_td043_timings;
  326. dssdev->ctrl.pixel_size = 24;
  327. tpo_td043->mode = TPO_R02_MODE_800x480;
  328. memcpy(tpo_td043->gamma, tpo_td043_def_gamma, sizeof(tpo_td043->gamma));
  329. tpo_td043->vcc_reg = regulator_get(&dssdev->dev, "vcc");
  330. if (IS_ERR(tpo_td043->vcc_reg)) {
  331. dev_err(&dssdev->dev, "failed to get LCD VCC regulator\n");
  332. ret = PTR_ERR(tpo_td043->vcc_reg);
  333. goto fail_regulator;
  334. }
  335. if (gpio_is_valid(nreset_gpio)) {
  336. ret = gpio_request_one(nreset_gpio, GPIOF_OUT_INIT_LOW,
  337. "lcd reset");
  338. if (ret < 0) {
  339. dev_err(&dssdev->dev, "couldn't request reset GPIO\n");
  340. goto fail_gpio_req;
  341. }
  342. }
  343. ret = sysfs_create_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
  344. if (ret)
  345. dev_warn(&dssdev->dev, "failed to create sysfs files\n");
  346. dev_set_drvdata(&dssdev->dev, tpo_td043);
  347. return 0;
  348. fail_gpio_req:
  349. regulator_put(tpo_td043->vcc_reg);
  350. fail_regulator:
  351. kfree(tpo_td043);
  352. return ret;
  353. }
  354. static void tpo_td043_remove(struct omap_dss_device *dssdev)
  355. {
  356. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  357. int nreset_gpio = dssdev->reset_gpio;
  358. dev_dbg(&dssdev->dev, "remove\n");
  359. sysfs_remove_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
  360. regulator_put(tpo_td043->vcc_reg);
  361. if (gpio_is_valid(nreset_gpio))
  362. gpio_free(nreset_gpio);
  363. }
  364. static void tpo_td043_set_timings(struct omap_dss_device *dssdev,
  365. struct omap_video_timings *timings)
  366. {
  367. omapdss_dpi_set_timings(dssdev, timings);
  368. dssdev->panel.timings = *timings;
  369. }
  370. static int tpo_td043_check_timings(struct omap_dss_device *dssdev,
  371. struct omap_video_timings *timings)
  372. {
  373. return dpi_check_timings(dssdev, timings);
  374. }
  375. static struct omap_dss_driver tpo_td043_driver = {
  376. .probe = tpo_td043_probe,
  377. .remove = tpo_td043_remove,
  378. .enable = tpo_td043_enable,
  379. .disable = tpo_td043_disable,
  380. .set_mirror = tpo_td043_set_hmirror,
  381. .get_mirror = tpo_td043_get_hmirror,
  382. .set_timings = tpo_td043_set_timings,
  383. .check_timings = tpo_td043_check_timings,
  384. .driver = {
  385. .name = "tpo_td043mtea1_panel",
  386. .owner = THIS_MODULE,
  387. },
  388. };
  389. static int tpo_td043_spi_probe(struct spi_device *spi)
  390. {
  391. struct omap_dss_device *dssdev = spi->dev.platform_data;
  392. struct tpo_td043_device *tpo_td043;
  393. int ret;
  394. if (dssdev == NULL) {
  395. dev_err(&spi->dev, "missing dssdev\n");
  396. return -ENODEV;
  397. }
  398. if (g_tpo_td043 != NULL)
  399. return -EBUSY;
  400. spi->bits_per_word = 16;
  401. spi->mode = SPI_MODE_0;
  402. ret = spi_setup(spi);
  403. if (ret < 0) {
  404. dev_err(&spi->dev, "spi_setup failed: %d\n", ret);
  405. return ret;
  406. }
  407. tpo_td043 = kzalloc(sizeof(*tpo_td043), GFP_KERNEL);
  408. if (tpo_td043 == NULL)
  409. return -ENOMEM;
  410. tpo_td043->spi = spi;
  411. tpo_td043->nreset_gpio = dssdev->reset_gpio;
  412. dev_set_drvdata(&spi->dev, tpo_td043);
  413. g_tpo_td043 = tpo_td043;
  414. omap_dss_register_driver(&tpo_td043_driver);
  415. return 0;
  416. }
  417. static int tpo_td043_spi_remove(struct spi_device *spi)
  418. {
  419. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&spi->dev);
  420. omap_dss_unregister_driver(&tpo_td043_driver);
  421. kfree(tpo_td043);
  422. g_tpo_td043 = NULL;
  423. return 0;
  424. }
  425. #ifdef CONFIG_PM_SLEEP
  426. static int tpo_td043_spi_suspend(struct device *dev)
  427. {
  428. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  429. dev_dbg(dev, "tpo_td043_spi_suspend, tpo %p\n", tpo_td043);
  430. tpo_td043->power_on_resume = tpo_td043->powered_on;
  431. tpo_td043_power_off(tpo_td043);
  432. tpo_td043->spi_suspended = 1;
  433. return 0;
  434. }
  435. static int tpo_td043_spi_resume(struct device *dev)
  436. {
  437. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  438. int ret;
  439. dev_dbg(dev, "tpo_td043_spi_resume\n");
  440. if (tpo_td043->power_on_resume) {
  441. ret = tpo_td043_power_on(tpo_td043);
  442. if (ret)
  443. return ret;
  444. }
  445. tpo_td043->spi_suspended = 0;
  446. return 0;
  447. }
  448. #endif
  449. static SIMPLE_DEV_PM_OPS(tpo_td043_spi_pm,
  450. tpo_td043_spi_suspend, tpo_td043_spi_resume);
  451. static struct spi_driver tpo_td043_spi_driver = {
  452. .driver = {
  453. .name = "tpo_td043mtea1_panel_spi",
  454. .owner = THIS_MODULE,
  455. .pm = &tpo_td043_spi_pm,
  456. },
  457. .probe = tpo_td043_spi_probe,
  458. .remove = tpo_td043_spi_remove,
  459. };
  460. module_spi_driver(tpo_td043_spi_driver);
  461. MODULE_AUTHOR("Gražvydas Ignotas <notasas@gmail.com>");
  462. MODULE_DESCRIPTION("TPO TD043MTEA1 LCD Driver");
  463. MODULE_LICENSE("GPL");