panel-n8x0.c 15 KB

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  1. /* #define DEBUG */
  2. #include <linux/module.h>
  3. #include <linux/delay.h>
  4. #include <linux/slab.h>
  5. #include <linux/gpio.h>
  6. #include <linux/spi/spi.h>
  7. #include <linux/backlight.h>
  8. #include <linux/fb.h>
  9. #include <video/omapdss.h>
  10. #include <video/omap-panel-n8x0.h>
  11. #define BLIZZARD_REV_CODE 0x00
  12. #define BLIZZARD_CONFIG 0x02
  13. #define BLIZZARD_PLL_DIV 0x04
  14. #define BLIZZARD_PLL_LOCK_RANGE 0x06
  15. #define BLIZZARD_PLL_CLOCK_SYNTH_0 0x08
  16. #define BLIZZARD_PLL_CLOCK_SYNTH_1 0x0a
  17. #define BLIZZARD_PLL_MODE 0x0c
  18. #define BLIZZARD_CLK_SRC 0x0e
  19. #define BLIZZARD_MEM_BANK0_ACTIVATE 0x10
  20. #define BLIZZARD_MEM_BANK0_STATUS 0x14
  21. #define BLIZZARD_PANEL_CONFIGURATION 0x28
  22. #define BLIZZARD_HDISP 0x2a
  23. #define BLIZZARD_HNDP 0x2c
  24. #define BLIZZARD_VDISP0 0x2e
  25. #define BLIZZARD_VDISP1 0x30
  26. #define BLIZZARD_VNDP 0x32
  27. #define BLIZZARD_HSW 0x34
  28. #define BLIZZARD_VSW 0x38
  29. #define BLIZZARD_DISPLAY_MODE 0x68
  30. #define BLIZZARD_INPUT_WIN_X_START_0 0x6c
  31. #define BLIZZARD_DATA_SOURCE_SELECT 0x8e
  32. #define BLIZZARD_DISP_MEM_DATA_PORT 0x90
  33. #define BLIZZARD_DISP_MEM_READ_ADDR0 0x92
  34. #define BLIZZARD_POWER_SAVE 0xE6
  35. #define BLIZZARD_NDISP_CTRL_STATUS 0xE8
  36. /* Data source select */
  37. /* For S1D13745 */
  38. #define BLIZZARD_SRC_WRITE_LCD_BACKGROUND 0x00
  39. #define BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE 0x01
  40. #define BLIZZARD_SRC_WRITE_OVERLAY_ENABLE 0x04
  41. #define BLIZZARD_SRC_DISABLE_OVERLAY 0x05
  42. /* For S1D13744 */
  43. #define BLIZZARD_SRC_WRITE_LCD 0x00
  44. #define BLIZZARD_SRC_BLT_LCD 0x06
  45. #define BLIZZARD_COLOR_RGB565 0x01
  46. #define BLIZZARD_COLOR_YUV420 0x09
  47. #define BLIZZARD_VERSION_S1D13745 0x01 /* Hailstorm */
  48. #define BLIZZARD_VERSION_S1D13744 0x02 /* Blizzard */
  49. #define MIPID_CMD_READ_DISP_ID 0x04
  50. #define MIPID_CMD_READ_RED 0x06
  51. #define MIPID_CMD_READ_GREEN 0x07
  52. #define MIPID_CMD_READ_BLUE 0x08
  53. #define MIPID_CMD_READ_DISP_STATUS 0x09
  54. #define MIPID_CMD_RDDSDR 0x0F
  55. #define MIPID_CMD_SLEEP_IN 0x10
  56. #define MIPID_CMD_SLEEP_OUT 0x11
  57. #define MIPID_CMD_DISP_OFF 0x28
  58. #define MIPID_CMD_DISP_ON 0x29
  59. static struct panel_drv_data {
  60. struct mutex lock;
  61. struct omap_dss_device *dssdev;
  62. struct spi_device *spidev;
  63. struct backlight_device *bldev;
  64. int blizzard_ver;
  65. } s_drv_data;
  66. static inline
  67. struct panel_n8x0_data *get_board_data(const struct omap_dss_device *dssdev)
  68. {
  69. return dssdev->data;
  70. }
  71. static inline
  72. struct panel_drv_data *get_drv_data(const struct omap_dss_device *dssdev)
  73. {
  74. return &s_drv_data;
  75. }
  76. static inline void blizzard_cmd(u8 cmd)
  77. {
  78. omap_rfbi_write_command(&cmd, 1);
  79. }
  80. static inline void blizzard_write(u8 cmd, const u8 *buf, int len)
  81. {
  82. omap_rfbi_write_command(&cmd, 1);
  83. omap_rfbi_write_data(buf, len);
  84. }
  85. static inline void blizzard_read(u8 cmd, u8 *buf, int len)
  86. {
  87. omap_rfbi_write_command(&cmd, 1);
  88. omap_rfbi_read_data(buf, len);
  89. }
  90. static u8 blizzard_read_reg(u8 cmd)
  91. {
  92. u8 data;
  93. blizzard_read(cmd, &data, 1);
  94. return data;
  95. }
  96. static void blizzard_ctrl_setup_update(struct omap_dss_device *dssdev,
  97. int x, int y, int w, int h)
  98. {
  99. struct panel_drv_data *ddata = get_drv_data(dssdev);
  100. u8 tmp[18];
  101. int x_end, y_end;
  102. x_end = x + w - 1;
  103. y_end = y + h - 1;
  104. tmp[0] = x;
  105. tmp[1] = x >> 8;
  106. tmp[2] = y;
  107. tmp[3] = y >> 8;
  108. tmp[4] = x_end;
  109. tmp[5] = x_end >> 8;
  110. tmp[6] = y_end;
  111. tmp[7] = y_end >> 8;
  112. /* scaling? */
  113. tmp[8] = x;
  114. tmp[9] = x >> 8;
  115. tmp[10] = y;
  116. tmp[11] = y >> 8;
  117. tmp[12] = x_end;
  118. tmp[13] = x_end >> 8;
  119. tmp[14] = y_end;
  120. tmp[15] = y_end >> 8;
  121. tmp[16] = BLIZZARD_COLOR_RGB565;
  122. if (ddata->blizzard_ver == BLIZZARD_VERSION_S1D13745)
  123. tmp[17] = BLIZZARD_SRC_WRITE_LCD_BACKGROUND;
  124. else
  125. tmp[17] = ddata->blizzard_ver == BLIZZARD_VERSION_S1D13744 ?
  126. BLIZZARD_SRC_WRITE_LCD :
  127. BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE;
  128. omapdss_rfbi_set_pixel_size(dssdev, 16);
  129. omapdss_rfbi_set_data_lines(dssdev, 8);
  130. omap_rfbi_configure(dssdev);
  131. blizzard_write(BLIZZARD_INPUT_WIN_X_START_0, tmp, 18);
  132. omapdss_rfbi_set_pixel_size(dssdev, 16);
  133. omapdss_rfbi_set_data_lines(dssdev, 16);
  134. omap_rfbi_configure(dssdev);
  135. }
  136. static void mipid_transfer(struct spi_device *spi, int cmd, const u8 *wbuf,
  137. int wlen, u8 *rbuf, int rlen)
  138. {
  139. struct spi_message m;
  140. struct spi_transfer *x, xfer[4];
  141. u16 w;
  142. int r;
  143. spi_message_init(&m);
  144. memset(xfer, 0, sizeof(xfer));
  145. x = &xfer[0];
  146. cmd &= 0xff;
  147. x->tx_buf = &cmd;
  148. x->bits_per_word = 9;
  149. x->len = 2;
  150. spi_message_add_tail(x, &m);
  151. if (wlen) {
  152. x++;
  153. x->tx_buf = wbuf;
  154. x->len = wlen;
  155. x->bits_per_word = 9;
  156. spi_message_add_tail(x, &m);
  157. }
  158. if (rlen) {
  159. x++;
  160. x->rx_buf = &w;
  161. x->len = 1;
  162. spi_message_add_tail(x, &m);
  163. if (rlen > 1) {
  164. /* Arrange for the extra clock before the first
  165. * data bit.
  166. */
  167. x->bits_per_word = 9;
  168. x->len = 2;
  169. x++;
  170. x->rx_buf = &rbuf[1];
  171. x->len = rlen - 1;
  172. spi_message_add_tail(x, &m);
  173. }
  174. }
  175. r = spi_sync(spi, &m);
  176. if (r < 0)
  177. dev_dbg(&spi->dev, "spi_sync %d\n", r);
  178. if (rlen)
  179. rbuf[0] = w & 0xff;
  180. }
  181. static inline void mipid_cmd(struct spi_device *spi, int cmd)
  182. {
  183. mipid_transfer(spi, cmd, NULL, 0, NULL, 0);
  184. }
  185. static inline void mipid_write(struct spi_device *spi,
  186. int reg, const u8 *buf, int len)
  187. {
  188. mipid_transfer(spi, reg, buf, len, NULL, 0);
  189. }
  190. static inline void mipid_read(struct spi_device *spi,
  191. int reg, u8 *buf, int len)
  192. {
  193. mipid_transfer(spi, reg, NULL, 0, buf, len);
  194. }
  195. static void set_data_lines(struct spi_device *spi, int data_lines)
  196. {
  197. u16 par;
  198. switch (data_lines) {
  199. case 16:
  200. par = 0x150;
  201. break;
  202. case 18:
  203. par = 0x160;
  204. break;
  205. case 24:
  206. par = 0x170;
  207. break;
  208. }
  209. mipid_write(spi, 0x3a, (u8 *)&par, 2);
  210. }
  211. static void send_init_string(struct spi_device *spi)
  212. {
  213. u16 initpar[] = { 0x0102, 0x0100, 0x0100 };
  214. mipid_write(spi, 0xc2, (u8 *)initpar, sizeof(initpar));
  215. }
  216. static void send_display_on(struct spi_device *spi)
  217. {
  218. mipid_cmd(spi, MIPID_CMD_DISP_ON);
  219. }
  220. static void send_display_off(struct spi_device *spi)
  221. {
  222. mipid_cmd(spi, MIPID_CMD_DISP_OFF);
  223. }
  224. static void send_sleep_out(struct spi_device *spi)
  225. {
  226. mipid_cmd(spi, MIPID_CMD_SLEEP_OUT);
  227. msleep(120);
  228. }
  229. static void send_sleep_in(struct spi_device *spi)
  230. {
  231. mipid_cmd(spi, MIPID_CMD_SLEEP_IN);
  232. msleep(50);
  233. }
  234. static int n8x0_panel_power_on(struct omap_dss_device *dssdev)
  235. {
  236. int r;
  237. struct panel_n8x0_data *bdata = get_board_data(dssdev);
  238. struct panel_drv_data *ddata = get_drv_data(dssdev);
  239. struct spi_device *spi = ddata->spidev;
  240. u8 rev, conf;
  241. u8 display_id[3];
  242. const char *panel_name;
  243. if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
  244. return 0;
  245. gpio_direction_output(bdata->ctrl_pwrdown, 1);
  246. if (bdata->platform_enable) {
  247. r = bdata->platform_enable(dssdev);
  248. if (r)
  249. goto err_plat_en;
  250. }
  251. omapdss_rfbi_set_size(dssdev, dssdev->panel.timings.x_res,
  252. dssdev->panel.timings.y_res);
  253. omapdss_rfbi_set_pixel_size(dssdev, dssdev->ctrl.pixel_size);
  254. omapdss_rfbi_set_data_lines(dssdev, dssdev->phy.rfbi.data_lines);
  255. omapdss_rfbi_set_interface_timings(dssdev, &dssdev->ctrl.rfbi_timings);
  256. r = omapdss_rfbi_display_enable(dssdev);
  257. if (r)
  258. goto err_rfbi_en;
  259. rev = blizzard_read_reg(BLIZZARD_REV_CODE);
  260. conf = blizzard_read_reg(BLIZZARD_CONFIG);
  261. switch (rev & 0xfc) {
  262. case 0x9c:
  263. ddata->blizzard_ver = BLIZZARD_VERSION_S1D13744;
  264. dev_info(&dssdev->dev, "s1d13744 LCD controller rev %d "
  265. "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
  266. break;
  267. case 0xa4:
  268. ddata->blizzard_ver = BLIZZARD_VERSION_S1D13745;
  269. dev_info(&dssdev->dev, "s1d13745 LCD controller rev %d "
  270. "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
  271. break;
  272. default:
  273. dev_err(&dssdev->dev, "invalid s1d1374x revision %02x\n", rev);
  274. r = -ENODEV;
  275. goto err_inv_chip;
  276. }
  277. /* panel */
  278. gpio_direction_output(bdata->panel_reset, 1);
  279. mipid_read(spi, MIPID_CMD_READ_DISP_ID, display_id, 3);
  280. dev_dbg(&spi->dev, "MIPI display ID: %02x%02x%02x\n",
  281. display_id[0], display_id[1], display_id[2]);
  282. switch (display_id[0]) {
  283. case 0x45:
  284. panel_name = "lph8923";
  285. break;
  286. case 0x83:
  287. panel_name = "ls041y3";
  288. break;
  289. default:
  290. dev_err(&dssdev->dev, "invalid display ID 0x%x\n",
  291. display_id[0]);
  292. r = -ENODEV;
  293. goto err_inv_panel;
  294. }
  295. dev_info(&dssdev->dev, "%s rev %02x LCD detected\n",
  296. panel_name, display_id[1]);
  297. send_sleep_out(spi);
  298. send_init_string(spi);
  299. set_data_lines(spi, 24);
  300. send_display_on(spi);
  301. return 0;
  302. err_inv_panel:
  303. /*
  304. * HACK: we should turn off the panel here, but there is some problem
  305. * with the initialization sequence, and we fail to init the panel if we
  306. * have turned it off
  307. */
  308. /* gpio_direction_output(bdata->panel_reset, 0); */
  309. err_inv_chip:
  310. omapdss_rfbi_display_disable(dssdev);
  311. err_rfbi_en:
  312. if (bdata->platform_disable)
  313. bdata->platform_disable(dssdev);
  314. err_plat_en:
  315. gpio_direction_output(bdata->ctrl_pwrdown, 0);
  316. return r;
  317. }
  318. static void n8x0_panel_power_off(struct omap_dss_device *dssdev)
  319. {
  320. struct panel_n8x0_data *bdata = get_board_data(dssdev);
  321. struct panel_drv_data *ddata = get_drv_data(dssdev);
  322. struct spi_device *spi = ddata->spidev;
  323. if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  324. return;
  325. send_display_off(spi);
  326. send_sleep_in(spi);
  327. if (bdata->platform_disable)
  328. bdata->platform_disable(dssdev);
  329. /*
  330. * HACK: we should turn off the panel here, but there is some problem
  331. * with the initialization sequence, and we fail to init the panel if we
  332. * have turned it off
  333. */
  334. /* gpio_direction_output(bdata->panel_reset, 0); */
  335. gpio_direction_output(bdata->ctrl_pwrdown, 0);
  336. omapdss_rfbi_display_disable(dssdev);
  337. }
  338. static const struct rfbi_timings n8x0_panel_timings = {
  339. .cs_on_time = 0,
  340. .we_on_time = 9000,
  341. .we_off_time = 18000,
  342. .we_cycle_time = 36000,
  343. .re_on_time = 9000,
  344. .re_off_time = 27000,
  345. .re_cycle_time = 36000,
  346. .access_time = 27000,
  347. .cs_off_time = 36000,
  348. .cs_pulse_width = 0,
  349. };
  350. static int n8x0_bl_update_status(struct backlight_device *dev)
  351. {
  352. struct omap_dss_device *dssdev = dev_get_drvdata(&dev->dev);
  353. struct panel_n8x0_data *bdata = get_board_data(dssdev);
  354. struct panel_drv_data *ddata = get_drv_data(dssdev);
  355. int r;
  356. int level;
  357. mutex_lock(&ddata->lock);
  358. if (dev->props.fb_blank == FB_BLANK_UNBLANK &&
  359. dev->props.power == FB_BLANK_UNBLANK)
  360. level = dev->props.brightness;
  361. else
  362. level = 0;
  363. dev_dbg(&dssdev->dev, "update brightness to %d\n", level);
  364. if (!bdata->set_backlight)
  365. r = -EINVAL;
  366. else
  367. r = bdata->set_backlight(dssdev, level);
  368. mutex_unlock(&ddata->lock);
  369. return r;
  370. }
  371. static int n8x0_bl_get_intensity(struct backlight_device *dev)
  372. {
  373. if (dev->props.fb_blank == FB_BLANK_UNBLANK &&
  374. dev->props.power == FB_BLANK_UNBLANK)
  375. return dev->props.brightness;
  376. return 0;
  377. }
  378. static const struct backlight_ops n8x0_bl_ops = {
  379. .get_brightness = n8x0_bl_get_intensity,
  380. .update_status = n8x0_bl_update_status,
  381. };
  382. static int n8x0_panel_probe(struct omap_dss_device *dssdev)
  383. {
  384. struct panel_n8x0_data *bdata = get_board_data(dssdev);
  385. struct panel_drv_data *ddata;
  386. struct backlight_device *bldev;
  387. struct backlight_properties props;
  388. int r;
  389. dev_dbg(&dssdev->dev, "probe\n");
  390. if (!bdata)
  391. return -EINVAL;
  392. s_drv_data.dssdev = dssdev;
  393. ddata = &s_drv_data;
  394. mutex_init(&ddata->lock);
  395. dssdev->panel.timings.x_res = 800;
  396. dssdev->panel.timings.y_res = 480;
  397. dssdev->ctrl.pixel_size = 16;
  398. dssdev->ctrl.rfbi_timings = n8x0_panel_timings;
  399. dssdev->caps = OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  400. memset(&props, 0, sizeof(props));
  401. props.max_brightness = 127;
  402. props.type = BACKLIGHT_PLATFORM;
  403. bldev = backlight_device_register(dev_name(&dssdev->dev), &dssdev->dev,
  404. dssdev, &n8x0_bl_ops, &props);
  405. if (IS_ERR(bldev)) {
  406. r = PTR_ERR(bldev);
  407. dev_err(&dssdev->dev, "register backlight failed\n");
  408. return r;
  409. }
  410. ddata->bldev = bldev;
  411. bldev->props.fb_blank = FB_BLANK_UNBLANK;
  412. bldev->props.power = FB_BLANK_UNBLANK;
  413. bldev->props.brightness = 127;
  414. n8x0_bl_update_status(bldev);
  415. return 0;
  416. }
  417. static void n8x0_panel_remove(struct omap_dss_device *dssdev)
  418. {
  419. struct panel_drv_data *ddata = get_drv_data(dssdev);
  420. struct backlight_device *bldev;
  421. dev_dbg(&dssdev->dev, "remove\n");
  422. bldev = ddata->bldev;
  423. bldev->props.power = FB_BLANK_POWERDOWN;
  424. n8x0_bl_update_status(bldev);
  425. backlight_device_unregister(bldev);
  426. dev_set_drvdata(&dssdev->dev, NULL);
  427. }
  428. static int n8x0_panel_enable(struct omap_dss_device *dssdev)
  429. {
  430. struct panel_drv_data *ddata = get_drv_data(dssdev);
  431. int r;
  432. dev_dbg(&dssdev->dev, "enable\n");
  433. mutex_lock(&ddata->lock);
  434. rfbi_bus_lock();
  435. r = n8x0_panel_power_on(dssdev);
  436. rfbi_bus_unlock();
  437. if (r) {
  438. mutex_unlock(&ddata->lock);
  439. return r;
  440. }
  441. dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
  442. mutex_unlock(&ddata->lock);
  443. return 0;
  444. }
  445. static void n8x0_panel_disable(struct omap_dss_device *dssdev)
  446. {
  447. struct panel_drv_data *ddata = get_drv_data(dssdev);
  448. dev_dbg(&dssdev->dev, "disable\n");
  449. mutex_lock(&ddata->lock);
  450. rfbi_bus_lock();
  451. n8x0_panel_power_off(dssdev);
  452. rfbi_bus_unlock();
  453. dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
  454. mutex_unlock(&ddata->lock);
  455. }
  456. static void n8x0_panel_get_resolution(struct omap_dss_device *dssdev,
  457. u16 *xres, u16 *yres)
  458. {
  459. *xres = dssdev->panel.timings.x_res;
  460. *yres = dssdev->panel.timings.y_res;
  461. }
  462. static void update_done(void *data)
  463. {
  464. rfbi_bus_unlock();
  465. }
  466. static int n8x0_panel_update(struct omap_dss_device *dssdev,
  467. u16 x, u16 y, u16 w, u16 h)
  468. {
  469. struct panel_drv_data *ddata = get_drv_data(dssdev);
  470. u16 dw, dh;
  471. dev_dbg(&dssdev->dev, "update\n");
  472. dw = dssdev->panel.timings.x_res;
  473. dh = dssdev->panel.timings.y_res;
  474. if (x != 0 || y != 0 || w != dw || h != dh) {
  475. dev_err(&dssdev->dev, "invaid update region %d, %d, %d, %d\n",
  476. x, y, w, h);
  477. return -EINVAL;
  478. }
  479. mutex_lock(&ddata->lock);
  480. rfbi_bus_lock();
  481. blizzard_ctrl_setup_update(dssdev, x, y, w, h);
  482. omap_rfbi_update(dssdev, update_done, NULL);
  483. mutex_unlock(&ddata->lock);
  484. return 0;
  485. }
  486. static int n8x0_panel_sync(struct omap_dss_device *dssdev)
  487. {
  488. struct panel_drv_data *ddata = get_drv_data(dssdev);
  489. dev_dbg(&dssdev->dev, "sync\n");
  490. mutex_lock(&ddata->lock);
  491. rfbi_bus_lock();
  492. rfbi_bus_unlock();
  493. mutex_unlock(&ddata->lock);
  494. return 0;
  495. }
  496. static struct omap_dss_driver n8x0_panel_driver = {
  497. .probe = n8x0_panel_probe,
  498. .remove = n8x0_panel_remove,
  499. .enable = n8x0_panel_enable,
  500. .disable = n8x0_panel_disable,
  501. .update = n8x0_panel_update,
  502. .sync = n8x0_panel_sync,
  503. .get_resolution = n8x0_panel_get_resolution,
  504. .get_recommended_bpp = omapdss_default_get_recommended_bpp,
  505. .driver = {
  506. .name = "n8x0_panel",
  507. .owner = THIS_MODULE,
  508. },
  509. };
  510. /* PANEL */
  511. static int mipid_spi_probe(struct spi_device *spi)
  512. {
  513. int r;
  514. dev_dbg(&spi->dev, "mipid_spi_probe\n");
  515. spi->mode = SPI_MODE_0;
  516. s_drv_data.spidev = spi;
  517. r = omap_dss_register_driver(&n8x0_panel_driver);
  518. if (r)
  519. pr_err("n8x0_panel: dss driver registration failed\n");
  520. return r;
  521. }
  522. static int mipid_spi_remove(struct spi_device *spi)
  523. {
  524. dev_dbg(&spi->dev, "mipid_spi_remove\n");
  525. omap_dss_unregister_driver(&n8x0_panel_driver);
  526. return 0;
  527. }
  528. static struct spi_driver mipid_spi_driver = {
  529. .driver = {
  530. .name = "lcd_mipid",
  531. .owner = THIS_MODULE,
  532. },
  533. .probe = mipid_spi_probe,
  534. .remove = mipid_spi_remove,
  535. };
  536. module_spi_driver(mipid_spi_driver);
  537. MODULE_LICENSE("GPL");