omap2430.c 17 KB

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  1. /*
  2. * Copyright (C) 2005-2007 by Texas Instruments
  3. * Some code has been taken from tusb6010.c
  4. * Copyrights for that are attributable to:
  5. * Copyright (C) 2006 Nokia Corporation
  6. * Tony Lindgren <tony@atomide.com>
  7. *
  8. * This file is part of the Inventra Controller Driver for Linux.
  9. *
  10. * The Inventra Controller Driver for Linux is free software; you
  11. * can redistribute it and/or modify it under the terms of the GNU
  12. * General Public License version 2 as published by the Free Software
  13. * Foundation.
  14. *
  15. * The Inventra Controller Driver for Linux is distributed in
  16. * the hope that it will be useful, but WITHOUT ANY WARRANTY;
  17. * without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
  19. * License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with The Inventra Controller Driver for Linux ; if not,
  23. * write to the Free Software Foundation, Inc., 59 Temple Place,
  24. * Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <linux/module.h>
  28. #include <linux/kernel.h>
  29. #include <linux/sched.h>
  30. #include <linux/init.h>
  31. #include <linux/list.h>
  32. #include <linux/io.h>
  33. #include <linux/of.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/dma-mapping.h>
  36. #include <linux/pm_runtime.h>
  37. #include <linux/err.h>
  38. #include <linux/delay.h>
  39. #include <linux/usb/musb-omap.h>
  40. #include <linux/usb/omap_control_usb.h>
  41. #include "musb_core.h"
  42. #include "omap2430.h"
  43. struct omap2430_glue {
  44. struct device *dev;
  45. struct platform_device *musb;
  46. enum omap_musb_vbus_id_status status;
  47. struct work_struct omap_musb_mailbox_work;
  48. struct device *control_otghs;
  49. };
  50. #define glue_to_musb(g) platform_get_drvdata(g->musb)
  51. static struct omap2430_glue *_glue;
  52. static struct timer_list musb_idle_timer;
  53. static void musb_do_idle(unsigned long _musb)
  54. {
  55. struct musb *musb = (void *)_musb;
  56. unsigned long flags;
  57. u8 power;
  58. u8 devctl;
  59. spin_lock_irqsave(&musb->lock, flags);
  60. switch (musb->xceiv->state) {
  61. case OTG_STATE_A_WAIT_BCON:
  62. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  63. if (devctl & MUSB_DEVCTL_BDEVICE) {
  64. musb->xceiv->state = OTG_STATE_B_IDLE;
  65. MUSB_DEV_MODE(musb);
  66. } else {
  67. musb->xceiv->state = OTG_STATE_A_IDLE;
  68. MUSB_HST_MODE(musb);
  69. }
  70. break;
  71. case OTG_STATE_A_SUSPEND:
  72. /* finish RESUME signaling? */
  73. if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
  74. power = musb_readb(musb->mregs, MUSB_POWER);
  75. power &= ~MUSB_POWER_RESUME;
  76. dev_dbg(musb->controller, "root port resume stopped, power %02x\n", power);
  77. musb_writeb(musb->mregs, MUSB_POWER, power);
  78. musb->is_active = 1;
  79. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  80. | MUSB_PORT_STAT_RESUME);
  81. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  82. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  83. /* NOTE: it might really be A_WAIT_BCON ... */
  84. musb->xceiv->state = OTG_STATE_A_HOST;
  85. }
  86. break;
  87. case OTG_STATE_A_HOST:
  88. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  89. if (devctl & MUSB_DEVCTL_BDEVICE)
  90. musb->xceiv->state = OTG_STATE_B_IDLE;
  91. else
  92. musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  93. default:
  94. break;
  95. }
  96. spin_unlock_irqrestore(&musb->lock, flags);
  97. }
  98. static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
  99. {
  100. unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
  101. static unsigned long last_timer;
  102. if (timeout == 0)
  103. timeout = default_timeout;
  104. /* Never idle if active, or when VBUS timeout is not set as host */
  105. if (musb->is_active || ((musb->a_wait_bcon == 0)
  106. && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
  107. dev_dbg(musb->controller, "%s active, deleting timer\n",
  108. otg_state_string(musb->xceiv->state));
  109. del_timer(&musb_idle_timer);
  110. last_timer = jiffies;
  111. return;
  112. }
  113. if (time_after(last_timer, timeout)) {
  114. if (!timer_pending(&musb_idle_timer))
  115. last_timer = timeout;
  116. else {
  117. dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n");
  118. return;
  119. }
  120. }
  121. last_timer = timeout;
  122. dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
  123. otg_state_string(musb->xceiv->state),
  124. (unsigned long)jiffies_to_msecs(timeout - jiffies));
  125. mod_timer(&musb_idle_timer, timeout);
  126. }
  127. static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
  128. {
  129. struct usb_otg *otg = musb->xceiv->otg;
  130. u8 devctl;
  131. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  132. /* HDRC controls CPEN, but beware current surges during device
  133. * connect. They can trigger transient overcurrent conditions
  134. * that must be ignored.
  135. */
  136. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  137. if (is_on) {
  138. if (musb->xceiv->state == OTG_STATE_A_IDLE) {
  139. int loops = 100;
  140. /* start the session */
  141. devctl |= MUSB_DEVCTL_SESSION;
  142. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  143. /*
  144. * Wait for the musb to set as A device to enable the
  145. * VBUS
  146. */
  147. while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {
  148. mdelay(5);
  149. cpu_relax();
  150. if (time_after(jiffies, timeout)
  151. || loops-- <= 0) {
  152. dev_err(musb->controller,
  153. "configured as A device timeout");
  154. break;
  155. }
  156. }
  157. if (otg->set_vbus)
  158. otg_set_vbus(otg, 1);
  159. } else {
  160. musb->is_active = 1;
  161. otg->default_a = 1;
  162. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  163. devctl |= MUSB_DEVCTL_SESSION;
  164. MUSB_HST_MODE(musb);
  165. }
  166. } else {
  167. musb->is_active = 0;
  168. /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
  169. * jumping right to B_IDLE...
  170. */
  171. otg->default_a = 0;
  172. musb->xceiv->state = OTG_STATE_B_IDLE;
  173. devctl &= ~MUSB_DEVCTL_SESSION;
  174. MUSB_DEV_MODE(musb);
  175. }
  176. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  177. dev_dbg(musb->controller, "VBUS %s, devctl %02x "
  178. /* otg %3x conf %08x prcm %08x */ "\n",
  179. otg_state_string(musb->xceiv->state),
  180. musb_readb(musb->mregs, MUSB_DEVCTL));
  181. }
  182. static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
  183. {
  184. u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  185. devctl |= MUSB_DEVCTL_SESSION;
  186. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  187. return 0;
  188. }
  189. static inline void omap2430_low_level_exit(struct musb *musb)
  190. {
  191. u32 l;
  192. /* in any role */
  193. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  194. l |= ENABLEFORCE; /* enable MSTANDBY */
  195. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  196. }
  197. static inline void omap2430_low_level_init(struct musb *musb)
  198. {
  199. u32 l;
  200. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  201. l &= ~ENABLEFORCE; /* disable MSTANDBY */
  202. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  203. }
  204. void omap_musb_mailbox(enum omap_musb_vbus_id_status status)
  205. {
  206. struct omap2430_glue *glue = _glue;
  207. if (!glue) {
  208. pr_err("%s: musb core is not yet initialized\n", __func__);
  209. return;
  210. }
  211. glue->status = status;
  212. if (!glue_to_musb(glue)) {
  213. pr_err("%s: musb core is not yet ready\n", __func__);
  214. return;
  215. }
  216. schedule_work(&glue->omap_musb_mailbox_work);
  217. }
  218. EXPORT_SYMBOL_GPL(omap_musb_mailbox);
  219. static void omap_musb_set_mailbox(struct omap2430_glue *glue)
  220. {
  221. struct musb *musb = glue_to_musb(glue);
  222. struct device *dev = musb->controller;
  223. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  224. struct omap_musb_board_data *data = pdata->board_data;
  225. struct usb_otg *otg = musb->xceiv->otg;
  226. switch (glue->status) {
  227. case OMAP_MUSB_ID_GROUND:
  228. dev_dbg(dev, "ID GND\n");
  229. otg->default_a = true;
  230. musb->xceiv->state = OTG_STATE_A_IDLE;
  231. musb->xceiv->last_event = USB_EVENT_ID;
  232. if (musb->gadget_driver) {
  233. pm_runtime_get_sync(dev);
  234. omap_control_usb_set_mode(glue->control_otghs,
  235. USB_MODE_HOST);
  236. omap2430_musb_set_vbus(musb, 1);
  237. }
  238. break;
  239. case OMAP_MUSB_VBUS_VALID:
  240. dev_dbg(dev, "VBUS Connect\n");
  241. otg->default_a = false;
  242. musb->xceiv->state = OTG_STATE_B_IDLE;
  243. musb->xceiv->last_event = USB_EVENT_VBUS;
  244. if (musb->gadget_driver)
  245. pm_runtime_get_sync(dev);
  246. omap_control_usb_set_mode(glue->control_otghs, USB_MODE_DEVICE);
  247. break;
  248. case OMAP_MUSB_ID_FLOAT:
  249. case OMAP_MUSB_VBUS_OFF:
  250. dev_dbg(dev, "VBUS Disconnect\n");
  251. musb->xceiv->last_event = USB_EVENT_NONE;
  252. if (musb->gadget_driver) {
  253. pm_runtime_mark_last_busy(dev);
  254. pm_runtime_put_autosuspend(dev);
  255. }
  256. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  257. if (musb->xceiv->otg->set_vbus)
  258. otg_set_vbus(musb->xceiv->otg, 0);
  259. }
  260. omap_control_usb_set_mode(glue->control_otghs,
  261. USB_MODE_DISCONNECT);
  262. break;
  263. default:
  264. dev_dbg(dev, "ID float\n");
  265. }
  266. }
  267. static void omap_musb_mailbox_work(struct work_struct *mailbox_work)
  268. {
  269. struct omap2430_glue *glue = container_of(mailbox_work,
  270. struct omap2430_glue, omap_musb_mailbox_work);
  271. omap_musb_set_mailbox(glue);
  272. }
  273. static irqreturn_t omap2430_musb_interrupt(int irq, void *__hci)
  274. {
  275. unsigned long flags;
  276. irqreturn_t retval = IRQ_NONE;
  277. struct musb *musb = __hci;
  278. spin_lock_irqsave(&musb->lock, flags);
  279. musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
  280. musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
  281. musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
  282. if (musb->int_usb || musb->int_tx || musb->int_rx)
  283. retval = musb_interrupt(musb);
  284. spin_unlock_irqrestore(&musb->lock, flags);
  285. return retval;
  286. }
  287. static int omap2430_musb_init(struct musb *musb)
  288. {
  289. u32 l;
  290. int status = 0;
  291. struct device *dev = musb->controller;
  292. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  293. struct musb_hdrc_platform_data *plat = dev->platform_data;
  294. struct omap_musb_board_data *data = plat->board_data;
  295. /* We require some kind of external transceiver, hooked
  296. * up through ULPI. TWL4030-family PMICs include one,
  297. * which needs a driver, drivers aren't always needed.
  298. */
  299. if (dev->parent->of_node)
  300. musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent,
  301. "usb-phy", 0);
  302. else
  303. musb->xceiv = devm_usb_get_phy_dev(dev, 0);
  304. if (IS_ERR_OR_NULL(musb->xceiv)) {
  305. pr_err("HS USB OTG: no transceiver configured\n");
  306. return -EPROBE_DEFER;
  307. }
  308. musb->isr = omap2430_musb_interrupt;
  309. status = pm_runtime_get_sync(dev);
  310. if (status < 0) {
  311. dev_err(dev, "pm_runtime_get_sync FAILED %d\n", status);
  312. goto err1;
  313. }
  314. l = musb_readl(musb->mregs, OTG_INTERFSEL);
  315. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  316. /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
  317. l &= ~ULPI_12PIN; /* Disable ULPI */
  318. l |= UTMI_8BIT; /* Enable UTMI */
  319. } else {
  320. l |= ULPI_12PIN;
  321. }
  322. musb_writel(musb->mregs, OTG_INTERFSEL, l);
  323. pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
  324. "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
  325. musb_readl(musb->mregs, OTG_REVISION),
  326. musb_readl(musb->mregs, OTG_SYSCONFIG),
  327. musb_readl(musb->mregs, OTG_SYSSTATUS),
  328. musb_readl(musb->mregs, OTG_INTERFSEL),
  329. musb_readl(musb->mregs, OTG_SIMENABLE));
  330. setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
  331. if (glue->status != OMAP_MUSB_UNKNOWN)
  332. omap_musb_set_mailbox(glue);
  333. pm_runtime_put_noidle(musb->controller);
  334. return 0;
  335. err1:
  336. return status;
  337. }
  338. static void omap2430_musb_enable(struct musb *musb)
  339. {
  340. u8 devctl;
  341. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  342. struct device *dev = musb->controller;
  343. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  344. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  345. struct omap_musb_board_data *data = pdata->board_data;
  346. switch (glue->status) {
  347. case OMAP_MUSB_ID_GROUND:
  348. omap_control_usb_set_mode(glue->control_otghs, USB_MODE_HOST);
  349. if (data->interface_type != MUSB_INTERFACE_UTMI)
  350. break;
  351. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  352. /* start the session */
  353. devctl |= MUSB_DEVCTL_SESSION;
  354. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  355. while (musb_readb(musb->mregs, MUSB_DEVCTL) &
  356. MUSB_DEVCTL_BDEVICE) {
  357. cpu_relax();
  358. if (time_after(jiffies, timeout)) {
  359. dev_err(dev, "configured as A device timeout");
  360. break;
  361. }
  362. }
  363. break;
  364. case OMAP_MUSB_VBUS_VALID:
  365. omap_control_usb_set_mode(glue->control_otghs, USB_MODE_DEVICE);
  366. break;
  367. default:
  368. break;
  369. }
  370. }
  371. static void omap2430_musb_disable(struct musb *musb)
  372. {
  373. struct device *dev = musb->controller;
  374. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  375. if (glue->status != OMAP_MUSB_UNKNOWN)
  376. omap_control_usb_set_mode(glue->control_otghs,
  377. USB_MODE_DISCONNECT);
  378. }
  379. static int omap2430_musb_exit(struct musb *musb)
  380. {
  381. del_timer_sync(&musb_idle_timer);
  382. omap2430_low_level_exit(musb);
  383. return 0;
  384. }
  385. static const struct musb_platform_ops omap2430_ops = {
  386. .init = omap2430_musb_init,
  387. .exit = omap2430_musb_exit,
  388. .set_mode = omap2430_musb_set_mode,
  389. .try_idle = omap2430_musb_try_idle,
  390. .set_vbus = omap2430_musb_set_vbus,
  391. .enable = omap2430_musb_enable,
  392. .disable = omap2430_musb_disable,
  393. };
  394. static u64 omap2430_dmamask = DMA_BIT_MASK(32);
  395. static int omap2430_probe(struct platform_device *pdev)
  396. {
  397. struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
  398. struct omap_musb_board_data *data;
  399. struct platform_device *musb;
  400. struct omap2430_glue *glue;
  401. struct device_node *np = pdev->dev.of_node;
  402. struct musb_hdrc_config *config;
  403. int ret = -ENOMEM;
  404. glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
  405. if (!glue) {
  406. dev_err(&pdev->dev, "failed to allocate glue context\n");
  407. goto err0;
  408. }
  409. musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
  410. if (!musb) {
  411. dev_err(&pdev->dev, "failed to allocate musb device\n");
  412. goto err0;
  413. }
  414. musb->dev.parent = &pdev->dev;
  415. musb->dev.dma_mask = &omap2430_dmamask;
  416. musb->dev.coherent_dma_mask = omap2430_dmamask;
  417. glue->dev = &pdev->dev;
  418. glue->musb = musb;
  419. glue->status = OMAP_MUSB_UNKNOWN;
  420. if (np) {
  421. pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
  422. if (!pdata) {
  423. dev_err(&pdev->dev,
  424. "failed to allocate musb platfrom data\n");
  425. goto err2;
  426. }
  427. data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
  428. if (!data) {
  429. dev_err(&pdev->dev,
  430. "failed to allocate musb board data\n");
  431. goto err2;
  432. }
  433. config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL);
  434. if (!config) {
  435. dev_err(&pdev->dev,
  436. "failed to allocate musb hdrc config\n");
  437. goto err2;
  438. }
  439. of_property_read_u32(np, "mode", (u32 *)&pdata->mode);
  440. of_property_read_u32(np, "interface_type",
  441. (u32 *)&data->interface_type);
  442. of_property_read_u32(np, "num_eps", (u32 *)&config->num_eps);
  443. of_property_read_u32(np, "ram_bits", (u32 *)&config->ram_bits);
  444. of_property_read_u32(np, "power", (u32 *)&pdata->power);
  445. config->multipoint = of_property_read_bool(np, "multipoint");
  446. pdata->has_mailbox = of_property_read_bool(np,
  447. "ti,has-mailbox");
  448. pdata->board_data = data;
  449. pdata->config = config;
  450. }
  451. if (pdata->has_mailbox) {
  452. glue->control_otghs = omap_get_control_dev();
  453. if (IS_ERR(glue->control_otghs)) {
  454. dev_vdbg(&pdev->dev, "Failed to get control device\n");
  455. return -ENODEV;
  456. }
  457. } else {
  458. glue->control_otghs = ERR_PTR(-ENODEV);
  459. }
  460. pdata->platform_ops = &omap2430_ops;
  461. platform_set_drvdata(pdev, glue);
  462. /*
  463. * REVISIT if we ever have two instances of the wrapper, we will be
  464. * in big trouble
  465. */
  466. _glue = glue;
  467. INIT_WORK(&glue->omap_musb_mailbox_work, omap_musb_mailbox_work);
  468. ret = platform_device_add_resources(musb, pdev->resource,
  469. pdev->num_resources);
  470. if (ret) {
  471. dev_err(&pdev->dev, "failed to add resources\n");
  472. goto err2;
  473. }
  474. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  475. if (ret) {
  476. dev_err(&pdev->dev, "failed to add platform_data\n");
  477. goto err2;
  478. }
  479. pm_runtime_enable(&pdev->dev);
  480. ret = platform_device_add(musb);
  481. if (ret) {
  482. dev_err(&pdev->dev, "failed to register musb device\n");
  483. goto err2;
  484. }
  485. return 0;
  486. err2:
  487. platform_device_put(musb);
  488. err0:
  489. return ret;
  490. }
  491. static int omap2430_remove(struct platform_device *pdev)
  492. {
  493. struct omap2430_glue *glue = platform_get_drvdata(pdev);
  494. cancel_work_sync(&glue->omap_musb_mailbox_work);
  495. platform_device_unregister(glue->musb);
  496. return 0;
  497. }
  498. #ifdef CONFIG_PM
  499. static int omap2430_runtime_suspend(struct device *dev)
  500. {
  501. struct omap2430_glue *glue = dev_get_drvdata(dev);
  502. struct musb *musb = glue_to_musb(glue);
  503. if (musb) {
  504. musb->context.otg_interfsel = musb_readl(musb->mregs,
  505. OTG_INTERFSEL);
  506. omap2430_low_level_exit(musb);
  507. usb_phy_set_suspend(musb->xceiv, 1);
  508. }
  509. return 0;
  510. }
  511. static int omap2430_runtime_resume(struct device *dev)
  512. {
  513. struct omap2430_glue *glue = dev_get_drvdata(dev);
  514. struct musb *musb = glue_to_musb(glue);
  515. if (musb) {
  516. omap2430_low_level_init(musb);
  517. musb_writel(musb->mregs, OTG_INTERFSEL,
  518. musb->context.otg_interfsel);
  519. usb_phy_set_suspend(musb->xceiv, 0);
  520. }
  521. return 0;
  522. }
  523. static struct dev_pm_ops omap2430_pm_ops = {
  524. .runtime_suspend = omap2430_runtime_suspend,
  525. .runtime_resume = omap2430_runtime_resume,
  526. };
  527. #define DEV_PM_OPS (&omap2430_pm_ops)
  528. #else
  529. #define DEV_PM_OPS NULL
  530. #endif
  531. #ifdef CONFIG_OF
  532. static const struct of_device_id omap2430_id_table[] = {
  533. {
  534. .compatible = "ti,omap4-musb"
  535. },
  536. {
  537. .compatible = "ti,omap3-musb"
  538. },
  539. {},
  540. };
  541. MODULE_DEVICE_TABLE(of, omap2430_id_table);
  542. #endif
  543. static struct platform_driver omap2430_driver = {
  544. .probe = omap2430_probe,
  545. .remove = omap2430_remove,
  546. .driver = {
  547. .name = "musb-omap2430",
  548. .pm = DEV_PM_OPS,
  549. .of_match_table = of_match_ptr(omap2430_id_table),
  550. },
  551. };
  552. MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
  553. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  554. MODULE_LICENSE("GPL v2");
  555. static int __init omap2430_init(void)
  556. {
  557. return platform_driver_register(&omap2430_driver);
  558. }
  559. subsys_initcall(omap2430_init);
  560. static void __exit omap2430_exit(void)
  561. {
  562. platform_driver_unregister(&omap2430_driver);
  563. }
  564. module_exit(omap2430_exit);