musb_virthub.c 11 KB

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  1. /*
  2. * MUSB OTG driver virtual root hub support
  3. *
  4. * Copyright 2005 Mentor Graphics Corporation
  5. * Copyright (C) 2005-2006 by Texas Instruments
  6. * Copyright (C) 2006-2007 Nokia Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  25. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. */
  34. #include <linux/module.h>
  35. #include <linux/kernel.h>
  36. #include <linux/sched.h>
  37. #include <linux/errno.h>
  38. #include <linux/init.h>
  39. #include <linux/time.h>
  40. #include <linux/timer.h>
  41. #include <asm/unaligned.h>
  42. #include "musb_core.h"
  43. static void musb_port_suspend(struct musb *musb, bool do_suspend)
  44. {
  45. struct usb_otg *otg = musb->xceiv->otg;
  46. u8 power;
  47. void __iomem *mbase = musb->mregs;
  48. if (!is_host_active(musb))
  49. return;
  50. /* NOTE: this doesn't necessarily put PHY into low power mode,
  51. * turning off its clock; that's a function of PHY integration and
  52. * MUSB_POWER_ENSUSPEND. PHY may need a clock (sigh) to detect
  53. * SE0 changing to connect (J) or wakeup (K) states.
  54. */
  55. power = musb_readb(mbase, MUSB_POWER);
  56. if (do_suspend) {
  57. int retries = 10000;
  58. power &= ~MUSB_POWER_RESUME;
  59. power |= MUSB_POWER_SUSPENDM;
  60. musb_writeb(mbase, MUSB_POWER, power);
  61. /* Needed for OPT A tests */
  62. power = musb_readb(mbase, MUSB_POWER);
  63. while (power & MUSB_POWER_SUSPENDM) {
  64. power = musb_readb(mbase, MUSB_POWER);
  65. if (retries-- < 1)
  66. break;
  67. }
  68. dev_dbg(musb->controller, "Root port suspended, power %02x\n", power);
  69. musb->port1_status |= USB_PORT_STAT_SUSPEND;
  70. switch (musb->xceiv->state) {
  71. case OTG_STATE_A_HOST:
  72. musb->xceiv->state = OTG_STATE_A_SUSPEND;
  73. musb->is_active = otg->host->b_hnp_enable;
  74. if (musb->is_active)
  75. mod_timer(&musb->otg_timer, jiffies
  76. + msecs_to_jiffies(
  77. OTG_TIME_A_AIDL_BDIS));
  78. musb_platform_try_idle(musb, 0);
  79. break;
  80. case OTG_STATE_B_HOST:
  81. musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
  82. musb->is_active = otg->host->b_hnp_enable;
  83. musb_platform_try_idle(musb, 0);
  84. break;
  85. default:
  86. dev_dbg(musb->controller, "bogus rh suspend? %s\n",
  87. otg_state_string(musb->xceiv->state));
  88. }
  89. } else if (power & MUSB_POWER_SUSPENDM) {
  90. power &= ~MUSB_POWER_SUSPENDM;
  91. power |= MUSB_POWER_RESUME;
  92. musb_writeb(mbase, MUSB_POWER, power);
  93. dev_dbg(musb->controller, "Root port resuming, power %02x\n", power);
  94. /* later, GetPortStatus will stop RESUME signaling */
  95. musb->port1_status |= MUSB_PORT_STAT_RESUME;
  96. musb->rh_timer = jiffies + msecs_to_jiffies(20);
  97. }
  98. }
  99. static void musb_port_reset(struct musb *musb, bool do_reset)
  100. {
  101. u8 power;
  102. void __iomem *mbase = musb->mregs;
  103. if (musb->xceiv->state == OTG_STATE_B_IDLE) {
  104. dev_dbg(musb->controller, "HNP: Returning from HNP; no hub reset from b_idle\n");
  105. musb->port1_status &= ~USB_PORT_STAT_RESET;
  106. return;
  107. }
  108. if (!is_host_active(musb))
  109. return;
  110. /* NOTE: caller guarantees it will turn off the reset when
  111. * the appropriate amount of time has passed
  112. */
  113. power = musb_readb(mbase, MUSB_POWER);
  114. if (do_reset) {
  115. /*
  116. * If RESUME is set, we must make sure it stays minimum 20 ms.
  117. * Then we must clear RESUME and wait a bit to let musb start
  118. * generating SOFs. If we don't do this, OPT HS A 6.8 tests
  119. * fail with "Error! Did not receive an SOF before suspend
  120. * detected".
  121. */
  122. if (power & MUSB_POWER_RESUME) {
  123. while (time_before(jiffies, musb->rh_timer))
  124. msleep(1);
  125. musb_writeb(mbase, MUSB_POWER,
  126. power & ~MUSB_POWER_RESUME);
  127. msleep(1);
  128. }
  129. musb->ignore_disconnect = true;
  130. power &= 0xf0;
  131. musb_writeb(mbase, MUSB_POWER,
  132. power | MUSB_POWER_RESET);
  133. musb->port1_status |= USB_PORT_STAT_RESET;
  134. musb->port1_status &= ~USB_PORT_STAT_ENABLE;
  135. musb->rh_timer = jiffies + msecs_to_jiffies(50);
  136. } else {
  137. dev_dbg(musb->controller, "root port reset stopped\n");
  138. musb_writeb(mbase, MUSB_POWER,
  139. power & ~MUSB_POWER_RESET);
  140. musb->ignore_disconnect = false;
  141. power = musb_readb(mbase, MUSB_POWER);
  142. if (power & MUSB_POWER_HSMODE) {
  143. dev_dbg(musb->controller, "high-speed device connected\n");
  144. musb->port1_status |= USB_PORT_STAT_HIGH_SPEED;
  145. }
  146. musb->port1_status &= ~USB_PORT_STAT_RESET;
  147. musb->port1_status |= USB_PORT_STAT_ENABLE
  148. | (USB_PORT_STAT_C_RESET << 16)
  149. | (USB_PORT_STAT_C_ENABLE << 16);
  150. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  151. musb->vbuserr_retry = VBUSERR_RETRY_COUNT;
  152. }
  153. }
  154. void musb_root_disconnect(struct musb *musb)
  155. {
  156. struct usb_otg *otg = musb->xceiv->otg;
  157. musb->port1_status = USB_PORT_STAT_POWER
  158. | (USB_PORT_STAT_C_CONNECTION << 16);
  159. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  160. musb->is_active = 0;
  161. switch (musb->xceiv->state) {
  162. case OTG_STATE_A_SUSPEND:
  163. if (otg->host->b_hnp_enable) {
  164. musb->xceiv->state = OTG_STATE_A_PERIPHERAL;
  165. musb->g.is_a_peripheral = 1;
  166. break;
  167. }
  168. /* FALLTHROUGH */
  169. case OTG_STATE_A_HOST:
  170. musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  171. musb->is_active = 0;
  172. break;
  173. case OTG_STATE_A_WAIT_VFALL:
  174. musb->xceiv->state = OTG_STATE_B_IDLE;
  175. break;
  176. default:
  177. dev_dbg(musb->controller, "host disconnect (%s)\n",
  178. otg_state_string(musb->xceiv->state));
  179. }
  180. }
  181. /*---------------------------------------------------------------------*/
  182. /* Caller may or may not hold musb->lock */
  183. int musb_hub_status_data(struct usb_hcd *hcd, char *buf)
  184. {
  185. struct musb *musb = hcd_to_musb(hcd);
  186. int retval = 0;
  187. /* called in_irq() via usb_hcd_poll_rh_status() */
  188. if (musb->port1_status & 0xffff0000) {
  189. *buf = 0x02;
  190. retval = 1;
  191. }
  192. return retval;
  193. }
  194. int musb_hub_control(
  195. struct usb_hcd *hcd,
  196. u16 typeReq,
  197. u16 wValue,
  198. u16 wIndex,
  199. char *buf,
  200. u16 wLength)
  201. {
  202. struct musb *musb = hcd_to_musb(hcd);
  203. u32 temp;
  204. int retval = 0;
  205. unsigned long flags;
  206. spin_lock_irqsave(&musb->lock, flags);
  207. if (unlikely(!HCD_HW_ACCESSIBLE(hcd))) {
  208. spin_unlock_irqrestore(&musb->lock, flags);
  209. return -ESHUTDOWN;
  210. }
  211. /* hub features: always zero, setting is a NOP
  212. * port features: reported, sometimes updated when host is active
  213. * no indicators
  214. */
  215. switch (typeReq) {
  216. case ClearHubFeature:
  217. case SetHubFeature:
  218. switch (wValue) {
  219. case C_HUB_OVER_CURRENT:
  220. case C_HUB_LOCAL_POWER:
  221. break;
  222. default:
  223. goto error;
  224. }
  225. break;
  226. case ClearPortFeature:
  227. if ((wIndex & 0xff) != 1)
  228. goto error;
  229. switch (wValue) {
  230. case USB_PORT_FEAT_ENABLE:
  231. break;
  232. case USB_PORT_FEAT_SUSPEND:
  233. musb_port_suspend(musb, false);
  234. break;
  235. case USB_PORT_FEAT_POWER:
  236. if (!hcd->self.is_b_host)
  237. musb_platform_set_vbus(musb, 0);
  238. break;
  239. case USB_PORT_FEAT_C_CONNECTION:
  240. case USB_PORT_FEAT_C_ENABLE:
  241. case USB_PORT_FEAT_C_OVER_CURRENT:
  242. case USB_PORT_FEAT_C_RESET:
  243. case USB_PORT_FEAT_C_SUSPEND:
  244. break;
  245. default:
  246. goto error;
  247. }
  248. dev_dbg(musb->controller, "clear feature %d\n", wValue);
  249. musb->port1_status &= ~(1 << wValue);
  250. break;
  251. case GetHubDescriptor:
  252. {
  253. struct usb_hub_descriptor *desc = (void *)buf;
  254. desc->bDescLength = 9;
  255. desc->bDescriptorType = 0x29;
  256. desc->bNbrPorts = 1;
  257. desc->wHubCharacteristics = cpu_to_le16(
  258. 0x0001 /* per-port power switching */
  259. | 0x0010 /* no overcurrent reporting */
  260. );
  261. desc->bPwrOn2PwrGood = 5; /* msec/2 */
  262. desc->bHubContrCurrent = 0;
  263. /* workaround bogus struct definition */
  264. desc->u.hs.DeviceRemovable[0] = 0x02; /* port 1 */
  265. desc->u.hs.DeviceRemovable[1] = 0xff;
  266. }
  267. break;
  268. case GetHubStatus:
  269. temp = 0;
  270. *(__le32 *) buf = cpu_to_le32(temp);
  271. break;
  272. case GetPortStatus:
  273. if (wIndex != 1)
  274. goto error;
  275. /* finish RESET signaling? */
  276. if ((musb->port1_status & USB_PORT_STAT_RESET)
  277. && time_after_eq(jiffies, musb->rh_timer))
  278. musb_port_reset(musb, false);
  279. /* finish RESUME signaling? */
  280. if ((musb->port1_status & MUSB_PORT_STAT_RESUME)
  281. && time_after_eq(jiffies, musb->rh_timer)) {
  282. u8 power;
  283. power = musb_readb(musb->mregs, MUSB_POWER);
  284. power &= ~MUSB_POWER_RESUME;
  285. dev_dbg(musb->controller, "root port resume stopped, power %02x\n",
  286. power);
  287. musb_writeb(musb->mregs, MUSB_POWER, power);
  288. /* ISSUE: DaVinci (RTL 1.300) disconnects after
  289. * resume of high speed peripherals (but not full
  290. * speed ones).
  291. */
  292. musb->is_active = 1;
  293. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  294. | MUSB_PORT_STAT_RESUME);
  295. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  296. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  297. /* NOTE: it might really be A_WAIT_BCON ... */
  298. musb->xceiv->state = OTG_STATE_A_HOST;
  299. }
  300. put_unaligned(cpu_to_le32(musb->port1_status
  301. & ~MUSB_PORT_STAT_RESUME),
  302. (__le32 *) buf);
  303. /* port change status is more interesting */
  304. dev_dbg(musb->controller, "port status %08x\n",
  305. musb->port1_status);
  306. break;
  307. case SetPortFeature:
  308. if ((wIndex & 0xff) != 1)
  309. goto error;
  310. switch (wValue) {
  311. case USB_PORT_FEAT_POWER:
  312. /* NOTE: this controller has a strange state machine
  313. * that involves "requesting sessions" according to
  314. * magic side effects from incompletely-described
  315. * rules about startup...
  316. *
  317. * This call is what really starts the host mode; be
  318. * very careful about side effects if you reorder any
  319. * initialization logic, e.g. for OTG, or change any
  320. * logic relating to VBUS power-up.
  321. */
  322. if (!hcd->self.is_b_host)
  323. musb_start(musb);
  324. break;
  325. case USB_PORT_FEAT_RESET:
  326. musb_port_reset(musb, true);
  327. break;
  328. case USB_PORT_FEAT_SUSPEND:
  329. musb_port_suspend(musb, true);
  330. break;
  331. case USB_PORT_FEAT_TEST:
  332. if (unlikely(is_host_active(musb)))
  333. goto error;
  334. wIndex >>= 8;
  335. switch (wIndex) {
  336. case 1:
  337. pr_debug("TEST_J\n");
  338. temp = MUSB_TEST_J;
  339. break;
  340. case 2:
  341. pr_debug("TEST_K\n");
  342. temp = MUSB_TEST_K;
  343. break;
  344. case 3:
  345. pr_debug("TEST_SE0_NAK\n");
  346. temp = MUSB_TEST_SE0_NAK;
  347. break;
  348. case 4:
  349. pr_debug("TEST_PACKET\n");
  350. temp = MUSB_TEST_PACKET;
  351. musb_load_testpacket(musb);
  352. break;
  353. case 5:
  354. pr_debug("TEST_FORCE_ENABLE\n");
  355. temp = MUSB_TEST_FORCE_HOST
  356. | MUSB_TEST_FORCE_HS;
  357. musb_writeb(musb->mregs, MUSB_DEVCTL,
  358. MUSB_DEVCTL_SESSION);
  359. break;
  360. case 6:
  361. pr_debug("TEST_FIFO_ACCESS\n");
  362. temp = MUSB_TEST_FIFO_ACCESS;
  363. break;
  364. default:
  365. goto error;
  366. }
  367. musb_writeb(musb->mregs, MUSB_TESTMODE, temp);
  368. break;
  369. default:
  370. goto error;
  371. }
  372. dev_dbg(musb->controller, "set feature %d\n", wValue);
  373. musb->port1_status |= 1 << wValue;
  374. break;
  375. default:
  376. error:
  377. /* "protocol stall" on error */
  378. retval = -EPIPE;
  379. }
  380. spin_unlock_irqrestore(&musb->lock, flags);
  381. return retval;
  382. }