musb_core.h 15 KB

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  1. /*
  2. * MUSB OTG driver defines
  3. *
  4. * Copyright 2005 Mentor Graphics Corporation
  5. * Copyright (C) 2005-2006 by Texas Instruments
  6. * Copyright (C) 2006-2007 Nokia Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  25. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. */
  34. #ifndef __MUSB_CORE_H__
  35. #define __MUSB_CORE_H__
  36. #include <linux/slab.h>
  37. #include <linux/list.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/errno.h>
  40. #include <linux/timer.h>
  41. #include <linux/device.h>
  42. #include <linux/usb/ch9.h>
  43. #include <linux/usb/gadget.h>
  44. #include <linux/usb.h>
  45. #include <linux/usb/otg.h>
  46. #include <linux/usb/musb.h>
  47. struct musb;
  48. struct musb_hw_ep;
  49. struct musb_ep;
  50. /* Helper defines for struct musb->hwvers */
  51. #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
  52. #define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
  53. #define MUSB_HWVERS_RC 0x8000
  54. #define MUSB_HWVERS_1300 0x52C
  55. #define MUSB_HWVERS_1400 0x590
  56. #define MUSB_HWVERS_1800 0x720
  57. #define MUSB_HWVERS_1900 0x784
  58. #define MUSB_HWVERS_2000 0x800
  59. #include "musb_debug.h"
  60. #include "musb_dma.h"
  61. #include "musb_io.h"
  62. #include "musb_regs.h"
  63. #include "musb_gadget.h"
  64. #include <linux/usb/hcd.h>
  65. #include "musb_host.h"
  66. /* NOTE: otg and peripheral-only state machines start at B_IDLE.
  67. * OTG or host-only go to A_IDLE when ID is sensed.
  68. */
  69. #define is_peripheral_active(m) (!(m)->is_host)
  70. #define is_host_active(m) ((m)->is_host)
  71. #ifdef CONFIG_PROC_FS
  72. #include <linux/fs.h>
  73. #define MUSB_CONFIG_PROC_FS
  74. #endif
  75. /****************************** PERIPHERAL ROLE *****************************/
  76. extern irqreturn_t musb_g_ep0_irq(struct musb *);
  77. extern void musb_g_tx(struct musb *, u8);
  78. extern void musb_g_rx(struct musb *, u8);
  79. extern void musb_g_reset(struct musb *);
  80. extern void musb_g_suspend(struct musb *);
  81. extern void musb_g_resume(struct musb *);
  82. extern void musb_g_wakeup(struct musb *);
  83. extern void musb_g_disconnect(struct musb *);
  84. /****************************** HOST ROLE ***********************************/
  85. extern irqreturn_t musb_h_ep0_irq(struct musb *);
  86. extern void musb_host_tx(struct musb *, u8);
  87. extern void musb_host_rx(struct musb *, u8);
  88. /****************************** CONSTANTS ********************************/
  89. #ifndef MUSB_C_NUM_EPS
  90. #define MUSB_C_NUM_EPS ((u8)16)
  91. #endif
  92. #ifndef MUSB_MAX_END0_PACKET
  93. #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
  94. #endif
  95. /* host side ep0 states */
  96. enum musb_h_ep0_state {
  97. MUSB_EP0_IDLE,
  98. MUSB_EP0_START, /* expect ack of setup */
  99. MUSB_EP0_IN, /* expect IN DATA */
  100. MUSB_EP0_OUT, /* expect ack of OUT DATA */
  101. MUSB_EP0_STATUS, /* expect ack of STATUS */
  102. } __attribute__ ((packed));
  103. /* peripheral side ep0 states */
  104. enum musb_g_ep0_state {
  105. MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
  106. MUSB_EP0_STAGE_SETUP, /* received SETUP */
  107. MUSB_EP0_STAGE_TX, /* IN data */
  108. MUSB_EP0_STAGE_RX, /* OUT data */
  109. MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
  110. MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
  111. MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
  112. } __attribute__ ((packed));
  113. /*
  114. * OTG protocol constants. See USB OTG 1.3 spec,
  115. * sections 5.5 "Device Timings" and 6.6.5 "Timers".
  116. */
  117. #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
  118. #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
  119. #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
  120. #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
  121. /*************************** REGISTER ACCESS ********************************/
  122. /* Endpoint registers (other than dynfifo setup) can be accessed either
  123. * directly with the "flat" model, or after setting up an index register.
  124. */
  125. #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
  126. || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
  127. || defined(CONFIG_ARCH_OMAP4)
  128. /* REVISIT indexed access seemed to
  129. * misbehave (on DaVinci) for at least peripheral IN ...
  130. */
  131. #define MUSB_FLAT_REG
  132. #endif
  133. /* TUSB mapping: "flat" plus ep0 special cases */
  134. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  135. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  136. #define musb_ep_select(_mbase, _epnum) \
  137. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  138. #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
  139. /* "flat" mapping: each endpoint has its own i/o address */
  140. #elif defined(MUSB_FLAT_REG)
  141. #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
  142. #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
  143. /* "indexed" mapping: INDEX register controls register bank select */
  144. #else
  145. #define musb_ep_select(_mbase, _epnum) \
  146. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  147. #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
  148. #endif
  149. /****************************** FUNCTIONS ********************************/
  150. #define MUSB_HST_MODE(_musb)\
  151. { (_musb)->is_host = true; }
  152. #define MUSB_DEV_MODE(_musb) \
  153. { (_musb)->is_host = false; }
  154. #define test_devctl_hst_mode(_x) \
  155. (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
  156. #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
  157. /******************************** TYPES *************************************/
  158. /**
  159. * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
  160. * @init: turns on clocks, sets up platform-specific registers, etc
  161. * @exit: undoes @init
  162. * @set_mode: forcefully changes operating mode
  163. * @try_ilde: tries to idle the IP
  164. * @vbus_status: returns vbus status if possible
  165. * @set_vbus: forces vbus status
  166. * @adjust_channel_params: pre check for standard dma channel_program func
  167. */
  168. struct musb_platform_ops {
  169. int (*init)(struct musb *musb);
  170. int (*exit)(struct musb *musb);
  171. void (*enable)(struct musb *musb);
  172. void (*disable)(struct musb *musb);
  173. int (*set_mode)(struct musb *musb, u8 mode);
  174. void (*try_idle)(struct musb *musb, unsigned long timeout);
  175. int (*vbus_status)(struct musb *musb);
  176. void (*set_vbus)(struct musb *musb, int on);
  177. int (*adjust_channel_params)(struct dma_channel *channel,
  178. u16 packet_sz, u8 *mode,
  179. dma_addr_t *dma_addr, u32 *len);
  180. };
  181. /*
  182. * struct musb_hw_ep - endpoint hardware (bidirectional)
  183. *
  184. * Ordered slightly for better cacheline locality.
  185. */
  186. struct musb_hw_ep {
  187. struct musb *musb;
  188. void __iomem *fifo;
  189. void __iomem *regs;
  190. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  191. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  192. void __iomem *conf;
  193. #endif
  194. /* index in musb->endpoints[] */
  195. u8 epnum;
  196. /* hardware configuration, possibly dynamic */
  197. bool is_shared_fifo;
  198. bool tx_double_buffered;
  199. bool rx_double_buffered;
  200. u16 max_packet_sz_tx;
  201. u16 max_packet_sz_rx;
  202. struct dma_channel *tx_channel;
  203. struct dma_channel *rx_channel;
  204. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  205. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  206. /* TUSB has "asynchronous" and "synchronous" dma modes */
  207. dma_addr_t fifo_async;
  208. dma_addr_t fifo_sync;
  209. void __iomem *fifo_sync_va;
  210. #endif
  211. void __iomem *target_regs;
  212. /* currently scheduled peripheral endpoint */
  213. struct musb_qh *in_qh;
  214. struct musb_qh *out_qh;
  215. u8 rx_reinit;
  216. u8 tx_reinit;
  217. /* peripheral side */
  218. struct musb_ep ep_in; /* TX */
  219. struct musb_ep ep_out; /* RX */
  220. };
  221. static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
  222. {
  223. return next_request(&hw_ep->ep_in);
  224. }
  225. static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
  226. {
  227. return next_request(&hw_ep->ep_out);
  228. }
  229. struct musb_csr_regs {
  230. /* FIFO registers */
  231. u16 txmaxp, txcsr, rxmaxp, rxcsr;
  232. u16 rxfifoadd, txfifoadd;
  233. u8 txtype, txinterval, rxtype, rxinterval;
  234. u8 rxfifosz, txfifosz;
  235. u8 txfunaddr, txhubaddr, txhubport;
  236. u8 rxfunaddr, rxhubaddr, rxhubport;
  237. };
  238. struct musb_context_registers {
  239. u8 power;
  240. u8 intrusbe;
  241. u16 frame;
  242. u8 index, testmode;
  243. u8 devctl, busctl, misc;
  244. u32 otg_interfsel;
  245. struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
  246. };
  247. /*
  248. * struct musb - Driver instance data.
  249. */
  250. struct musb {
  251. /* device lock */
  252. spinlock_t lock;
  253. const struct musb_platform_ops *ops;
  254. struct musb_context_registers context;
  255. irqreturn_t (*isr)(int, void *);
  256. struct work_struct irq_work;
  257. u16 hwvers;
  258. u16 intrrxe;
  259. u16 intrtxe;
  260. /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
  261. #define MUSB_PORT_STAT_RESUME (1 << 31)
  262. u32 port1_status;
  263. unsigned long rh_timer;
  264. enum musb_h_ep0_state ep0_stage;
  265. /* bulk traffic normally dedicates endpoint hardware, and each
  266. * direction has its own ring of host side endpoints.
  267. * we try to progress the transfer at the head of each endpoint's
  268. * queue until it completes or NAKs too much; then we try the next
  269. * endpoint.
  270. */
  271. struct musb_hw_ep *bulk_ep;
  272. struct list_head control; /* of musb_qh */
  273. struct list_head in_bulk; /* of musb_qh */
  274. struct list_head out_bulk; /* of musb_qh */
  275. struct timer_list otg_timer;
  276. struct notifier_block nb;
  277. struct dma_controller *dma_controller;
  278. struct device *controller;
  279. void __iomem *ctrl_base;
  280. void __iomem *mregs;
  281. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  282. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  283. dma_addr_t async;
  284. dma_addr_t sync;
  285. void __iomem *sync_va;
  286. #endif
  287. /* passed down from chip/board specific irq handlers */
  288. u8 int_usb;
  289. u16 int_rx;
  290. u16 int_tx;
  291. struct usb_phy *xceiv;
  292. int nIrq;
  293. unsigned irq_wake:1;
  294. struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
  295. #define control_ep endpoints
  296. #define VBUSERR_RETRY_COUNT 3
  297. u16 vbuserr_retry;
  298. u16 epmask;
  299. u8 nr_endpoints;
  300. int (*board_set_power)(int state);
  301. u8 min_power; /* vbus for periph, in mA/2 */
  302. bool is_host;
  303. int a_wait_bcon; /* VBUS timeout in msecs */
  304. unsigned long idle_timeout; /* Next timeout in jiffies */
  305. /* active means connected and not suspended */
  306. unsigned is_active:1;
  307. unsigned is_multipoint:1;
  308. unsigned ignore_disconnect:1; /* during bus resets */
  309. unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
  310. unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
  311. unsigned dyn_fifo:1; /* dynamic FIFO supported? */
  312. unsigned bulk_split:1;
  313. #define can_bulk_split(musb,type) \
  314. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
  315. unsigned bulk_combine:1;
  316. #define can_bulk_combine(musb,type) \
  317. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
  318. /* is_suspended means USB B_PERIPHERAL suspend */
  319. unsigned is_suspended:1;
  320. /* may_wakeup means remote wakeup is enabled */
  321. unsigned may_wakeup:1;
  322. /* is_self_powered is reported in device status and the
  323. * config descriptor. is_bus_powered means B_PERIPHERAL
  324. * draws some VBUS current; both can be true.
  325. */
  326. unsigned is_self_powered:1;
  327. unsigned is_bus_powered:1;
  328. unsigned set_address:1;
  329. unsigned test_mode:1;
  330. unsigned softconnect:1;
  331. u8 address;
  332. u8 test_mode_nr;
  333. u16 ackpend; /* ep0 */
  334. enum musb_g_ep0_state ep0_state;
  335. struct usb_gadget g; /* the gadget */
  336. struct usb_gadget_driver *gadget_driver; /* its driver */
  337. /*
  338. * FIXME: Remove this flag.
  339. *
  340. * This is only added to allow Blackfin to work
  341. * with current driver. For some unknown reason
  342. * Blackfin doesn't work with double buffering
  343. * and that's enabled by default.
  344. *
  345. * We added this flag to forcefully disable double
  346. * buffering until we get it working.
  347. */
  348. unsigned double_buffer_not_ok:1;
  349. struct musb_hdrc_config *config;
  350. #ifdef MUSB_CONFIG_PROC_FS
  351. struct proc_dir_entry *proc_entry;
  352. #endif
  353. int xceiv_old_state;
  354. #ifdef CONFIG_DEBUG_FS
  355. struct dentry *debugfs_root;
  356. #endif
  357. };
  358. static inline struct musb *gadget_to_musb(struct usb_gadget *g)
  359. {
  360. return container_of(g, struct musb, g);
  361. }
  362. #ifdef CONFIG_BLACKFIN
  363. static inline int musb_read_fifosize(struct musb *musb,
  364. struct musb_hw_ep *hw_ep, u8 epnum)
  365. {
  366. musb->nr_endpoints++;
  367. musb->epmask |= (1 << epnum);
  368. if (epnum < 5) {
  369. hw_ep->max_packet_sz_tx = 128;
  370. hw_ep->max_packet_sz_rx = 128;
  371. } else {
  372. hw_ep->max_packet_sz_tx = 1024;
  373. hw_ep->max_packet_sz_rx = 1024;
  374. }
  375. hw_ep->is_shared_fifo = false;
  376. return 0;
  377. }
  378. static inline void musb_configure_ep0(struct musb *musb)
  379. {
  380. musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
  381. musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
  382. musb->endpoints[0].is_shared_fifo = true;
  383. }
  384. #else
  385. static inline int musb_read_fifosize(struct musb *musb,
  386. struct musb_hw_ep *hw_ep, u8 epnum)
  387. {
  388. void __iomem *mbase = musb->mregs;
  389. u8 reg = 0;
  390. /* read from core using indexed model */
  391. reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
  392. /* 0's returned when no more endpoints */
  393. if (!reg)
  394. return -ENODEV;
  395. musb->nr_endpoints++;
  396. musb->epmask |= (1 << epnum);
  397. hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
  398. /* shared TX/RX FIFO? */
  399. if ((reg & 0xf0) == 0xf0) {
  400. hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
  401. hw_ep->is_shared_fifo = true;
  402. return 0;
  403. } else {
  404. hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
  405. hw_ep->is_shared_fifo = false;
  406. }
  407. return 0;
  408. }
  409. static inline void musb_configure_ep0(struct musb *musb)
  410. {
  411. musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
  412. musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
  413. musb->endpoints[0].is_shared_fifo = true;
  414. }
  415. #endif /* CONFIG_BLACKFIN */
  416. /***************************** Glue it together *****************************/
  417. extern const char musb_driver_name[];
  418. extern void musb_start(struct musb *musb);
  419. extern void musb_stop(struct musb *musb);
  420. extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
  421. extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
  422. extern void musb_load_testpacket(struct musb *);
  423. extern irqreturn_t musb_interrupt(struct musb *);
  424. extern void musb_hnp_stop(struct musb *musb);
  425. static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
  426. {
  427. if (musb->ops->set_vbus)
  428. musb->ops->set_vbus(musb, is_on);
  429. }
  430. static inline void musb_platform_enable(struct musb *musb)
  431. {
  432. if (musb->ops->enable)
  433. musb->ops->enable(musb);
  434. }
  435. static inline void musb_platform_disable(struct musb *musb)
  436. {
  437. if (musb->ops->disable)
  438. musb->ops->disable(musb);
  439. }
  440. static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
  441. {
  442. if (!musb->ops->set_mode)
  443. return 0;
  444. return musb->ops->set_mode(musb, mode);
  445. }
  446. static inline void musb_platform_try_idle(struct musb *musb,
  447. unsigned long timeout)
  448. {
  449. if (musb->ops->try_idle)
  450. musb->ops->try_idle(musb, timeout);
  451. }
  452. static inline int musb_platform_get_vbus_status(struct musb *musb)
  453. {
  454. if (!musb->ops->vbus_status)
  455. return 0;
  456. return musb->ops->vbus_status(musb);
  457. }
  458. static inline int musb_platform_init(struct musb *musb)
  459. {
  460. if (!musb->ops->init)
  461. return -EINVAL;
  462. return musb->ops->init(musb);
  463. }
  464. static inline int musb_platform_exit(struct musb *musb)
  465. {
  466. if (!musb->ops->exit)
  467. return -EINVAL;
  468. return musb->ops->exit(musb);
  469. }
  470. #endif /* __MUSB_CORE_H__ */