ohci-nxp.c 9.7 KB

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  1. /*
  2. * driver for NXP USB Host devices
  3. *
  4. * Currently supported OHCI host devices:
  5. * - NXP LPC32xx
  6. *
  7. * Authors: Dmitry Chigirev <source@mvista.com>
  8. * Vitaly Wool <vitalywool@gmail.com>
  9. *
  10. * register initialization is based on code examples provided by Philips
  11. * Copyright (c) 2005 Koninklijke Philips Electronics N.V.
  12. *
  13. * NOTE: This driver does not have suspend/resume functionality
  14. * This driver is intended for engineering development purposes only
  15. *
  16. * 2005-2006 (c) MontaVista Software, Inc. This file is licensed under
  17. * the terms of the GNU General Public License version 2. This program
  18. * is licensed "as is" without any warranty of any kind, whether express
  19. * or implied.
  20. */
  21. #include <linux/clk.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/i2c.h>
  24. #include <linux/of.h>
  25. #include <linux/usb/isp1301.h>
  26. #include <mach/hardware.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/io.h>
  29. #include <mach/platform.h>
  30. #include <mach/irqs.h>
  31. #define USB_CONFIG_BASE 0x31020000
  32. #define PWRMAN_BASE 0x40004000
  33. #define USB_CTRL IO_ADDRESS(PWRMAN_BASE + 0x64)
  34. /* USB_CTRL bit defines */
  35. #define USB_SLAVE_HCLK_EN (1 << 24)
  36. #define USB_DEV_NEED_CLK_EN (1 << 22)
  37. #define USB_HOST_NEED_CLK_EN (1 << 21)
  38. #define PAD_CONTROL_LAST_DRIVEN (1 << 19)
  39. #define USB_OTG_STAT_CONTROL IO_ADDRESS(USB_CONFIG_BASE + 0x110)
  40. /* USB_OTG_STAT_CONTROL bit defines */
  41. #define TRANSPARENT_I2C_EN (1 << 7)
  42. #define HOST_EN (1 << 0)
  43. /* On LPC32xx, those are undefined */
  44. #ifndef start_int_set_falling_edge
  45. #define start_int_set_falling_edge(irq)
  46. #define start_int_set_rising_edge(irq)
  47. #define start_int_ack(irq)
  48. #define start_int_mask(irq)
  49. #define start_int_umask(irq)
  50. #endif
  51. static struct i2c_client *isp1301_i2c_client;
  52. extern int usb_disabled(void);
  53. static struct clk *usb_pll_clk;
  54. static struct clk *usb_dev_clk;
  55. static struct clk *usb_otg_clk;
  56. static void isp1301_configure_lpc32xx(void)
  57. {
  58. /* LPC32XX only supports DAT_SE0 USB mode */
  59. /* This sequence is important */
  60. /* Disable transparent UART mode first */
  61. i2c_smbus_write_byte_data(isp1301_i2c_client,
  62. (ISP1301_I2C_MODE_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR),
  63. MC1_UART_EN);
  64. i2c_smbus_write_byte_data(isp1301_i2c_client,
  65. (ISP1301_I2C_MODE_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR),
  66. ~MC1_SPEED_REG);
  67. i2c_smbus_write_byte_data(isp1301_i2c_client,
  68. ISP1301_I2C_MODE_CONTROL_1, MC1_SPEED_REG);
  69. i2c_smbus_write_byte_data(isp1301_i2c_client,
  70. (ISP1301_I2C_MODE_CONTROL_2 | ISP1301_I2C_REG_CLEAR_ADDR),
  71. ~0);
  72. i2c_smbus_write_byte_data(isp1301_i2c_client,
  73. ISP1301_I2C_MODE_CONTROL_2,
  74. (MC2_BI_DI | MC2_PSW_EN | MC2_SPD_SUSP_CTRL));
  75. i2c_smbus_write_byte_data(isp1301_i2c_client,
  76. (ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR), ~0);
  77. i2c_smbus_write_byte_data(isp1301_i2c_client,
  78. ISP1301_I2C_MODE_CONTROL_1, MC1_DAT_SE0);
  79. i2c_smbus_write_byte_data(isp1301_i2c_client,
  80. ISP1301_I2C_OTG_CONTROL_1,
  81. (OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN));
  82. i2c_smbus_write_byte_data(isp1301_i2c_client,
  83. (ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR),
  84. (OTG1_DM_PULLUP | OTG1_DP_PULLUP));
  85. i2c_smbus_write_byte_data(isp1301_i2c_client,
  86. ISP1301_I2C_INTERRUPT_LATCH | ISP1301_I2C_REG_CLEAR_ADDR, ~0);
  87. i2c_smbus_write_byte_data(isp1301_i2c_client,
  88. ISP1301_I2C_INTERRUPT_FALLING | ISP1301_I2C_REG_CLEAR_ADDR,
  89. ~0);
  90. i2c_smbus_write_byte_data(isp1301_i2c_client,
  91. ISP1301_I2C_INTERRUPT_RISING | ISP1301_I2C_REG_CLEAR_ADDR, ~0);
  92. /* Enable usb_need_clk clock after transceiver is initialized */
  93. __raw_writel(__raw_readl(USB_CTRL) | USB_HOST_NEED_CLK_EN, USB_CTRL);
  94. printk(KERN_INFO "ISP1301 Vendor ID : 0x%04x\n",
  95. i2c_smbus_read_word_data(isp1301_i2c_client, 0x00));
  96. printk(KERN_INFO "ISP1301 Product ID : 0x%04x\n",
  97. i2c_smbus_read_word_data(isp1301_i2c_client, 0x02));
  98. printk(KERN_INFO "ISP1301 Version ID : 0x%04x\n",
  99. i2c_smbus_read_word_data(isp1301_i2c_client, 0x14));
  100. }
  101. static void isp1301_configure(void)
  102. {
  103. isp1301_configure_lpc32xx();
  104. }
  105. static inline void isp1301_vbus_on(void)
  106. {
  107. i2c_smbus_write_byte_data(isp1301_i2c_client, ISP1301_I2C_OTG_CONTROL_1,
  108. OTG1_VBUS_DRV);
  109. }
  110. static inline void isp1301_vbus_off(void)
  111. {
  112. i2c_smbus_write_byte_data(isp1301_i2c_client,
  113. ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR,
  114. OTG1_VBUS_DRV);
  115. }
  116. static void nxp_start_hc(void)
  117. {
  118. unsigned long tmp = __raw_readl(USB_OTG_STAT_CONTROL) | HOST_EN;
  119. __raw_writel(tmp, USB_OTG_STAT_CONTROL);
  120. isp1301_vbus_on();
  121. }
  122. static void nxp_stop_hc(void)
  123. {
  124. unsigned long tmp;
  125. isp1301_vbus_off();
  126. tmp = __raw_readl(USB_OTG_STAT_CONTROL) & ~HOST_EN;
  127. __raw_writel(tmp, USB_OTG_STAT_CONTROL);
  128. }
  129. static int ohci_nxp_start(struct usb_hcd *hcd)
  130. {
  131. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  132. int ret;
  133. if ((ret = ohci_init(ohci)) < 0)
  134. return ret;
  135. if ((ret = ohci_run(ohci)) < 0) {
  136. dev_err(hcd->self.controller, "can't start\n");
  137. ohci_stop(hcd);
  138. return ret;
  139. }
  140. return 0;
  141. }
  142. static const struct hc_driver ohci_nxp_hc_driver = {
  143. .description = hcd_name,
  144. .product_desc = "nxp OHCI",
  145. /*
  146. * generic hardware linkage
  147. */
  148. .irq = ohci_irq,
  149. .flags = HCD_USB11 | HCD_MEMORY,
  150. .hcd_priv_size = sizeof(struct ohci_hcd),
  151. /*
  152. * basic lifecycle operations
  153. */
  154. .start = ohci_nxp_start,
  155. .stop = ohci_stop,
  156. .shutdown = ohci_shutdown,
  157. /*
  158. * managing i/o requests and associated device resources
  159. */
  160. .urb_enqueue = ohci_urb_enqueue,
  161. .urb_dequeue = ohci_urb_dequeue,
  162. .endpoint_disable = ohci_endpoint_disable,
  163. /*
  164. * scheduling support
  165. */
  166. .get_frame_number = ohci_get_frame,
  167. /*
  168. * root hub support
  169. */
  170. .hub_status_data = ohci_hub_status_data,
  171. .hub_control = ohci_hub_control,
  172. #ifdef CONFIG_PM
  173. .bus_suspend = ohci_bus_suspend,
  174. .bus_resume = ohci_bus_resume,
  175. #endif
  176. .start_port_reset = ohci_start_port_reset,
  177. };
  178. static int usb_hcd_nxp_probe(struct platform_device *pdev)
  179. {
  180. struct usb_hcd *hcd = 0;
  181. struct ohci_hcd *ohci;
  182. const struct hc_driver *driver = &ohci_nxp_hc_driver;
  183. struct resource *res;
  184. int ret = 0, irq;
  185. struct device_node *isp1301_node;
  186. if (pdev->dev.of_node) {
  187. isp1301_node = of_parse_phandle(pdev->dev.of_node,
  188. "transceiver", 0);
  189. } else {
  190. isp1301_node = NULL;
  191. }
  192. isp1301_i2c_client = isp1301_get_client(isp1301_node);
  193. if (!isp1301_i2c_client) {
  194. ret = -EPROBE_DEFER;
  195. goto out;
  196. }
  197. pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
  198. pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
  199. dev_dbg(&pdev->dev, "%s: " DRIVER_DESC " (nxp)\n", hcd_name);
  200. if (usb_disabled()) {
  201. dev_err(&pdev->dev, "USB is disabled\n");
  202. ret = -ENODEV;
  203. goto out;
  204. }
  205. /* Enable AHB slave USB clock, needed for further USB clock control */
  206. __raw_writel(USB_SLAVE_HCLK_EN | PAD_CONTROL_LAST_DRIVEN, USB_CTRL);
  207. /* Enable USB PLL */
  208. usb_pll_clk = clk_get(&pdev->dev, "ck_pll5");
  209. if (IS_ERR(usb_pll_clk)) {
  210. dev_err(&pdev->dev, "failed to acquire USB PLL\n");
  211. ret = PTR_ERR(usb_pll_clk);
  212. goto out1;
  213. }
  214. ret = clk_enable(usb_pll_clk);
  215. if (ret < 0) {
  216. dev_err(&pdev->dev, "failed to start USB PLL\n");
  217. goto out2;
  218. }
  219. ret = clk_set_rate(usb_pll_clk, 48000);
  220. if (ret < 0) {
  221. dev_err(&pdev->dev, "failed to set USB clock rate\n");
  222. goto out3;
  223. }
  224. /* Enable USB device clock */
  225. usb_dev_clk = clk_get(&pdev->dev, "ck_usbd");
  226. if (IS_ERR(usb_dev_clk)) {
  227. dev_err(&pdev->dev, "failed to acquire USB DEV Clock\n");
  228. ret = PTR_ERR(usb_dev_clk);
  229. goto out4;
  230. }
  231. ret = clk_enable(usb_dev_clk);
  232. if (ret < 0) {
  233. dev_err(&pdev->dev, "failed to start USB DEV Clock\n");
  234. goto out5;
  235. }
  236. /* Enable USB otg clocks */
  237. usb_otg_clk = clk_get(&pdev->dev, "ck_usb_otg");
  238. if (IS_ERR(usb_otg_clk)) {
  239. dev_err(&pdev->dev, "failed to acquire USB DEV Clock\n");
  240. ret = PTR_ERR(usb_otg_clk);
  241. goto out6;
  242. }
  243. __raw_writel(__raw_readl(USB_CTRL) | USB_HOST_NEED_CLK_EN, USB_CTRL);
  244. ret = clk_enable(usb_otg_clk);
  245. if (ret < 0) {
  246. dev_err(&pdev->dev, "failed to start USB DEV Clock\n");
  247. goto out7;
  248. }
  249. isp1301_configure();
  250. hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
  251. if (!hcd) {
  252. dev_err(&pdev->dev, "Failed to allocate HC buffer\n");
  253. ret = -ENOMEM;
  254. goto out8;
  255. }
  256. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  257. if (!res) {
  258. dev_err(&pdev->dev, "Failed to get MEM resource\n");
  259. ret = -ENOMEM;
  260. goto out8;
  261. }
  262. hcd->regs = devm_ioremap_resource(&pdev->dev, res);
  263. if (IS_ERR(hcd->regs)) {
  264. ret = PTR_ERR(hcd->regs);
  265. goto out8;
  266. }
  267. hcd->rsrc_start = res->start;
  268. hcd->rsrc_len = resource_size(res);
  269. irq = platform_get_irq(pdev, 0);
  270. if (irq < 0) {
  271. ret = -ENXIO;
  272. goto out8;
  273. }
  274. nxp_start_hc();
  275. platform_set_drvdata(pdev, hcd);
  276. ohci = hcd_to_ohci(hcd);
  277. ohci_hcd_init(ohci);
  278. dev_info(&pdev->dev, "at 0x%p, irq %d\n", hcd->regs, hcd->irq);
  279. ret = usb_add_hcd(hcd, irq, 0);
  280. if (ret == 0)
  281. return ret;
  282. nxp_stop_hc();
  283. out8:
  284. usb_put_hcd(hcd);
  285. out7:
  286. clk_disable(usb_otg_clk);
  287. out6:
  288. clk_put(usb_otg_clk);
  289. out5:
  290. clk_disable(usb_dev_clk);
  291. out4:
  292. clk_put(usb_dev_clk);
  293. out3:
  294. clk_disable(usb_pll_clk);
  295. out2:
  296. clk_put(usb_pll_clk);
  297. out1:
  298. isp1301_i2c_client = NULL;
  299. out:
  300. return ret;
  301. }
  302. static int usb_hcd_nxp_remove(struct platform_device *pdev)
  303. {
  304. struct usb_hcd *hcd = platform_get_drvdata(pdev);
  305. usb_remove_hcd(hcd);
  306. nxp_stop_hc();
  307. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  308. usb_put_hcd(hcd);
  309. clk_disable(usb_pll_clk);
  310. clk_put(usb_pll_clk);
  311. clk_disable(usb_dev_clk);
  312. clk_put(usb_dev_clk);
  313. i2c_unregister_device(isp1301_i2c_client);
  314. isp1301_i2c_client = NULL;
  315. platform_set_drvdata(pdev, NULL);
  316. return 0;
  317. }
  318. /* work with hotplug and coldplug */
  319. MODULE_ALIAS("platform:usb-ohci");
  320. #ifdef CONFIG_OF
  321. static const struct of_device_id usb_hcd_nxp_match[] = {
  322. { .compatible = "nxp,ohci-nxp" },
  323. {},
  324. };
  325. MODULE_DEVICE_TABLE(of, usb_hcd_nxp_match);
  326. #endif
  327. static struct platform_driver usb_hcd_nxp_driver = {
  328. .driver = {
  329. .name = "usb-ohci",
  330. .owner = THIS_MODULE,
  331. .of_match_table = of_match_ptr(usb_hcd_nxp_match),
  332. },
  333. .probe = usb_hcd_nxp_probe,
  334. .remove = usb_hcd_nxp_remove,
  335. };