ehci-q.c 39 KB

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  1. /*
  2. * Copyright (C) 2001-2004 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. /*-------------------------------------------------------------------------*/
  20. /*
  21. * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
  22. *
  23. * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
  24. * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  25. * buffers needed for the larger number). We use one QH per endpoint, queue
  26. * multiple urbs (all three types) per endpoint. URBs may need several qtds.
  27. *
  28. * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  29. * interrupts) needs careful scheduling. Performance improvements can be
  30. * an ongoing challenge. That's in "ehci-sched.c".
  31. *
  32. * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  33. * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  34. * (b) special fields in qh entries or (c) split iso entries. TTs will
  35. * buffer low/full speed data so the host collects it at high speed.
  36. */
  37. /*-------------------------------------------------------------------------*/
  38. /* fill a qtd, returning how much of the buffer we were able to queue up */
  39. static int
  40. qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
  41. size_t len, int token, int maxpacket)
  42. {
  43. int i, count;
  44. u64 addr = buf;
  45. /* one buffer entry per 4K ... first might be short or unaligned */
  46. qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
  47. qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
  48. count = 0x1000 - (buf & 0x0fff); /* rest of that page */
  49. if (likely (len < count)) /* ... iff needed */
  50. count = len;
  51. else {
  52. buf += 0x1000;
  53. buf &= ~0x0fff;
  54. /* per-qtd limit: from 16K to 20K (best alignment) */
  55. for (i = 1; count < len && i < 5; i++) {
  56. addr = buf;
  57. qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
  58. qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
  59. (u32)(addr >> 32));
  60. buf += 0x1000;
  61. if ((count + 0x1000) < len)
  62. count += 0x1000;
  63. else
  64. count = len;
  65. }
  66. /* short packets may only terminate transfers */
  67. if (count != len)
  68. count -= (count % maxpacket);
  69. }
  70. qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
  71. qtd->length = count;
  72. return count;
  73. }
  74. /*-------------------------------------------------------------------------*/
  75. static inline void
  76. qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  77. {
  78. struct ehci_qh_hw *hw = qh->hw;
  79. /* writes to an active overlay are unsafe */
  80. BUG_ON(qh->qh_state != QH_STATE_IDLE);
  81. hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
  82. hw->hw_alt_next = EHCI_LIST_END(ehci);
  83. /* Except for control endpoints, we make hardware maintain data
  84. * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
  85. * and set the pseudo-toggle in udev. Only usb_clear_halt() will
  86. * ever clear it.
  87. */
  88. if (!(hw->hw_info1 & cpu_to_hc32(ehci, QH_TOGGLE_CTL))) {
  89. unsigned is_out, epnum;
  90. is_out = qh->is_out;
  91. epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
  92. if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
  93. hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
  94. usb_settoggle (qh->dev, epnum, is_out, 1);
  95. }
  96. }
  97. hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
  98. }
  99. /* if it weren't for a common silicon quirk (writing the dummy into the qh
  100. * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
  101. * recovery (including urb dequeue) would need software changes to a QH...
  102. */
  103. static void
  104. qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
  105. {
  106. struct ehci_qtd *qtd;
  107. if (list_empty (&qh->qtd_list))
  108. qtd = qh->dummy;
  109. else {
  110. qtd = list_entry (qh->qtd_list.next,
  111. struct ehci_qtd, qtd_list);
  112. /*
  113. * first qtd may already be partially processed.
  114. * If we come here during unlink, the QH overlay region
  115. * might have reference to the just unlinked qtd. The
  116. * qtd is updated in qh_completions(). Update the QH
  117. * overlay here.
  118. */
  119. if (qh->hw->hw_token & ACTIVE_BIT(ehci)) {
  120. qh->hw->hw_qtd_next = qtd->hw_next;
  121. qtd = NULL;
  122. }
  123. }
  124. if (qtd)
  125. qh_update (ehci, qh, qtd);
  126. }
  127. /*-------------------------------------------------------------------------*/
  128. static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
  129. static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
  130. struct usb_host_endpoint *ep)
  131. {
  132. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  133. struct ehci_qh *qh = ep->hcpriv;
  134. unsigned long flags;
  135. spin_lock_irqsave(&ehci->lock, flags);
  136. qh->clearing_tt = 0;
  137. if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
  138. && ehci->rh_state == EHCI_RH_RUNNING)
  139. qh_link_async(ehci, qh);
  140. spin_unlock_irqrestore(&ehci->lock, flags);
  141. }
  142. static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
  143. struct urb *urb, u32 token)
  144. {
  145. /* If an async split transaction gets an error or is unlinked,
  146. * the TT buffer may be left in an indeterminate state. We
  147. * have to clear the TT buffer.
  148. *
  149. * Note: this routine is never called for Isochronous transfers.
  150. */
  151. if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
  152. #ifdef DEBUG
  153. struct usb_device *tt = urb->dev->tt->hub;
  154. dev_dbg(&tt->dev,
  155. "clear tt buffer port %d, a%d ep%d t%08x\n",
  156. urb->dev->ttport, urb->dev->devnum,
  157. usb_pipeendpoint(urb->pipe), token);
  158. #endif /* DEBUG */
  159. if (!ehci_is_TDI(ehci)
  160. || urb->dev->tt->hub !=
  161. ehci_to_hcd(ehci)->self.root_hub) {
  162. if (usb_hub_clear_tt_buffer(urb) == 0)
  163. qh->clearing_tt = 1;
  164. } else {
  165. /* REVISIT ARC-derived cores don't clear the root
  166. * hub TT buffer in this way...
  167. */
  168. }
  169. }
  170. }
  171. static int qtd_copy_status (
  172. struct ehci_hcd *ehci,
  173. struct urb *urb,
  174. size_t length,
  175. u32 token
  176. )
  177. {
  178. int status = -EINPROGRESS;
  179. /* count IN/OUT bytes, not SETUP (even short packets) */
  180. if (likely (QTD_PID (token) != 2))
  181. urb->actual_length += length - QTD_LENGTH (token);
  182. /* don't modify error codes */
  183. if (unlikely(urb->unlinked))
  184. return status;
  185. /* force cleanup after short read; not always an error */
  186. if (unlikely (IS_SHORT_READ (token)))
  187. status = -EREMOTEIO;
  188. /* serious "can't proceed" faults reported by the hardware */
  189. if (token & QTD_STS_HALT) {
  190. if (token & QTD_STS_BABBLE) {
  191. /* FIXME "must" disable babbling device's port too */
  192. status = -EOVERFLOW;
  193. /* CERR nonzero + halt --> stall */
  194. } else if (QTD_CERR(token)) {
  195. status = -EPIPE;
  196. /* In theory, more than one of the following bits can be set
  197. * since they are sticky and the transaction is retried.
  198. * Which to test first is rather arbitrary.
  199. */
  200. } else if (token & QTD_STS_MMF) {
  201. /* fs/ls interrupt xfer missed the complete-split */
  202. status = -EPROTO;
  203. } else if (token & QTD_STS_DBE) {
  204. status = (QTD_PID (token) == 1) /* IN ? */
  205. ? -ENOSR /* hc couldn't read data */
  206. : -ECOMM; /* hc couldn't write data */
  207. } else if (token & QTD_STS_XACT) {
  208. /* timeout, bad CRC, wrong PID, etc */
  209. ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
  210. urb->dev->devpath,
  211. usb_pipeendpoint(urb->pipe),
  212. usb_pipein(urb->pipe) ? "in" : "out");
  213. status = -EPROTO;
  214. } else { /* unknown */
  215. status = -EPROTO;
  216. }
  217. ehci_vdbg (ehci,
  218. "dev%d ep%d%s qtd token %08x --> status %d\n",
  219. usb_pipedevice (urb->pipe),
  220. usb_pipeendpoint (urb->pipe),
  221. usb_pipein (urb->pipe) ? "in" : "out",
  222. token, status);
  223. }
  224. return status;
  225. }
  226. static void
  227. ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
  228. __releases(ehci->lock)
  229. __acquires(ehci->lock)
  230. {
  231. if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
  232. /* ... update hc-wide periodic stats */
  233. ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
  234. }
  235. if (unlikely(urb->unlinked)) {
  236. COUNT(ehci->stats.unlink);
  237. } else {
  238. /* report non-error and short read status as zero */
  239. if (status == -EINPROGRESS || status == -EREMOTEIO)
  240. status = 0;
  241. COUNT(ehci->stats.complete);
  242. }
  243. #ifdef EHCI_URB_TRACE
  244. ehci_dbg (ehci,
  245. "%s %s urb %p ep%d%s status %d len %d/%d\n",
  246. __func__, urb->dev->devpath, urb,
  247. usb_pipeendpoint (urb->pipe),
  248. usb_pipein (urb->pipe) ? "in" : "out",
  249. status,
  250. urb->actual_length, urb->transfer_buffer_length);
  251. #endif
  252. /* complete() can reenter this HCD */
  253. usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  254. spin_unlock (&ehci->lock);
  255. usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
  256. spin_lock (&ehci->lock);
  257. }
  258. static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
  259. /*
  260. * Process and free completed qtds for a qh, returning URBs to drivers.
  261. * Chases up to qh->hw_current. Returns number of completions called,
  262. * indicating how much "real" work we did.
  263. */
  264. static unsigned
  265. qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
  266. {
  267. struct ehci_qtd *last, *end = qh->dummy;
  268. struct list_head *entry, *tmp;
  269. int last_status;
  270. int stopped;
  271. unsigned count = 0;
  272. u8 state;
  273. struct ehci_qh_hw *hw = qh->hw;
  274. if (unlikely (list_empty (&qh->qtd_list)))
  275. return count;
  276. /* completions (or tasks on other cpus) must never clobber HALT
  277. * till we've gone through and cleaned everything up, even when
  278. * they add urbs to this qh's queue or mark them for unlinking.
  279. *
  280. * NOTE: unlinking expects to be done in queue order.
  281. *
  282. * It's a bug for qh->qh_state to be anything other than
  283. * QH_STATE_IDLE, unless our caller is scan_async() or
  284. * scan_intr().
  285. */
  286. state = qh->qh_state;
  287. qh->qh_state = QH_STATE_COMPLETING;
  288. stopped = (state == QH_STATE_IDLE);
  289. rescan:
  290. last = NULL;
  291. last_status = -EINPROGRESS;
  292. qh->needs_rescan = 0;
  293. /* remove de-activated QTDs from front of queue.
  294. * after faults (including short reads), cleanup this urb
  295. * then let the queue advance.
  296. * if queue is stopped, handles unlinks.
  297. */
  298. list_for_each_safe (entry, tmp, &qh->qtd_list) {
  299. struct ehci_qtd *qtd;
  300. struct urb *urb;
  301. u32 token = 0;
  302. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  303. urb = qtd->urb;
  304. /* clean up any state from previous QTD ...*/
  305. if (last) {
  306. if (likely (last->urb != urb)) {
  307. ehci_urb_done(ehci, last->urb, last_status);
  308. count++;
  309. last_status = -EINPROGRESS;
  310. }
  311. ehci_qtd_free (ehci, last);
  312. last = NULL;
  313. }
  314. /* ignore urbs submitted during completions we reported */
  315. if (qtd == end)
  316. break;
  317. /* hardware copies qtd out of qh overlay */
  318. rmb ();
  319. token = hc32_to_cpu(ehci, qtd->hw_token);
  320. /* always clean up qtds the hc de-activated */
  321. retry_xacterr:
  322. if ((token & QTD_STS_ACTIVE) == 0) {
  323. /* Report Data Buffer Error: non-fatal but useful */
  324. if (token & QTD_STS_DBE)
  325. ehci_dbg(ehci,
  326. "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
  327. urb,
  328. usb_endpoint_num(&urb->ep->desc),
  329. usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
  330. urb->transfer_buffer_length,
  331. qtd,
  332. qh);
  333. /* on STALL, error, and short reads this urb must
  334. * complete and all its qtds must be recycled.
  335. */
  336. if ((token & QTD_STS_HALT) != 0) {
  337. /* retry transaction errors until we
  338. * reach the software xacterr limit
  339. */
  340. if ((token & QTD_STS_XACT) &&
  341. QTD_CERR(token) == 0 &&
  342. ++qh->xacterrs < QH_XACTERR_MAX &&
  343. !urb->unlinked) {
  344. ehci_dbg(ehci,
  345. "detected XactErr len %zu/%zu retry %d\n",
  346. qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
  347. /* reset the token in the qtd and the
  348. * qh overlay (which still contains
  349. * the qtd) so that we pick up from
  350. * where we left off
  351. */
  352. token &= ~QTD_STS_HALT;
  353. token |= QTD_STS_ACTIVE |
  354. (EHCI_TUNE_CERR << 10);
  355. qtd->hw_token = cpu_to_hc32(ehci,
  356. token);
  357. wmb();
  358. hw->hw_token = cpu_to_hc32(ehci,
  359. token);
  360. goto retry_xacterr;
  361. }
  362. stopped = 1;
  363. /* magic dummy for some short reads; qh won't advance.
  364. * that silicon quirk can kick in with this dummy too.
  365. *
  366. * other short reads won't stop the queue, including
  367. * control transfers (status stage handles that) or
  368. * most other single-qtd reads ... the queue stops if
  369. * URB_SHORT_NOT_OK was set so the driver submitting
  370. * the urbs could clean it up.
  371. */
  372. } else if (IS_SHORT_READ (token)
  373. && !(qtd->hw_alt_next
  374. & EHCI_LIST_END(ehci))) {
  375. stopped = 1;
  376. }
  377. /* stop scanning when we reach qtds the hc is using */
  378. } else if (likely (!stopped
  379. && ehci->rh_state >= EHCI_RH_RUNNING)) {
  380. break;
  381. /* scan the whole queue for unlinks whenever it stops */
  382. } else {
  383. stopped = 1;
  384. /* cancel everything if we halt, suspend, etc */
  385. if (ehci->rh_state < EHCI_RH_RUNNING)
  386. last_status = -ESHUTDOWN;
  387. /* this qtd is active; skip it unless a previous qtd
  388. * for its urb faulted, or its urb was canceled.
  389. */
  390. else if (last_status == -EINPROGRESS && !urb->unlinked)
  391. continue;
  392. /*
  393. * If this was the active qtd when the qh was unlinked
  394. * and the overlay's token is active, then the overlay
  395. * hasn't been written back to the qtd yet so use its
  396. * token instead of the qtd's. After the qtd is
  397. * processed and removed, the overlay won't be valid
  398. * any more.
  399. */
  400. if (state == QH_STATE_IDLE &&
  401. qh->qtd_list.next == &qtd->qtd_list &&
  402. (hw->hw_token & ACTIVE_BIT(ehci))) {
  403. token = hc32_to_cpu(ehci, hw->hw_token);
  404. hw->hw_token &= ~ACTIVE_BIT(ehci);
  405. /* An unlink may leave an incomplete
  406. * async transaction in the TT buffer.
  407. * We have to clear it.
  408. */
  409. ehci_clear_tt_buffer(ehci, qh, urb, token);
  410. }
  411. }
  412. /* unless we already know the urb's status, collect qtd status
  413. * and update count of bytes transferred. in common short read
  414. * cases with only one data qtd (including control transfers),
  415. * queue processing won't halt. but with two or more qtds (for
  416. * example, with a 32 KB transfer), when the first qtd gets a
  417. * short read the second must be removed by hand.
  418. */
  419. if (last_status == -EINPROGRESS) {
  420. last_status = qtd_copy_status(ehci, urb,
  421. qtd->length, token);
  422. if (last_status == -EREMOTEIO
  423. && (qtd->hw_alt_next
  424. & EHCI_LIST_END(ehci)))
  425. last_status = -EINPROGRESS;
  426. /* As part of low/full-speed endpoint-halt processing
  427. * we must clear the TT buffer (11.17.5).
  428. */
  429. if (unlikely(last_status != -EINPROGRESS &&
  430. last_status != -EREMOTEIO)) {
  431. /* The TT's in some hubs malfunction when they
  432. * receive this request following a STALL (they
  433. * stop sending isochronous packets). Since a
  434. * STALL can't leave the TT buffer in a busy
  435. * state (if you believe Figures 11-48 - 11-51
  436. * in the USB 2.0 spec), we won't clear the TT
  437. * buffer in this case. Strictly speaking this
  438. * is a violation of the spec.
  439. */
  440. if (last_status != -EPIPE)
  441. ehci_clear_tt_buffer(ehci, qh, urb,
  442. token);
  443. }
  444. }
  445. /* if we're removing something not at the queue head,
  446. * patch the hardware queue pointer.
  447. */
  448. if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
  449. last = list_entry (qtd->qtd_list.prev,
  450. struct ehci_qtd, qtd_list);
  451. last->hw_next = qtd->hw_next;
  452. }
  453. /* remove qtd; it's recycled after possible urb completion */
  454. list_del (&qtd->qtd_list);
  455. last = qtd;
  456. /* reinit the xacterr counter for the next qtd */
  457. qh->xacterrs = 0;
  458. }
  459. /* last urb's completion might still need calling */
  460. if (likely (last != NULL)) {
  461. ehci_urb_done(ehci, last->urb, last_status);
  462. count++;
  463. ehci_qtd_free (ehci, last);
  464. }
  465. /* Do we need to rescan for URBs dequeued during a giveback? */
  466. if (unlikely(qh->needs_rescan)) {
  467. /* If the QH is already unlinked, do the rescan now. */
  468. if (state == QH_STATE_IDLE)
  469. goto rescan;
  470. /* Otherwise we have to wait until the QH is fully unlinked.
  471. * Our caller will start an unlink if qh->needs_rescan is
  472. * set. But if an unlink has already started, nothing needs
  473. * to be done.
  474. */
  475. if (state != QH_STATE_LINKED)
  476. qh->needs_rescan = 0;
  477. }
  478. /* restore original state; caller must unlink or relink */
  479. qh->qh_state = state;
  480. /* be sure the hardware's done with the qh before refreshing
  481. * it after fault cleanup, or recovering from silicon wrongly
  482. * overlaying the dummy qtd (which reduces DMA chatter).
  483. */
  484. if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci)) {
  485. switch (state) {
  486. case QH_STATE_IDLE:
  487. qh_refresh(ehci, qh);
  488. break;
  489. case QH_STATE_LINKED:
  490. /* We won't refresh a QH that's linked (after the HC
  491. * stopped the queue). That avoids a race:
  492. * - HC reads first part of QH;
  493. * - CPU updates that first part and the token;
  494. * - HC reads rest of that QH, including token
  495. * Result: HC gets an inconsistent image, and then
  496. * DMAs to/from the wrong memory (corrupting it).
  497. *
  498. * That should be rare for interrupt transfers,
  499. * except maybe high bandwidth ...
  500. */
  501. /* Tell the caller to start an unlink */
  502. qh->needs_rescan = 1;
  503. break;
  504. /* otherwise, unlink already started */
  505. }
  506. }
  507. return count;
  508. }
  509. /*-------------------------------------------------------------------------*/
  510. // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
  511. #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
  512. // ... and packet size, for any kind of endpoint descriptor
  513. #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
  514. /*
  515. * reverse of qh_urb_transaction: free a list of TDs.
  516. * used for cleanup after errors, before HC sees an URB's TDs.
  517. */
  518. static void qtd_list_free (
  519. struct ehci_hcd *ehci,
  520. struct urb *urb,
  521. struct list_head *qtd_list
  522. ) {
  523. struct list_head *entry, *temp;
  524. list_for_each_safe (entry, temp, qtd_list) {
  525. struct ehci_qtd *qtd;
  526. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  527. list_del (&qtd->qtd_list);
  528. ehci_qtd_free (ehci, qtd);
  529. }
  530. }
  531. /*
  532. * create a list of filled qtds for this URB; won't link into qh.
  533. */
  534. static struct list_head *
  535. qh_urb_transaction (
  536. struct ehci_hcd *ehci,
  537. struct urb *urb,
  538. struct list_head *head,
  539. gfp_t flags
  540. ) {
  541. struct ehci_qtd *qtd, *qtd_prev;
  542. dma_addr_t buf;
  543. int len, this_sg_len, maxpacket;
  544. int is_input;
  545. u32 token;
  546. int i;
  547. struct scatterlist *sg;
  548. /*
  549. * URBs map to sequences of QTDs: one logical transaction
  550. */
  551. qtd = ehci_qtd_alloc (ehci, flags);
  552. if (unlikely (!qtd))
  553. return NULL;
  554. list_add_tail (&qtd->qtd_list, head);
  555. qtd->urb = urb;
  556. token = QTD_STS_ACTIVE;
  557. token |= (EHCI_TUNE_CERR << 10);
  558. /* for split transactions, SplitXState initialized to zero */
  559. len = urb->transfer_buffer_length;
  560. is_input = usb_pipein (urb->pipe);
  561. if (usb_pipecontrol (urb->pipe)) {
  562. /* SETUP pid */
  563. qtd_fill(ehci, qtd, urb->setup_dma,
  564. sizeof (struct usb_ctrlrequest),
  565. token | (2 /* "setup" */ << 8), 8);
  566. /* ... and always at least one more pid */
  567. token ^= QTD_TOGGLE;
  568. qtd_prev = qtd;
  569. qtd = ehci_qtd_alloc (ehci, flags);
  570. if (unlikely (!qtd))
  571. goto cleanup;
  572. qtd->urb = urb;
  573. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  574. list_add_tail (&qtd->qtd_list, head);
  575. /* for zero length DATA stages, STATUS is always IN */
  576. if (len == 0)
  577. token |= (1 /* "in" */ << 8);
  578. }
  579. /*
  580. * data transfer stage: buffer setup
  581. */
  582. i = urb->num_mapped_sgs;
  583. if (len > 0 && i > 0) {
  584. sg = urb->sg;
  585. buf = sg_dma_address(sg);
  586. /* urb->transfer_buffer_length may be smaller than the
  587. * size of the scatterlist (or vice versa)
  588. */
  589. this_sg_len = min_t(int, sg_dma_len(sg), len);
  590. } else {
  591. sg = NULL;
  592. buf = urb->transfer_dma;
  593. this_sg_len = len;
  594. }
  595. if (is_input)
  596. token |= (1 /* "in" */ << 8);
  597. /* else it's already initted to "out" pid (0 << 8) */
  598. maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
  599. /*
  600. * buffer gets wrapped in one or more qtds;
  601. * last one may be "short" (including zero len)
  602. * and may serve as a control status ack
  603. */
  604. for (;;) {
  605. int this_qtd_len;
  606. this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
  607. maxpacket);
  608. this_sg_len -= this_qtd_len;
  609. len -= this_qtd_len;
  610. buf += this_qtd_len;
  611. /*
  612. * short reads advance to a "magic" dummy instead of the next
  613. * qtd ... that forces the queue to stop, for manual cleanup.
  614. * (this will usually be overridden later.)
  615. */
  616. if (is_input)
  617. qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
  618. /* qh makes control packets use qtd toggle; maybe switch it */
  619. if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
  620. token ^= QTD_TOGGLE;
  621. if (likely(this_sg_len <= 0)) {
  622. if (--i <= 0 || len <= 0)
  623. break;
  624. sg = sg_next(sg);
  625. buf = sg_dma_address(sg);
  626. this_sg_len = min_t(int, sg_dma_len(sg), len);
  627. }
  628. qtd_prev = qtd;
  629. qtd = ehci_qtd_alloc (ehci, flags);
  630. if (unlikely (!qtd))
  631. goto cleanup;
  632. qtd->urb = urb;
  633. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  634. list_add_tail (&qtd->qtd_list, head);
  635. }
  636. /*
  637. * unless the caller requires manual cleanup after short reads,
  638. * have the alt_next mechanism keep the queue running after the
  639. * last data qtd (the only one, for control and most other cases).
  640. */
  641. if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
  642. || usb_pipecontrol (urb->pipe)))
  643. qtd->hw_alt_next = EHCI_LIST_END(ehci);
  644. /*
  645. * control requests may need a terminating data "status" ack;
  646. * other OUT ones may need a terminating short packet
  647. * (zero length).
  648. */
  649. if (likely (urb->transfer_buffer_length != 0)) {
  650. int one_more = 0;
  651. if (usb_pipecontrol (urb->pipe)) {
  652. one_more = 1;
  653. token ^= 0x0100; /* "in" <--> "out" */
  654. token |= QTD_TOGGLE; /* force DATA1 */
  655. } else if (usb_pipeout(urb->pipe)
  656. && (urb->transfer_flags & URB_ZERO_PACKET)
  657. && !(urb->transfer_buffer_length % maxpacket)) {
  658. one_more = 1;
  659. }
  660. if (one_more) {
  661. qtd_prev = qtd;
  662. qtd = ehci_qtd_alloc (ehci, flags);
  663. if (unlikely (!qtd))
  664. goto cleanup;
  665. qtd->urb = urb;
  666. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  667. list_add_tail (&qtd->qtd_list, head);
  668. /* never any data in such packets */
  669. qtd_fill(ehci, qtd, 0, 0, token, 0);
  670. }
  671. }
  672. /* by default, enable interrupt on urb completion */
  673. if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
  674. qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
  675. return head;
  676. cleanup:
  677. qtd_list_free (ehci, urb, head);
  678. return NULL;
  679. }
  680. /*-------------------------------------------------------------------------*/
  681. // Would be best to create all qh's from config descriptors,
  682. // when each interface/altsetting is established. Unlink
  683. // any previous qh and cancel its urbs first; endpoints are
  684. // implicitly reset then (data toggle too).
  685. // That'd mean updating how usbcore talks to HCDs. (2.7?)
  686. /*
  687. * Each QH holds a qtd list; a QH is used for everything except iso.
  688. *
  689. * For interrupt urbs, the scheduler must set the microframe scheduling
  690. * mask(s) each time the QH gets scheduled. For highspeed, that's
  691. * just one microframe in the s-mask. For split interrupt transactions
  692. * there are additional complications: c-mask, maybe FSTNs.
  693. */
  694. static struct ehci_qh *
  695. qh_make (
  696. struct ehci_hcd *ehci,
  697. struct urb *urb,
  698. gfp_t flags
  699. ) {
  700. struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
  701. u32 info1 = 0, info2 = 0;
  702. int is_input, type;
  703. int maxp = 0;
  704. struct usb_tt *tt = urb->dev->tt;
  705. struct ehci_qh_hw *hw;
  706. if (!qh)
  707. return qh;
  708. /*
  709. * init endpoint/device data for this QH
  710. */
  711. info1 |= usb_pipeendpoint (urb->pipe) << 8;
  712. info1 |= usb_pipedevice (urb->pipe) << 0;
  713. is_input = usb_pipein (urb->pipe);
  714. type = usb_pipetype (urb->pipe);
  715. maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
  716. /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
  717. * acts like up to 3KB, but is built from smaller packets.
  718. */
  719. if (max_packet(maxp) > 1024) {
  720. ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
  721. goto done;
  722. }
  723. /* Compute interrupt scheduling parameters just once, and save.
  724. * - allowing for high bandwidth, how many nsec/uframe are used?
  725. * - split transactions need a second CSPLIT uframe; same question
  726. * - splits also need a schedule gap (for full/low speed I/O)
  727. * - qh has a polling interval
  728. *
  729. * For control/bulk requests, the HC or TT handles these.
  730. */
  731. if (type == PIPE_INTERRUPT) {
  732. qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
  733. is_input, 0,
  734. hb_mult(maxp) * max_packet(maxp)));
  735. qh->start = NO_FRAME;
  736. if (urb->dev->speed == USB_SPEED_HIGH) {
  737. qh->c_usecs = 0;
  738. qh->gap_uf = 0;
  739. qh->period = urb->interval >> 3;
  740. if (qh->period == 0 && urb->interval != 1) {
  741. /* NOTE interval 2 or 4 uframes could work.
  742. * But interval 1 scheduling is simpler, and
  743. * includes high bandwidth.
  744. */
  745. urb->interval = 1;
  746. } else if (qh->period > ehci->periodic_size) {
  747. qh->period = ehci->periodic_size;
  748. urb->interval = qh->period << 3;
  749. }
  750. } else {
  751. int think_time;
  752. /* gap is f(FS/LS transfer times) */
  753. qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
  754. is_input, 0, maxp) / (125 * 1000);
  755. /* FIXME this just approximates SPLIT/CSPLIT times */
  756. if (is_input) { // SPLIT, gap, CSPLIT+DATA
  757. qh->c_usecs = qh->usecs + HS_USECS (0);
  758. qh->usecs = HS_USECS (1);
  759. } else { // SPLIT+DATA, gap, CSPLIT
  760. qh->usecs += HS_USECS (1);
  761. qh->c_usecs = HS_USECS (0);
  762. }
  763. think_time = tt ? tt->think_time : 0;
  764. qh->tt_usecs = NS_TO_US (think_time +
  765. usb_calc_bus_time (urb->dev->speed,
  766. is_input, 0, max_packet (maxp)));
  767. qh->period = urb->interval;
  768. if (qh->period > ehci->periodic_size) {
  769. qh->period = ehci->periodic_size;
  770. urb->interval = qh->period;
  771. }
  772. }
  773. }
  774. /* support for tt scheduling, and access to toggles */
  775. qh->dev = urb->dev;
  776. /* using TT? */
  777. switch (urb->dev->speed) {
  778. case USB_SPEED_LOW:
  779. info1 |= QH_LOW_SPEED;
  780. /* FALL THROUGH */
  781. case USB_SPEED_FULL:
  782. /* EPS 0 means "full" */
  783. if (type != PIPE_INTERRUPT)
  784. info1 |= (EHCI_TUNE_RL_TT << 28);
  785. if (type == PIPE_CONTROL) {
  786. info1 |= QH_CONTROL_EP; /* for TT */
  787. info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
  788. }
  789. info1 |= maxp << 16;
  790. info2 |= (EHCI_TUNE_MULT_TT << 30);
  791. /* Some Freescale processors have an erratum in which the
  792. * port number in the queue head was 0..N-1 instead of 1..N.
  793. */
  794. if (ehci_has_fsl_portno_bug(ehci))
  795. info2 |= (urb->dev->ttport-1) << 23;
  796. else
  797. info2 |= urb->dev->ttport << 23;
  798. /* set the address of the TT; for TDI's integrated
  799. * root hub tt, leave it zeroed.
  800. */
  801. if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
  802. info2 |= tt->hub->devnum << 16;
  803. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
  804. break;
  805. case USB_SPEED_HIGH: /* no TT involved */
  806. info1 |= QH_HIGH_SPEED;
  807. if (type == PIPE_CONTROL) {
  808. info1 |= (EHCI_TUNE_RL_HS << 28);
  809. info1 |= 64 << 16; /* usb2 fixed maxpacket */
  810. info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
  811. info2 |= (EHCI_TUNE_MULT_HS << 30);
  812. } else if (type == PIPE_BULK) {
  813. info1 |= (EHCI_TUNE_RL_HS << 28);
  814. /* The USB spec says that high speed bulk endpoints
  815. * always use 512 byte maxpacket. But some device
  816. * vendors decided to ignore that, and MSFT is happy
  817. * to help them do so. So now people expect to use
  818. * such nonconformant devices with Linux too; sigh.
  819. */
  820. info1 |= max_packet(maxp) << 16;
  821. info2 |= (EHCI_TUNE_MULT_HS << 30);
  822. } else { /* PIPE_INTERRUPT */
  823. info1 |= max_packet (maxp) << 16;
  824. info2 |= hb_mult (maxp) << 30;
  825. }
  826. break;
  827. default:
  828. ehci_dbg(ehci, "bogus dev %p speed %d\n", urb->dev,
  829. urb->dev->speed);
  830. done:
  831. qh_destroy(ehci, qh);
  832. return NULL;
  833. }
  834. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
  835. /* init as live, toggle clear, advance to dummy */
  836. qh->qh_state = QH_STATE_IDLE;
  837. hw = qh->hw;
  838. hw->hw_info1 = cpu_to_hc32(ehci, info1);
  839. hw->hw_info2 = cpu_to_hc32(ehci, info2);
  840. qh->is_out = !is_input;
  841. usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
  842. qh_refresh (ehci, qh);
  843. return qh;
  844. }
  845. /*-------------------------------------------------------------------------*/
  846. static void enable_async(struct ehci_hcd *ehci)
  847. {
  848. if (ehci->async_count++)
  849. return;
  850. /* Stop waiting to turn off the async schedule */
  851. ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_DISABLE_ASYNC);
  852. /* Don't start the schedule until ASS is 0 */
  853. ehci_poll_ASS(ehci);
  854. turn_on_io_watchdog(ehci);
  855. }
  856. static void disable_async(struct ehci_hcd *ehci)
  857. {
  858. if (--ehci->async_count)
  859. return;
  860. /* The async schedule and async_unlink list are supposed to be empty */
  861. WARN_ON(ehci->async->qh_next.qh || ehci->async_unlink);
  862. /* Don't turn off the schedule until ASS is 1 */
  863. ehci_poll_ASS(ehci);
  864. }
  865. /* move qh (and its qtds) onto async queue; maybe enable queue. */
  866. static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
  867. {
  868. __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
  869. struct ehci_qh *head;
  870. /* Don't link a QH if there's a Clear-TT-Buffer pending */
  871. if (unlikely(qh->clearing_tt))
  872. return;
  873. WARN_ON(qh->qh_state != QH_STATE_IDLE);
  874. /* clear halt and/or toggle; and maybe recover from silicon quirk */
  875. qh_refresh(ehci, qh);
  876. /* splice right after start */
  877. head = ehci->async;
  878. qh->qh_next = head->qh_next;
  879. qh->hw->hw_next = head->hw->hw_next;
  880. wmb ();
  881. head->qh_next.qh = qh;
  882. head->hw->hw_next = dma;
  883. qh->xacterrs = 0;
  884. qh->qh_state = QH_STATE_LINKED;
  885. /* qtd completions reported later by interrupt */
  886. enable_async(ehci);
  887. }
  888. /*-------------------------------------------------------------------------*/
  889. /*
  890. * For control/bulk/interrupt, return QH with these TDs appended.
  891. * Allocates and initializes the QH if necessary.
  892. * Returns null if it can't allocate a QH it needs to.
  893. * If the QH has TDs (urbs) already, that's great.
  894. */
  895. static struct ehci_qh *qh_append_tds (
  896. struct ehci_hcd *ehci,
  897. struct urb *urb,
  898. struct list_head *qtd_list,
  899. int epnum,
  900. void **ptr
  901. )
  902. {
  903. struct ehci_qh *qh = NULL;
  904. __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
  905. qh = (struct ehci_qh *) *ptr;
  906. if (unlikely (qh == NULL)) {
  907. /* can't sleep here, we have ehci->lock... */
  908. qh = qh_make (ehci, urb, GFP_ATOMIC);
  909. *ptr = qh;
  910. }
  911. if (likely (qh != NULL)) {
  912. struct ehci_qtd *qtd;
  913. if (unlikely (list_empty (qtd_list)))
  914. qtd = NULL;
  915. else
  916. qtd = list_entry (qtd_list->next, struct ehci_qtd,
  917. qtd_list);
  918. /* control qh may need patching ... */
  919. if (unlikely (epnum == 0)) {
  920. /* usb_reset_device() briefly reverts to address 0 */
  921. if (usb_pipedevice (urb->pipe) == 0)
  922. qh->hw->hw_info1 &= ~qh_addr_mask;
  923. }
  924. /* just one way to queue requests: swap with the dummy qtd.
  925. * only hc or qh_refresh() ever modify the overlay.
  926. */
  927. if (likely (qtd != NULL)) {
  928. struct ehci_qtd *dummy;
  929. dma_addr_t dma;
  930. __hc32 token;
  931. /* to avoid racing the HC, use the dummy td instead of
  932. * the first td of our list (becomes new dummy). both
  933. * tds stay deactivated until we're done, when the
  934. * HC is allowed to fetch the old dummy (4.10.2).
  935. */
  936. token = qtd->hw_token;
  937. qtd->hw_token = HALT_BIT(ehci);
  938. dummy = qh->dummy;
  939. dma = dummy->qtd_dma;
  940. *dummy = *qtd;
  941. dummy->qtd_dma = dma;
  942. list_del (&qtd->qtd_list);
  943. list_add (&dummy->qtd_list, qtd_list);
  944. list_splice_tail(qtd_list, &qh->qtd_list);
  945. ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
  946. qh->dummy = qtd;
  947. /* hc must see the new dummy at list end */
  948. dma = qtd->qtd_dma;
  949. qtd = list_entry (qh->qtd_list.prev,
  950. struct ehci_qtd, qtd_list);
  951. qtd->hw_next = QTD_NEXT(ehci, dma);
  952. /* let the hc process these next qtds */
  953. wmb ();
  954. dummy->hw_token = token;
  955. urb->hcpriv = qh;
  956. }
  957. }
  958. return qh;
  959. }
  960. /*-------------------------------------------------------------------------*/
  961. static int
  962. submit_async (
  963. struct ehci_hcd *ehci,
  964. struct urb *urb,
  965. struct list_head *qtd_list,
  966. gfp_t mem_flags
  967. ) {
  968. int epnum;
  969. unsigned long flags;
  970. struct ehci_qh *qh = NULL;
  971. int rc;
  972. epnum = urb->ep->desc.bEndpointAddress;
  973. #ifdef EHCI_URB_TRACE
  974. {
  975. struct ehci_qtd *qtd;
  976. qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
  977. ehci_dbg(ehci,
  978. "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
  979. __func__, urb->dev->devpath, urb,
  980. epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
  981. urb->transfer_buffer_length,
  982. qtd, urb->ep->hcpriv);
  983. }
  984. #endif
  985. spin_lock_irqsave (&ehci->lock, flags);
  986. if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
  987. rc = -ESHUTDOWN;
  988. goto done;
  989. }
  990. rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
  991. if (unlikely(rc))
  992. goto done;
  993. qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
  994. if (unlikely(qh == NULL)) {
  995. usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  996. rc = -ENOMEM;
  997. goto done;
  998. }
  999. /* Control/bulk operations through TTs don't need scheduling,
  1000. * the HC and TT handle it when the TT has a buffer ready.
  1001. */
  1002. if (likely (qh->qh_state == QH_STATE_IDLE))
  1003. qh_link_async(ehci, qh);
  1004. done:
  1005. spin_unlock_irqrestore (&ehci->lock, flags);
  1006. if (unlikely (qh == NULL))
  1007. qtd_list_free (ehci, urb, qtd_list);
  1008. return rc;
  1009. }
  1010. /*-------------------------------------------------------------------------*/
  1011. static void single_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
  1012. {
  1013. struct ehci_qh *prev;
  1014. /* Add to the end of the list of QHs waiting for the next IAAD */
  1015. qh->qh_state = QH_STATE_UNLINK_WAIT;
  1016. if (ehci->async_unlink)
  1017. ehci->async_unlink_last->unlink_next = qh;
  1018. else
  1019. ehci->async_unlink = qh;
  1020. ehci->async_unlink_last = qh;
  1021. /* Unlink it from the schedule */
  1022. prev = ehci->async;
  1023. while (prev->qh_next.qh != qh)
  1024. prev = prev->qh_next.qh;
  1025. prev->hw->hw_next = qh->hw->hw_next;
  1026. prev->qh_next = qh->qh_next;
  1027. if (ehci->qh_scan_next == qh)
  1028. ehci->qh_scan_next = qh->qh_next.qh;
  1029. }
  1030. static void start_iaa_cycle(struct ehci_hcd *ehci, bool nested)
  1031. {
  1032. /*
  1033. * Do nothing if an IAA cycle is already running or
  1034. * if one will be started shortly.
  1035. */
  1036. if (ehci->async_iaa || ehci->async_unlinking)
  1037. return;
  1038. /* If the controller isn't running, we don't have to wait for it */
  1039. if (unlikely(ehci->rh_state < EHCI_RH_RUNNING)) {
  1040. /* Do all the waiting QHs */
  1041. ehci->async_iaa = ehci->async_unlink;
  1042. ehci->async_unlink = NULL;
  1043. if (!nested) /* Avoid recursion */
  1044. end_unlink_async(ehci);
  1045. /* Otherwise start a new IAA cycle */
  1046. } else if (likely(ehci->rh_state == EHCI_RH_RUNNING)) {
  1047. struct ehci_qh *qh;
  1048. /* Do only the first waiting QH (nVidia bug?) */
  1049. qh = ehci->async_unlink;
  1050. /*
  1051. * Intel (?) bug: The HC can write back the overlay region
  1052. * even after the IAA interrupt occurs. In self-defense,
  1053. * always go through two IAA cycles for each QH.
  1054. */
  1055. if (qh->qh_state == QH_STATE_UNLINK_WAIT) {
  1056. qh->qh_state = QH_STATE_UNLINK;
  1057. } else {
  1058. ehci->async_iaa = qh;
  1059. ehci->async_unlink = qh->unlink_next;
  1060. qh->unlink_next = NULL;
  1061. }
  1062. /* Make sure the unlinks are all visible to the hardware */
  1063. wmb();
  1064. ehci_writel(ehci, ehci->command | CMD_IAAD,
  1065. &ehci->regs->command);
  1066. ehci_readl(ehci, &ehci->regs->command);
  1067. ehci_enable_event(ehci, EHCI_HRTIMER_IAA_WATCHDOG, true);
  1068. }
  1069. }
  1070. /* the async qh for the qtds being unlinked are now gone from the HC */
  1071. static void end_unlink_async(struct ehci_hcd *ehci)
  1072. {
  1073. struct ehci_qh *qh;
  1074. if (ehci->has_synopsys_hc_bug)
  1075. ehci_writel(ehci, (u32) ehci->async->qh_dma,
  1076. &ehci->regs->async_next);
  1077. /* Process the idle QHs */
  1078. restart:
  1079. ehci->async_unlinking = true;
  1080. while (ehci->async_iaa) {
  1081. qh = ehci->async_iaa;
  1082. ehci->async_iaa = qh->unlink_next;
  1083. qh->unlink_next = NULL;
  1084. qh->qh_state = QH_STATE_IDLE;
  1085. qh->qh_next.qh = NULL;
  1086. qh_completions(ehci, qh);
  1087. if (!list_empty(&qh->qtd_list) &&
  1088. ehci->rh_state == EHCI_RH_RUNNING)
  1089. qh_link_async(ehci, qh);
  1090. disable_async(ehci);
  1091. }
  1092. ehci->async_unlinking = false;
  1093. /* Start a new IAA cycle if any QHs are waiting for it */
  1094. if (ehci->async_unlink) {
  1095. start_iaa_cycle(ehci, true);
  1096. if (unlikely(ehci->rh_state < EHCI_RH_RUNNING))
  1097. goto restart;
  1098. }
  1099. }
  1100. static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
  1101. static void unlink_empty_async(struct ehci_hcd *ehci)
  1102. {
  1103. struct ehci_qh *qh;
  1104. struct ehci_qh *qh_to_unlink = NULL;
  1105. bool check_unlinks_later = false;
  1106. int count = 0;
  1107. /* Find the last async QH which has been empty for a timer cycle */
  1108. for (qh = ehci->async->qh_next.qh; qh; qh = qh->qh_next.qh) {
  1109. if (list_empty(&qh->qtd_list) &&
  1110. qh->qh_state == QH_STATE_LINKED) {
  1111. ++count;
  1112. if (qh->unlink_cycle == ehci->async_unlink_cycle)
  1113. check_unlinks_later = true;
  1114. else
  1115. qh_to_unlink = qh;
  1116. }
  1117. }
  1118. /* If nothing else is being unlinked, unlink the last empty QH */
  1119. if (!ehci->async_iaa && !ehci->async_unlink && qh_to_unlink) {
  1120. start_unlink_async(ehci, qh_to_unlink);
  1121. --count;
  1122. }
  1123. /* Other QHs will be handled later */
  1124. if (count > 0) {
  1125. ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
  1126. ++ehci->async_unlink_cycle;
  1127. }
  1128. }
  1129. /* The root hub is suspended; unlink all the async QHs */
  1130. static void unlink_empty_async_suspended(struct ehci_hcd *ehci)
  1131. {
  1132. struct ehci_qh *qh;
  1133. while (ehci->async->qh_next.qh) {
  1134. qh = ehci->async->qh_next.qh;
  1135. WARN_ON(!list_empty(&qh->qtd_list));
  1136. single_unlink_async(ehci, qh);
  1137. }
  1138. start_iaa_cycle(ehci, false);
  1139. }
  1140. /* makes sure the async qh will become idle */
  1141. /* caller must own ehci->lock */
  1142. static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
  1143. {
  1144. /*
  1145. * If the QH isn't linked then there's nothing we can do
  1146. * unless we were called during a giveback, in which case
  1147. * qh_completions() has to deal with it.
  1148. */
  1149. if (qh->qh_state != QH_STATE_LINKED) {
  1150. if (qh->qh_state == QH_STATE_COMPLETING)
  1151. qh->needs_rescan = 1;
  1152. return;
  1153. }
  1154. single_unlink_async(ehci, qh);
  1155. start_iaa_cycle(ehci, false);
  1156. }
  1157. /*-------------------------------------------------------------------------*/
  1158. static void scan_async (struct ehci_hcd *ehci)
  1159. {
  1160. struct ehci_qh *qh;
  1161. bool check_unlinks_later = false;
  1162. ehci->qh_scan_next = ehci->async->qh_next.qh;
  1163. while (ehci->qh_scan_next) {
  1164. qh = ehci->qh_scan_next;
  1165. ehci->qh_scan_next = qh->qh_next.qh;
  1166. rescan:
  1167. /* clean any finished work for this qh */
  1168. if (!list_empty(&qh->qtd_list)) {
  1169. int temp;
  1170. /*
  1171. * Unlinks could happen here; completion reporting
  1172. * drops the lock. That's why ehci->qh_scan_next
  1173. * always holds the next qh to scan; if the next qh
  1174. * gets unlinked then ehci->qh_scan_next is adjusted
  1175. * in single_unlink_async().
  1176. */
  1177. temp = qh_completions(ehci, qh);
  1178. if (qh->needs_rescan) {
  1179. start_unlink_async(ehci, qh);
  1180. } else if (list_empty(&qh->qtd_list)
  1181. && qh->qh_state == QH_STATE_LINKED) {
  1182. qh->unlink_cycle = ehci->async_unlink_cycle;
  1183. check_unlinks_later = true;
  1184. } else if (temp != 0)
  1185. goto rescan;
  1186. }
  1187. }
  1188. /*
  1189. * Unlink empty entries, reducing DMA usage as well
  1190. * as HCD schedule-scanning costs. Delay for any qh
  1191. * we just scanned, there's a not-unusual case that it
  1192. * doesn't stay idle for long.
  1193. */
  1194. if (check_unlinks_later && ehci->rh_state == EHCI_RH_RUNNING &&
  1195. !(ehci->enabled_hrtimer_events &
  1196. BIT(EHCI_HRTIMER_ASYNC_UNLINKS))) {
  1197. ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
  1198. ++ehci->async_unlink_cycle;
  1199. }
  1200. }