ehci-mv.c 8.1 KB

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  1. /*
  2. * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
  3. * Author: Chao Xie <chao.xie@marvell.com>
  4. * Neil Zhang <zhangwm@marvell.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/clk.h>
  15. #include <linux/err.h>
  16. #include <linux/usb/otg.h>
  17. #include <linux/platform_data/mv_usb.h>
  18. #define CAPLENGTH_MASK (0xff)
  19. struct ehci_hcd_mv {
  20. struct usb_hcd *hcd;
  21. /* Which mode does this ehci running OTG/Host ? */
  22. int mode;
  23. void __iomem *phy_regs;
  24. void __iomem *cap_regs;
  25. void __iomem *op_regs;
  26. struct usb_phy *otg;
  27. struct mv_usb_platform_data *pdata;
  28. /* clock source and total clock number */
  29. unsigned int clknum;
  30. struct clk *clk[0];
  31. };
  32. static void ehci_clock_enable(struct ehci_hcd_mv *ehci_mv)
  33. {
  34. unsigned int i;
  35. for (i = 0; i < ehci_mv->clknum; i++)
  36. clk_prepare_enable(ehci_mv->clk[i]);
  37. }
  38. static void ehci_clock_disable(struct ehci_hcd_mv *ehci_mv)
  39. {
  40. unsigned int i;
  41. for (i = 0; i < ehci_mv->clknum; i++)
  42. clk_disable_unprepare(ehci_mv->clk[i]);
  43. }
  44. static int mv_ehci_enable(struct ehci_hcd_mv *ehci_mv)
  45. {
  46. int retval;
  47. ehci_clock_enable(ehci_mv);
  48. if (ehci_mv->pdata->phy_init) {
  49. retval = ehci_mv->pdata->phy_init(ehci_mv->phy_regs);
  50. if (retval)
  51. return retval;
  52. }
  53. return 0;
  54. }
  55. static void mv_ehci_disable(struct ehci_hcd_mv *ehci_mv)
  56. {
  57. if (ehci_mv->pdata->phy_deinit)
  58. ehci_mv->pdata->phy_deinit(ehci_mv->phy_regs);
  59. ehci_clock_disable(ehci_mv);
  60. }
  61. static int mv_ehci_reset(struct usb_hcd *hcd)
  62. {
  63. struct device *dev = hcd->self.controller;
  64. struct ehci_hcd_mv *ehci_mv = dev_get_drvdata(dev);
  65. int retval;
  66. if (ehci_mv == NULL) {
  67. dev_err(dev, "Can not find private ehci data\n");
  68. return -ENODEV;
  69. }
  70. hcd->has_tt = 1;
  71. retval = ehci_setup(hcd);
  72. if (retval)
  73. dev_err(dev, "ehci_setup failed %d\n", retval);
  74. return retval;
  75. }
  76. static const struct hc_driver mv_ehci_hc_driver = {
  77. .description = hcd_name,
  78. .product_desc = "Marvell EHCI",
  79. .hcd_priv_size = sizeof(struct ehci_hcd),
  80. /*
  81. * generic hardware linkage
  82. */
  83. .irq = ehci_irq,
  84. .flags = HCD_MEMORY | HCD_USB2,
  85. /*
  86. * basic lifecycle operations
  87. */
  88. .reset = mv_ehci_reset,
  89. .start = ehci_run,
  90. .stop = ehci_stop,
  91. .shutdown = ehci_shutdown,
  92. /*
  93. * managing i/o requests and associated device resources
  94. */
  95. .urb_enqueue = ehci_urb_enqueue,
  96. .urb_dequeue = ehci_urb_dequeue,
  97. .endpoint_disable = ehci_endpoint_disable,
  98. .endpoint_reset = ehci_endpoint_reset,
  99. .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
  100. /*
  101. * scheduling support
  102. */
  103. .get_frame_number = ehci_get_frame,
  104. /*
  105. * root hub support
  106. */
  107. .hub_status_data = ehci_hub_status_data,
  108. .hub_control = ehci_hub_control,
  109. .bus_suspend = ehci_bus_suspend,
  110. .bus_resume = ehci_bus_resume,
  111. };
  112. static int mv_ehci_probe(struct platform_device *pdev)
  113. {
  114. struct mv_usb_platform_data *pdata = pdev->dev.platform_data;
  115. struct usb_hcd *hcd;
  116. struct ehci_hcd *ehci;
  117. struct ehci_hcd_mv *ehci_mv;
  118. struct resource *r;
  119. int clk_i, retval = -ENODEV;
  120. u32 offset;
  121. size_t size;
  122. if (!pdata) {
  123. dev_err(&pdev->dev, "missing platform_data\n");
  124. return -ENODEV;
  125. }
  126. if (usb_disabled())
  127. return -ENODEV;
  128. hcd = usb_create_hcd(&mv_ehci_hc_driver, &pdev->dev, "mv ehci");
  129. if (!hcd)
  130. return -ENOMEM;
  131. size = sizeof(*ehci_mv) + sizeof(struct clk *) * pdata->clknum;
  132. ehci_mv = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
  133. if (ehci_mv == NULL) {
  134. dev_err(&pdev->dev, "cannot allocate ehci_hcd_mv\n");
  135. retval = -ENOMEM;
  136. goto err_put_hcd;
  137. }
  138. platform_set_drvdata(pdev, ehci_mv);
  139. ehci_mv->pdata = pdata;
  140. ehci_mv->hcd = hcd;
  141. ehci_mv->clknum = pdata->clknum;
  142. for (clk_i = 0; clk_i < ehci_mv->clknum; clk_i++) {
  143. ehci_mv->clk[clk_i] =
  144. devm_clk_get(&pdev->dev, pdata->clkname[clk_i]);
  145. if (IS_ERR(ehci_mv->clk[clk_i])) {
  146. dev_err(&pdev->dev, "error get clck \"%s\"\n",
  147. pdata->clkname[clk_i]);
  148. retval = PTR_ERR(ehci_mv->clk[clk_i]);
  149. goto err_clear_drvdata;
  150. }
  151. }
  152. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phyregs");
  153. if (r == NULL) {
  154. dev_err(&pdev->dev, "no phy I/O memory resource defined\n");
  155. retval = -ENODEV;
  156. goto err_clear_drvdata;
  157. }
  158. ehci_mv->phy_regs = devm_ioremap(&pdev->dev, r->start,
  159. resource_size(r));
  160. if (ehci_mv->phy_regs == 0) {
  161. dev_err(&pdev->dev, "failed to map phy I/O memory\n");
  162. retval = -EFAULT;
  163. goto err_clear_drvdata;
  164. }
  165. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "capregs");
  166. if (!r) {
  167. dev_err(&pdev->dev, "no I/O memory resource defined\n");
  168. retval = -ENODEV;
  169. goto err_clear_drvdata;
  170. }
  171. ehci_mv->cap_regs = devm_ioremap(&pdev->dev, r->start,
  172. resource_size(r));
  173. if (ehci_mv->cap_regs == NULL) {
  174. dev_err(&pdev->dev, "failed to map I/O memory\n");
  175. retval = -EFAULT;
  176. goto err_clear_drvdata;
  177. }
  178. retval = mv_ehci_enable(ehci_mv);
  179. if (retval) {
  180. dev_err(&pdev->dev, "init phy error %d\n", retval);
  181. goto err_clear_drvdata;
  182. }
  183. offset = readl(ehci_mv->cap_regs) & CAPLENGTH_MASK;
  184. ehci_mv->op_regs =
  185. (void __iomem *) ((unsigned long) ehci_mv->cap_regs + offset);
  186. hcd->rsrc_start = r->start;
  187. hcd->rsrc_len = r->end - r->start + 1;
  188. hcd->regs = ehci_mv->op_regs;
  189. hcd->irq = platform_get_irq(pdev, 0);
  190. if (!hcd->irq) {
  191. dev_err(&pdev->dev, "Cannot get irq.");
  192. retval = -ENODEV;
  193. goto err_disable_clk;
  194. }
  195. ehci = hcd_to_ehci(hcd);
  196. ehci->caps = (struct ehci_caps *) ehci_mv->cap_regs;
  197. ehci_mv->mode = pdata->mode;
  198. if (ehci_mv->mode == MV_USB_MODE_OTG) {
  199. #ifdef CONFIG_USB_OTG_UTILS
  200. ehci_mv->otg = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
  201. if (IS_ERR_OR_NULL(ehci_mv->otg)) {
  202. dev_err(&pdev->dev,
  203. "unable to find transceiver\n");
  204. retval = -ENODEV;
  205. goto err_disable_clk;
  206. }
  207. retval = otg_set_host(ehci_mv->otg->otg, &hcd->self);
  208. if (retval < 0) {
  209. dev_err(&pdev->dev,
  210. "unable to register with transceiver\n");
  211. retval = -ENODEV;
  212. goto err_disable_clk;
  213. }
  214. /* otg will enable clock before use as host */
  215. mv_ehci_disable(ehci_mv);
  216. #else
  217. dev_info(&pdev->dev, "MV_USB_MODE_OTG "
  218. "must have CONFIG_USB_OTG_UTILS enabled\n");
  219. goto err_disable_clk;
  220. #endif
  221. } else {
  222. if (pdata->set_vbus)
  223. pdata->set_vbus(1);
  224. retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
  225. if (retval) {
  226. dev_err(&pdev->dev,
  227. "failed to add hcd with err %d\n", retval);
  228. goto err_set_vbus;
  229. }
  230. }
  231. if (pdata->private_init)
  232. pdata->private_init(ehci_mv->op_regs, ehci_mv->phy_regs);
  233. dev_info(&pdev->dev,
  234. "successful find EHCI device with regs 0x%p irq %d"
  235. " working in %s mode\n", hcd->regs, hcd->irq,
  236. ehci_mv->mode == MV_USB_MODE_OTG ? "OTG" : "Host");
  237. return 0;
  238. err_set_vbus:
  239. if (pdata->set_vbus)
  240. pdata->set_vbus(0);
  241. err_disable_clk:
  242. mv_ehci_disable(ehci_mv);
  243. err_clear_drvdata:
  244. platform_set_drvdata(pdev, NULL);
  245. err_put_hcd:
  246. usb_put_hcd(hcd);
  247. return retval;
  248. }
  249. static int mv_ehci_remove(struct platform_device *pdev)
  250. {
  251. struct ehci_hcd_mv *ehci_mv = platform_get_drvdata(pdev);
  252. struct usb_hcd *hcd = ehci_mv->hcd;
  253. if (hcd->rh_registered)
  254. usb_remove_hcd(hcd);
  255. if (!IS_ERR_OR_NULL(ehci_mv->otg))
  256. otg_set_host(ehci_mv->otg->otg, NULL);
  257. if (ehci_mv->mode == MV_USB_MODE_HOST) {
  258. if (ehci_mv->pdata->set_vbus)
  259. ehci_mv->pdata->set_vbus(0);
  260. mv_ehci_disable(ehci_mv);
  261. }
  262. platform_set_drvdata(pdev, NULL);
  263. usb_put_hcd(hcd);
  264. return 0;
  265. }
  266. MODULE_ALIAS("mv-ehci");
  267. static const struct platform_device_id ehci_id_table[] = {
  268. {"pxa-u2oehci", PXA_U2OEHCI},
  269. {"pxa-sph", PXA_SPH},
  270. {"mmp3-hsic", MMP3_HSIC},
  271. {"mmp3-fsic", MMP3_FSIC},
  272. {},
  273. };
  274. static void mv_ehci_shutdown(struct platform_device *pdev)
  275. {
  276. struct ehci_hcd_mv *ehci_mv = platform_get_drvdata(pdev);
  277. struct usb_hcd *hcd = ehci_mv->hcd;
  278. if (!hcd->rh_registered)
  279. return;
  280. if (hcd->driver->shutdown)
  281. hcd->driver->shutdown(hcd);
  282. }
  283. static struct platform_driver ehci_mv_driver = {
  284. .probe = mv_ehci_probe,
  285. .remove = mv_ehci_remove,
  286. .shutdown = mv_ehci_shutdown,
  287. .driver = {
  288. .name = "mv-ehci",
  289. .bus = &platform_bus_type,
  290. },
  291. .id_table = ehci_id_table,
  292. };