ehci-hub.c 30 KB

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  1. /*
  2. * Copyright (C) 2001-2004 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. /*-------------------------------------------------------------------------*/
  20. /*
  21. * EHCI Root Hub ... the nonsharable stuff
  22. *
  23. * Registers don't need cpu_to_le32, that happens transparently
  24. */
  25. /*-------------------------------------------------------------------------*/
  26. #include <linux/usb/otg.h>
  27. #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
  28. #ifdef CONFIG_PM
  29. static int ehci_hub_control(
  30. struct usb_hcd *hcd,
  31. u16 typeReq,
  32. u16 wValue,
  33. u16 wIndex,
  34. char *buf,
  35. u16 wLength
  36. );
  37. /* After a power loss, ports that were owned by the companion must be
  38. * reset so that the companion can still own them.
  39. */
  40. static void ehci_handover_companion_ports(struct ehci_hcd *ehci)
  41. {
  42. u32 __iomem *reg;
  43. u32 status;
  44. int port;
  45. __le32 buf;
  46. struct usb_hcd *hcd = ehci_to_hcd(ehci);
  47. if (!ehci->owned_ports)
  48. return;
  49. /* Make sure the ports are powered */
  50. port = HCS_N_PORTS(ehci->hcs_params);
  51. while (port--) {
  52. if (test_bit(port, &ehci->owned_ports)) {
  53. reg = &ehci->regs->port_status[port];
  54. status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  55. if (!(status & PORT_POWER)) {
  56. status |= PORT_POWER;
  57. ehci_writel(ehci, status, reg);
  58. }
  59. }
  60. }
  61. /* Give the connections some time to appear */
  62. msleep(20);
  63. spin_lock_irq(&ehci->lock);
  64. port = HCS_N_PORTS(ehci->hcs_params);
  65. while (port--) {
  66. if (test_bit(port, &ehci->owned_ports)) {
  67. reg = &ehci->regs->port_status[port];
  68. status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  69. /* Port already owned by companion? */
  70. if (status & PORT_OWNER)
  71. clear_bit(port, &ehci->owned_ports);
  72. else if (test_bit(port, &ehci->companion_ports))
  73. ehci_writel(ehci, status & ~PORT_PE, reg);
  74. else {
  75. spin_unlock_irq(&ehci->lock);
  76. ehci_hub_control(hcd, SetPortFeature,
  77. USB_PORT_FEAT_RESET, port + 1,
  78. NULL, 0);
  79. spin_lock_irq(&ehci->lock);
  80. }
  81. }
  82. }
  83. spin_unlock_irq(&ehci->lock);
  84. if (!ehci->owned_ports)
  85. return;
  86. msleep(90); /* Wait for resets to complete */
  87. spin_lock_irq(&ehci->lock);
  88. port = HCS_N_PORTS(ehci->hcs_params);
  89. while (port--) {
  90. if (test_bit(port, &ehci->owned_ports)) {
  91. spin_unlock_irq(&ehci->lock);
  92. ehci_hub_control(hcd, GetPortStatus,
  93. 0, port + 1,
  94. (char *) &buf, sizeof(buf));
  95. spin_lock_irq(&ehci->lock);
  96. /* The companion should now own the port,
  97. * but if something went wrong the port must not
  98. * remain enabled.
  99. */
  100. reg = &ehci->regs->port_status[port];
  101. status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  102. if (status & PORT_OWNER)
  103. ehci_writel(ehci, status | PORT_CSC, reg);
  104. else {
  105. ehci_dbg(ehci, "failed handover port %d: %x\n",
  106. port + 1, status);
  107. ehci_writel(ehci, status & ~PORT_PE, reg);
  108. }
  109. }
  110. }
  111. ehci->owned_ports = 0;
  112. spin_unlock_irq(&ehci->lock);
  113. }
  114. static int ehci_port_change(struct ehci_hcd *ehci)
  115. {
  116. int i = HCS_N_PORTS(ehci->hcs_params);
  117. /* First check if the controller indicates a change event */
  118. if (ehci_readl(ehci, &ehci->regs->status) & STS_PCD)
  119. return 1;
  120. /*
  121. * Not all controllers appear to update this while going from D3 to D0,
  122. * so check the individual port status registers as well
  123. */
  124. while (i--)
  125. if (ehci_readl(ehci, &ehci->regs->port_status[i]) & PORT_CSC)
  126. return 1;
  127. return 0;
  128. }
  129. static void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci,
  130. bool suspending, bool do_wakeup)
  131. {
  132. int port;
  133. u32 temp;
  134. /* If remote wakeup is enabled for the root hub but disabled
  135. * for the controller, we must adjust all the port wakeup flags
  136. * when the controller is suspended or resumed. In all other
  137. * cases they don't need to be changed.
  138. */
  139. if (!ehci_to_hcd(ehci)->self.root_hub->do_remote_wakeup || do_wakeup)
  140. return;
  141. spin_lock_irq(&ehci->lock);
  142. /* clear phy low-power mode before changing wakeup flags */
  143. if (ehci->has_hostpc) {
  144. port = HCS_N_PORTS(ehci->hcs_params);
  145. while (port--) {
  146. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
  147. temp = ehci_readl(ehci, hostpc_reg);
  148. ehci_writel(ehci, temp & ~HOSTPC_PHCD, hostpc_reg);
  149. }
  150. spin_unlock_irq(&ehci->lock);
  151. msleep(5);
  152. spin_lock_irq(&ehci->lock);
  153. }
  154. port = HCS_N_PORTS(ehci->hcs_params);
  155. while (port--) {
  156. u32 __iomem *reg = &ehci->regs->port_status[port];
  157. u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  158. u32 t2 = t1 & ~PORT_WAKE_BITS;
  159. /* If we are suspending the controller, clear the flags.
  160. * If we are resuming the controller, set the wakeup flags.
  161. */
  162. if (!suspending) {
  163. if (t1 & PORT_CONNECT)
  164. t2 |= PORT_WKOC_E | PORT_WKDISC_E;
  165. else
  166. t2 |= PORT_WKOC_E | PORT_WKCONN_E;
  167. }
  168. ehci_vdbg(ehci, "port %d, %08x -> %08x\n",
  169. port + 1, t1, t2);
  170. ehci_writel(ehci, t2, reg);
  171. }
  172. /* enter phy low-power mode again */
  173. if (ehci->has_hostpc) {
  174. port = HCS_N_PORTS(ehci->hcs_params);
  175. while (port--) {
  176. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
  177. temp = ehci_readl(ehci, hostpc_reg);
  178. ehci_writel(ehci, temp | HOSTPC_PHCD, hostpc_reg);
  179. }
  180. }
  181. /* Does the root hub have a port wakeup pending? */
  182. if (!suspending && ehci_port_change(ehci))
  183. usb_hcd_resume_root_hub(ehci_to_hcd(ehci));
  184. spin_unlock_irq(&ehci->lock);
  185. }
  186. static int ehci_bus_suspend (struct usb_hcd *hcd)
  187. {
  188. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  189. int port;
  190. int mask;
  191. int changed;
  192. ehci_dbg(ehci, "suspend root hub\n");
  193. if (time_before (jiffies, ehci->next_statechange))
  194. msleep(5);
  195. /* stop the schedules */
  196. ehci_quiesce(ehci);
  197. spin_lock_irq (&ehci->lock);
  198. if (ehci->rh_state < EHCI_RH_RUNNING)
  199. goto done;
  200. /* Once the controller is stopped, port resumes that are already
  201. * in progress won't complete. Hence if remote wakeup is enabled
  202. * for the root hub and any ports are in the middle of a resume or
  203. * remote wakeup, we must fail the suspend.
  204. */
  205. if (hcd->self.root_hub->do_remote_wakeup) {
  206. if (ehci->resuming_ports) {
  207. spin_unlock_irq(&ehci->lock);
  208. ehci_dbg(ehci, "suspend failed because a port is resuming\n");
  209. return -EBUSY;
  210. }
  211. }
  212. /* Unlike other USB host controller types, EHCI doesn't have
  213. * any notion of "global" or bus-wide suspend. The driver has
  214. * to manually suspend all the active unsuspended ports, and
  215. * then manually resume them in the bus_resume() routine.
  216. */
  217. ehci->bus_suspended = 0;
  218. ehci->owned_ports = 0;
  219. changed = 0;
  220. port = HCS_N_PORTS(ehci->hcs_params);
  221. while (port--) {
  222. u32 __iomem *reg = &ehci->regs->port_status [port];
  223. u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  224. u32 t2 = t1 & ~PORT_WAKE_BITS;
  225. /* keep track of which ports we suspend */
  226. if (t1 & PORT_OWNER)
  227. set_bit(port, &ehci->owned_ports);
  228. else if ((t1 & PORT_PE) && !(t1 & PORT_SUSPEND)) {
  229. t2 |= PORT_SUSPEND;
  230. set_bit(port, &ehci->bus_suspended);
  231. }
  232. /* enable remote wakeup on all ports, if told to do so */
  233. if (hcd->self.root_hub->do_remote_wakeup) {
  234. /* only enable appropriate wake bits, otherwise the
  235. * hardware can not go phy low power mode. If a race
  236. * condition happens here(connection change during bits
  237. * set), the port change detection will finally fix it.
  238. */
  239. if (t1 & PORT_CONNECT)
  240. t2 |= PORT_WKOC_E | PORT_WKDISC_E;
  241. else
  242. t2 |= PORT_WKOC_E | PORT_WKCONN_E;
  243. }
  244. if (t1 != t2) {
  245. ehci_vdbg (ehci, "port %d, %08x -> %08x\n",
  246. port + 1, t1, t2);
  247. ehci_writel(ehci, t2, reg);
  248. changed = 1;
  249. }
  250. }
  251. if (changed && ehci->has_hostpc) {
  252. spin_unlock_irq(&ehci->lock);
  253. msleep(5); /* 5 ms for HCD to enter low-power mode */
  254. spin_lock_irq(&ehci->lock);
  255. port = HCS_N_PORTS(ehci->hcs_params);
  256. while (port--) {
  257. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
  258. u32 t3;
  259. t3 = ehci_readl(ehci, hostpc_reg);
  260. ehci_writel(ehci, t3 | HOSTPC_PHCD, hostpc_reg);
  261. t3 = ehci_readl(ehci, hostpc_reg);
  262. ehci_dbg(ehci, "Port %d phy low-power mode %s\n",
  263. port, (t3 & HOSTPC_PHCD) ?
  264. "succeeded" : "failed");
  265. }
  266. }
  267. spin_unlock_irq(&ehci->lock);
  268. /* Apparently some devices need a >= 1-uframe delay here */
  269. if (ehci->bus_suspended)
  270. udelay(150);
  271. /* turn off now-idle HC */
  272. ehci_halt (ehci);
  273. spin_lock_irq(&ehci->lock);
  274. if (ehci->enabled_hrtimer_events & BIT(EHCI_HRTIMER_POLL_DEAD))
  275. ehci_handle_controller_death(ehci);
  276. if (ehci->rh_state != EHCI_RH_RUNNING)
  277. goto done;
  278. ehci->rh_state = EHCI_RH_SUSPENDED;
  279. end_unlink_async(ehci);
  280. unlink_empty_async_suspended(ehci);
  281. ehci_handle_intr_unlinks(ehci);
  282. end_free_itds(ehci);
  283. /* allow remote wakeup */
  284. mask = INTR_MASK;
  285. if (!hcd->self.root_hub->do_remote_wakeup)
  286. mask &= ~STS_PCD;
  287. ehci_writel(ehci, mask, &ehci->regs->intr_enable);
  288. ehci_readl(ehci, &ehci->regs->intr_enable);
  289. done:
  290. ehci->next_statechange = jiffies + msecs_to_jiffies(10);
  291. ehci->enabled_hrtimer_events = 0;
  292. ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
  293. spin_unlock_irq (&ehci->lock);
  294. hrtimer_cancel(&ehci->hrtimer);
  295. return 0;
  296. }
  297. /* caller has locked the root hub, and should reset/reinit on error */
  298. static int ehci_bus_resume (struct usb_hcd *hcd)
  299. {
  300. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  301. u32 temp;
  302. u32 power_okay;
  303. int i;
  304. unsigned long resume_needed = 0;
  305. if (time_before (jiffies, ehci->next_statechange))
  306. msleep(5);
  307. spin_lock_irq (&ehci->lock);
  308. if (!HCD_HW_ACCESSIBLE(hcd) || ehci->shutdown)
  309. goto shutdown;
  310. if (unlikely(ehci->debug)) {
  311. if (!dbgp_reset_prep(hcd))
  312. ehci->debug = NULL;
  313. else
  314. dbgp_external_startup(hcd);
  315. }
  316. /* Ideally and we've got a real resume here, and no port's power
  317. * was lost. (For PCI, that means Vaux was maintained.) But we
  318. * could instead be restoring a swsusp snapshot -- so that BIOS was
  319. * the last user of the controller, not reset/pm hardware keeping
  320. * state we gave to it.
  321. */
  322. power_okay = ehci_readl(ehci, &ehci->regs->intr_enable);
  323. ehci_dbg(ehci, "resume root hub%s\n",
  324. power_okay ? "" : " after power loss");
  325. /* at least some APM implementations will try to deliver
  326. * IRQs right away, so delay them until we're ready.
  327. */
  328. ehci_writel(ehci, 0, &ehci->regs->intr_enable);
  329. /* re-init operational registers */
  330. ehci_writel(ehci, 0, &ehci->regs->segment);
  331. ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
  332. ehci_writel(ehci, (u32) ehci->async->qh_dma, &ehci->regs->async_next);
  333. /* restore CMD_RUN, framelist size, and irq threshold */
  334. ehci->command |= CMD_RUN;
  335. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  336. ehci->rh_state = EHCI_RH_RUNNING;
  337. /*
  338. * According to Bugzilla #8190, the port status for some controllers
  339. * will be wrong without a delay. At their wrong status, the port
  340. * is enabled, but not suspended neither resumed.
  341. */
  342. i = HCS_N_PORTS(ehci->hcs_params);
  343. while (i--) {
  344. temp = ehci_readl(ehci, &ehci->regs->port_status[i]);
  345. if ((temp & PORT_PE) &&
  346. !(temp & (PORT_SUSPEND | PORT_RESUME))) {
  347. ehci_dbg(ehci, "Port status(0x%x) is wrong\n", temp);
  348. spin_unlock_irq(&ehci->lock);
  349. msleep(8);
  350. spin_lock_irq(&ehci->lock);
  351. break;
  352. }
  353. }
  354. if (ehci->shutdown)
  355. goto shutdown;
  356. /* clear phy low-power mode before resume */
  357. if (ehci->bus_suspended && ehci->has_hostpc) {
  358. i = HCS_N_PORTS(ehci->hcs_params);
  359. while (i--) {
  360. if (test_bit(i, &ehci->bus_suspended)) {
  361. u32 __iomem *hostpc_reg =
  362. &ehci->regs->hostpc[i];
  363. temp = ehci_readl(ehci, hostpc_reg);
  364. ehci_writel(ehci, temp & ~HOSTPC_PHCD,
  365. hostpc_reg);
  366. }
  367. }
  368. spin_unlock_irq(&ehci->lock);
  369. msleep(5);
  370. spin_lock_irq(&ehci->lock);
  371. if (ehci->shutdown)
  372. goto shutdown;
  373. }
  374. /* manually resume the ports we suspended during bus_suspend() */
  375. i = HCS_N_PORTS (ehci->hcs_params);
  376. while (i--) {
  377. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  378. temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
  379. if (test_bit(i, &ehci->bus_suspended) &&
  380. (temp & PORT_SUSPEND)) {
  381. temp |= PORT_RESUME;
  382. set_bit(i, &resume_needed);
  383. }
  384. ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
  385. }
  386. /* msleep for 20ms only if code is trying to resume port */
  387. if (resume_needed) {
  388. spin_unlock_irq(&ehci->lock);
  389. msleep(20);
  390. spin_lock_irq(&ehci->lock);
  391. if (ehci->shutdown)
  392. goto shutdown;
  393. }
  394. i = HCS_N_PORTS (ehci->hcs_params);
  395. while (i--) {
  396. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  397. if (test_bit(i, &resume_needed)) {
  398. temp &= ~(PORT_RWC_BITS | PORT_RESUME);
  399. ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
  400. ehci_vdbg (ehci, "resumed port %d\n", i + 1);
  401. }
  402. }
  403. ehci->next_statechange = jiffies + msecs_to_jiffies(5);
  404. spin_unlock_irq(&ehci->lock);
  405. ehci_handover_companion_ports(ehci);
  406. /* Now we can safely re-enable irqs */
  407. spin_lock_irq(&ehci->lock);
  408. if (ehci->shutdown)
  409. goto shutdown;
  410. ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
  411. (void) ehci_readl(ehci, &ehci->regs->intr_enable);
  412. spin_unlock_irq(&ehci->lock);
  413. return 0;
  414. shutdown:
  415. spin_unlock_irq(&ehci->lock);
  416. return -ESHUTDOWN;
  417. }
  418. #else
  419. #define ehci_bus_suspend NULL
  420. #define ehci_bus_resume NULL
  421. #endif /* CONFIG_PM */
  422. /*-------------------------------------------------------------------------*/
  423. /*
  424. * Sets the owner of a port
  425. */
  426. static void set_owner(struct ehci_hcd *ehci, int portnum, int new_owner)
  427. {
  428. u32 __iomem *status_reg;
  429. u32 port_status;
  430. int try;
  431. status_reg = &ehci->regs->port_status[portnum];
  432. /*
  433. * The controller won't set the OWNER bit if the port is
  434. * enabled, so this loop will sometimes require at least two
  435. * iterations: one to disable the port and one to set OWNER.
  436. */
  437. for (try = 4; try > 0; --try) {
  438. spin_lock_irq(&ehci->lock);
  439. port_status = ehci_readl(ehci, status_reg);
  440. if ((port_status & PORT_OWNER) == new_owner
  441. || (port_status & (PORT_OWNER | PORT_CONNECT))
  442. == 0)
  443. try = 0;
  444. else {
  445. port_status ^= PORT_OWNER;
  446. port_status &= ~(PORT_PE | PORT_RWC_BITS);
  447. ehci_writel(ehci, port_status, status_reg);
  448. }
  449. spin_unlock_irq(&ehci->lock);
  450. if (try > 1)
  451. msleep(5);
  452. }
  453. }
  454. /*-------------------------------------------------------------------------*/
  455. static int check_reset_complete (
  456. struct ehci_hcd *ehci,
  457. int index,
  458. u32 __iomem *status_reg,
  459. int port_status
  460. ) {
  461. if (!(port_status & PORT_CONNECT))
  462. return port_status;
  463. /* if reset finished and it's still not enabled -- handoff */
  464. if (!(port_status & PORT_PE)) {
  465. /* with integrated TT, there's nobody to hand it to! */
  466. if (ehci_is_TDI(ehci)) {
  467. ehci_dbg (ehci,
  468. "Failed to enable port %d on root hub TT\n",
  469. index+1);
  470. return port_status;
  471. }
  472. ehci_dbg (ehci, "port %d full speed --> companion\n",
  473. index + 1);
  474. // what happens if HCS_N_CC(params) == 0 ?
  475. port_status |= PORT_OWNER;
  476. port_status &= ~PORT_RWC_BITS;
  477. ehci_writel(ehci, port_status, status_reg);
  478. /* ensure 440EPX ohci controller state is operational */
  479. if (ehci->has_amcc_usb23)
  480. set_ohci_hcfs(ehci, 1);
  481. } else {
  482. ehci_dbg(ehci, "port %d reset complete, port enabled\n",
  483. index + 1);
  484. /* ensure 440EPx ohci controller state is suspended */
  485. if (ehci->has_amcc_usb23)
  486. set_ohci_hcfs(ehci, 0);
  487. }
  488. return port_status;
  489. }
  490. /*-------------------------------------------------------------------------*/
  491. /* build "status change" packet (one or two bytes) from HC registers */
  492. static int
  493. ehci_hub_status_data (struct usb_hcd *hcd, char *buf)
  494. {
  495. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  496. u32 temp, status;
  497. u32 mask;
  498. int ports, i, retval = 1;
  499. unsigned long flags;
  500. u32 ppcd = 0;
  501. /* init status to no-changes */
  502. buf [0] = 0;
  503. ports = HCS_N_PORTS (ehci->hcs_params);
  504. if (ports > 7) {
  505. buf [1] = 0;
  506. retval++;
  507. }
  508. /* Inform the core about resumes-in-progress by returning
  509. * a non-zero value even if there are no status changes.
  510. */
  511. status = ehci->resuming_ports;
  512. /* Some boards (mostly VIA?) report bogus overcurrent indications,
  513. * causing massive log spam unless we completely ignore them. It
  514. * may be relevant that VIA VT8235 controllers, where PORT_POWER is
  515. * always set, seem to clear PORT_OCC and PORT_CSC when writing to
  516. * PORT_POWER; that's surprising, but maybe within-spec.
  517. */
  518. if (!ignore_oc)
  519. mask = PORT_CSC | PORT_PEC | PORT_OCC;
  520. else
  521. mask = PORT_CSC | PORT_PEC;
  522. // PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND
  523. /* no hub change reports (bit 0) for now (power, ...) */
  524. /* port N changes (bit N)? */
  525. spin_lock_irqsave (&ehci->lock, flags);
  526. /* get per-port change detect bits */
  527. if (ehci->has_ppcd)
  528. ppcd = ehci_readl(ehci, &ehci->regs->status) >> 16;
  529. for (i = 0; i < ports; i++) {
  530. /* leverage per-port change bits feature */
  531. if (ehci->has_ppcd && !(ppcd & (1 << i)))
  532. continue;
  533. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  534. /*
  535. * Return status information even for ports with OWNER set.
  536. * Otherwise khubd wouldn't see the disconnect event when a
  537. * high-speed device is switched over to the companion
  538. * controller by the user.
  539. */
  540. if ((temp & mask) != 0 || test_bit(i, &ehci->port_c_suspend)
  541. || (ehci->reset_done[i] && time_after_eq(
  542. jiffies, ehci->reset_done[i]))) {
  543. if (i < 7)
  544. buf [0] |= 1 << (i + 1);
  545. else
  546. buf [1] |= 1 << (i - 7);
  547. status = STS_PCD;
  548. }
  549. }
  550. /* If a resume is in progress, make sure it can finish */
  551. if (ehci->resuming_ports)
  552. mod_timer(&hcd->rh_timer, jiffies + msecs_to_jiffies(25));
  553. spin_unlock_irqrestore (&ehci->lock, flags);
  554. return status ? retval : 0;
  555. }
  556. /*-------------------------------------------------------------------------*/
  557. static void
  558. ehci_hub_descriptor (
  559. struct ehci_hcd *ehci,
  560. struct usb_hub_descriptor *desc
  561. ) {
  562. int ports = HCS_N_PORTS (ehci->hcs_params);
  563. u16 temp;
  564. desc->bDescriptorType = 0x29;
  565. desc->bPwrOn2PwrGood = 10; /* ehci 1.0, 2.3.9 says 20ms max */
  566. desc->bHubContrCurrent = 0;
  567. desc->bNbrPorts = ports;
  568. temp = 1 + (ports / 8);
  569. desc->bDescLength = 7 + 2 * temp;
  570. /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
  571. memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
  572. memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
  573. temp = 0x0008; /* per-port overcurrent reporting */
  574. if (HCS_PPC (ehci->hcs_params))
  575. temp |= 0x0001; /* per-port power control */
  576. else
  577. temp |= 0x0002; /* no power switching */
  578. #if 0
  579. // re-enable when we support USB_PORT_FEAT_INDICATOR below.
  580. if (HCS_INDICATOR (ehci->hcs_params))
  581. temp |= 0x0080; /* per-port indicators (LEDs) */
  582. #endif
  583. desc->wHubCharacteristics = cpu_to_le16(temp);
  584. }
  585. /*-------------------------------------------------------------------------*/
  586. static int ehci_hub_control (
  587. struct usb_hcd *hcd,
  588. u16 typeReq,
  589. u16 wValue,
  590. u16 wIndex,
  591. char *buf,
  592. u16 wLength
  593. ) {
  594. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  595. int ports = HCS_N_PORTS (ehci->hcs_params);
  596. u32 __iomem *status_reg = &ehci->regs->port_status[
  597. (wIndex & 0xff) - 1];
  598. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[(wIndex & 0xff) - 1];
  599. u32 temp, temp1, status;
  600. unsigned long flags;
  601. int retval = 0;
  602. unsigned selector;
  603. /*
  604. * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
  605. * HCS_INDICATOR may say we can change LEDs to off/amber/green.
  606. * (track current state ourselves) ... blink for diagnostics,
  607. * power, "this is the one", etc. EHCI spec supports this.
  608. */
  609. spin_lock_irqsave (&ehci->lock, flags);
  610. switch (typeReq) {
  611. case ClearHubFeature:
  612. switch (wValue) {
  613. case C_HUB_LOCAL_POWER:
  614. case C_HUB_OVER_CURRENT:
  615. /* no hub-wide feature/status flags */
  616. break;
  617. default:
  618. goto error;
  619. }
  620. break;
  621. case ClearPortFeature:
  622. if (!wIndex || wIndex > ports)
  623. goto error;
  624. wIndex--;
  625. temp = ehci_readl(ehci, status_reg);
  626. temp &= ~PORT_RWC_BITS;
  627. /*
  628. * Even if OWNER is set, so the port is owned by the
  629. * companion controller, khubd needs to be able to clear
  630. * the port-change status bits (especially
  631. * USB_PORT_STAT_C_CONNECTION).
  632. */
  633. switch (wValue) {
  634. case USB_PORT_FEAT_ENABLE:
  635. ehci_writel(ehci, temp & ~PORT_PE, status_reg);
  636. break;
  637. case USB_PORT_FEAT_C_ENABLE:
  638. ehci_writel(ehci, temp | PORT_PEC, status_reg);
  639. break;
  640. case USB_PORT_FEAT_SUSPEND:
  641. if (temp & PORT_RESET)
  642. goto error;
  643. if (ehci->no_selective_suspend)
  644. break;
  645. #ifdef CONFIG_USB_OTG
  646. if ((hcd->self.otg_port == (wIndex + 1))
  647. && hcd->self.b_hnp_enable) {
  648. otg_start_hnp(hcd->phy->otg);
  649. break;
  650. }
  651. #endif
  652. if (!(temp & PORT_SUSPEND))
  653. break;
  654. if ((temp & PORT_PE) == 0)
  655. goto error;
  656. /* clear phy low-power mode before resume */
  657. if (ehci->has_hostpc) {
  658. temp1 = ehci_readl(ehci, hostpc_reg);
  659. ehci_writel(ehci, temp1 & ~HOSTPC_PHCD,
  660. hostpc_reg);
  661. spin_unlock_irqrestore(&ehci->lock, flags);
  662. msleep(5);/* wait to leave low-power mode */
  663. spin_lock_irqsave(&ehci->lock, flags);
  664. }
  665. /* resume signaling for 20 msec */
  666. temp &= ~PORT_WAKE_BITS;
  667. ehci_writel(ehci, temp | PORT_RESUME, status_reg);
  668. ehci->reset_done[wIndex] = jiffies
  669. + msecs_to_jiffies(20);
  670. break;
  671. case USB_PORT_FEAT_C_SUSPEND:
  672. clear_bit(wIndex, &ehci->port_c_suspend);
  673. break;
  674. case USB_PORT_FEAT_POWER:
  675. if (HCS_PPC (ehci->hcs_params))
  676. ehci_writel(ehci, temp & ~PORT_POWER,
  677. status_reg);
  678. break;
  679. case USB_PORT_FEAT_C_CONNECTION:
  680. ehci_writel(ehci, temp | PORT_CSC, status_reg);
  681. break;
  682. case USB_PORT_FEAT_C_OVER_CURRENT:
  683. ehci_writel(ehci, temp | PORT_OCC, status_reg);
  684. break;
  685. case USB_PORT_FEAT_C_RESET:
  686. /* GetPortStatus clears reset */
  687. break;
  688. default:
  689. goto error;
  690. }
  691. ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */
  692. break;
  693. case GetHubDescriptor:
  694. ehci_hub_descriptor (ehci, (struct usb_hub_descriptor *)
  695. buf);
  696. break;
  697. case GetHubStatus:
  698. /* no hub-wide feature/status flags */
  699. memset (buf, 0, 4);
  700. //cpu_to_le32s ((u32 *) buf);
  701. break;
  702. case GetPortStatus:
  703. if (!wIndex || wIndex > ports)
  704. goto error;
  705. wIndex--;
  706. status = 0;
  707. temp = ehci_readl(ehci, status_reg);
  708. // wPortChange bits
  709. if (temp & PORT_CSC)
  710. status |= USB_PORT_STAT_C_CONNECTION << 16;
  711. if (temp & PORT_PEC)
  712. status |= USB_PORT_STAT_C_ENABLE << 16;
  713. if ((temp & PORT_OCC) && !ignore_oc){
  714. status |= USB_PORT_STAT_C_OVERCURRENT << 16;
  715. /*
  716. * Hubs should disable port power on over-current.
  717. * However, not all EHCI implementations do this
  718. * automatically, even if they _do_ support per-port
  719. * power switching; they're allowed to just limit the
  720. * current. khubd will turn the power back on.
  721. */
  722. if ((temp & PORT_OC) && HCS_PPC(ehci->hcs_params)) {
  723. ehci_writel(ehci,
  724. temp & ~(PORT_RWC_BITS | PORT_POWER),
  725. status_reg);
  726. temp = ehci_readl(ehci, status_reg);
  727. }
  728. }
  729. /* whoever resumes must GetPortStatus to complete it!! */
  730. if (temp & PORT_RESUME) {
  731. /* Remote Wakeup received? */
  732. if (!ehci->reset_done[wIndex]) {
  733. /* resume signaling for 20 msec */
  734. ehci->reset_done[wIndex] = jiffies
  735. + msecs_to_jiffies(20);
  736. usb_hcd_start_port_resume(&hcd->self, wIndex);
  737. /* check the port again */
  738. mod_timer(&ehci_to_hcd(ehci)->rh_timer,
  739. ehci->reset_done[wIndex]);
  740. }
  741. /* resume completed? */
  742. else if (time_after_eq(jiffies,
  743. ehci->reset_done[wIndex])) {
  744. clear_bit(wIndex, &ehci->suspended_ports);
  745. set_bit(wIndex, &ehci->port_c_suspend);
  746. ehci->reset_done[wIndex] = 0;
  747. usb_hcd_end_port_resume(&hcd->self, wIndex);
  748. /* stop resume signaling */
  749. temp = ehci_readl(ehci, status_reg);
  750. ehci_writel(ehci,
  751. temp & ~(PORT_RWC_BITS | PORT_RESUME),
  752. status_reg);
  753. clear_bit(wIndex, &ehci->resuming_ports);
  754. retval = handshake(ehci, status_reg,
  755. PORT_RESUME, 0, 2000 /* 2msec */);
  756. if (retval != 0) {
  757. ehci_err(ehci,
  758. "port %d resume error %d\n",
  759. wIndex + 1, retval);
  760. goto error;
  761. }
  762. temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
  763. }
  764. }
  765. /* whoever resets must GetPortStatus to complete it!! */
  766. if ((temp & PORT_RESET)
  767. && time_after_eq(jiffies,
  768. ehci->reset_done[wIndex])) {
  769. status |= USB_PORT_STAT_C_RESET << 16;
  770. ehci->reset_done [wIndex] = 0;
  771. clear_bit(wIndex, &ehci->resuming_ports);
  772. /* force reset to complete */
  773. ehci_writel(ehci, temp & ~(PORT_RWC_BITS | PORT_RESET),
  774. status_reg);
  775. /* REVISIT: some hardware needs 550+ usec to clear
  776. * this bit; seems too long to spin routinely...
  777. */
  778. retval = handshake(ehci, status_reg,
  779. PORT_RESET, 0, 1000);
  780. if (retval != 0) {
  781. ehci_err (ehci, "port %d reset error %d\n",
  782. wIndex + 1, retval);
  783. goto error;
  784. }
  785. /* see what we found out */
  786. temp = check_reset_complete (ehci, wIndex, status_reg,
  787. ehci_readl(ehci, status_reg));
  788. }
  789. if (!(temp & (PORT_RESUME|PORT_RESET))) {
  790. ehci->reset_done[wIndex] = 0;
  791. clear_bit(wIndex, &ehci->resuming_ports);
  792. }
  793. /* transfer dedicated ports to the companion hc */
  794. if ((temp & PORT_CONNECT) &&
  795. test_bit(wIndex, &ehci->companion_ports)) {
  796. temp &= ~PORT_RWC_BITS;
  797. temp |= PORT_OWNER;
  798. ehci_writel(ehci, temp, status_reg);
  799. ehci_dbg(ehci, "port %d --> companion\n", wIndex + 1);
  800. temp = ehci_readl(ehci, status_reg);
  801. }
  802. /*
  803. * Even if OWNER is set, there's no harm letting khubd
  804. * see the wPortStatus values (they should all be 0 except
  805. * for PORT_POWER anyway).
  806. */
  807. if (temp & PORT_CONNECT) {
  808. status |= USB_PORT_STAT_CONNECTION;
  809. // status may be from integrated TT
  810. if (ehci->has_hostpc) {
  811. temp1 = ehci_readl(ehci, hostpc_reg);
  812. status |= ehci_port_speed(ehci, temp1);
  813. } else
  814. status |= ehci_port_speed(ehci, temp);
  815. }
  816. if (temp & PORT_PE)
  817. status |= USB_PORT_STAT_ENABLE;
  818. /* maybe the port was unsuspended without our knowledge */
  819. if (temp & (PORT_SUSPEND|PORT_RESUME)) {
  820. status |= USB_PORT_STAT_SUSPEND;
  821. } else if (test_bit(wIndex, &ehci->suspended_ports)) {
  822. clear_bit(wIndex, &ehci->suspended_ports);
  823. clear_bit(wIndex, &ehci->resuming_ports);
  824. ehci->reset_done[wIndex] = 0;
  825. if (temp & PORT_PE)
  826. set_bit(wIndex, &ehci->port_c_suspend);
  827. usb_hcd_end_port_resume(&hcd->self, wIndex);
  828. }
  829. if (temp & PORT_OC)
  830. status |= USB_PORT_STAT_OVERCURRENT;
  831. if (temp & PORT_RESET)
  832. status |= USB_PORT_STAT_RESET;
  833. if (temp & PORT_POWER)
  834. status |= USB_PORT_STAT_POWER;
  835. if (test_bit(wIndex, &ehci->port_c_suspend))
  836. status |= USB_PORT_STAT_C_SUSPEND << 16;
  837. #ifndef VERBOSE_DEBUG
  838. if (status & ~0xffff) /* only if wPortChange is interesting */
  839. #endif
  840. dbg_port (ehci, "GetStatus", wIndex + 1, temp);
  841. put_unaligned_le32(status, buf);
  842. break;
  843. case SetHubFeature:
  844. switch (wValue) {
  845. case C_HUB_LOCAL_POWER:
  846. case C_HUB_OVER_CURRENT:
  847. /* no hub-wide feature/status flags */
  848. break;
  849. default:
  850. goto error;
  851. }
  852. break;
  853. case SetPortFeature:
  854. selector = wIndex >> 8;
  855. wIndex &= 0xff;
  856. if (unlikely(ehci->debug)) {
  857. /* If the debug port is active any port
  858. * feature requests should get denied */
  859. if (wIndex == HCS_DEBUG_PORT(ehci->hcs_params) &&
  860. (readl(&ehci->debug->control) & DBGP_ENABLED)) {
  861. retval = -ENODEV;
  862. goto error_exit;
  863. }
  864. }
  865. if (!wIndex || wIndex > ports)
  866. goto error;
  867. wIndex--;
  868. temp = ehci_readl(ehci, status_reg);
  869. if (temp & PORT_OWNER)
  870. break;
  871. temp &= ~PORT_RWC_BITS;
  872. switch (wValue) {
  873. case USB_PORT_FEAT_SUSPEND:
  874. if (ehci->no_selective_suspend)
  875. break;
  876. if ((temp & PORT_PE) == 0
  877. || (temp & PORT_RESET) != 0)
  878. goto error;
  879. /* After above check the port must be connected.
  880. * Set appropriate bit thus could put phy into low power
  881. * mode if we have hostpc feature
  882. */
  883. temp &= ~PORT_WKCONN_E;
  884. temp |= PORT_WKDISC_E | PORT_WKOC_E;
  885. ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
  886. if (ehci->has_hostpc) {
  887. spin_unlock_irqrestore(&ehci->lock, flags);
  888. msleep(5);/* 5ms for HCD enter low pwr mode */
  889. spin_lock_irqsave(&ehci->lock, flags);
  890. temp1 = ehci_readl(ehci, hostpc_reg);
  891. ehci_writel(ehci, temp1 | HOSTPC_PHCD,
  892. hostpc_reg);
  893. temp1 = ehci_readl(ehci, hostpc_reg);
  894. ehci_dbg(ehci, "Port%d phy low pwr mode %s\n",
  895. wIndex, (temp1 & HOSTPC_PHCD) ?
  896. "succeeded" : "failed");
  897. }
  898. set_bit(wIndex, &ehci->suspended_ports);
  899. break;
  900. case USB_PORT_FEAT_POWER:
  901. if (HCS_PPC (ehci->hcs_params))
  902. ehci_writel(ehci, temp | PORT_POWER,
  903. status_reg);
  904. break;
  905. case USB_PORT_FEAT_RESET:
  906. if (temp & PORT_RESUME)
  907. goto error;
  908. /* line status bits may report this as low speed,
  909. * which can be fine if this root hub has a
  910. * transaction translator built in.
  911. */
  912. if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
  913. && !ehci_is_TDI(ehci)
  914. && PORT_USB11 (temp)) {
  915. ehci_dbg (ehci,
  916. "port %d low speed --> companion\n",
  917. wIndex + 1);
  918. temp |= PORT_OWNER;
  919. } else {
  920. ehci_vdbg (ehci, "port %d reset\n", wIndex + 1);
  921. temp |= PORT_RESET;
  922. temp &= ~PORT_PE;
  923. /*
  924. * caller must wait, then call GetPortStatus
  925. * usb 2.0 spec says 50 ms resets on root
  926. */
  927. ehci->reset_done [wIndex] = jiffies
  928. + msecs_to_jiffies (50);
  929. }
  930. ehci_writel(ehci, temp, status_reg);
  931. break;
  932. /* For downstream facing ports (these): one hub port is put
  933. * into test mode according to USB2 11.24.2.13, then the hub
  934. * must be reset (which for root hub now means rmmod+modprobe,
  935. * or else system reboot). See EHCI 2.3.9 and 4.14 for info
  936. * about the EHCI-specific stuff.
  937. */
  938. case USB_PORT_FEAT_TEST:
  939. if (!selector || selector > 5)
  940. goto error;
  941. spin_unlock_irqrestore(&ehci->lock, flags);
  942. ehci_quiesce(ehci);
  943. spin_lock_irqsave(&ehci->lock, flags);
  944. /* Put all enabled ports into suspend */
  945. while (ports--) {
  946. u32 __iomem *sreg =
  947. &ehci->regs->port_status[ports];
  948. temp = ehci_readl(ehci, sreg) & ~PORT_RWC_BITS;
  949. if (temp & PORT_PE)
  950. ehci_writel(ehci, temp | PORT_SUSPEND,
  951. sreg);
  952. }
  953. spin_unlock_irqrestore(&ehci->lock, flags);
  954. ehci_halt(ehci);
  955. spin_lock_irqsave(&ehci->lock, flags);
  956. temp = ehci_readl(ehci, status_reg);
  957. temp |= selector << 16;
  958. ehci_writel(ehci, temp, status_reg);
  959. break;
  960. default:
  961. goto error;
  962. }
  963. ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
  964. break;
  965. default:
  966. error:
  967. /* "stall" on error */
  968. retval = -EPIPE;
  969. }
  970. error_exit:
  971. spin_unlock_irqrestore (&ehci->lock, flags);
  972. return retval;
  973. }
  974. static void ehci_relinquish_port(struct usb_hcd *hcd, int portnum)
  975. {
  976. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  977. if (ehci_is_TDI(ehci))
  978. return;
  979. set_owner(ehci, --portnum, PORT_OWNER);
  980. }
  981. static int ehci_port_handed_over(struct usb_hcd *hcd, int portnum)
  982. {
  983. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  984. u32 __iomem *reg;
  985. if (ehci_is_TDI(ehci))
  986. return 0;
  987. reg = &ehci->regs->port_status[portnum - 1];
  988. return ehci_readl(ehci, reg) & PORT_OWNER;
  989. }