fsl_qe_udc.c 63 KB

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  1. /*
  2. * driver/usb/gadget/fsl_qe_udc.c
  3. *
  4. * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
  5. *
  6. * Xie Xiaobo <X.Xie@freescale.com>
  7. * Li Yang <leoli@freescale.com>
  8. * Based on bareboard code from Shlomi Gridish.
  9. *
  10. * Description:
  11. * Freescle QE/CPM USB Pheripheral Controller Driver
  12. * The controller can be found on MPC8360, MPC8272, and etc.
  13. * MPC8360 Rev 1.1 may need QE mircocode update
  14. *
  15. * This program is free software; you can redistribute it and/or modify it
  16. * under the terms of the GNU General Public License as published by the
  17. * Free Software Foundation; either version 2 of the License, or (at your
  18. * option) any later version.
  19. */
  20. #undef USB_TRACE
  21. #include <linux/module.h>
  22. #include <linux/kernel.h>
  23. #include <linux/init.h>
  24. #include <linux/ioport.h>
  25. #include <linux/types.h>
  26. #include <linux/errno.h>
  27. #include <linux/err.h>
  28. #include <linux/slab.h>
  29. #include <linux/list.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/io.h>
  32. #include <linux/moduleparam.h>
  33. #include <linux/of_address.h>
  34. #include <linux/of_platform.h>
  35. #include <linux/dma-mapping.h>
  36. #include <linux/usb/ch9.h>
  37. #include <linux/usb/gadget.h>
  38. #include <linux/usb/otg.h>
  39. #include <asm/qe.h>
  40. #include <asm/cpm.h>
  41. #include <asm/dma.h>
  42. #include <asm/reg.h>
  43. #include "fsl_qe_udc.h"
  44. #define DRIVER_DESC "Freescale QE/CPM USB Device Controller driver"
  45. #define DRIVER_AUTHOR "Xie XiaoBo"
  46. #define DRIVER_VERSION "1.0"
  47. #define DMA_ADDR_INVALID (~(dma_addr_t)0)
  48. static const char driver_name[] = "fsl_qe_udc";
  49. static const char driver_desc[] = DRIVER_DESC;
  50. /*ep name is important in gadget, it should obey the convention of ep_match()*/
  51. static const char *const ep_name[] = {
  52. "ep0-control", /* everyone has ep0 */
  53. /* 3 configurable endpoints */
  54. "ep1",
  55. "ep2",
  56. "ep3",
  57. };
  58. static struct usb_endpoint_descriptor qe_ep0_desc = {
  59. .bLength = USB_DT_ENDPOINT_SIZE,
  60. .bDescriptorType = USB_DT_ENDPOINT,
  61. .bEndpointAddress = 0,
  62. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  63. .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
  64. };
  65. /********************************************************************
  66. * Internal Used Function Start
  67. ********************************************************************/
  68. /*-----------------------------------------------------------------
  69. * done() - retire a request; caller blocked irqs
  70. *--------------------------------------------------------------*/
  71. static void done(struct qe_ep *ep, struct qe_req *req, int status)
  72. {
  73. struct qe_udc *udc = ep->udc;
  74. unsigned char stopped = ep->stopped;
  75. /* the req->queue pointer is used by ep_queue() func, in which
  76. * the request will be added into a udc_ep->queue 'd tail
  77. * so here the req will be dropped from the ep->queue
  78. */
  79. list_del_init(&req->queue);
  80. /* req.status should be set as -EINPROGRESS in ep_queue() */
  81. if (req->req.status == -EINPROGRESS)
  82. req->req.status = status;
  83. else
  84. status = req->req.status;
  85. if (req->mapped) {
  86. dma_unmap_single(udc->gadget.dev.parent,
  87. req->req.dma, req->req.length,
  88. ep_is_in(ep)
  89. ? DMA_TO_DEVICE
  90. : DMA_FROM_DEVICE);
  91. req->req.dma = DMA_ADDR_INVALID;
  92. req->mapped = 0;
  93. } else
  94. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  95. req->req.dma, req->req.length,
  96. ep_is_in(ep)
  97. ? DMA_TO_DEVICE
  98. : DMA_FROM_DEVICE);
  99. if (status && (status != -ESHUTDOWN))
  100. dev_vdbg(udc->dev, "complete %s req %p stat %d len %u/%u\n",
  101. ep->ep.name, &req->req, status,
  102. req->req.actual, req->req.length);
  103. /* don't modify queue heads during completion callback */
  104. ep->stopped = 1;
  105. spin_unlock(&udc->lock);
  106. /* this complete() should a func implemented by gadget layer,
  107. * eg fsg->bulk_in_complete() */
  108. if (req->req.complete)
  109. req->req.complete(&ep->ep, &req->req);
  110. spin_lock(&udc->lock);
  111. ep->stopped = stopped;
  112. }
  113. /*-----------------------------------------------------------------
  114. * nuke(): delete all requests related to this ep
  115. *--------------------------------------------------------------*/
  116. static void nuke(struct qe_ep *ep, int status)
  117. {
  118. /* Whether this eq has request linked */
  119. while (!list_empty(&ep->queue)) {
  120. struct qe_req *req = NULL;
  121. req = list_entry(ep->queue.next, struct qe_req, queue);
  122. done(ep, req, status);
  123. }
  124. }
  125. /*---------------------------------------------------------------------------*
  126. * USB and Endpoint manipulate process, include parameter and register *
  127. *---------------------------------------------------------------------------*/
  128. /* @value: 1--set stall 0--clean stall */
  129. static int qe_eprx_stall_change(struct qe_ep *ep, int value)
  130. {
  131. u16 tem_usep;
  132. u8 epnum = ep->epnum;
  133. struct qe_udc *udc = ep->udc;
  134. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  135. tem_usep = tem_usep & ~USB_RHS_MASK;
  136. if (value == 1)
  137. tem_usep |= USB_RHS_STALL;
  138. else if (ep->dir == USB_DIR_IN)
  139. tem_usep |= USB_RHS_IGNORE_OUT;
  140. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  141. return 0;
  142. }
  143. static int qe_eptx_stall_change(struct qe_ep *ep, int value)
  144. {
  145. u16 tem_usep;
  146. u8 epnum = ep->epnum;
  147. struct qe_udc *udc = ep->udc;
  148. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  149. tem_usep = tem_usep & ~USB_THS_MASK;
  150. if (value == 1)
  151. tem_usep |= USB_THS_STALL;
  152. else if (ep->dir == USB_DIR_OUT)
  153. tem_usep |= USB_THS_IGNORE_IN;
  154. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  155. return 0;
  156. }
  157. static int qe_ep0_stall(struct qe_udc *udc)
  158. {
  159. qe_eptx_stall_change(&udc->eps[0], 1);
  160. qe_eprx_stall_change(&udc->eps[0], 1);
  161. udc->ep0_state = WAIT_FOR_SETUP;
  162. udc->ep0_dir = 0;
  163. return 0;
  164. }
  165. static int qe_eprx_nack(struct qe_ep *ep)
  166. {
  167. u8 epnum = ep->epnum;
  168. struct qe_udc *udc = ep->udc;
  169. if (ep->state == EP_STATE_IDLE) {
  170. /* Set the ep's nack */
  171. clrsetbits_be16(&udc->usb_regs->usb_usep[epnum],
  172. USB_RHS_MASK, USB_RHS_NACK);
  173. /* Mask Rx and Busy interrupts */
  174. clrbits16(&udc->usb_regs->usb_usbmr,
  175. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  176. ep->state = EP_STATE_NACK;
  177. }
  178. return 0;
  179. }
  180. static int qe_eprx_normal(struct qe_ep *ep)
  181. {
  182. struct qe_udc *udc = ep->udc;
  183. if (ep->state == EP_STATE_NACK) {
  184. clrsetbits_be16(&udc->usb_regs->usb_usep[ep->epnum],
  185. USB_RTHS_MASK, USB_THS_IGNORE_IN);
  186. /* Unmask RX interrupts */
  187. out_be16(&udc->usb_regs->usb_usber,
  188. USB_E_BSY_MASK | USB_E_RXB_MASK);
  189. setbits16(&udc->usb_regs->usb_usbmr,
  190. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  191. ep->state = EP_STATE_IDLE;
  192. ep->has_data = 0;
  193. }
  194. return 0;
  195. }
  196. static int qe_ep_cmd_stoptx(struct qe_ep *ep)
  197. {
  198. if (ep->udc->soc_type == PORT_CPM)
  199. cpm_command(CPM_USB_STOP_TX | (ep->epnum << CPM_USB_EP_SHIFT),
  200. CPM_USB_STOP_TX_OPCODE);
  201. else
  202. qe_issue_cmd(QE_USB_STOP_TX, QE_CR_SUBBLOCK_USB,
  203. ep->epnum, 0);
  204. return 0;
  205. }
  206. static int qe_ep_cmd_restarttx(struct qe_ep *ep)
  207. {
  208. if (ep->udc->soc_type == PORT_CPM)
  209. cpm_command(CPM_USB_RESTART_TX | (ep->epnum <<
  210. CPM_USB_EP_SHIFT), CPM_USB_RESTART_TX_OPCODE);
  211. else
  212. qe_issue_cmd(QE_USB_RESTART_TX, QE_CR_SUBBLOCK_USB,
  213. ep->epnum, 0);
  214. return 0;
  215. }
  216. static int qe_ep_flushtxfifo(struct qe_ep *ep)
  217. {
  218. struct qe_udc *udc = ep->udc;
  219. int i;
  220. i = (int)ep->epnum;
  221. qe_ep_cmd_stoptx(ep);
  222. out_8(&udc->usb_regs->usb_uscom,
  223. USB_CMD_FLUSH_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  224. out_be16(&udc->ep_param[i]->tbptr, in_be16(&udc->ep_param[i]->tbase));
  225. out_be32(&udc->ep_param[i]->tstate, 0);
  226. out_be16(&udc->ep_param[i]->tbcnt, 0);
  227. ep->c_txbd = ep->txbase;
  228. ep->n_txbd = ep->txbase;
  229. qe_ep_cmd_restarttx(ep);
  230. return 0;
  231. }
  232. static int qe_ep_filltxfifo(struct qe_ep *ep)
  233. {
  234. struct qe_udc *udc = ep->udc;
  235. out_8(&udc->usb_regs->usb_uscom,
  236. USB_CMD_STR_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  237. return 0;
  238. }
  239. static int qe_epbds_reset(struct qe_udc *udc, int pipe_num)
  240. {
  241. struct qe_ep *ep;
  242. u32 bdring_len;
  243. struct qe_bd __iomem *bd;
  244. int i;
  245. ep = &udc->eps[pipe_num];
  246. if (ep->dir == USB_DIR_OUT)
  247. bdring_len = USB_BDRING_LEN_RX;
  248. else
  249. bdring_len = USB_BDRING_LEN;
  250. bd = ep->rxbase;
  251. for (i = 0; i < (bdring_len - 1); i++) {
  252. out_be32((u32 __iomem *)bd, R_E | R_I);
  253. bd++;
  254. }
  255. out_be32((u32 __iomem *)bd, R_E | R_I | R_W);
  256. bd = ep->txbase;
  257. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  258. out_be32(&bd->buf, 0);
  259. out_be32((u32 __iomem *)bd, 0);
  260. bd++;
  261. }
  262. out_be32((u32 __iomem *)bd, T_W);
  263. return 0;
  264. }
  265. static int qe_ep_reset(struct qe_udc *udc, int pipe_num)
  266. {
  267. struct qe_ep *ep;
  268. u16 tmpusep;
  269. ep = &udc->eps[pipe_num];
  270. tmpusep = in_be16(&udc->usb_regs->usb_usep[pipe_num]);
  271. tmpusep &= ~USB_RTHS_MASK;
  272. switch (ep->dir) {
  273. case USB_DIR_BOTH:
  274. qe_ep_flushtxfifo(ep);
  275. break;
  276. case USB_DIR_OUT:
  277. tmpusep |= USB_THS_IGNORE_IN;
  278. break;
  279. case USB_DIR_IN:
  280. qe_ep_flushtxfifo(ep);
  281. tmpusep |= USB_RHS_IGNORE_OUT;
  282. break;
  283. default:
  284. break;
  285. }
  286. out_be16(&udc->usb_regs->usb_usep[pipe_num], tmpusep);
  287. qe_epbds_reset(udc, pipe_num);
  288. return 0;
  289. }
  290. static int qe_ep_toggledata01(struct qe_ep *ep)
  291. {
  292. ep->data01 ^= 0x1;
  293. return 0;
  294. }
  295. static int qe_ep_bd_init(struct qe_udc *udc, unsigned char pipe_num)
  296. {
  297. struct qe_ep *ep = &udc->eps[pipe_num];
  298. unsigned long tmp_addr = 0;
  299. struct usb_ep_para __iomem *epparam;
  300. int i;
  301. struct qe_bd __iomem *bd;
  302. int bdring_len;
  303. if (ep->dir == USB_DIR_OUT)
  304. bdring_len = USB_BDRING_LEN_RX;
  305. else
  306. bdring_len = USB_BDRING_LEN;
  307. epparam = udc->ep_param[pipe_num];
  308. /* alloc multi-ram for BD rings and set the ep parameters */
  309. tmp_addr = cpm_muram_alloc(sizeof(struct qe_bd) * (bdring_len +
  310. USB_BDRING_LEN_TX), QE_ALIGNMENT_OF_BD);
  311. if (IS_ERR_VALUE(tmp_addr))
  312. return -ENOMEM;
  313. out_be16(&epparam->rbase, (u16)tmp_addr);
  314. out_be16(&epparam->tbase, (u16)(tmp_addr +
  315. (sizeof(struct qe_bd) * bdring_len)));
  316. out_be16(&epparam->rbptr, in_be16(&epparam->rbase));
  317. out_be16(&epparam->tbptr, in_be16(&epparam->tbase));
  318. ep->rxbase = cpm_muram_addr(tmp_addr);
  319. ep->txbase = cpm_muram_addr(tmp_addr + (sizeof(struct qe_bd)
  320. * bdring_len));
  321. ep->n_rxbd = ep->rxbase;
  322. ep->e_rxbd = ep->rxbase;
  323. ep->n_txbd = ep->txbase;
  324. ep->c_txbd = ep->txbase;
  325. ep->data01 = 0; /* data0 */
  326. /* Init TX and RX bds */
  327. bd = ep->rxbase;
  328. for (i = 0; i < bdring_len - 1; i++) {
  329. out_be32(&bd->buf, 0);
  330. out_be32((u32 __iomem *)bd, 0);
  331. bd++;
  332. }
  333. out_be32(&bd->buf, 0);
  334. out_be32((u32 __iomem *)bd, R_W);
  335. bd = ep->txbase;
  336. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  337. out_be32(&bd->buf, 0);
  338. out_be32((u32 __iomem *)bd, 0);
  339. bd++;
  340. }
  341. out_be32(&bd->buf, 0);
  342. out_be32((u32 __iomem *)bd, T_W);
  343. return 0;
  344. }
  345. static int qe_ep_rxbd_update(struct qe_ep *ep)
  346. {
  347. unsigned int size;
  348. int i;
  349. unsigned int tmp;
  350. struct qe_bd __iomem *bd;
  351. unsigned int bdring_len;
  352. if (ep->rxbase == NULL)
  353. return -EINVAL;
  354. bd = ep->rxbase;
  355. ep->rxframe = kmalloc(sizeof(*ep->rxframe), GFP_ATOMIC);
  356. if (ep->rxframe == NULL) {
  357. dev_err(ep->udc->dev, "malloc rxframe failed\n");
  358. return -ENOMEM;
  359. }
  360. qe_frame_init(ep->rxframe);
  361. if (ep->dir == USB_DIR_OUT)
  362. bdring_len = USB_BDRING_LEN_RX;
  363. else
  364. bdring_len = USB_BDRING_LEN;
  365. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (bdring_len + 1);
  366. ep->rxbuffer = kzalloc(size, GFP_ATOMIC);
  367. if (ep->rxbuffer == NULL) {
  368. dev_err(ep->udc->dev, "malloc rxbuffer failed,size=%d\n",
  369. size);
  370. kfree(ep->rxframe);
  371. return -ENOMEM;
  372. }
  373. ep->rxbuf_d = virt_to_phys((void *)ep->rxbuffer);
  374. if (ep->rxbuf_d == DMA_ADDR_INVALID) {
  375. ep->rxbuf_d = dma_map_single(ep->udc->gadget.dev.parent,
  376. ep->rxbuffer,
  377. size,
  378. DMA_FROM_DEVICE);
  379. ep->rxbufmap = 1;
  380. } else {
  381. dma_sync_single_for_device(ep->udc->gadget.dev.parent,
  382. ep->rxbuf_d, size,
  383. DMA_FROM_DEVICE);
  384. ep->rxbufmap = 0;
  385. }
  386. size = ep->ep.maxpacket + USB_CRC_SIZE + 2;
  387. tmp = ep->rxbuf_d;
  388. tmp = (u32)(((tmp >> 2) << 2) + 4);
  389. for (i = 0; i < bdring_len - 1; i++) {
  390. out_be32(&bd->buf, tmp);
  391. out_be32((u32 __iomem *)bd, (R_E | R_I));
  392. tmp = tmp + size;
  393. bd++;
  394. }
  395. out_be32(&bd->buf, tmp);
  396. out_be32((u32 __iomem *)bd, (R_E | R_I | R_W));
  397. return 0;
  398. }
  399. static int qe_ep_register_init(struct qe_udc *udc, unsigned char pipe_num)
  400. {
  401. struct qe_ep *ep = &udc->eps[pipe_num];
  402. struct usb_ep_para __iomem *epparam;
  403. u16 usep, logepnum;
  404. u16 tmp;
  405. u8 rtfcr = 0;
  406. epparam = udc->ep_param[pipe_num];
  407. usep = 0;
  408. logepnum = (ep->ep.desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
  409. usep |= (logepnum << USB_EPNUM_SHIFT);
  410. switch (ep->ep.desc->bmAttributes & 0x03) {
  411. case USB_ENDPOINT_XFER_BULK:
  412. usep |= USB_TRANS_BULK;
  413. break;
  414. case USB_ENDPOINT_XFER_ISOC:
  415. usep |= USB_TRANS_ISO;
  416. break;
  417. case USB_ENDPOINT_XFER_INT:
  418. usep |= USB_TRANS_INT;
  419. break;
  420. default:
  421. usep |= USB_TRANS_CTR;
  422. break;
  423. }
  424. switch (ep->dir) {
  425. case USB_DIR_OUT:
  426. usep |= USB_THS_IGNORE_IN;
  427. break;
  428. case USB_DIR_IN:
  429. usep |= USB_RHS_IGNORE_OUT;
  430. break;
  431. default:
  432. break;
  433. }
  434. out_be16(&udc->usb_regs->usb_usep[pipe_num], usep);
  435. rtfcr = 0x30;
  436. out_8(&epparam->rbmr, rtfcr);
  437. out_8(&epparam->tbmr, rtfcr);
  438. tmp = (u16)(ep->ep.maxpacket + USB_CRC_SIZE);
  439. /* MRBLR must be divisble by 4 */
  440. tmp = (u16)(((tmp >> 2) << 2) + 4);
  441. out_be16(&epparam->mrblr, tmp);
  442. return 0;
  443. }
  444. static int qe_ep_init(struct qe_udc *udc,
  445. unsigned char pipe_num,
  446. const struct usb_endpoint_descriptor *desc)
  447. {
  448. struct qe_ep *ep = &udc->eps[pipe_num];
  449. unsigned long flags;
  450. int reval = 0;
  451. u16 max = 0;
  452. max = usb_endpoint_maxp(desc);
  453. /* check the max package size validate for this endpoint */
  454. /* Refer to USB2.0 spec table 9-13,
  455. */
  456. if (pipe_num != 0) {
  457. switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
  458. case USB_ENDPOINT_XFER_BULK:
  459. if (strstr(ep->ep.name, "-iso")
  460. || strstr(ep->ep.name, "-int"))
  461. goto en_done;
  462. switch (udc->gadget.speed) {
  463. case USB_SPEED_HIGH:
  464. if ((max == 128) || (max == 256) || (max == 512))
  465. break;
  466. default:
  467. switch (max) {
  468. case 4:
  469. case 8:
  470. case 16:
  471. case 32:
  472. case 64:
  473. break;
  474. default:
  475. case USB_SPEED_LOW:
  476. goto en_done;
  477. }
  478. }
  479. break;
  480. case USB_ENDPOINT_XFER_INT:
  481. if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
  482. goto en_done;
  483. switch (udc->gadget.speed) {
  484. case USB_SPEED_HIGH:
  485. if (max <= 1024)
  486. break;
  487. case USB_SPEED_FULL:
  488. if (max <= 64)
  489. break;
  490. default:
  491. if (max <= 8)
  492. break;
  493. goto en_done;
  494. }
  495. break;
  496. case USB_ENDPOINT_XFER_ISOC:
  497. if (strstr(ep->ep.name, "-bulk")
  498. || strstr(ep->ep.name, "-int"))
  499. goto en_done;
  500. switch (udc->gadget.speed) {
  501. case USB_SPEED_HIGH:
  502. if (max <= 1024)
  503. break;
  504. case USB_SPEED_FULL:
  505. if (max <= 1023)
  506. break;
  507. default:
  508. goto en_done;
  509. }
  510. break;
  511. case USB_ENDPOINT_XFER_CONTROL:
  512. if (strstr(ep->ep.name, "-iso")
  513. || strstr(ep->ep.name, "-int"))
  514. goto en_done;
  515. switch (udc->gadget.speed) {
  516. case USB_SPEED_HIGH:
  517. case USB_SPEED_FULL:
  518. switch (max) {
  519. case 1:
  520. case 2:
  521. case 4:
  522. case 8:
  523. case 16:
  524. case 32:
  525. case 64:
  526. break;
  527. default:
  528. goto en_done;
  529. }
  530. case USB_SPEED_LOW:
  531. switch (max) {
  532. case 1:
  533. case 2:
  534. case 4:
  535. case 8:
  536. break;
  537. default:
  538. goto en_done;
  539. }
  540. default:
  541. goto en_done;
  542. }
  543. break;
  544. default:
  545. goto en_done;
  546. }
  547. } /* if ep0*/
  548. spin_lock_irqsave(&udc->lock, flags);
  549. /* initialize ep structure */
  550. ep->ep.maxpacket = max;
  551. ep->tm = (u8)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
  552. ep->ep.desc = desc;
  553. ep->stopped = 0;
  554. ep->init = 1;
  555. if (pipe_num == 0) {
  556. ep->dir = USB_DIR_BOTH;
  557. udc->ep0_dir = USB_DIR_OUT;
  558. udc->ep0_state = WAIT_FOR_SETUP;
  559. } else {
  560. switch (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) {
  561. case USB_DIR_OUT:
  562. ep->dir = USB_DIR_OUT;
  563. break;
  564. case USB_DIR_IN:
  565. ep->dir = USB_DIR_IN;
  566. default:
  567. break;
  568. }
  569. }
  570. /* hardware special operation */
  571. qe_ep_bd_init(udc, pipe_num);
  572. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_OUT)) {
  573. reval = qe_ep_rxbd_update(ep);
  574. if (reval)
  575. goto en_done1;
  576. }
  577. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_IN)) {
  578. ep->txframe = kmalloc(sizeof(*ep->txframe), GFP_ATOMIC);
  579. if (ep->txframe == NULL) {
  580. dev_err(udc->dev, "malloc txframe failed\n");
  581. goto en_done2;
  582. }
  583. qe_frame_init(ep->txframe);
  584. }
  585. qe_ep_register_init(udc, pipe_num);
  586. /* Now HW will be NAKing transfers to that EP,
  587. * until a buffer is queued to it. */
  588. spin_unlock_irqrestore(&udc->lock, flags);
  589. return 0;
  590. en_done2:
  591. kfree(ep->rxbuffer);
  592. kfree(ep->rxframe);
  593. en_done1:
  594. spin_unlock_irqrestore(&udc->lock, flags);
  595. en_done:
  596. dev_err(udc->dev, "failed to initialize %s\n", ep->ep.name);
  597. return -ENODEV;
  598. }
  599. static inline void qe_usb_enable(struct qe_udc *udc)
  600. {
  601. setbits8(&udc->usb_regs->usb_usmod, USB_MODE_EN);
  602. }
  603. static inline void qe_usb_disable(struct qe_udc *udc)
  604. {
  605. clrbits8(&udc->usb_regs->usb_usmod, USB_MODE_EN);
  606. }
  607. /*----------------------------------------------------------------------------*
  608. * USB and EP basic manipulate function end *
  609. *----------------------------------------------------------------------------*/
  610. /******************************************************************************
  611. UDC transmit and receive process
  612. ******************************************************************************/
  613. static void recycle_one_rxbd(struct qe_ep *ep)
  614. {
  615. u32 bdstatus;
  616. bdstatus = in_be32((u32 __iomem *)ep->e_rxbd);
  617. bdstatus = R_I | R_E | (bdstatus & R_W);
  618. out_be32((u32 __iomem *)ep->e_rxbd, bdstatus);
  619. if (bdstatus & R_W)
  620. ep->e_rxbd = ep->rxbase;
  621. else
  622. ep->e_rxbd++;
  623. }
  624. static void recycle_rxbds(struct qe_ep *ep, unsigned char stopatnext)
  625. {
  626. u32 bdstatus;
  627. struct qe_bd __iomem *bd, *nextbd;
  628. unsigned char stop = 0;
  629. nextbd = ep->n_rxbd;
  630. bd = ep->e_rxbd;
  631. bdstatus = in_be32((u32 __iomem *)bd);
  632. while (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK) && !stop) {
  633. bdstatus = R_E | R_I | (bdstatus & R_W);
  634. out_be32((u32 __iomem *)bd, bdstatus);
  635. if (bdstatus & R_W)
  636. bd = ep->rxbase;
  637. else
  638. bd++;
  639. bdstatus = in_be32((u32 __iomem *)bd);
  640. if (stopatnext && (bd == nextbd))
  641. stop = 1;
  642. }
  643. ep->e_rxbd = bd;
  644. }
  645. static void ep_recycle_rxbds(struct qe_ep *ep)
  646. {
  647. struct qe_bd __iomem *bd = ep->n_rxbd;
  648. u32 bdstatus;
  649. u8 epnum = ep->epnum;
  650. struct qe_udc *udc = ep->udc;
  651. bdstatus = in_be32((u32 __iomem *)bd);
  652. if (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK)) {
  653. bd = ep->rxbase +
  654. ((in_be16(&udc->ep_param[epnum]->rbptr) -
  655. in_be16(&udc->ep_param[epnum]->rbase))
  656. >> 3);
  657. bdstatus = in_be32((u32 __iomem *)bd);
  658. if (bdstatus & R_W)
  659. bd = ep->rxbase;
  660. else
  661. bd++;
  662. ep->e_rxbd = bd;
  663. recycle_rxbds(ep, 0);
  664. ep->e_rxbd = ep->n_rxbd;
  665. } else
  666. recycle_rxbds(ep, 1);
  667. if (in_be16(&udc->usb_regs->usb_usber) & USB_E_BSY_MASK)
  668. out_be16(&udc->usb_regs->usb_usber, USB_E_BSY_MASK);
  669. if (ep->has_data <= 0 && (!list_empty(&ep->queue)))
  670. qe_eprx_normal(ep);
  671. ep->localnack = 0;
  672. }
  673. static void setup_received_handle(struct qe_udc *udc,
  674. struct usb_ctrlrequest *setup);
  675. static int qe_ep_rxframe_handle(struct qe_ep *ep);
  676. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req);
  677. /* when BD PID is setup, handle the packet */
  678. static int ep0_setup_handle(struct qe_udc *udc)
  679. {
  680. struct qe_ep *ep = &udc->eps[0];
  681. struct qe_frame *pframe;
  682. unsigned int fsize;
  683. u8 *cp;
  684. pframe = ep->rxframe;
  685. if ((frame_get_info(pframe) & PID_SETUP)
  686. && (udc->ep0_state == WAIT_FOR_SETUP)) {
  687. fsize = frame_get_length(pframe);
  688. if (unlikely(fsize != 8))
  689. return -EINVAL;
  690. cp = (u8 *)&udc->local_setup_buff;
  691. memcpy(cp, pframe->data, fsize);
  692. ep->data01 = 1;
  693. /* handle the usb command base on the usb_ctrlrequest */
  694. setup_received_handle(udc, &udc->local_setup_buff);
  695. return 0;
  696. }
  697. return -EINVAL;
  698. }
  699. static int qe_ep0_rx(struct qe_udc *udc)
  700. {
  701. struct qe_ep *ep = &udc->eps[0];
  702. struct qe_frame *pframe;
  703. struct qe_bd __iomem *bd;
  704. u32 bdstatus, length;
  705. u32 vaddr;
  706. pframe = ep->rxframe;
  707. if (ep->dir == USB_DIR_IN) {
  708. dev_err(udc->dev, "ep0 not a control endpoint\n");
  709. return -EINVAL;
  710. }
  711. bd = ep->n_rxbd;
  712. bdstatus = in_be32((u32 __iomem *)bd);
  713. length = bdstatus & BD_LENGTH_MASK;
  714. while (!(bdstatus & R_E) && length) {
  715. if ((bdstatus & R_F) && (bdstatus & R_L)
  716. && !(bdstatus & R_ERROR)) {
  717. if (length == USB_CRC_SIZE) {
  718. udc->ep0_state = WAIT_FOR_SETUP;
  719. dev_vdbg(udc->dev,
  720. "receive a ZLP in status phase\n");
  721. } else {
  722. qe_frame_clean(pframe);
  723. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  724. frame_set_data(pframe, (u8 *)vaddr);
  725. frame_set_length(pframe,
  726. (length - USB_CRC_SIZE));
  727. frame_set_status(pframe, FRAME_OK);
  728. switch (bdstatus & R_PID) {
  729. case R_PID_SETUP:
  730. frame_set_info(pframe, PID_SETUP);
  731. break;
  732. case R_PID_DATA1:
  733. frame_set_info(pframe, PID_DATA1);
  734. break;
  735. default:
  736. frame_set_info(pframe, PID_DATA0);
  737. break;
  738. }
  739. if ((bdstatus & R_PID) == R_PID_SETUP)
  740. ep0_setup_handle(udc);
  741. else
  742. qe_ep_rxframe_handle(ep);
  743. }
  744. } else {
  745. dev_err(udc->dev, "The receive frame with error!\n");
  746. }
  747. /* note: don't clear the rxbd's buffer address */
  748. recycle_one_rxbd(ep);
  749. /* Get next BD */
  750. if (bdstatus & R_W)
  751. bd = ep->rxbase;
  752. else
  753. bd++;
  754. bdstatus = in_be32((u32 __iomem *)bd);
  755. length = bdstatus & BD_LENGTH_MASK;
  756. }
  757. ep->n_rxbd = bd;
  758. return 0;
  759. }
  760. static int qe_ep_rxframe_handle(struct qe_ep *ep)
  761. {
  762. struct qe_frame *pframe;
  763. u8 framepid = 0;
  764. unsigned int fsize;
  765. u8 *cp;
  766. struct qe_req *req;
  767. pframe = ep->rxframe;
  768. if (frame_get_info(pframe) & PID_DATA1)
  769. framepid = 0x1;
  770. if (framepid != ep->data01) {
  771. dev_err(ep->udc->dev, "the data01 error!\n");
  772. return -EIO;
  773. }
  774. fsize = frame_get_length(pframe);
  775. if (list_empty(&ep->queue)) {
  776. dev_err(ep->udc->dev, "the %s have no requeue!\n", ep->name);
  777. } else {
  778. req = list_entry(ep->queue.next, struct qe_req, queue);
  779. cp = (u8 *)(req->req.buf) + req->req.actual;
  780. if (cp) {
  781. memcpy(cp, pframe->data, fsize);
  782. req->req.actual += fsize;
  783. if ((fsize < ep->ep.maxpacket) ||
  784. (req->req.actual >= req->req.length)) {
  785. if (ep->epnum == 0)
  786. ep0_req_complete(ep->udc, req);
  787. else
  788. done(ep, req, 0);
  789. if (list_empty(&ep->queue) && ep->epnum != 0)
  790. qe_eprx_nack(ep);
  791. }
  792. }
  793. }
  794. qe_ep_toggledata01(ep);
  795. return 0;
  796. }
  797. static void ep_rx_tasklet(unsigned long data)
  798. {
  799. struct qe_udc *udc = (struct qe_udc *)data;
  800. struct qe_ep *ep;
  801. struct qe_frame *pframe;
  802. struct qe_bd __iomem *bd;
  803. unsigned long flags;
  804. u32 bdstatus, length;
  805. u32 vaddr, i;
  806. spin_lock_irqsave(&udc->lock, flags);
  807. for (i = 1; i < USB_MAX_ENDPOINTS; i++) {
  808. ep = &udc->eps[i];
  809. if (ep->dir == USB_DIR_IN || ep->enable_tasklet == 0) {
  810. dev_dbg(udc->dev,
  811. "This is a transmit ep or disable tasklet!\n");
  812. continue;
  813. }
  814. pframe = ep->rxframe;
  815. bd = ep->n_rxbd;
  816. bdstatus = in_be32((u32 __iomem *)bd);
  817. length = bdstatus & BD_LENGTH_MASK;
  818. while (!(bdstatus & R_E) && length) {
  819. if (list_empty(&ep->queue)) {
  820. qe_eprx_nack(ep);
  821. dev_dbg(udc->dev,
  822. "The rxep have noreq %d\n",
  823. ep->has_data);
  824. break;
  825. }
  826. if ((bdstatus & R_F) && (bdstatus & R_L)
  827. && !(bdstatus & R_ERROR)) {
  828. qe_frame_clean(pframe);
  829. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  830. frame_set_data(pframe, (u8 *)vaddr);
  831. frame_set_length(pframe,
  832. (length - USB_CRC_SIZE));
  833. frame_set_status(pframe, FRAME_OK);
  834. switch (bdstatus & R_PID) {
  835. case R_PID_DATA1:
  836. frame_set_info(pframe, PID_DATA1);
  837. break;
  838. case R_PID_SETUP:
  839. frame_set_info(pframe, PID_SETUP);
  840. break;
  841. default:
  842. frame_set_info(pframe, PID_DATA0);
  843. break;
  844. }
  845. /* handle the rx frame */
  846. qe_ep_rxframe_handle(ep);
  847. } else {
  848. dev_err(udc->dev,
  849. "error in received frame\n");
  850. }
  851. /* note: don't clear the rxbd's buffer address */
  852. /*clear the length */
  853. out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK);
  854. ep->has_data--;
  855. if (!(ep->localnack))
  856. recycle_one_rxbd(ep);
  857. /* Get next BD */
  858. if (bdstatus & R_W)
  859. bd = ep->rxbase;
  860. else
  861. bd++;
  862. bdstatus = in_be32((u32 __iomem *)bd);
  863. length = bdstatus & BD_LENGTH_MASK;
  864. }
  865. ep->n_rxbd = bd;
  866. if (ep->localnack)
  867. ep_recycle_rxbds(ep);
  868. ep->enable_tasklet = 0;
  869. } /* for i=1 */
  870. spin_unlock_irqrestore(&udc->lock, flags);
  871. }
  872. static int qe_ep_rx(struct qe_ep *ep)
  873. {
  874. struct qe_udc *udc;
  875. struct qe_frame *pframe;
  876. struct qe_bd __iomem *bd;
  877. u16 swoffs, ucoffs, emptybds;
  878. udc = ep->udc;
  879. pframe = ep->rxframe;
  880. if (ep->dir == USB_DIR_IN) {
  881. dev_err(udc->dev, "transmit ep in rx function\n");
  882. return -EINVAL;
  883. }
  884. bd = ep->n_rxbd;
  885. swoffs = (u16)(bd - ep->rxbase);
  886. ucoffs = (u16)((in_be16(&udc->ep_param[ep->epnum]->rbptr) -
  887. in_be16(&udc->ep_param[ep->epnum]->rbase)) >> 3);
  888. if (swoffs < ucoffs)
  889. emptybds = USB_BDRING_LEN_RX - ucoffs + swoffs;
  890. else
  891. emptybds = swoffs - ucoffs;
  892. if (emptybds < MIN_EMPTY_BDS) {
  893. qe_eprx_nack(ep);
  894. ep->localnack = 1;
  895. dev_vdbg(udc->dev, "%d empty bds, send NACK\n", emptybds);
  896. }
  897. ep->has_data = USB_BDRING_LEN_RX - emptybds;
  898. if (list_empty(&ep->queue)) {
  899. qe_eprx_nack(ep);
  900. dev_vdbg(udc->dev, "The rxep have no req queued with %d BDs\n",
  901. ep->has_data);
  902. return 0;
  903. }
  904. tasklet_schedule(&udc->rx_tasklet);
  905. ep->enable_tasklet = 1;
  906. return 0;
  907. }
  908. /* send data from a frame, no matter what tx_req */
  909. static int qe_ep_tx(struct qe_ep *ep, struct qe_frame *frame)
  910. {
  911. struct qe_udc *udc = ep->udc;
  912. struct qe_bd __iomem *bd;
  913. u16 saveusbmr;
  914. u32 bdstatus, pidmask;
  915. u32 paddr;
  916. if (ep->dir == USB_DIR_OUT) {
  917. dev_err(udc->dev, "receive ep passed to tx function\n");
  918. return -EINVAL;
  919. }
  920. /* Disable the Tx interrupt */
  921. saveusbmr = in_be16(&udc->usb_regs->usb_usbmr);
  922. out_be16(&udc->usb_regs->usb_usbmr,
  923. saveusbmr & ~(USB_E_TXB_MASK | USB_E_TXE_MASK));
  924. bd = ep->n_txbd;
  925. bdstatus = in_be32((u32 __iomem *)bd);
  926. if (!(bdstatus & (T_R | BD_LENGTH_MASK))) {
  927. if (frame_get_length(frame) == 0) {
  928. frame_set_data(frame, udc->nullbuf);
  929. frame_set_length(frame, 2);
  930. frame->info |= (ZLP | NO_CRC);
  931. dev_vdbg(udc->dev, "the frame size = 0\n");
  932. }
  933. paddr = virt_to_phys((void *)frame->data);
  934. out_be32(&bd->buf, paddr);
  935. bdstatus = (bdstatus&T_W);
  936. if (!(frame_get_info(frame) & NO_CRC))
  937. bdstatus |= T_R | T_I | T_L | T_TC
  938. | frame_get_length(frame);
  939. else
  940. bdstatus |= T_R | T_I | T_L | frame_get_length(frame);
  941. /* if the packet is a ZLP in status phase */
  942. if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP))
  943. ep->data01 = 0x1;
  944. if (ep->data01) {
  945. pidmask = T_PID_DATA1;
  946. frame->info |= PID_DATA1;
  947. } else {
  948. pidmask = T_PID_DATA0;
  949. frame->info |= PID_DATA0;
  950. }
  951. bdstatus |= T_CNF;
  952. bdstatus |= pidmask;
  953. out_be32((u32 __iomem *)bd, bdstatus);
  954. qe_ep_filltxfifo(ep);
  955. /* enable the TX interrupt */
  956. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  957. qe_ep_toggledata01(ep);
  958. if (bdstatus & T_W)
  959. ep->n_txbd = ep->txbase;
  960. else
  961. ep->n_txbd++;
  962. return 0;
  963. } else {
  964. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  965. dev_vdbg(udc->dev, "The tx bd is not ready!\n");
  966. return -EBUSY;
  967. }
  968. }
  969. /* when a bd was transmitted, the function can
  970. * handle the tx_req, not include ep0 */
  971. static int txcomplete(struct qe_ep *ep, unsigned char restart)
  972. {
  973. if (ep->tx_req != NULL) {
  974. struct qe_req *req = ep->tx_req;
  975. unsigned zlp = 0, last_len = 0;
  976. last_len = min_t(unsigned, req->req.length - ep->sent,
  977. ep->ep.maxpacket);
  978. if (!restart) {
  979. int asent = ep->last;
  980. ep->sent += asent;
  981. ep->last -= asent;
  982. } else {
  983. ep->last = 0;
  984. }
  985. /* zlp needed when req->re.zero is set */
  986. if (req->req.zero) {
  987. if (last_len == 0 ||
  988. (req->req.length % ep->ep.maxpacket) != 0)
  989. zlp = 0;
  990. else
  991. zlp = 1;
  992. } else
  993. zlp = 0;
  994. /* a request already were transmitted completely */
  995. if (((ep->tx_req->req.length - ep->sent) <= 0) && !zlp) {
  996. done(ep, ep->tx_req, 0);
  997. ep->tx_req = NULL;
  998. ep->last = 0;
  999. ep->sent = 0;
  1000. }
  1001. }
  1002. /* we should gain a new tx_req fot this endpoint */
  1003. if (ep->tx_req == NULL) {
  1004. if (!list_empty(&ep->queue)) {
  1005. ep->tx_req = list_entry(ep->queue.next, struct qe_req,
  1006. queue);
  1007. ep->last = 0;
  1008. ep->sent = 0;
  1009. }
  1010. }
  1011. return 0;
  1012. }
  1013. /* give a frame and a tx_req, send some data */
  1014. static int qe_usb_senddata(struct qe_ep *ep, struct qe_frame *frame)
  1015. {
  1016. unsigned int size;
  1017. u8 *buf;
  1018. qe_frame_clean(frame);
  1019. size = min_t(u32, (ep->tx_req->req.length - ep->sent),
  1020. ep->ep.maxpacket);
  1021. buf = (u8 *)ep->tx_req->req.buf + ep->sent;
  1022. if (buf && size) {
  1023. ep->last = size;
  1024. ep->tx_req->req.actual += size;
  1025. frame_set_data(frame, buf);
  1026. frame_set_length(frame, size);
  1027. frame_set_status(frame, FRAME_OK);
  1028. frame_set_info(frame, 0);
  1029. return qe_ep_tx(ep, frame);
  1030. }
  1031. return -EIO;
  1032. }
  1033. /* give a frame struct,send a ZLP */
  1034. static int sendnulldata(struct qe_ep *ep, struct qe_frame *frame, uint infor)
  1035. {
  1036. struct qe_udc *udc = ep->udc;
  1037. if (frame == NULL)
  1038. return -ENODEV;
  1039. qe_frame_clean(frame);
  1040. frame_set_data(frame, (u8 *)udc->nullbuf);
  1041. frame_set_length(frame, 2);
  1042. frame_set_status(frame, FRAME_OK);
  1043. frame_set_info(frame, (ZLP | NO_CRC | infor));
  1044. return qe_ep_tx(ep, frame);
  1045. }
  1046. static int frame_create_tx(struct qe_ep *ep, struct qe_frame *frame)
  1047. {
  1048. struct qe_req *req = ep->tx_req;
  1049. int reval;
  1050. if (req == NULL)
  1051. return -ENODEV;
  1052. if ((req->req.length - ep->sent) > 0)
  1053. reval = qe_usb_senddata(ep, frame);
  1054. else
  1055. reval = sendnulldata(ep, frame, 0);
  1056. return reval;
  1057. }
  1058. /* if direction is DIR_IN, the status is Device->Host
  1059. * if direction is DIR_OUT, the status transaction is Device<-Host
  1060. * in status phase, udc create a request and gain status */
  1061. static int ep0_prime_status(struct qe_udc *udc, int direction)
  1062. {
  1063. struct qe_ep *ep = &udc->eps[0];
  1064. if (direction == USB_DIR_IN) {
  1065. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1066. udc->ep0_dir = USB_DIR_IN;
  1067. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1068. } else {
  1069. udc->ep0_dir = USB_DIR_OUT;
  1070. udc->ep0_state = WAIT_FOR_OUT_STATUS;
  1071. }
  1072. return 0;
  1073. }
  1074. /* a request complete in ep0, whether gadget request or udc request */
  1075. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req)
  1076. {
  1077. struct qe_ep *ep = &udc->eps[0];
  1078. /* because usb and ep's status already been set in ch9setaddress() */
  1079. switch (udc->ep0_state) {
  1080. case DATA_STATE_XMIT:
  1081. done(ep, req, 0);
  1082. /* receive status phase */
  1083. if (ep0_prime_status(udc, USB_DIR_OUT))
  1084. qe_ep0_stall(udc);
  1085. break;
  1086. case DATA_STATE_NEED_ZLP:
  1087. done(ep, req, 0);
  1088. udc->ep0_state = WAIT_FOR_SETUP;
  1089. break;
  1090. case DATA_STATE_RECV:
  1091. done(ep, req, 0);
  1092. /* send status phase */
  1093. if (ep0_prime_status(udc, USB_DIR_IN))
  1094. qe_ep0_stall(udc);
  1095. break;
  1096. case WAIT_FOR_OUT_STATUS:
  1097. done(ep, req, 0);
  1098. udc->ep0_state = WAIT_FOR_SETUP;
  1099. break;
  1100. case WAIT_FOR_SETUP:
  1101. dev_vdbg(udc->dev, "Unexpected interrupt\n");
  1102. break;
  1103. default:
  1104. qe_ep0_stall(udc);
  1105. break;
  1106. }
  1107. }
  1108. static int ep0_txcomplete(struct qe_ep *ep, unsigned char restart)
  1109. {
  1110. struct qe_req *tx_req = NULL;
  1111. struct qe_frame *frame = ep->txframe;
  1112. if ((frame_get_info(frame) & (ZLP | NO_REQ)) == (ZLP | NO_REQ)) {
  1113. if (!restart)
  1114. ep->udc->ep0_state = WAIT_FOR_SETUP;
  1115. else
  1116. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1117. return 0;
  1118. }
  1119. tx_req = ep->tx_req;
  1120. if (tx_req != NULL) {
  1121. if (!restart) {
  1122. int asent = ep->last;
  1123. ep->sent += asent;
  1124. ep->last -= asent;
  1125. } else {
  1126. ep->last = 0;
  1127. }
  1128. /* a request already were transmitted completely */
  1129. if ((ep->tx_req->req.length - ep->sent) <= 0) {
  1130. ep->tx_req->req.actual = (unsigned int)ep->sent;
  1131. ep0_req_complete(ep->udc, ep->tx_req);
  1132. ep->tx_req = NULL;
  1133. ep->last = 0;
  1134. ep->sent = 0;
  1135. }
  1136. } else {
  1137. dev_vdbg(ep->udc->dev, "the ep0_controller have no req\n");
  1138. }
  1139. return 0;
  1140. }
  1141. static int ep0_txframe_handle(struct qe_ep *ep)
  1142. {
  1143. /* if have error, transmit again */
  1144. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1145. qe_ep_flushtxfifo(ep);
  1146. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1147. if (frame_get_info(ep->txframe) & PID_DATA0)
  1148. ep->data01 = 0;
  1149. else
  1150. ep->data01 = 1;
  1151. ep0_txcomplete(ep, 1);
  1152. } else
  1153. ep0_txcomplete(ep, 0);
  1154. frame_create_tx(ep, ep->txframe);
  1155. return 0;
  1156. }
  1157. static int qe_ep0_txconf(struct qe_ep *ep)
  1158. {
  1159. struct qe_bd __iomem *bd;
  1160. struct qe_frame *pframe;
  1161. u32 bdstatus;
  1162. bd = ep->c_txbd;
  1163. bdstatus = in_be32((u32 __iomem *)bd);
  1164. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1165. pframe = ep->txframe;
  1166. /* clear and recycle the BD */
  1167. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1168. out_be32(&bd->buf, 0);
  1169. if (bdstatus & T_W)
  1170. ep->c_txbd = ep->txbase;
  1171. else
  1172. ep->c_txbd++;
  1173. if (ep->c_txbd == ep->n_txbd) {
  1174. if (bdstatus & DEVICE_T_ERROR) {
  1175. frame_set_status(pframe, FRAME_ERROR);
  1176. if (bdstatus & T_TO)
  1177. pframe->status |= TX_ER_TIMEOUT;
  1178. if (bdstatus & T_UN)
  1179. pframe->status |= TX_ER_UNDERUN;
  1180. }
  1181. ep0_txframe_handle(ep);
  1182. }
  1183. bd = ep->c_txbd;
  1184. bdstatus = in_be32((u32 __iomem *)bd);
  1185. }
  1186. return 0;
  1187. }
  1188. static int ep_txframe_handle(struct qe_ep *ep)
  1189. {
  1190. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1191. qe_ep_flushtxfifo(ep);
  1192. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1193. if (frame_get_info(ep->txframe) & PID_DATA0)
  1194. ep->data01 = 0;
  1195. else
  1196. ep->data01 = 1;
  1197. txcomplete(ep, 1);
  1198. } else
  1199. txcomplete(ep, 0);
  1200. frame_create_tx(ep, ep->txframe); /* send the data */
  1201. return 0;
  1202. }
  1203. /* confirm the already trainsmited bd */
  1204. static int qe_ep_txconf(struct qe_ep *ep)
  1205. {
  1206. struct qe_bd __iomem *bd;
  1207. struct qe_frame *pframe = NULL;
  1208. u32 bdstatus;
  1209. unsigned char breakonrxinterrupt = 0;
  1210. bd = ep->c_txbd;
  1211. bdstatus = in_be32((u32 __iomem *)bd);
  1212. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1213. pframe = ep->txframe;
  1214. if (bdstatus & DEVICE_T_ERROR) {
  1215. frame_set_status(pframe, FRAME_ERROR);
  1216. if (bdstatus & T_TO)
  1217. pframe->status |= TX_ER_TIMEOUT;
  1218. if (bdstatus & T_UN)
  1219. pframe->status |= TX_ER_UNDERUN;
  1220. }
  1221. /* clear and recycle the BD */
  1222. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1223. out_be32(&bd->buf, 0);
  1224. if (bdstatus & T_W)
  1225. ep->c_txbd = ep->txbase;
  1226. else
  1227. ep->c_txbd++;
  1228. /* handle the tx frame */
  1229. ep_txframe_handle(ep);
  1230. bd = ep->c_txbd;
  1231. bdstatus = in_be32((u32 __iomem *)bd);
  1232. }
  1233. if (breakonrxinterrupt)
  1234. return -EIO;
  1235. else
  1236. return 0;
  1237. }
  1238. /* Add a request in queue, and try to transmit a packet */
  1239. static int ep_req_send(struct qe_ep *ep, struct qe_req *req)
  1240. {
  1241. int reval = 0;
  1242. if (ep->tx_req == NULL) {
  1243. ep->sent = 0;
  1244. ep->last = 0;
  1245. txcomplete(ep, 0); /* can gain a new tx_req */
  1246. reval = frame_create_tx(ep, ep->txframe);
  1247. }
  1248. return reval;
  1249. }
  1250. /* Maybe this is a good ideal */
  1251. static int ep_req_rx(struct qe_ep *ep, struct qe_req *req)
  1252. {
  1253. struct qe_udc *udc = ep->udc;
  1254. struct qe_frame *pframe = NULL;
  1255. struct qe_bd __iomem *bd;
  1256. u32 bdstatus, length;
  1257. u32 vaddr, fsize;
  1258. u8 *cp;
  1259. u8 finish_req = 0;
  1260. u8 framepid;
  1261. if (list_empty(&ep->queue)) {
  1262. dev_vdbg(udc->dev, "the req already finish!\n");
  1263. return 0;
  1264. }
  1265. pframe = ep->rxframe;
  1266. bd = ep->n_rxbd;
  1267. bdstatus = in_be32((u32 __iomem *)bd);
  1268. length = bdstatus & BD_LENGTH_MASK;
  1269. while (!(bdstatus & R_E) && length) {
  1270. if (finish_req)
  1271. break;
  1272. if ((bdstatus & R_F) && (bdstatus & R_L)
  1273. && !(bdstatus & R_ERROR)) {
  1274. qe_frame_clean(pframe);
  1275. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  1276. frame_set_data(pframe, (u8 *)vaddr);
  1277. frame_set_length(pframe, (length - USB_CRC_SIZE));
  1278. frame_set_status(pframe, FRAME_OK);
  1279. switch (bdstatus & R_PID) {
  1280. case R_PID_DATA1:
  1281. frame_set_info(pframe, PID_DATA1); break;
  1282. default:
  1283. frame_set_info(pframe, PID_DATA0); break;
  1284. }
  1285. /* handle the rx frame */
  1286. if (frame_get_info(pframe) & PID_DATA1)
  1287. framepid = 0x1;
  1288. else
  1289. framepid = 0;
  1290. if (framepid != ep->data01) {
  1291. dev_vdbg(udc->dev, "the data01 error!\n");
  1292. } else {
  1293. fsize = frame_get_length(pframe);
  1294. cp = (u8 *)(req->req.buf) + req->req.actual;
  1295. if (cp) {
  1296. memcpy(cp, pframe->data, fsize);
  1297. req->req.actual += fsize;
  1298. if ((fsize < ep->ep.maxpacket)
  1299. || (req->req.actual >=
  1300. req->req.length)) {
  1301. finish_req = 1;
  1302. done(ep, req, 0);
  1303. if (list_empty(&ep->queue))
  1304. qe_eprx_nack(ep);
  1305. }
  1306. }
  1307. qe_ep_toggledata01(ep);
  1308. }
  1309. } else {
  1310. dev_err(udc->dev, "The receive frame with error!\n");
  1311. }
  1312. /* note: don't clear the rxbd's buffer address *
  1313. * only Clear the length */
  1314. out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK));
  1315. ep->has_data--;
  1316. /* Get next BD */
  1317. if (bdstatus & R_W)
  1318. bd = ep->rxbase;
  1319. else
  1320. bd++;
  1321. bdstatus = in_be32((u32 __iomem *)bd);
  1322. length = bdstatus & BD_LENGTH_MASK;
  1323. }
  1324. ep->n_rxbd = bd;
  1325. ep_recycle_rxbds(ep);
  1326. return 0;
  1327. }
  1328. /* only add the request in queue */
  1329. static int ep_req_receive(struct qe_ep *ep, struct qe_req *req)
  1330. {
  1331. if (ep->state == EP_STATE_NACK) {
  1332. if (ep->has_data <= 0) {
  1333. /* Enable rx and unmask rx interrupt */
  1334. qe_eprx_normal(ep);
  1335. } else {
  1336. /* Copy the exist BD data */
  1337. ep_req_rx(ep, req);
  1338. }
  1339. }
  1340. return 0;
  1341. }
  1342. /********************************************************************
  1343. Internal Used Function End
  1344. ********************************************************************/
  1345. /*-----------------------------------------------------------------------
  1346. Endpoint Management Functions For Gadget
  1347. -----------------------------------------------------------------------*/
  1348. static int qe_ep_enable(struct usb_ep *_ep,
  1349. const struct usb_endpoint_descriptor *desc)
  1350. {
  1351. struct qe_udc *udc;
  1352. struct qe_ep *ep;
  1353. int retval = 0;
  1354. unsigned char epnum;
  1355. ep = container_of(_ep, struct qe_ep, ep);
  1356. /* catch various bogus parameters */
  1357. if (!_ep || !desc || _ep->name == ep_name[0] ||
  1358. (desc->bDescriptorType != USB_DT_ENDPOINT))
  1359. return -EINVAL;
  1360. udc = ep->udc;
  1361. if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
  1362. return -ESHUTDOWN;
  1363. epnum = (u8)desc->bEndpointAddress & 0xF;
  1364. retval = qe_ep_init(udc, epnum, desc);
  1365. if (retval != 0) {
  1366. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1367. dev_dbg(udc->dev, "enable ep%d failed\n", ep->epnum);
  1368. return -EINVAL;
  1369. }
  1370. dev_dbg(udc->dev, "enable ep%d successful\n", ep->epnum);
  1371. return 0;
  1372. }
  1373. static int qe_ep_disable(struct usb_ep *_ep)
  1374. {
  1375. struct qe_udc *udc;
  1376. struct qe_ep *ep;
  1377. unsigned long flags;
  1378. unsigned int size;
  1379. ep = container_of(_ep, struct qe_ep, ep);
  1380. udc = ep->udc;
  1381. if (!_ep || !ep->ep.desc) {
  1382. dev_dbg(udc->dev, "%s not enabled\n", _ep ? ep->ep.name : NULL);
  1383. return -EINVAL;
  1384. }
  1385. spin_lock_irqsave(&udc->lock, flags);
  1386. /* Nuke all pending requests (does flush) */
  1387. nuke(ep, -ESHUTDOWN);
  1388. ep->ep.desc = NULL;
  1389. ep->stopped = 1;
  1390. ep->tx_req = NULL;
  1391. qe_ep_reset(udc, ep->epnum);
  1392. spin_unlock_irqrestore(&udc->lock, flags);
  1393. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1394. if (ep->dir == USB_DIR_OUT)
  1395. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1396. (USB_BDRING_LEN_RX + 1);
  1397. else
  1398. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1399. (USB_BDRING_LEN + 1);
  1400. if (ep->dir != USB_DIR_IN) {
  1401. kfree(ep->rxframe);
  1402. if (ep->rxbufmap) {
  1403. dma_unmap_single(udc->gadget.dev.parent,
  1404. ep->rxbuf_d, size,
  1405. DMA_FROM_DEVICE);
  1406. ep->rxbuf_d = DMA_ADDR_INVALID;
  1407. } else {
  1408. dma_sync_single_for_cpu(
  1409. udc->gadget.dev.parent,
  1410. ep->rxbuf_d, size,
  1411. DMA_FROM_DEVICE);
  1412. }
  1413. kfree(ep->rxbuffer);
  1414. }
  1415. if (ep->dir != USB_DIR_OUT)
  1416. kfree(ep->txframe);
  1417. dev_dbg(udc->dev, "disabled %s OK\n", _ep->name);
  1418. return 0;
  1419. }
  1420. static struct usb_request *qe_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  1421. {
  1422. struct qe_req *req;
  1423. req = kzalloc(sizeof(*req), gfp_flags);
  1424. if (!req)
  1425. return NULL;
  1426. req->req.dma = DMA_ADDR_INVALID;
  1427. INIT_LIST_HEAD(&req->queue);
  1428. return &req->req;
  1429. }
  1430. static void qe_free_request(struct usb_ep *_ep, struct usb_request *_req)
  1431. {
  1432. struct qe_req *req;
  1433. req = container_of(_req, struct qe_req, req);
  1434. if (_req)
  1435. kfree(req);
  1436. }
  1437. static int __qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req)
  1438. {
  1439. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1440. struct qe_req *req = container_of(_req, struct qe_req, req);
  1441. struct qe_udc *udc;
  1442. int reval;
  1443. udc = ep->udc;
  1444. /* catch various bogus parameters */
  1445. if (!_req || !req->req.complete || !req->req.buf
  1446. || !list_empty(&req->queue)) {
  1447. dev_dbg(udc->dev, "bad params\n");
  1448. return -EINVAL;
  1449. }
  1450. if (!_ep || (!ep->ep.desc && ep_index(ep))) {
  1451. dev_dbg(udc->dev, "bad ep\n");
  1452. return -EINVAL;
  1453. }
  1454. if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
  1455. return -ESHUTDOWN;
  1456. req->ep = ep;
  1457. /* map virtual address to hardware */
  1458. if (req->req.dma == DMA_ADDR_INVALID) {
  1459. req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
  1460. req->req.buf,
  1461. req->req.length,
  1462. ep_is_in(ep)
  1463. ? DMA_TO_DEVICE :
  1464. DMA_FROM_DEVICE);
  1465. req->mapped = 1;
  1466. } else {
  1467. dma_sync_single_for_device(ep->udc->gadget.dev.parent,
  1468. req->req.dma, req->req.length,
  1469. ep_is_in(ep)
  1470. ? DMA_TO_DEVICE :
  1471. DMA_FROM_DEVICE);
  1472. req->mapped = 0;
  1473. }
  1474. req->req.status = -EINPROGRESS;
  1475. req->req.actual = 0;
  1476. list_add_tail(&req->queue, &ep->queue);
  1477. dev_vdbg(udc->dev, "gadget have request in %s! %d\n",
  1478. ep->name, req->req.length);
  1479. /* push the request to device */
  1480. if (ep_is_in(ep))
  1481. reval = ep_req_send(ep, req);
  1482. /* EP0 */
  1483. if (ep_index(ep) == 0 && req->req.length > 0) {
  1484. if (ep_is_in(ep))
  1485. udc->ep0_state = DATA_STATE_XMIT;
  1486. else
  1487. udc->ep0_state = DATA_STATE_RECV;
  1488. }
  1489. if (ep->dir == USB_DIR_OUT)
  1490. reval = ep_req_receive(ep, req);
  1491. return 0;
  1492. }
  1493. /* queues (submits) an I/O request to an endpoint */
  1494. static int qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
  1495. gfp_t gfp_flags)
  1496. {
  1497. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1498. struct qe_udc *udc = ep->udc;
  1499. unsigned long flags;
  1500. int ret;
  1501. spin_lock_irqsave(&udc->lock, flags);
  1502. ret = __qe_ep_queue(_ep, _req);
  1503. spin_unlock_irqrestore(&udc->lock, flags);
  1504. return ret;
  1505. }
  1506. /* dequeues (cancels, unlinks) an I/O request from an endpoint */
  1507. static int qe_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1508. {
  1509. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1510. struct qe_req *req;
  1511. unsigned long flags;
  1512. if (!_ep || !_req)
  1513. return -EINVAL;
  1514. spin_lock_irqsave(&ep->udc->lock, flags);
  1515. /* make sure it's actually queued on this endpoint */
  1516. list_for_each_entry(req, &ep->queue, queue) {
  1517. if (&req->req == _req)
  1518. break;
  1519. }
  1520. if (&req->req != _req) {
  1521. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1522. return -EINVAL;
  1523. }
  1524. done(ep, req, -ECONNRESET);
  1525. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1526. return 0;
  1527. }
  1528. /*-----------------------------------------------------------------
  1529. * modify the endpoint halt feature
  1530. * @ep: the non-isochronous endpoint being stalled
  1531. * @value: 1--set halt 0--clear halt
  1532. * Returns zero, or a negative error code.
  1533. *----------------------------------------------------------------*/
  1534. static int qe_ep_set_halt(struct usb_ep *_ep, int value)
  1535. {
  1536. struct qe_ep *ep;
  1537. unsigned long flags;
  1538. int status = -EOPNOTSUPP;
  1539. struct qe_udc *udc;
  1540. ep = container_of(_ep, struct qe_ep, ep);
  1541. if (!_ep || !ep->ep.desc) {
  1542. status = -EINVAL;
  1543. goto out;
  1544. }
  1545. udc = ep->udc;
  1546. /* Attempt to halt IN ep will fail if any transfer requests
  1547. * are still queue */
  1548. if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
  1549. status = -EAGAIN;
  1550. goto out;
  1551. }
  1552. status = 0;
  1553. spin_lock_irqsave(&ep->udc->lock, flags);
  1554. qe_eptx_stall_change(ep, value);
  1555. qe_eprx_stall_change(ep, value);
  1556. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1557. if (ep->epnum == 0) {
  1558. udc->ep0_state = WAIT_FOR_SETUP;
  1559. udc->ep0_dir = 0;
  1560. }
  1561. /* set data toggle to DATA0 on clear halt */
  1562. if (value == 0)
  1563. ep->data01 = 0;
  1564. out:
  1565. dev_vdbg(udc->dev, "%s %s halt stat %d\n", ep->ep.name,
  1566. value ? "set" : "clear", status);
  1567. return status;
  1568. }
  1569. static struct usb_ep_ops qe_ep_ops = {
  1570. .enable = qe_ep_enable,
  1571. .disable = qe_ep_disable,
  1572. .alloc_request = qe_alloc_request,
  1573. .free_request = qe_free_request,
  1574. .queue = qe_ep_queue,
  1575. .dequeue = qe_ep_dequeue,
  1576. .set_halt = qe_ep_set_halt,
  1577. };
  1578. /*------------------------------------------------------------------------
  1579. Gadget Driver Layer Operations
  1580. ------------------------------------------------------------------------*/
  1581. /* Get the current frame number */
  1582. static int qe_get_frame(struct usb_gadget *gadget)
  1583. {
  1584. struct qe_udc *udc = container_of(gadget, struct qe_udc, gadget);
  1585. u16 tmp;
  1586. tmp = in_be16(&udc->usb_param->frame_n);
  1587. if (tmp & 0x8000)
  1588. tmp = tmp & 0x07ff;
  1589. else
  1590. tmp = -EINVAL;
  1591. return (int)tmp;
  1592. }
  1593. static int fsl_qe_start(struct usb_gadget *gadget,
  1594. struct usb_gadget_driver *driver);
  1595. static int fsl_qe_stop(struct usb_gadget *gadget,
  1596. struct usb_gadget_driver *driver);
  1597. /* defined in usb_gadget.h */
  1598. static const struct usb_gadget_ops qe_gadget_ops = {
  1599. .get_frame = qe_get_frame,
  1600. .udc_start = fsl_qe_start,
  1601. .udc_stop = fsl_qe_stop,
  1602. };
  1603. /*-------------------------------------------------------------------------
  1604. USB ep0 Setup process in BUS Enumeration
  1605. -------------------------------------------------------------------------*/
  1606. static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe)
  1607. {
  1608. struct qe_ep *ep = &udc->eps[pipe];
  1609. nuke(ep, -ECONNRESET);
  1610. ep->tx_req = NULL;
  1611. return 0;
  1612. }
  1613. static int reset_queues(struct qe_udc *udc)
  1614. {
  1615. u8 pipe;
  1616. for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++)
  1617. udc_reset_ep_queue(udc, pipe);
  1618. /* report disconnect; the driver is already quiesced */
  1619. spin_unlock(&udc->lock);
  1620. udc->driver->disconnect(&udc->gadget);
  1621. spin_lock(&udc->lock);
  1622. return 0;
  1623. }
  1624. static void ch9setaddress(struct qe_udc *udc, u16 value, u16 index,
  1625. u16 length)
  1626. {
  1627. /* Save the new address to device struct */
  1628. udc->device_address = (u8) value;
  1629. /* Update usb state */
  1630. udc->usb_state = USB_STATE_ADDRESS;
  1631. /* Status phase , send a ZLP */
  1632. if (ep0_prime_status(udc, USB_DIR_IN))
  1633. qe_ep0_stall(udc);
  1634. }
  1635. static void ownercomplete(struct usb_ep *_ep, struct usb_request *_req)
  1636. {
  1637. struct qe_req *req = container_of(_req, struct qe_req, req);
  1638. req->req.buf = NULL;
  1639. kfree(req);
  1640. }
  1641. static void ch9getstatus(struct qe_udc *udc, u8 request_type, u16 value,
  1642. u16 index, u16 length)
  1643. {
  1644. u16 usb_status = 0;
  1645. struct qe_req *req;
  1646. struct qe_ep *ep;
  1647. int status = 0;
  1648. ep = &udc->eps[0];
  1649. if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  1650. /* Get device status */
  1651. usb_status = 1 << USB_DEVICE_SELF_POWERED;
  1652. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
  1653. /* Get interface status */
  1654. /* We don't have interface information in udc driver */
  1655. usb_status = 0;
  1656. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
  1657. /* Get endpoint status */
  1658. int pipe = index & USB_ENDPOINT_NUMBER_MASK;
  1659. struct qe_ep *target_ep = &udc->eps[pipe];
  1660. u16 usep;
  1661. /* stall if endpoint doesn't exist */
  1662. if (!target_ep->ep.desc)
  1663. goto stall;
  1664. usep = in_be16(&udc->usb_regs->usb_usep[pipe]);
  1665. if (index & USB_DIR_IN) {
  1666. if (target_ep->dir != USB_DIR_IN)
  1667. goto stall;
  1668. if ((usep & USB_THS_MASK) == USB_THS_STALL)
  1669. usb_status = 1 << USB_ENDPOINT_HALT;
  1670. } else {
  1671. if (target_ep->dir != USB_DIR_OUT)
  1672. goto stall;
  1673. if ((usep & USB_RHS_MASK) == USB_RHS_STALL)
  1674. usb_status = 1 << USB_ENDPOINT_HALT;
  1675. }
  1676. }
  1677. req = container_of(qe_alloc_request(&ep->ep, GFP_KERNEL),
  1678. struct qe_req, req);
  1679. req->req.length = 2;
  1680. req->req.buf = udc->statusbuf;
  1681. *(u16 *)req->req.buf = cpu_to_le16(usb_status);
  1682. req->req.status = -EINPROGRESS;
  1683. req->req.actual = 0;
  1684. req->req.complete = ownercomplete;
  1685. udc->ep0_dir = USB_DIR_IN;
  1686. /* data phase */
  1687. status = __qe_ep_queue(&ep->ep, &req->req);
  1688. if (status == 0)
  1689. return;
  1690. stall:
  1691. dev_err(udc->dev, "Can't respond to getstatus request \n");
  1692. qe_ep0_stall(udc);
  1693. }
  1694. /* only handle the setup request, suppose the device in normal status */
  1695. static void setup_received_handle(struct qe_udc *udc,
  1696. struct usb_ctrlrequest *setup)
  1697. {
  1698. /* Fix Endian (udc->local_setup_buff is cpu Endian now)*/
  1699. u16 wValue = le16_to_cpu(setup->wValue);
  1700. u16 wIndex = le16_to_cpu(setup->wIndex);
  1701. u16 wLength = le16_to_cpu(setup->wLength);
  1702. /* clear the previous request in the ep0 */
  1703. udc_reset_ep_queue(udc, 0);
  1704. if (setup->bRequestType & USB_DIR_IN)
  1705. udc->ep0_dir = USB_DIR_IN;
  1706. else
  1707. udc->ep0_dir = USB_DIR_OUT;
  1708. switch (setup->bRequest) {
  1709. case USB_REQ_GET_STATUS:
  1710. /* Data+Status phase form udc */
  1711. if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
  1712. != (USB_DIR_IN | USB_TYPE_STANDARD))
  1713. break;
  1714. ch9getstatus(udc, setup->bRequestType, wValue, wIndex,
  1715. wLength);
  1716. return;
  1717. case USB_REQ_SET_ADDRESS:
  1718. /* Status phase from udc */
  1719. if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD |
  1720. USB_RECIP_DEVICE))
  1721. break;
  1722. ch9setaddress(udc, wValue, wIndex, wLength);
  1723. return;
  1724. case USB_REQ_CLEAR_FEATURE:
  1725. case USB_REQ_SET_FEATURE:
  1726. /* Requests with no data phase, status phase from udc */
  1727. if ((setup->bRequestType & USB_TYPE_MASK)
  1728. != USB_TYPE_STANDARD)
  1729. break;
  1730. if ((setup->bRequestType & USB_RECIP_MASK)
  1731. == USB_RECIP_ENDPOINT) {
  1732. int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK;
  1733. struct qe_ep *ep;
  1734. if (wValue != 0 || wLength != 0
  1735. || pipe > USB_MAX_ENDPOINTS)
  1736. break;
  1737. ep = &udc->eps[pipe];
  1738. spin_unlock(&udc->lock);
  1739. qe_ep_set_halt(&ep->ep,
  1740. (setup->bRequest == USB_REQ_SET_FEATURE)
  1741. ? 1 : 0);
  1742. spin_lock(&udc->lock);
  1743. }
  1744. ep0_prime_status(udc, USB_DIR_IN);
  1745. return;
  1746. default:
  1747. break;
  1748. }
  1749. if (wLength) {
  1750. /* Data phase from gadget, status phase from udc */
  1751. if (setup->bRequestType & USB_DIR_IN) {
  1752. udc->ep0_state = DATA_STATE_XMIT;
  1753. udc->ep0_dir = USB_DIR_IN;
  1754. } else {
  1755. udc->ep0_state = DATA_STATE_RECV;
  1756. udc->ep0_dir = USB_DIR_OUT;
  1757. }
  1758. spin_unlock(&udc->lock);
  1759. if (udc->driver->setup(&udc->gadget,
  1760. &udc->local_setup_buff) < 0)
  1761. qe_ep0_stall(udc);
  1762. spin_lock(&udc->lock);
  1763. } else {
  1764. /* No data phase, IN status from gadget */
  1765. udc->ep0_dir = USB_DIR_IN;
  1766. spin_unlock(&udc->lock);
  1767. if (udc->driver->setup(&udc->gadget,
  1768. &udc->local_setup_buff) < 0)
  1769. qe_ep0_stall(udc);
  1770. spin_lock(&udc->lock);
  1771. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1772. }
  1773. }
  1774. /*-------------------------------------------------------------------------
  1775. USB Interrupt handlers
  1776. -------------------------------------------------------------------------*/
  1777. static void suspend_irq(struct qe_udc *udc)
  1778. {
  1779. udc->resume_state = udc->usb_state;
  1780. udc->usb_state = USB_STATE_SUSPENDED;
  1781. /* report suspend to the driver ,serial.c not support this*/
  1782. if (udc->driver->suspend)
  1783. udc->driver->suspend(&udc->gadget);
  1784. }
  1785. static void resume_irq(struct qe_udc *udc)
  1786. {
  1787. udc->usb_state = udc->resume_state;
  1788. udc->resume_state = 0;
  1789. /* report resume to the driver , serial.c not support this*/
  1790. if (udc->driver->resume)
  1791. udc->driver->resume(&udc->gadget);
  1792. }
  1793. static void idle_irq(struct qe_udc *udc)
  1794. {
  1795. u8 usbs;
  1796. usbs = in_8(&udc->usb_regs->usb_usbs);
  1797. if (usbs & USB_IDLE_STATUS_MASK) {
  1798. if ((udc->usb_state) != USB_STATE_SUSPENDED)
  1799. suspend_irq(udc);
  1800. } else {
  1801. if (udc->usb_state == USB_STATE_SUSPENDED)
  1802. resume_irq(udc);
  1803. }
  1804. }
  1805. static int reset_irq(struct qe_udc *udc)
  1806. {
  1807. unsigned char i;
  1808. if (udc->usb_state == USB_STATE_DEFAULT)
  1809. return 0;
  1810. qe_usb_disable(udc);
  1811. out_8(&udc->usb_regs->usb_usadr, 0);
  1812. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1813. if (udc->eps[i].init)
  1814. qe_ep_reset(udc, i);
  1815. }
  1816. reset_queues(udc);
  1817. udc->usb_state = USB_STATE_DEFAULT;
  1818. udc->ep0_state = WAIT_FOR_SETUP;
  1819. udc->ep0_dir = USB_DIR_OUT;
  1820. qe_usb_enable(udc);
  1821. return 0;
  1822. }
  1823. static int bsy_irq(struct qe_udc *udc)
  1824. {
  1825. return 0;
  1826. }
  1827. static int txe_irq(struct qe_udc *udc)
  1828. {
  1829. return 0;
  1830. }
  1831. /* ep0 tx interrupt also in here */
  1832. static int tx_irq(struct qe_udc *udc)
  1833. {
  1834. struct qe_ep *ep;
  1835. struct qe_bd __iomem *bd;
  1836. int i, res = 0;
  1837. if ((udc->usb_state == USB_STATE_ADDRESS)
  1838. && (in_8(&udc->usb_regs->usb_usadr) == 0))
  1839. out_8(&udc->usb_regs->usb_usadr, udc->device_address);
  1840. for (i = (USB_MAX_ENDPOINTS-1); ((i >= 0) && (res == 0)); i--) {
  1841. ep = &udc->eps[i];
  1842. if (ep && ep->init && (ep->dir != USB_DIR_OUT)) {
  1843. bd = ep->c_txbd;
  1844. if (!(in_be32((u32 __iomem *)bd) & T_R)
  1845. && (in_be32(&bd->buf))) {
  1846. /* confirm the transmitted bd */
  1847. if (ep->epnum == 0)
  1848. res = qe_ep0_txconf(ep);
  1849. else
  1850. res = qe_ep_txconf(ep);
  1851. }
  1852. }
  1853. }
  1854. return res;
  1855. }
  1856. /* setup packect's rx is handle in the function too */
  1857. static void rx_irq(struct qe_udc *udc)
  1858. {
  1859. struct qe_ep *ep;
  1860. struct qe_bd __iomem *bd;
  1861. int i;
  1862. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1863. ep = &udc->eps[i];
  1864. if (ep && ep->init && (ep->dir != USB_DIR_IN)) {
  1865. bd = ep->n_rxbd;
  1866. if (!(in_be32((u32 __iomem *)bd) & R_E)
  1867. && (in_be32(&bd->buf))) {
  1868. if (ep->epnum == 0) {
  1869. qe_ep0_rx(udc);
  1870. } else {
  1871. /*non-setup package receive*/
  1872. qe_ep_rx(ep);
  1873. }
  1874. }
  1875. }
  1876. }
  1877. }
  1878. static irqreturn_t qe_udc_irq(int irq, void *_udc)
  1879. {
  1880. struct qe_udc *udc = (struct qe_udc *)_udc;
  1881. u16 irq_src;
  1882. irqreturn_t status = IRQ_NONE;
  1883. unsigned long flags;
  1884. spin_lock_irqsave(&udc->lock, flags);
  1885. irq_src = in_be16(&udc->usb_regs->usb_usber) &
  1886. in_be16(&udc->usb_regs->usb_usbmr);
  1887. /* Clear notification bits */
  1888. out_be16(&udc->usb_regs->usb_usber, irq_src);
  1889. /* USB Interrupt */
  1890. if (irq_src & USB_E_IDLE_MASK) {
  1891. idle_irq(udc);
  1892. irq_src &= ~USB_E_IDLE_MASK;
  1893. status = IRQ_HANDLED;
  1894. }
  1895. if (irq_src & USB_E_TXB_MASK) {
  1896. tx_irq(udc);
  1897. irq_src &= ~USB_E_TXB_MASK;
  1898. status = IRQ_HANDLED;
  1899. }
  1900. if (irq_src & USB_E_RXB_MASK) {
  1901. rx_irq(udc);
  1902. irq_src &= ~USB_E_RXB_MASK;
  1903. status = IRQ_HANDLED;
  1904. }
  1905. if (irq_src & USB_E_RESET_MASK) {
  1906. reset_irq(udc);
  1907. irq_src &= ~USB_E_RESET_MASK;
  1908. status = IRQ_HANDLED;
  1909. }
  1910. if (irq_src & USB_E_BSY_MASK) {
  1911. bsy_irq(udc);
  1912. irq_src &= ~USB_E_BSY_MASK;
  1913. status = IRQ_HANDLED;
  1914. }
  1915. if (irq_src & USB_E_TXE_MASK) {
  1916. txe_irq(udc);
  1917. irq_src &= ~USB_E_TXE_MASK;
  1918. status = IRQ_HANDLED;
  1919. }
  1920. spin_unlock_irqrestore(&udc->lock, flags);
  1921. return status;
  1922. }
  1923. /*-------------------------------------------------------------------------
  1924. Gadget driver probe and unregister.
  1925. --------------------------------------------------------------------------*/
  1926. static int fsl_qe_start(struct usb_gadget *gadget,
  1927. struct usb_gadget_driver *driver)
  1928. {
  1929. struct qe_udc *udc;
  1930. unsigned long flags;
  1931. udc = container_of(gadget, struct qe_udc, gadget);
  1932. /* lock is needed but whether should use this lock or another */
  1933. spin_lock_irqsave(&udc->lock, flags);
  1934. driver->driver.bus = NULL;
  1935. /* hook up the driver */
  1936. udc->driver = driver;
  1937. udc->gadget.dev.driver = &driver->driver;
  1938. udc->gadget.speed = driver->max_speed;
  1939. /* Enable IRQ reg and Set usbcmd reg EN bit */
  1940. qe_usb_enable(udc);
  1941. out_be16(&udc->usb_regs->usb_usber, 0xffff);
  1942. out_be16(&udc->usb_regs->usb_usbmr, USB_E_DEFAULT_DEVICE);
  1943. udc->usb_state = USB_STATE_ATTACHED;
  1944. udc->ep0_state = WAIT_FOR_SETUP;
  1945. udc->ep0_dir = USB_DIR_OUT;
  1946. spin_unlock_irqrestore(&udc->lock, flags);
  1947. dev_info(udc->dev, "%s bind to driver %s\n", udc->gadget.name,
  1948. driver->driver.name);
  1949. return 0;
  1950. }
  1951. static int fsl_qe_stop(struct usb_gadget *gadget,
  1952. struct usb_gadget_driver *driver)
  1953. {
  1954. struct qe_udc *udc;
  1955. struct qe_ep *loop_ep;
  1956. unsigned long flags;
  1957. udc = container_of(gadget, struct qe_udc, gadget);
  1958. /* stop usb controller, disable intr */
  1959. qe_usb_disable(udc);
  1960. /* in fact, no needed */
  1961. udc->usb_state = USB_STATE_ATTACHED;
  1962. udc->ep0_state = WAIT_FOR_SETUP;
  1963. udc->ep0_dir = 0;
  1964. /* stand operation */
  1965. spin_lock_irqsave(&udc->lock, flags);
  1966. udc->gadget.speed = USB_SPEED_UNKNOWN;
  1967. nuke(&udc->eps[0], -ESHUTDOWN);
  1968. list_for_each_entry(loop_ep, &udc->gadget.ep_list, ep.ep_list)
  1969. nuke(loop_ep, -ESHUTDOWN);
  1970. spin_unlock_irqrestore(&udc->lock, flags);
  1971. udc->gadget.dev.driver = NULL;
  1972. udc->driver = NULL;
  1973. dev_info(udc->dev, "unregistered gadget driver '%s'\r\n",
  1974. driver->driver.name);
  1975. return 0;
  1976. }
  1977. /* udc structure's alloc and setup, include ep-param alloc */
  1978. static struct qe_udc *qe_udc_config(struct platform_device *ofdev)
  1979. {
  1980. struct qe_udc *udc;
  1981. struct device_node *np = ofdev->dev.of_node;
  1982. unsigned int tmp_addr = 0;
  1983. struct usb_device_para __iomem *usbpram;
  1984. unsigned int i;
  1985. u64 size;
  1986. u32 offset;
  1987. udc = kzalloc(sizeof(*udc), GFP_KERNEL);
  1988. if (udc == NULL) {
  1989. dev_err(&ofdev->dev, "malloc udc failed\n");
  1990. goto cleanup;
  1991. }
  1992. udc->dev = &ofdev->dev;
  1993. /* get default address of usb parameter in MURAM from device tree */
  1994. offset = *of_get_address(np, 1, &size, NULL);
  1995. udc->usb_param = cpm_muram_addr(offset);
  1996. memset_io(udc->usb_param, 0, size);
  1997. usbpram = udc->usb_param;
  1998. out_be16(&usbpram->frame_n, 0);
  1999. out_be32(&usbpram->rstate, 0);
  2000. tmp_addr = cpm_muram_alloc((USB_MAX_ENDPOINTS *
  2001. sizeof(struct usb_ep_para)),
  2002. USB_EP_PARA_ALIGNMENT);
  2003. if (IS_ERR_VALUE(tmp_addr))
  2004. goto cleanup;
  2005. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  2006. out_be16(&usbpram->epptr[i], (u16)tmp_addr);
  2007. udc->ep_param[i] = cpm_muram_addr(tmp_addr);
  2008. tmp_addr += 32;
  2009. }
  2010. memset_io(udc->ep_param[0], 0,
  2011. USB_MAX_ENDPOINTS * sizeof(struct usb_ep_para));
  2012. udc->resume_state = USB_STATE_NOTATTACHED;
  2013. udc->usb_state = USB_STATE_POWERED;
  2014. udc->ep0_dir = 0;
  2015. spin_lock_init(&udc->lock);
  2016. return udc;
  2017. cleanup:
  2018. kfree(udc);
  2019. return NULL;
  2020. }
  2021. /* USB Controller register init */
  2022. static int qe_udc_reg_init(struct qe_udc *udc)
  2023. {
  2024. struct usb_ctlr __iomem *qe_usbregs;
  2025. qe_usbregs = udc->usb_regs;
  2026. /* Spec says that we must enable the USB controller to change mode. */
  2027. out_8(&qe_usbregs->usb_usmod, 0x01);
  2028. /* Mode changed, now disable it, since muram isn't initialized yet. */
  2029. out_8(&qe_usbregs->usb_usmod, 0x00);
  2030. /* Initialize the rest. */
  2031. out_be16(&qe_usbregs->usb_usbmr, 0);
  2032. out_8(&qe_usbregs->usb_uscom, 0);
  2033. out_be16(&qe_usbregs->usb_usber, USBER_ALL_CLEAR);
  2034. return 0;
  2035. }
  2036. static int qe_ep_config(struct qe_udc *udc, unsigned char pipe_num)
  2037. {
  2038. struct qe_ep *ep = &udc->eps[pipe_num];
  2039. ep->udc = udc;
  2040. strcpy(ep->name, ep_name[pipe_num]);
  2041. ep->ep.name = ep_name[pipe_num];
  2042. ep->ep.ops = &qe_ep_ops;
  2043. ep->stopped = 1;
  2044. ep->ep.maxpacket = (unsigned short) ~0;
  2045. ep->ep.desc = NULL;
  2046. ep->dir = 0xff;
  2047. ep->epnum = (u8)pipe_num;
  2048. ep->sent = 0;
  2049. ep->last = 0;
  2050. ep->init = 0;
  2051. ep->rxframe = NULL;
  2052. ep->txframe = NULL;
  2053. ep->tx_req = NULL;
  2054. ep->state = EP_STATE_IDLE;
  2055. ep->has_data = 0;
  2056. /* the queue lists any req for this ep */
  2057. INIT_LIST_HEAD(&ep->queue);
  2058. /* gagdet.ep_list used for ep_autoconfig so no ep0*/
  2059. if (pipe_num != 0)
  2060. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  2061. ep->gadget = &udc->gadget;
  2062. return 0;
  2063. }
  2064. /*-----------------------------------------------------------------------
  2065. * UDC device Driver operation functions *
  2066. *----------------------------------------------------------------------*/
  2067. static void qe_udc_release(struct device *dev)
  2068. {
  2069. struct qe_udc *udc = container_of(dev, struct qe_udc, gadget.dev);
  2070. int i;
  2071. complete(udc->done);
  2072. cpm_muram_free(cpm_muram_offset(udc->ep_param[0]));
  2073. for (i = 0; i < USB_MAX_ENDPOINTS; i++)
  2074. udc->ep_param[i] = NULL;
  2075. kfree(udc);
  2076. }
  2077. /* Driver probe functions */
  2078. static const struct of_device_id qe_udc_match[];
  2079. static int qe_udc_probe(struct platform_device *ofdev)
  2080. {
  2081. struct qe_udc *udc;
  2082. const struct of_device_id *match;
  2083. struct device_node *np = ofdev->dev.of_node;
  2084. struct qe_ep *ep;
  2085. unsigned int ret = 0;
  2086. unsigned int i;
  2087. const void *prop;
  2088. match = of_match_device(qe_udc_match, &ofdev->dev);
  2089. if (!match)
  2090. return -EINVAL;
  2091. prop = of_get_property(np, "mode", NULL);
  2092. if (!prop || strcmp(prop, "peripheral"))
  2093. return -ENODEV;
  2094. /* Initialize the udc structure including QH member and other member */
  2095. udc = qe_udc_config(ofdev);
  2096. if (!udc) {
  2097. dev_err(&ofdev->dev, "failed to initialize\n");
  2098. return -ENOMEM;
  2099. }
  2100. udc->soc_type = (unsigned long)match->data;
  2101. udc->usb_regs = of_iomap(np, 0);
  2102. if (!udc->usb_regs) {
  2103. ret = -ENOMEM;
  2104. goto err1;
  2105. }
  2106. /* initialize usb hw reg except for regs for EP,
  2107. * leave usbintr reg untouched*/
  2108. qe_udc_reg_init(udc);
  2109. /* here comes the stand operations for probe
  2110. * set the qe_udc->gadget.xxx */
  2111. udc->gadget.ops = &qe_gadget_ops;
  2112. /* gadget.ep0 is a pointer */
  2113. udc->gadget.ep0 = &udc->eps[0].ep;
  2114. INIT_LIST_HEAD(&udc->gadget.ep_list);
  2115. /* modify in register gadget process */
  2116. udc->gadget.speed = USB_SPEED_UNKNOWN;
  2117. /* name: Identifies the controller hardware type. */
  2118. udc->gadget.name = driver_name;
  2119. device_initialize(&udc->gadget.dev);
  2120. dev_set_name(&udc->gadget.dev, "gadget");
  2121. udc->gadget.dev.release = qe_udc_release;
  2122. udc->gadget.dev.parent = &ofdev->dev;
  2123. /* initialize qe_ep struct */
  2124. for (i = 0; i < USB_MAX_ENDPOINTS ; i++) {
  2125. /* because the ep type isn't decide here so
  2126. * qe_ep_init() should be called in ep_enable() */
  2127. /* setup the qe_ep struct and link ep.ep.list
  2128. * into gadget.ep_list */
  2129. qe_ep_config(udc, (unsigned char)i);
  2130. }
  2131. /* ep0 initialization in here */
  2132. ret = qe_ep_init(udc, 0, &qe_ep0_desc);
  2133. if (ret)
  2134. goto err2;
  2135. /* create a buf for ZLP send, need to remain zeroed */
  2136. udc->nullbuf = kzalloc(256, GFP_KERNEL);
  2137. if (udc->nullbuf == NULL) {
  2138. dev_err(udc->dev, "cannot alloc nullbuf\n");
  2139. ret = -ENOMEM;
  2140. goto err3;
  2141. }
  2142. /* buffer for data of get_status request */
  2143. udc->statusbuf = kzalloc(2, GFP_KERNEL);
  2144. if (udc->statusbuf == NULL) {
  2145. ret = -ENOMEM;
  2146. goto err4;
  2147. }
  2148. udc->nullp = virt_to_phys((void *)udc->nullbuf);
  2149. if (udc->nullp == DMA_ADDR_INVALID) {
  2150. udc->nullp = dma_map_single(
  2151. udc->gadget.dev.parent,
  2152. udc->nullbuf,
  2153. 256,
  2154. DMA_TO_DEVICE);
  2155. udc->nullmap = 1;
  2156. } else {
  2157. dma_sync_single_for_device(udc->gadget.dev.parent,
  2158. udc->nullp, 256,
  2159. DMA_TO_DEVICE);
  2160. }
  2161. tasklet_init(&udc->rx_tasklet, ep_rx_tasklet,
  2162. (unsigned long)udc);
  2163. /* request irq and disable DR */
  2164. udc->usb_irq = irq_of_parse_and_map(np, 0);
  2165. if (!udc->usb_irq) {
  2166. ret = -EINVAL;
  2167. goto err_noirq;
  2168. }
  2169. ret = request_irq(udc->usb_irq, qe_udc_irq, 0,
  2170. driver_name, udc);
  2171. if (ret) {
  2172. dev_err(udc->dev, "cannot request irq %d err %d\n",
  2173. udc->usb_irq, ret);
  2174. goto err5;
  2175. }
  2176. ret = device_add(&udc->gadget.dev);
  2177. if (ret)
  2178. goto err6;
  2179. ret = usb_add_gadget_udc(&ofdev->dev, &udc->gadget);
  2180. if (ret)
  2181. goto err7;
  2182. dev_set_drvdata(&ofdev->dev, udc);
  2183. dev_info(udc->dev,
  2184. "%s USB controller initialized as device\n",
  2185. (udc->soc_type == PORT_QE) ? "QE" : "CPM");
  2186. return 0;
  2187. err7:
  2188. device_unregister(&udc->gadget.dev);
  2189. err6:
  2190. free_irq(udc->usb_irq, udc);
  2191. err5:
  2192. irq_dispose_mapping(udc->usb_irq);
  2193. err_noirq:
  2194. if (udc->nullmap) {
  2195. dma_unmap_single(udc->gadget.dev.parent,
  2196. udc->nullp, 256,
  2197. DMA_TO_DEVICE);
  2198. udc->nullp = DMA_ADDR_INVALID;
  2199. } else {
  2200. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  2201. udc->nullp, 256,
  2202. DMA_TO_DEVICE);
  2203. }
  2204. kfree(udc->statusbuf);
  2205. err4:
  2206. kfree(udc->nullbuf);
  2207. err3:
  2208. ep = &udc->eps[0];
  2209. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2210. kfree(ep->rxframe);
  2211. kfree(ep->rxbuffer);
  2212. kfree(ep->txframe);
  2213. err2:
  2214. iounmap(udc->usb_regs);
  2215. err1:
  2216. kfree(udc);
  2217. return ret;
  2218. }
  2219. #ifdef CONFIG_PM
  2220. static int qe_udc_suspend(struct platform_device *dev, pm_message_t state)
  2221. {
  2222. return -ENOTSUPP;
  2223. }
  2224. static int qe_udc_resume(struct platform_device *dev)
  2225. {
  2226. return -ENOTSUPP;
  2227. }
  2228. #endif
  2229. static int qe_udc_remove(struct platform_device *ofdev)
  2230. {
  2231. struct qe_udc *udc = dev_get_drvdata(&ofdev->dev);
  2232. struct qe_ep *ep;
  2233. unsigned int size;
  2234. DECLARE_COMPLETION(done);
  2235. usb_del_gadget_udc(&udc->gadget);
  2236. udc->done = &done;
  2237. tasklet_disable(&udc->rx_tasklet);
  2238. if (udc->nullmap) {
  2239. dma_unmap_single(udc->gadget.dev.parent,
  2240. udc->nullp, 256,
  2241. DMA_TO_DEVICE);
  2242. udc->nullp = DMA_ADDR_INVALID;
  2243. } else {
  2244. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  2245. udc->nullp, 256,
  2246. DMA_TO_DEVICE);
  2247. }
  2248. kfree(udc->statusbuf);
  2249. kfree(udc->nullbuf);
  2250. ep = &udc->eps[0];
  2251. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2252. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (USB_BDRING_LEN + 1);
  2253. kfree(ep->rxframe);
  2254. if (ep->rxbufmap) {
  2255. dma_unmap_single(udc->gadget.dev.parent,
  2256. ep->rxbuf_d, size,
  2257. DMA_FROM_DEVICE);
  2258. ep->rxbuf_d = DMA_ADDR_INVALID;
  2259. } else {
  2260. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  2261. ep->rxbuf_d, size,
  2262. DMA_FROM_DEVICE);
  2263. }
  2264. kfree(ep->rxbuffer);
  2265. kfree(ep->txframe);
  2266. free_irq(udc->usb_irq, udc);
  2267. irq_dispose_mapping(udc->usb_irq);
  2268. tasklet_kill(&udc->rx_tasklet);
  2269. iounmap(udc->usb_regs);
  2270. device_unregister(&udc->gadget.dev);
  2271. /* wait for release() of gadget.dev to free udc */
  2272. wait_for_completion(&done);
  2273. return 0;
  2274. }
  2275. /*-------------------------------------------------------------------------*/
  2276. static const struct of_device_id qe_udc_match[] = {
  2277. {
  2278. .compatible = "fsl,mpc8323-qe-usb",
  2279. .data = (void *)PORT_QE,
  2280. },
  2281. {
  2282. .compatible = "fsl,mpc8360-qe-usb",
  2283. .data = (void *)PORT_QE,
  2284. },
  2285. {
  2286. .compatible = "fsl,mpc8272-cpm-usb",
  2287. .data = (void *)PORT_CPM,
  2288. },
  2289. {},
  2290. };
  2291. MODULE_DEVICE_TABLE(of, qe_udc_match);
  2292. static struct platform_driver udc_driver = {
  2293. .driver = {
  2294. .name = (char *)driver_name,
  2295. .owner = THIS_MODULE,
  2296. .of_match_table = qe_udc_match,
  2297. },
  2298. .probe = qe_udc_probe,
  2299. .remove = qe_udc_remove,
  2300. #ifdef CONFIG_PM
  2301. .suspend = qe_udc_suspend,
  2302. .resume = qe_udc_resume,
  2303. #endif
  2304. };
  2305. module_platform_driver(udc_driver);
  2306. MODULE_DESCRIPTION(DRIVER_DESC);
  2307. MODULE_AUTHOR(DRIVER_AUTHOR);
  2308. MODULE_LICENSE("GPL");