ehci-dbgp.c 26 KB

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  1. /*
  2. * Standalone EHCI usb debug driver
  3. *
  4. * Originally written by:
  5. * Eric W. Biederman" <ebiederm@xmission.com> and
  6. * Yinghai Lu <yhlu.kernel@gmail.com>
  7. *
  8. * Changes for early/late printk and HW errata:
  9. * Jason Wessel <jason.wessel@windriver.com>
  10. * Copyright (C) 2009 Wind River Systems, Inc.
  11. *
  12. */
  13. #include <linux/console.h>
  14. #include <linux/errno.h>
  15. #include <linux/module.h>
  16. #include <linux/pci_regs.h>
  17. #include <linux/pci_ids.h>
  18. #include <linux/usb/ch9.h>
  19. #include <linux/usb/ehci_def.h>
  20. #include <linux/delay.h>
  21. #include <linux/serial_core.h>
  22. #include <linux/kconfig.h>
  23. #include <linux/kgdb.h>
  24. #include <linux/kthread.h>
  25. #include <asm/io.h>
  26. #include <asm/pci-direct.h>
  27. #include <asm/fixmap.h>
  28. /* The code here is intended to talk directly to the EHCI debug port
  29. * and does not require that you have any kind of USB host controller
  30. * drivers or USB device drivers compiled into the kernel.
  31. *
  32. * If you make a change to anything in here, the following test cases
  33. * need to pass where a USB debug device works in the following
  34. * configurations.
  35. *
  36. * 1. boot args: earlyprintk=dbgp
  37. * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
  38. * o kernel compiled with CONFIG_USB_EHCI_HCD=y
  39. * 2. boot args: earlyprintk=dbgp,keep
  40. * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
  41. * o kernel compiled with CONFIG_USB_EHCI_HCD=y
  42. * 3. boot args: earlyprintk=dbgp console=ttyUSB0
  43. * o kernel has CONFIG_USB_EHCI_HCD=y and
  44. * CONFIG_USB_SERIAL_DEBUG=y
  45. * 4. boot args: earlyprintk=vga,dbgp
  46. * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
  47. * o kernel compiled with CONFIG_USB_EHCI_HCD=y
  48. *
  49. * For the 4th configuration you can turn on or off the DBGP_DEBUG
  50. * such that you can debug the dbgp device's driver code.
  51. */
  52. static int dbgp_phys_port = 1;
  53. static struct ehci_caps __iomem *ehci_caps;
  54. static struct ehci_regs __iomem *ehci_regs;
  55. static struct ehci_dbg_port __iomem *ehci_debug;
  56. static int dbgp_not_safe; /* Cannot use debug device during ehci reset */
  57. static unsigned int dbgp_endpoint_out;
  58. static unsigned int dbgp_endpoint_in;
  59. struct ehci_dev {
  60. u32 bus;
  61. u32 slot;
  62. u32 func;
  63. };
  64. static struct ehci_dev ehci_dev;
  65. #define USB_DEBUG_DEVNUM 127
  66. #ifdef DBGP_DEBUG
  67. #define dbgp_printk printk
  68. static void dbgp_ehci_status(char *str)
  69. {
  70. if (!ehci_debug)
  71. return;
  72. dbgp_printk("dbgp: %s\n", str);
  73. dbgp_printk(" Debug control: %08x", readl(&ehci_debug->control));
  74. dbgp_printk(" ehci cmd : %08x", readl(&ehci_regs->command));
  75. dbgp_printk(" ehci conf flg: %08x\n",
  76. readl(&ehci_regs->configured_flag));
  77. dbgp_printk(" ehci status : %08x", readl(&ehci_regs->status));
  78. dbgp_printk(" ehci portsc : %08x\n",
  79. readl(&ehci_regs->port_status[dbgp_phys_port - 1]));
  80. }
  81. #else
  82. static inline void dbgp_ehci_status(char *str) { }
  83. static inline void dbgp_printk(const char *fmt, ...) { }
  84. #endif
  85. static inline u32 dbgp_len_update(u32 x, u32 len)
  86. {
  87. return (x & ~0x0f) | (len & 0x0f);
  88. }
  89. #ifdef CONFIG_KGDB
  90. static struct kgdb_io kgdbdbgp_io_ops;
  91. #define dbgp_kgdb_mode (dbg_io_ops == &kgdbdbgp_io_ops)
  92. #else
  93. #define dbgp_kgdb_mode (0)
  94. #endif
  95. /* Local version of HC_LENGTH macro as ehci struct is not available here */
  96. #define EARLY_HC_LENGTH(p) (0x00ff & (p)) /* bits 7 : 0 */
  97. /*
  98. * USB Packet IDs (PIDs)
  99. */
  100. /* token */
  101. #define USB_PID_OUT 0xe1
  102. #define USB_PID_IN 0x69
  103. #define USB_PID_SOF 0xa5
  104. #define USB_PID_SETUP 0x2d
  105. /* handshake */
  106. #define USB_PID_ACK 0xd2
  107. #define USB_PID_NAK 0x5a
  108. #define USB_PID_STALL 0x1e
  109. #define USB_PID_NYET 0x96
  110. /* data */
  111. #define USB_PID_DATA0 0xc3
  112. #define USB_PID_DATA1 0x4b
  113. #define USB_PID_DATA2 0x87
  114. #define USB_PID_MDATA 0x0f
  115. /* Special */
  116. #define USB_PID_PREAMBLE 0x3c
  117. #define USB_PID_ERR 0x3c
  118. #define USB_PID_SPLIT 0x78
  119. #define USB_PID_PING 0xb4
  120. #define USB_PID_UNDEF_0 0xf0
  121. #define USB_PID_DATA_TOGGLE 0x88
  122. #define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
  123. #define PCI_CAP_ID_EHCI_DEBUG 0xa
  124. #define HUB_ROOT_RESET_TIME 50 /* times are in msec */
  125. #define HUB_SHORT_RESET_TIME 10
  126. #define HUB_LONG_RESET_TIME 200
  127. #define HUB_RESET_TIMEOUT 500
  128. #define DBGP_MAX_PACKET 8
  129. #define DBGP_TIMEOUT (250 * 1000)
  130. #define DBGP_LOOPS 1000
  131. static inline u32 dbgp_pid_write_update(u32 x, u32 tok)
  132. {
  133. static int data0 = USB_PID_DATA1;
  134. data0 ^= USB_PID_DATA_TOGGLE;
  135. return (x & 0xffff0000) | (data0 << 8) | (tok & 0xff);
  136. }
  137. static inline u32 dbgp_pid_read_update(u32 x, u32 tok)
  138. {
  139. return (x & 0xffff0000) | (USB_PID_DATA0 << 8) | (tok & 0xff);
  140. }
  141. static int dbgp_wait_until_complete(void)
  142. {
  143. u32 ctrl;
  144. int loop = DBGP_TIMEOUT;
  145. do {
  146. ctrl = readl(&ehci_debug->control);
  147. /* Stop when the transaction is finished */
  148. if (ctrl & DBGP_DONE)
  149. break;
  150. udelay(1);
  151. } while (--loop > 0);
  152. if (!loop)
  153. return -DBGP_TIMEOUT;
  154. /*
  155. * Now that we have observed the completed transaction,
  156. * clear the done bit.
  157. */
  158. writel(ctrl | DBGP_DONE, &ehci_debug->control);
  159. return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
  160. }
  161. static inline void dbgp_mdelay(int ms)
  162. {
  163. int i;
  164. while (ms--) {
  165. for (i = 0; i < 1000; i++)
  166. outb(0x1, 0x80);
  167. }
  168. }
  169. static void dbgp_breath(void)
  170. {
  171. /* Sleep to give the debug port a chance to breathe */
  172. }
  173. static int dbgp_wait_until_done(unsigned ctrl, int loop)
  174. {
  175. u32 pids, lpid;
  176. int ret;
  177. retry:
  178. writel(ctrl | DBGP_GO, &ehci_debug->control);
  179. ret = dbgp_wait_until_complete();
  180. pids = readl(&ehci_debug->pids);
  181. lpid = DBGP_PID_GET(pids);
  182. if (ret < 0) {
  183. /* A -DBGP_TIMEOUT failure here means the device has
  184. * failed, perhaps because it was unplugged, in which
  185. * case we do not want to hang the system so the dbgp
  186. * will be marked as unsafe to use. EHCI reset is the
  187. * only way to recover if you unplug the dbgp device.
  188. */
  189. if (ret == -DBGP_TIMEOUT && !dbgp_not_safe)
  190. dbgp_not_safe = 1;
  191. if (ret == -DBGP_ERR_BAD && --loop > 0)
  192. goto retry;
  193. return ret;
  194. }
  195. /*
  196. * If the port is getting full or it has dropped data
  197. * start pacing ourselves, not necessary but it's friendly.
  198. */
  199. if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
  200. dbgp_breath();
  201. /* If I get a NACK reissue the transmission */
  202. if (lpid == USB_PID_NAK) {
  203. if (--loop > 0)
  204. goto retry;
  205. }
  206. return ret;
  207. }
  208. static inline void dbgp_set_data(const void *buf, int size)
  209. {
  210. const unsigned char *bytes = buf;
  211. u32 lo, hi;
  212. int i;
  213. lo = hi = 0;
  214. for (i = 0; i < 4 && i < size; i++)
  215. lo |= bytes[i] << (8*i);
  216. for (; i < 8 && i < size; i++)
  217. hi |= bytes[i] << (8*(i - 4));
  218. writel(lo, &ehci_debug->data03);
  219. writel(hi, &ehci_debug->data47);
  220. }
  221. static inline void dbgp_get_data(void *buf, int size)
  222. {
  223. unsigned char *bytes = buf;
  224. u32 lo, hi;
  225. int i;
  226. lo = readl(&ehci_debug->data03);
  227. hi = readl(&ehci_debug->data47);
  228. for (i = 0; i < 4 && i < size; i++)
  229. bytes[i] = (lo >> (8*i)) & 0xff;
  230. for (; i < 8 && i < size; i++)
  231. bytes[i] = (hi >> (8*(i - 4))) & 0xff;
  232. }
  233. static int dbgp_bulk_write(unsigned devnum, unsigned endpoint,
  234. const char *bytes, int size)
  235. {
  236. int ret;
  237. u32 addr;
  238. u32 pids, ctrl;
  239. if (size > DBGP_MAX_PACKET)
  240. return -1;
  241. addr = DBGP_EPADDR(devnum, endpoint);
  242. pids = readl(&ehci_debug->pids);
  243. pids = dbgp_pid_write_update(pids, USB_PID_OUT);
  244. ctrl = readl(&ehci_debug->control);
  245. ctrl = dbgp_len_update(ctrl, size);
  246. ctrl |= DBGP_OUT;
  247. ctrl |= DBGP_GO;
  248. dbgp_set_data(bytes, size);
  249. writel(addr, &ehci_debug->address);
  250. writel(pids, &ehci_debug->pids);
  251. ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS);
  252. return ret;
  253. }
  254. static int dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data,
  255. int size, int loops)
  256. {
  257. u32 pids, addr, ctrl;
  258. int ret;
  259. if (size > DBGP_MAX_PACKET)
  260. return -1;
  261. addr = DBGP_EPADDR(devnum, endpoint);
  262. pids = readl(&ehci_debug->pids);
  263. pids = dbgp_pid_read_update(pids, USB_PID_IN);
  264. ctrl = readl(&ehci_debug->control);
  265. ctrl = dbgp_len_update(ctrl, size);
  266. ctrl &= ~DBGP_OUT;
  267. ctrl |= DBGP_GO;
  268. writel(addr, &ehci_debug->address);
  269. writel(pids, &ehci_debug->pids);
  270. ret = dbgp_wait_until_done(ctrl, loops);
  271. if (ret < 0)
  272. return ret;
  273. if (size > ret)
  274. size = ret;
  275. dbgp_get_data(data, size);
  276. return ret;
  277. }
  278. static int dbgp_control_msg(unsigned devnum, int requesttype,
  279. int request, int value, int index, void *data, int size)
  280. {
  281. u32 pids, addr, ctrl;
  282. struct usb_ctrlrequest req;
  283. int read;
  284. int ret;
  285. read = (requesttype & USB_DIR_IN) != 0;
  286. if (size > (read ? DBGP_MAX_PACKET : 0))
  287. return -1;
  288. /* Compute the control message */
  289. req.bRequestType = requesttype;
  290. req.bRequest = request;
  291. req.wValue = cpu_to_le16(value);
  292. req.wIndex = cpu_to_le16(index);
  293. req.wLength = cpu_to_le16(size);
  294. pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
  295. addr = DBGP_EPADDR(devnum, 0);
  296. ctrl = readl(&ehci_debug->control);
  297. ctrl = dbgp_len_update(ctrl, sizeof(req));
  298. ctrl |= DBGP_OUT;
  299. ctrl |= DBGP_GO;
  300. /* Send the setup message */
  301. dbgp_set_data(&req, sizeof(req));
  302. writel(addr, &ehci_debug->address);
  303. writel(pids, &ehci_debug->pids);
  304. ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS);
  305. if (ret < 0)
  306. return ret;
  307. /* Read the result */
  308. return dbgp_bulk_read(devnum, 0, data, size, DBGP_LOOPS);
  309. }
  310. /* Find a PCI capability */
  311. static u32 __init find_cap(u32 num, u32 slot, u32 func, int cap)
  312. {
  313. u8 pos;
  314. int bytes;
  315. if (!(read_pci_config_16(num, slot, func, PCI_STATUS) &
  316. PCI_STATUS_CAP_LIST))
  317. return 0;
  318. pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST);
  319. for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) {
  320. u8 id;
  321. pos &= ~3;
  322. id = read_pci_config_byte(num, slot, func, pos+PCI_CAP_LIST_ID);
  323. if (id == 0xff)
  324. break;
  325. if (id == cap)
  326. return pos;
  327. pos = read_pci_config_byte(num, slot, func,
  328. pos+PCI_CAP_LIST_NEXT);
  329. }
  330. return 0;
  331. }
  332. static u32 __init __find_dbgp(u32 bus, u32 slot, u32 func)
  333. {
  334. u32 class;
  335. class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
  336. if ((class >> 8) != PCI_CLASS_SERIAL_USB_EHCI)
  337. return 0;
  338. return find_cap(bus, slot, func, PCI_CAP_ID_EHCI_DEBUG);
  339. }
  340. static u32 __init find_dbgp(int ehci_num, u32 *rbus, u32 *rslot, u32 *rfunc)
  341. {
  342. u32 bus, slot, func;
  343. for (bus = 0; bus < 256; bus++) {
  344. for (slot = 0; slot < 32; slot++) {
  345. for (func = 0; func < 8; func++) {
  346. unsigned cap;
  347. cap = __find_dbgp(bus, slot, func);
  348. if (!cap)
  349. continue;
  350. if (ehci_num-- != 0)
  351. continue;
  352. *rbus = bus;
  353. *rslot = slot;
  354. *rfunc = func;
  355. return cap;
  356. }
  357. }
  358. }
  359. return 0;
  360. }
  361. static int dbgp_ehci_startup(void)
  362. {
  363. u32 ctrl, cmd, status;
  364. int loop;
  365. /* Claim ownership, but do not enable yet */
  366. ctrl = readl(&ehci_debug->control);
  367. ctrl |= DBGP_OWNER;
  368. ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
  369. writel(ctrl, &ehci_debug->control);
  370. udelay(1);
  371. dbgp_ehci_status("EHCI startup");
  372. /* Start the ehci running */
  373. cmd = readl(&ehci_regs->command);
  374. cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
  375. cmd |= CMD_RUN;
  376. writel(cmd, &ehci_regs->command);
  377. /* Ensure everything is routed to the EHCI */
  378. writel(FLAG_CF, &ehci_regs->configured_flag);
  379. /* Wait until the controller is no longer halted */
  380. loop = 1000;
  381. do {
  382. status = readl(&ehci_regs->status);
  383. if (!(status & STS_HALT))
  384. break;
  385. udelay(1);
  386. } while (--loop > 0);
  387. if (!loop) {
  388. dbgp_printk("ehci can not be started\n");
  389. return -ENODEV;
  390. }
  391. dbgp_printk("ehci started\n");
  392. return 0;
  393. }
  394. static int dbgp_ehci_controller_reset(void)
  395. {
  396. int loop = 250 * 1000;
  397. u32 cmd;
  398. /* Reset the EHCI controller */
  399. cmd = readl(&ehci_regs->command);
  400. cmd |= CMD_RESET;
  401. writel(cmd, &ehci_regs->command);
  402. do {
  403. cmd = readl(&ehci_regs->command);
  404. } while ((cmd & CMD_RESET) && (--loop > 0));
  405. if (!loop) {
  406. dbgp_printk("can not reset ehci\n");
  407. return -1;
  408. }
  409. dbgp_ehci_status("ehci reset done");
  410. return 0;
  411. }
  412. static int ehci_wait_for_port(int port);
  413. /* Return 0 on success
  414. * Return -ENODEV for any general failure
  415. * Return -EIO if wait for port fails
  416. */
  417. static int _dbgp_external_startup(void)
  418. {
  419. int devnum;
  420. struct usb_debug_descriptor dbgp_desc;
  421. int ret;
  422. u32 ctrl, portsc, cmd;
  423. int dbg_port = dbgp_phys_port;
  424. int tries = 3;
  425. int reset_port_tries = 1;
  426. int try_hard_once = 1;
  427. try_port_reset_again:
  428. ret = dbgp_ehci_startup();
  429. if (ret)
  430. return ret;
  431. /* Wait for a device to show up in the debug port */
  432. ret = ehci_wait_for_port(dbg_port);
  433. if (ret < 0) {
  434. portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
  435. if (!(portsc & PORT_CONNECT) && try_hard_once) {
  436. /* Last ditch effort to try to force enable
  437. * the debug device by using the packet test
  438. * ehci command to try and wake it up. */
  439. try_hard_once = 0;
  440. cmd = readl(&ehci_regs->command);
  441. cmd &= ~CMD_RUN;
  442. writel(cmd, &ehci_regs->command);
  443. portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
  444. portsc |= PORT_TEST_PKT;
  445. writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
  446. dbgp_ehci_status("Trying to force debug port online");
  447. mdelay(50);
  448. dbgp_ehci_controller_reset();
  449. goto try_port_reset_again;
  450. } else if (reset_port_tries--) {
  451. goto try_port_reset_again;
  452. }
  453. dbgp_printk("No device found in debug port\n");
  454. return -EIO;
  455. }
  456. dbgp_ehci_status("wait for port done");
  457. /* Enable the debug port */
  458. ctrl = readl(&ehci_debug->control);
  459. ctrl |= DBGP_CLAIM;
  460. writel(ctrl, &ehci_debug->control);
  461. ctrl = readl(&ehci_debug->control);
  462. if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
  463. dbgp_printk("No device in debug port\n");
  464. writel(ctrl & ~DBGP_CLAIM, &ehci_debug->control);
  465. return -ENODEV;
  466. }
  467. dbgp_ehci_status("debug ported enabled");
  468. /* Completely transfer the debug device to the debug controller */
  469. portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
  470. portsc &= ~PORT_PE;
  471. writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
  472. dbgp_mdelay(100);
  473. try_again:
  474. /* Find the debug device and make it device number 127 */
  475. for (devnum = 0; devnum <= 127; devnum++) {
  476. ret = dbgp_control_msg(devnum,
  477. USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
  478. USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0,
  479. &dbgp_desc, sizeof(dbgp_desc));
  480. if (ret > 0)
  481. break;
  482. }
  483. if (devnum > 127) {
  484. dbgp_printk("Could not find attached debug device\n");
  485. goto err;
  486. }
  487. if (ret < 0) {
  488. dbgp_printk("Attached device is not a debug device\n");
  489. goto err;
  490. }
  491. dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint;
  492. dbgp_endpoint_in = dbgp_desc.bDebugInEndpoint;
  493. /* Move the device to 127 if it isn't already there */
  494. if (devnum != USB_DEBUG_DEVNUM) {
  495. ret = dbgp_control_msg(devnum,
  496. USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
  497. USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, NULL, 0);
  498. if (ret < 0) {
  499. dbgp_printk("Could not move attached device to %d\n",
  500. USB_DEBUG_DEVNUM);
  501. goto err;
  502. }
  503. devnum = USB_DEBUG_DEVNUM;
  504. dbgp_printk("debug device renamed to 127\n");
  505. }
  506. /* Enable the debug interface */
  507. ret = dbgp_control_msg(USB_DEBUG_DEVNUM,
  508. USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
  509. USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, NULL, 0);
  510. if (ret < 0) {
  511. dbgp_printk(" Could not enable the debug device\n");
  512. goto err;
  513. }
  514. dbgp_printk("debug interface enabled\n");
  515. /* Perform a small write to get the even/odd data state in sync
  516. */
  517. ret = dbgp_bulk_write(USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ", 1);
  518. if (ret < 0) {
  519. dbgp_printk("dbgp_bulk_write failed: %d\n", ret);
  520. goto err;
  521. }
  522. dbgp_printk("small write done\n");
  523. dbgp_not_safe = 0;
  524. return 0;
  525. err:
  526. if (tries--)
  527. goto try_again;
  528. return -ENODEV;
  529. }
  530. static int ehci_reset_port(int port)
  531. {
  532. u32 portsc;
  533. u32 delay_time, delay;
  534. int loop;
  535. dbgp_ehci_status("reset port");
  536. /* Reset the usb debug port */
  537. portsc = readl(&ehci_regs->port_status[port - 1]);
  538. portsc &= ~PORT_PE;
  539. portsc |= PORT_RESET;
  540. writel(portsc, &ehci_regs->port_status[port - 1]);
  541. delay = HUB_ROOT_RESET_TIME;
  542. for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT;
  543. delay_time += delay) {
  544. dbgp_mdelay(delay);
  545. portsc = readl(&ehci_regs->port_status[port - 1]);
  546. if (!(portsc & PORT_RESET))
  547. break;
  548. }
  549. if (portsc & PORT_RESET) {
  550. /* force reset to complete */
  551. loop = 100 * 1000;
  552. writel(portsc & ~(PORT_RWC_BITS | PORT_RESET),
  553. &ehci_regs->port_status[port - 1]);
  554. do {
  555. udelay(1);
  556. portsc = readl(&ehci_regs->port_status[port-1]);
  557. } while ((portsc & PORT_RESET) && (--loop > 0));
  558. }
  559. /* Device went away? */
  560. if (!(portsc & PORT_CONNECT))
  561. return -ENOTCONN;
  562. /* bomb out completely if something weird happened */
  563. if ((portsc & PORT_CSC))
  564. return -EINVAL;
  565. /* If we've finished resetting, then break out of the loop */
  566. if (!(portsc & PORT_RESET) && (portsc & PORT_PE))
  567. return 0;
  568. return -EBUSY;
  569. }
  570. static int ehci_wait_for_port(int port)
  571. {
  572. u32 status;
  573. int ret, reps;
  574. for (reps = 0; reps < 300; reps++) {
  575. status = readl(&ehci_regs->status);
  576. if (status & STS_PCD)
  577. break;
  578. dbgp_mdelay(1);
  579. }
  580. ret = ehci_reset_port(port);
  581. if (ret == 0)
  582. return 0;
  583. return -ENOTCONN;
  584. }
  585. typedef void (*set_debug_port_t)(int port);
  586. static void __init default_set_debug_port(int port)
  587. {
  588. }
  589. static set_debug_port_t __initdata set_debug_port = default_set_debug_port;
  590. static void __init nvidia_set_debug_port(int port)
  591. {
  592. u32 dword;
  593. dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
  594. 0x74);
  595. dword &= ~(0x0f<<12);
  596. dword |= ((port & 0x0f)<<12);
  597. write_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, 0x74,
  598. dword);
  599. dbgp_printk("set debug port to %d\n", port);
  600. }
  601. static void __init detect_set_debug_port(void)
  602. {
  603. u32 vendorid;
  604. vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
  605. 0x00);
  606. if ((vendorid & 0xffff) == 0x10de) {
  607. dbgp_printk("using nvidia set_debug_port\n");
  608. set_debug_port = nvidia_set_debug_port;
  609. }
  610. }
  611. /* The code in early_ehci_bios_handoff() is derived from the usb pci
  612. * quirk initialization, but altered so as to use the early PCI
  613. * routines. */
  614. #define EHCI_USBLEGSUP_BIOS (1 << 16) /* BIOS semaphore */
  615. #define EHCI_USBLEGCTLSTS 4 /* legacy control/status */
  616. static void __init early_ehci_bios_handoff(void)
  617. {
  618. u32 hcc_params = readl(&ehci_caps->hcc_params);
  619. int offset = (hcc_params >> 8) & 0xff;
  620. u32 cap;
  621. int msec;
  622. if (!offset)
  623. return;
  624. cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
  625. ehci_dev.func, offset);
  626. dbgp_printk("dbgp: ehci BIOS state %08x\n", cap);
  627. if ((cap & 0xff) == 1 && (cap & EHCI_USBLEGSUP_BIOS)) {
  628. dbgp_printk("dbgp: BIOS handoff\n");
  629. write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
  630. ehci_dev.func, offset + 3, 1);
  631. }
  632. /* if boot firmware now owns EHCI, spin till it hands it over. */
  633. msec = 1000;
  634. while ((cap & EHCI_USBLEGSUP_BIOS) && (msec > 0)) {
  635. mdelay(10);
  636. msec -= 10;
  637. cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
  638. ehci_dev.func, offset);
  639. }
  640. if (cap & EHCI_USBLEGSUP_BIOS) {
  641. /* well, possibly buggy BIOS... try to shut it down,
  642. * and hope nothing goes too wrong */
  643. dbgp_printk("dbgp: BIOS handoff failed: %08x\n", cap);
  644. write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
  645. ehci_dev.func, offset + 2, 0);
  646. }
  647. /* just in case, always disable EHCI SMIs */
  648. write_pci_config_byte(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
  649. offset + EHCI_USBLEGCTLSTS, 0);
  650. }
  651. static int __init ehci_setup(void)
  652. {
  653. u32 ctrl, portsc, hcs_params;
  654. u32 debug_port, new_debug_port = 0, n_ports;
  655. int ret, i;
  656. int port_map_tried;
  657. int playtimes = 3;
  658. early_ehci_bios_handoff();
  659. try_next_time:
  660. port_map_tried = 0;
  661. try_next_port:
  662. hcs_params = readl(&ehci_caps->hcs_params);
  663. debug_port = HCS_DEBUG_PORT(hcs_params);
  664. dbgp_phys_port = debug_port;
  665. n_ports = HCS_N_PORTS(hcs_params);
  666. dbgp_printk("debug_port: %d\n", debug_port);
  667. dbgp_printk("n_ports: %d\n", n_ports);
  668. dbgp_ehci_status("");
  669. for (i = 1; i <= n_ports; i++) {
  670. portsc = readl(&ehci_regs->port_status[i-1]);
  671. dbgp_printk("portstatus%d: %08x\n", i, portsc);
  672. }
  673. if (port_map_tried && (new_debug_port != debug_port)) {
  674. if (--playtimes) {
  675. set_debug_port(new_debug_port);
  676. goto try_next_time;
  677. }
  678. return -1;
  679. }
  680. /* Only reset the controller if it is not already in the
  681. * configured state */
  682. if (!(readl(&ehci_regs->configured_flag) & FLAG_CF)) {
  683. if (dbgp_ehci_controller_reset() != 0)
  684. return -1;
  685. } else {
  686. dbgp_ehci_status("ehci skip - already configured");
  687. }
  688. ret = _dbgp_external_startup();
  689. if (ret == -EIO)
  690. goto next_debug_port;
  691. if (ret < 0) {
  692. /* Things didn't work so remove my claim */
  693. ctrl = readl(&ehci_debug->control);
  694. ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
  695. writel(ctrl, &ehci_debug->control);
  696. return -1;
  697. }
  698. return 0;
  699. next_debug_port:
  700. port_map_tried |= (1<<(debug_port - 1));
  701. new_debug_port = ((debug_port-1+1)%n_ports) + 1;
  702. if (port_map_tried != ((1<<n_ports) - 1)) {
  703. set_debug_port(new_debug_port);
  704. goto try_next_port;
  705. }
  706. if (--playtimes) {
  707. set_debug_port(new_debug_port);
  708. goto try_next_time;
  709. }
  710. return -1;
  711. }
  712. int __init early_dbgp_init(char *s)
  713. {
  714. u32 debug_port, bar, offset;
  715. u32 bus, slot, func, cap;
  716. void __iomem *ehci_bar;
  717. u32 dbgp_num;
  718. u32 bar_val;
  719. char *e;
  720. int ret;
  721. u8 byte;
  722. if (!early_pci_allowed())
  723. return -1;
  724. dbgp_num = 0;
  725. if (*s)
  726. dbgp_num = simple_strtoul(s, &e, 10);
  727. dbgp_printk("dbgp_num: %d\n", dbgp_num);
  728. cap = find_dbgp(dbgp_num, &bus, &slot, &func);
  729. if (!cap)
  730. return -1;
  731. dbgp_printk("Found EHCI debug port on %02x:%02x.%1x\n", bus, slot,
  732. func);
  733. debug_port = read_pci_config(bus, slot, func, cap);
  734. bar = (debug_port >> 29) & 0x7;
  735. bar = (bar * 4) + 0xc;
  736. offset = (debug_port >> 16) & 0xfff;
  737. dbgp_printk("bar: %02x offset: %03x\n", bar, offset);
  738. if (bar != PCI_BASE_ADDRESS_0) {
  739. dbgp_printk("only debug ports on bar 1 handled.\n");
  740. return -1;
  741. }
  742. bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
  743. dbgp_printk("bar_val: %02x offset: %03x\n", bar_val, offset);
  744. if (bar_val & ~PCI_BASE_ADDRESS_MEM_MASK) {
  745. dbgp_printk("only simple 32bit mmio bars supported\n");
  746. return -1;
  747. }
  748. /* double check if the mem space is enabled */
  749. byte = read_pci_config_byte(bus, slot, func, 0x04);
  750. if (!(byte & 0x2)) {
  751. byte |= 0x02;
  752. write_pci_config_byte(bus, slot, func, 0x04, byte);
  753. dbgp_printk("mmio for ehci enabled\n");
  754. }
  755. /*
  756. * FIXME I don't have the bar size so just guess PAGE_SIZE is more
  757. * than enough. 1K is the biggest I have seen.
  758. */
  759. set_fixmap_nocache(FIX_DBGP_BASE, bar_val & PAGE_MASK);
  760. ehci_bar = (void __iomem *)__fix_to_virt(FIX_DBGP_BASE);
  761. ehci_bar += bar_val & ~PAGE_MASK;
  762. dbgp_printk("ehci_bar: %p\n", ehci_bar);
  763. ehci_caps = ehci_bar;
  764. ehci_regs = ehci_bar + EARLY_HC_LENGTH(readl(&ehci_caps->hc_capbase));
  765. ehci_debug = ehci_bar + offset;
  766. ehci_dev.bus = bus;
  767. ehci_dev.slot = slot;
  768. ehci_dev.func = func;
  769. detect_set_debug_port();
  770. ret = ehci_setup();
  771. if (ret < 0) {
  772. dbgp_printk("ehci_setup failed\n");
  773. ehci_debug = NULL;
  774. return -1;
  775. }
  776. dbgp_ehci_status("early_init_complete");
  777. return 0;
  778. }
  779. static void early_dbgp_write(struct console *con, const char *str, u32 n)
  780. {
  781. int chunk, ret;
  782. char buf[DBGP_MAX_PACKET];
  783. int use_cr = 0;
  784. u32 cmd, ctrl;
  785. int reset_run = 0;
  786. if (!ehci_debug || dbgp_not_safe)
  787. return;
  788. cmd = readl(&ehci_regs->command);
  789. if (unlikely(!(cmd & CMD_RUN))) {
  790. /* If the ehci controller is not in the run state do extended
  791. * checks to see if the acpi or some other initialization also
  792. * reset the ehci debug port */
  793. ctrl = readl(&ehci_debug->control);
  794. if (!(ctrl & DBGP_ENABLED)) {
  795. dbgp_not_safe = 1;
  796. _dbgp_external_startup();
  797. } else {
  798. cmd |= CMD_RUN;
  799. writel(cmd, &ehci_regs->command);
  800. reset_run = 1;
  801. }
  802. }
  803. while (n > 0) {
  804. for (chunk = 0; chunk < DBGP_MAX_PACKET && n > 0;
  805. str++, chunk++, n--) {
  806. if (!use_cr && *str == '\n') {
  807. use_cr = 1;
  808. buf[chunk] = '\r';
  809. str--;
  810. n++;
  811. continue;
  812. }
  813. if (use_cr)
  814. use_cr = 0;
  815. buf[chunk] = *str;
  816. }
  817. if (chunk > 0) {
  818. ret = dbgp_bulk_write(USB_DEBUG_DEVNUM,
  819. dbgp_endpoint_out, buf, chunk);
  820. }
  821. }
  822. if (unlikely(reset_run)) {
  823. cmd = readl(&ehci_regs->command);
  824. cmd &= ~CMD_RUN;
  825. writel(cmd, &ehci_regs->command);
  826. }
  827. }
  828. struct console early_dbgp_console = {
  829. .name = "earlydbg",
  830. .write = early_dbgp_write,
  831. .flags = CON_PRINTBUFFER,
  832. .index = -1,
  833. };
  834. #if IS_ENABLED(CONFIG_USB)
  835. int dbgp_reset_prep(struct usb_hcd *hcd)
  836. {
  837. int ret = xen_dbgp_reset_prep(hcd);
  838. u32 ctrl;
  839. if (ret)
  840. return ret;
  841. dbgp_not_safe = 1;
  842. if (!ehci_debug)
  843. return 0;
  844. if ((early_dbgp_console.index != -1 &&
  845. !(early_dbgp_console.flags & CON_BOOT)) ||
  846. dbgp_kgdb_mode)
  847. return 1;
  848. /* This means the console is not initialized, or should get
  849. * shutdown so as to allow for reuse of the usb device, which
  850. * means it is time to shutdown the usb debug port. */
  851. ctrl = readl(&ehci_debug->control);
  852. if (ctrl & DBGP_ENABLED) {
  853. ctrl &= ~(DBGP_CLAIM);
  854. writel(ctrl, &ehci_debug->control);
  855. }
  856. return 0;
  857. }
  858. EXPORT_SYMBOL_GPL(dbgp_reset_prep);
  859. int dbgp_external_startup(struct usb_hcd *hcd)
  860. {
  861. return xen_dbgp_external_startup(hcd) ?: _dbgp_external_startup();
  862. }
  863. EXPORT_SYMBOL_GPL(dbgp_external_startup);
  864. #endif /* USB */
  865. #ifdef CONFIG_KGDB
  866. static char kgdbdbgp_buf[DBGP_MAX_PACKET];
  867. static int kgdbdbgp_buf_sz;
  868. static int kgdbdbgp_buf_idx;
  869. static int kgdbdbgp_loop_cnt = DBGP_LOOPS;
  870. static int kgdbdbgp_read_char(void)
  871. {
  872. int ret;
  873. if (kgdbdbgp_buf_idx < kgdbdbgp_buf_sz) {
  874. char ch = kgdbdbgp_buf[kgdbdbgp_buf_idx++];
  875. return ch;
  876. }
  877. ret = dbgp_bulk_read(USB_DEBUG_DEVNUM, dbgp_endpoint_in,
  878. &kgdbdbgp_buf, DBGP_MAX_PACKET,
  879. kgdbdbgp_loop_cnt);
  880. if (ret <= 0)
  881. return NO_POLL_CHAR;
  882. kgdbdbgp_buf_sz = ret;
  883. kgdbdbgp_buf_idx = 1;
  884. return kgdbdbgp_buf[0];
  885. }
  886. static void kgdbdbgp_write_char(u8 chr)
  887. {
  888. early_dbgp_write(NULL, &chr, 1);
  889. }
  890. static struct kgdb_io kgdbdbgp_io_ops = {
  891. .name = "kgdbdbgp",
  892. .read_char = kgdbdbgp_read_char,
  893. .write_char = kgdbdbgp_write_char,
  894. };
  895. static int kgdbdbgp_wait_time;
  896. static int __init kgdbdbgp_parse_config(char *str)
  897. {
  898. char *ptr;
  899. if (!ehci_debug) {
  900. if (early_dbgp_init(str))
  901. return -1;
  902. }
  903. ptr = strchr(str, ',');
  904. if (ptr) {
  905. ptr++;
  906. kgdbdbgp_wait_time = simple_strtoul(ptr, &ptr, 10);
  907. }
  908. kgdb_register_io_module(&kgdbdbgp_io_ops);
  909. kgdbdbgp_io_ops.is_console = early_dbgp_console.index != -1;
  910. return 0;
  911. }
  912. early_param("kgdbdbgp", kgdbdbgp_parse_config);
  913. static int kgdbdbgp_reader_thread(void *ptr)
  914. {
  915. int ret;
  916. while (readl(&ehci_debug->control) & DBGP_ENABLED) {
  917. kgdbdbgp_loop_cnt = 1;
  918. ret = kgdbdbgp_read_char();
  919. kgdbdbgp_loop_cnt = DBGP_LOOPS;
  920. if (ret != NO_POLL_CHAR) {
  921. if (ret == 0x3 || ret == '$') {
  922. if (ret == '$')
  923. kgdbdbgp_buf_idx--;
  924. kgdb_breakpoint();
  925. }
  926. continue;
  927. }
  928. schedule_timeout_interruptible(kgdbdbgp_wait_time * HZ);
  929. }
  930. return 0;
  931. }
  932. static int __init kgdbdbgp_start_thread(void)
  933. {
  934. if (dbgp_kgdb_mode && kgdbdbgp_wait_time)
  935. kthread_run(kgdbdbgp_reader_thread, NULL, "%s", "dbgp");
  936. return 0;
  937. }
  938. module_init(kgdbdbgp_start_thread);
  939. #endif /* CONFIG_KGDB */