sunsu.c 38 KB

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  1. /*
  2. * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
  3. *
  4. * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
  5. * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
  6. *
  7. * This is mainly a variation of 8250.c, credits go to authors mentioned
  8. * therein. In fact this driver should be merged into the generic 8250.c
  9. * infrastructure perhaps using a 8250_sparc.c module.
  10. *
  11. * Fixed to use tty_get_baud_rate().
  12. * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  13. *
  14. * Converted to new 2.5.x UART layer.
  15. * David S. Miller (davem@davemloft.net), 2002-Jul-29
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/errno.h>
  21. #include <linux/tty.h>
  22. #include <linux/tty_flip.h>
  23. #include <linux/major.h>
  24. #include <linux/string.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/ioport.h>
  27. #include <linux/circ_buf.h>
  28. #include <linux/serial.h>
  29. #include <linux/sysrq.h>
  30. #include <linux/console.h>
  31. #include <linux/slab.h>
  32. #ifdef CONFIG_SERIO
  33. #include <linux/serio.h>
  34. #endif
  35. #include <linux/serial_reg.h>
  36. #include <linux/init.h>
  37. #include <linux/delay.h>
  38. #include <linux/of_device.h>
  39. #include <asm/io.h>
  40. #include <asm/irq.h>
  41. #include <asm/prom.h>
  42. #include <asm/setup.h>
  43. #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  44. #define SUPPORT_SYSRQ
  45. #endif
  46. #include <linux/serial_core.h>
  47. #include <linux/sunserialcore.h>
  48. /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  49. * in a UART clock of 1.8462 MHz.
  50. */
  51. #define SU_BASE_BAUD (1846200 / 16)
  52. enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  53. static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  54. struct serial_uart_config {
  55. char *name;
  56. int dfl_xmit_fifo_size;
  57. int flags;
  58. };
  59. /*
  60. * Here we define the default xmit fifo size used for each type of UART.
  61. */
  62. static const struct serial_uart_config uart_config[] = {
  63. { "unknown", 1, 0 },
  64. { "8250", 1, 0 },
  65. { "16450", 1, 0 },
  66. { "16550", 1, 0 },
  67. { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
  68. { "Cirrus", 1, 0 },
  69. { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
  70. { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  71. { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
  72. { "Startech", 1, 0 },
  73. { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
  74. { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  75. { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  76. { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
  77. };
  78. struct uart_sunsu_port {
  79. struct uart_port port;
  80. unsigned char acr;
  81. unsigned char ier;
  82. unsigned short rev;
  83. unsigned char lcr;
  84. unsigned int lsr_break_flag;
  85. unsigned int cflag;
  86. /* Probing information. */
  87. enum su_type su_type;
  88. unsigned int type_probed; /* XXX Stupid */
  89. unsigned long reg_size;
  90. #ifdef CONFIG_SERIO
  91. struct serio serio;
  92. int serio_open;
  93. #endif
  94. };
  95. static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
  96. {
  97. offset <<= up->port.regshift;
  98. switch (up->port.iotype) {
  99. case UPIO_HUB6:
  100. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  101. return inb(up->port.iobase + 1);
  102. case UPIO_MEM:
  103. return readb(up->port.membase + offset);
  104. default:
  105. return inb(up->port.iobase + offset);
  106. }
  107. }
  108. static void serial_out(struct uart_sunsu_port *up, int offset, int value)
  109. {
  110. #ifndef CONFIG_SPARC64
  111. /*
  112. * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
  113. * connected with a gate then go to SlavIO. When IRQ4 goes tristated
  114. * gate outputs a logical one. Since we use level triggered interrupts
  115. * we have lockup and watchdog reset. We cannot mask IRQ because
  116. * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
  117. * This problem is similar to what Alpha people suffer, see serial.c.
  118. */
  119. if (offset == UART_MCR)
  120. value |= UART_MCR_OUT2;
  121. #endif
  122. offset <<= up->port.regshift;
  123. switch (up->port.iotype) {
  124. case UPIO_HUB6:
  125. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  126. outb(value, up->port.iobase + 1);
  127. break;
  128. case UPIO_MEM:
  129. writeb(value, up->port.membase + offset);
  130. break;
  131. default:
  132. outb(value, up->port.iobase + offset);
  133. }
  134. }
  135. /*
  136. * We used to support using pause I/O for certain machines. We
  137. * haven't supported this for a while, but just in case it's badly
  138. * needed for certain old 386 machines, I've left these #define's
  139. * in....
  140. */
  141. #define serial_inp(up, offset) serial_in(up, offset)
  142. #define serial_outp(up, offset, value) serial_out(up, offset, value)
  143. /*
  144. * For the 16C950
  145. */
  146. static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
  147. {
  148. serial_out(up, UART_SCR, offset);
  149. serial_out(up, UART_ICR, value);
  150. }
  151. #if 0 /* Unused currently */
  152. static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
  153. {
  154. unsigned int value;
  155. serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
  156. serial_out(up, UART_SCR, offset);
  157. value = serial_in(up, UART_ICR);
  158. serial_icr_write(up, UART_ACR, up->acr);
  159. return value;
  160. }
  161. #endif
  162. #ifdef CONFIG_SERIAL_8250_RSA
  163. /*
  164. * Attempts to turn on the RSA FIFO. Returns zero on failure.
  165. * We set the port uart clock rate if we succeed.
  166. */
  167. static int __enable_rsa(struct uart_sunsu_port *up)
  168. {
  169. unsigned char mode;
  170. int result;
  171. mode = serial_inp(up, UART_RSA_MSR);
  172. result = mode & UART_RSA_MSR_FIFO;
  173. if (!result) {
  174. serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
  175. mode = serial_inp(up, UART_RSA_MSR);
  176. result = mode & UART_RSA_MSR_FIFO;
  177. }
  178. if (result)
  179. up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
  180. return result;
  181. }
  182. static void enable_rsa(struct uart_sunsu_port *up)
  183. {
  184. if (up->port.type == PORT_RSA) {
  185. if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
  186. spin_lock_irq(&up->port.lock);
  187. __enable_rsa(up);
  188. spin_unlock_irq(&up->port.lock);
  189. }
  190. if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
  191. serial_outp(up, UART_RSA_FRR, 0);
  192. }
  193. }
  194. /*
  195. * Attempts to turn off the RSA FIFO. Returns zero on failure.
  196. * It is unknown why interrupts were disabled in here. However,
  197. * the caller is expected to preserve this behaviour by grabbing
  198. * the spinlock before calling this function.
  199. */
  200. static void disable_rsa(struct uart_sunsu_port *up)
  201. {
  202. unsigned char mode;
  203. int result;
  204. if (up->port.type == PORT_RSA &&
  205. up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
  206. spin_lock_irq(&up->port.lock);
  207. mode = serial_inp(up, UART_RSA_MSR);
  208. result = !(mode & UART_RSA_MSR_FIFO);
  209. if (!result) {
  210. serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
  211. mode = serial_inp(up, UART_RSA_MSR);
  212. result = !(mode & UART_RSA_MSR_FIFO);
  213. }
  214. if (result)
  215. up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
  216. spin_unlock_irq(&up->port.lock);
  217. }
  218. }
  219. #endif /* CONFIG_SERIAL_8250_RSA */
  220. static inline void __stop_tx(struct uart_sunsu_port *p)
  221. {
  222. if (p->ier & UART_IER_THRI) {
  223. p->ier &= ~UART_IER_THRI;
  224. serial_out(p, UART_IER, p->ier);
  225. }
  226. }
  227. static void sunsu_stop_tx(struct uart_port *port)
  228. {
  229. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  230. __stop_tx(up);
  231. /*
  232. * We really want to stop the transmitter from sending.
  233. */
  234. if (up->port.type == PORT_16C950) {
  235. up->acr |= UART_ACR_TXDIS;
  236. serial_icr_write(up, UART_ACR, up->acr);
  237. }
  238. }
  239. static void sunsu_start_tx(struct uart_port *port)
  240. {
  241. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  242. if (!(up->ier & UART_IER_THRI)) {
  243. up->ier |= UART_IER_THRI;
  244. serial_out(up, UART_IER, up->ier);
  245. }
  246. /*
  247. * Re-enable the transmitter if we disabled it.
  248. */
  249. if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
  250. up->acr &= ~UART_ACR_TXDIS;
  251. serial_icr_write(up, UART_ACR, up->acr);
  252. }
  253. }
  254. static void sunsu_stop_rx(struct uart_port *port)
  255. {
  256. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  257. up->ier &= ~UART_IER_RLSI;
  258. up->port.read_status_mask &= ~UART_LSR_DR;
  259. serial_out(up, UART_IER, up->ier);
  260. }
  261. static void sunsu_enable_ms(struct uart_port *port)
  262. {
  263. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  264. unsigned long flags;
  265. spin_lock_irqsave(&up->port.lock, flags);
  266. up->ier |= UART_IER_MSI;
  267. serial_out(up, UART_IER, up->ier);
  268. spin_unlock_irqrestore(&up->port.lock, flags);
  269. }
  270. static void
  271. receive_chars(struct uart_sunsu_port *up, unsigned char *status)
  272. {
  273. struct tty_port *port = &up->port.state->port;
  274. unsigned char ch, flag;
  275. int max_count = 256;
  276. int saw_console_brk = 0;
  277. do {
  278. ch = serial_inp(up, UART_RX);
  279. flag = TTY_NORMAL;
  280. up->port.icount.rx++;
  281. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  282. UART_LSR_FE | UART_LSR_OE))) {
  283. /*
  284. * For statistics only
  285. */
  286. if (*status & UART_LSR_BI) {
  287. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  288. up->port.icount.brk++;
  289. if (up->port.cons != NULL &&
  290. up->port.line == up->port.cons->index)
  291. saw_console_brk = 1;
  292. /*
  293. * We do the SysRQ and SAK checking
  294. * here because otherwise the break
  295. * may get masked by ignore_status_mask
  296. * or read_status_mask.
  297. */
  298. if (uart_handle_break(&up->port))
  299. goto ignore_char;
  300. } else if (*status & UART_LSR_PE)
  301. up->port.icount.parity++;
  302. else if (*status & UART_LSR_FE)
  303. up->port.icount.frame++;
  304. if (*status & UART_LSR_OE)
  305. up->port.icount.overrun++;
  306. /*
  307. * Mask off conditions which should be ingored.
  308. */
  309. *status &= up->port.read_status_mask;
  310. if (up->port.cons != NULL &&
  311. up->port.line == up->port.cons->index) {
  312. /* Recover the break flag from console xmit */
  313. *status |= up->lsr_break_flag;
  314. up->lsr_break_flag = 0;
  315. }
  316. if (*status & UART_LSR_BI) {
  317. flag = TTY_BREAK;
  318. } else if (*status & UART_LSR_PE)
  319. flag = TTY_PARITY;
  320. else if (*status & UART_LSR_FE)
  321. flag = TTY_FRAME;
  322. }
  323. if (uart_handle_sysrq_char(&up->port, ch))
  324. goto ignore_char;
  325. if ((*status & up->port.ignore_status_mask) == 0)
  326. tty_insert_flip_char(port, ch, flag);
  327. if (*status & UART_LSR_OE)
  328. /*
  329. * Overrun is special, since it's reported
  330. * immediately, and doesn't affect the current
  331. * character.
  332. */
  333. tty_insert_flip_char(port, 0, TTY_OVERRUN);
  334. ignore_char:
  335. *status = serial_inp(up, UART_LSR);
  336. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  337. if (saw_console_brk)
  338. sun_do_break();
  339. }
  340. static void transmit_chars(struct uart_sunsu_port *up)
  341. {
  342. struct circ_buf *xmit = &up->port.state->xmit;
  343. int count;
  344. if (up->port.x_char) {
  345. serial_outp(up, UART_TX, up->port.x_char);
  346. up->port.icount.tx++;
  347. up->port.x_char = 0;
  348. return;
  349. }
  350. if (uart_tx_stopped(&up->port)) {
  351. sunsu_stop_tx(&up->port);
  352. return;
  353. }
  354. if (uart_circ_empty(xmit)) {
  355. __stop_tx(up);
  356. return;
  357. }
  358. count = up->port.fifosize;
  359. do {
  360. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  361. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  362. up->port.icount.tx++;
  363. if (uart_circ_empty(xmit))
  364. break;
  365. } while (--count > 0);
  366. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  367. uart_write_wakeup(&up->port);
  368. if (uart_circ_empty(xmit))
  369. __stop_tx(up);
  370. }
  371. static void check_modem_status(struct uart_sunsu_port *up)
  372. {
  373. int status;
  374. status = serial_in(up, UART_MSR);
  375. if ((status & UART_MSR_ANY_DELTA) == 0)
  376. return;
  377. if (status & UART_MSR_TERI)
  378. up->port.icount.rng++;
  379. if (status & UART_MSR_DDSR)
  380. up->port.icount.dsr++;
  381. if (status & UART_MSR_DDCD)
  382. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  383. if (status & UART_MSR_DCTS)
  384. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  385. wake_up_interruptible(&up->port.state->port.delta_msr_wait);
  386. }
  387. static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
  388. {
  389. struct uart_sunsu_port *up = dev_id;
  390. unsigned long flags;
  391. unsigned char status;
  392. spin_lock_irqsave(&up->port.lock, flags);
  393. do {
  394. status = serial_inp(up, UART_LSR);
  395. if (status & UART_LSR_DR)
  396. receive_chars(up, &status);
  397. check_modem_status(up);
  398. if (status & UART_LSR_THRE)
  399. transmit_chars(up);
  400. spin_unlock_irqrestore(&up->port.lock, flags);
  401. tty_flip_buffer_push(&up->port.state->port);
  402. spin_lock_irqsave(&up->port.lock, flags);
  403. } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
  404. spin_unlock_irqrestore(&up->port.lock, flags);
  405. return IRQ_HANDLED;
  406. }
  407. /* Separate interrupt handling path for keyboard/mouse ports. */
  408. static void
  409. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  410. unsigned int iflag, unsigned int quot);
  411. static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
  412. {
  413. unsigned int cur_cflag = up->cflag;
  414. int quot, new_baud;
  415. up->cflag &= ~CBAUD;
  416. up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
  417. quot = up->port.uartclk / (16 * new_baud);
  418. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  419. }
  420. static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
  421. {
  422. do {
  423. unsigned char ch = serial_inp(up, UART_RX);
  424. /* Stop-A is handled by drivers/char/keyboard.c now. */
  425. if (up->su_type == SU_PORT_KBD) {
  426. #ifdef CONFIG_SERIO
  427. serio_interrupt(&up->serio, ch, 0);
  428. #endif
  429. } else if (up->su_type == SU_PORT_MS) {
  430. int ret = suncore_mouse_baud_detection(ch, is_break);
  431. switch (ret) {
  432. case 2:
  433. sunsu_change_mouse_baud(up);
  434. /* fallthru */
  435. case 1:
  436. break;
  437. case 0:
  438. #ifdef CONFIG_SERIO
  439. serio_interrupt(&up->serio, ch, 0);
  440. #endif
  441. break;
  442. };
  443. }
  444. } while (serial_in(up, UART_LSR) & UART_LSR_DR);
  445. }
  446. static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
  447. {
  448. struct uart_sunsu_port *up = dev_id;
  449. if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
  450. unsigned char status = serial_inp(up, UART_LSR);
  451. if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
  452. receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
  453. }
  454. return IRQ_HANDLED;
  455. }
  456. static unsigned int sunsu_tx_empty(struct uart_port *port)
  457. {
  458. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  459. unsigned long flags;
  460. unsigned int ret;
  461. spin_lock_irqsave(&up->port.lock, flags);
  462. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  463. spin_unlock_irqrestore(&up->port.lock, flags);
  464. return ret;
  465. }
  466. static unsigned int sunsu_get_mctrl(struct uart_port *port)
  467. {
  468. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  469. unsigned char status;
  470. unsigned int ret;
  471. status = serial_in(up, UART_MSR);
  472. ret = 0;
  473. if (status & UART_MSR_DCD)
  474. ret |= TIOCM_CAR;
  475. if (status & UART_MSR_RI)
  476. ret |= TIOCM_RNG;
  477. if (status & UART_MSR_DSR)
  478. ret |= TIOCM_DSR;
  479. if (status & UART_MSR_CTS)
  480. ret |= TIOCM_CTS;
  481. return ret;
  482. }
  483. static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
  484. {
  485. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  486. unsigned char mcr = 0;
  487. if (mctrl & TIOCM_RTS)
  488. mcr |= UART_MCR_RTS;
  489. if (mctrl & TIOCM_DTR)
  490. mcr |= UART_MCR_DTR;
  491. if (mctrl & TIOCM_OUT1)
  492. mcr |= UART_MCR_OUT1;
  493. if (mctrl & TIOCM_OUT2)
  494. mcr |= UART_MCR_OUT2;
  495. if (mctrl & TIOCM_LOOP)
  496. mcr |= UART_MCR_LOOP;
  497. serial_out(up, UART_MCR, mcr);
  498. }
  499. static void sunsu_break_ctl(struct uart_port *port, int break_state)
  500. {
  501. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  502. unsigned long flags;
  503. spin_lock_irqsave(&up->port.lock, flags);
  504. if (break_state == -1)
  505. up->lcr |= UART_LCR_SBC;
  506. else
  507. up->lcr &= ~UART_LCR_SBC;
  508. serial_out(up, UART_LCR, up->lcr);
  509. spin_unlock_irqrestore(&up->port.lock, flags);
  510. }
  511. static int sunsu_startup(struct uart_port *port)
  512. {
  513. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  514. unsigned long flags;
  515. int retval;
  516. if (up->port.type == PORT_16C950) {
  517. /* Wake up and initialize UART */
  518. up->acr = 0;
  519. serial_outp(up, UART_LCR, 0xBF);
  520. serial_outp(up, UART_EFR, UART_EFR_ECB);
  521. serial_outp(up, UART_IER, 0);
  522. serial_outp(up, UART_LCR, 0);
  523. serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
  524. serial_outp(up, UART_LCR, 0xBF);
  525. serial_outp(up, UART_EFR, UART_EFR_ECB);
  526. serial_outp(up, UART_LCR, 0);
  527. }
  528. #ifdef CONFIG_SERIAL_8250_RSA
  529. /*
  530. * If this is an RSA port, see if we can kick it up to the
  531. * higher speed clock.
  532. */
  533. enable_rsa(up);
  534. #endif
  535. /*
  536. * Clear the FIFO buffers and disable them.
  537. * (they will be reenabled in set_termios())
  538. */
  539. if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
  540. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  541. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  542. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  543. serial_outp(up, UART_FCR, 0);
  544. }
  545. /*
  546. * Clear the interrupt registers.
  547. */
  548. (void) serial_inp(up, UART_LSR);
  549. (void) serial_inp(up, UART_RX);
  550. (void) serial_inp(up, UART_IIR);
  551. (void) serial_inp(up, UART_MSR);
  552. /*
  553. * At this point, there's no way the LSR could still be 0xff;
  554. * if it is, then bail out, because there's likely no UART
  555. * here.
  556. */
  557. if (!(up->port.flags & UPF_BUGGY_UART) &&
  558. (serial_inp(up, UART_LSR) == 0xff)) {
  559. printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
  560. return -ENODEV;
  561. }
  562. if (up->su_type != SU_PORT_PORT) {
  563. retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
  564. IRQF_SHARED, su_typev[up->su_type], up);
  565. } else {
  566. retval = request_irq(up->port.irq, sunsu_serial_interrupt,
  567. IRQF_SHARED, su_typev[up->su_type], up);
  568. }
  569. if (retval) {
  570. printk("su: Cannot register IRQ %d\n", up->port.irq);
  571. return retval;
  572. }
  573. /*
  574. * Now, initialize the UART
  575. */
  576. serial_outp(up, UART_LCR, UART_LCR_WLEN8);
  577. spin_lock_irqsave(&up->port.lock, flags);
  578. up->port.mctrl |= TIOCM_OUT2;
  579. sunsu_set_mctrl(&up->port, up->port.mctrl);
  580. spin_unlock_irqrestore(&up->port.lock, flags);
  581. /*
  582. * Finally, enable interrupts. Note: Modem status interrupts
  583. * are set via set_termios(), which will be occurring imminently
  584. * anyway, so we don't enable them here.
  585. */
  586. up->ier = UART_IER_RLSI | UART_IER_RDI;
  587. serial_outp(up, UART_IER, up->ier);
  588. if (up->port.flags & UPF_FOURPORT) {
  589. unsigned int icp;
  590. /*
  591. * Enable interrupts on the AST Fourport board
  592. */
  593. icp = (up->port.iobase & 0xfe0) | 0x01f;
  594. outb_p(0x80, icp);
  595. (void) inb_p(icp);
  596. }
  597. /*
  598. * And clear the interrupt registers again for luck.
  599. */
  600. (void) serial_inp(up, UART_LSR);
  601. (void) serial_inp(up, UART_RX);
  602. (void) serial_inp(up, UART_IIR);
  603. (void) serial_inp(up, UART_MSR);
  604. return 0;
  605. }
  606. static void sunsu_shutdown(struct uart_port *port)
  607. {
  608. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  609. unsigned long flags;
  610. /*
  611. * Disable interrupts from this port
  612. */
  613. up->ier = 0;
  614. serial_outp(up, UART_IER, 0);
  615. spin_lock_irqsave(&up->port.lock, flags);
  616. if (up->port.flags & UPF_FOURPORT) {
  617. /* reset interrupts on the AST Fourport board */
  618. inb((up->port.iobase & 0xfe0) | 0x1f);
  619. up->port.mctrl |= TIOCM_OUT1;
  620. } else
  621. up->port.mctrl &= ~TIOCM_OUT2;
  622. sunsu_set_mctrl(&up->port, up->port.mctrl);
  623. spin_unlock_irqrestore(&up->port.lock, flags);
  624. /*
  625. * Disable break condition and FIFOs
  626. */
  627. serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
  628. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  629. UART_FCR_CLEAR_RCVR |
  630. UART_FCR_CLEAR_XMIT);
  631. serial_outp(up, UART_FCR, 0);
  632. #ifdef CONFIG_SERIAL_8250_RSA
  633. /*
  634. * Reset the RSA board back to 115kbps compat mode.
  635. */
  636. disable_rsa(up);
  637. #endif
  638. /*
  639. * Read data port to reset things.
  640. */
  641. (void) serial_in(up, UART_RX);
  642. free_irq(up->port.irq, up);
  643. }
  644. static void
  645. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  646. unsigned int iflag, unsigned int quot)
  647. {
  648. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  649. unsigned char cval, fcr = 0;
  650. unsigned long flags;
  651. switch (cflag & CSIZE) {
  652. case CS5:
  653. cval = 0x00;
  654. break;
  655. case CS6:
  656. cval = 0x01;
  657. break;
  658. case CS7:
  659. cval = 0x02;
  660. break;
  661. default:
  662. case CS8:
  663. cval = 0x03;
  664. break;
  665. }
  666. if (cflag & CSTOPB)
  667. cval |= 0x04;
  668. if (cflag & PARENB)
  669. cval |= UART_LCR_PARITY;
  670. if (!(cflag & PARODD))
  671. cval |= UART_LCR_EPAR;
  672. #ifdef CMSPAR
  673. if (cflag & CMSPAR)
  674. cval |= UART_LCR_SPAR;
  675. #endif
  676. /*
  677. * Work around a bug in the Oxford Semiconductor 952 rev B
  678. * chip which causes it to seriously miscalculate baud rates
  679. * when DLL is 0.
  680. */
  681. if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
  682. up->rev == 0x5201)
  683. quot ++;
  684. if (uart_config[up->port.type].flags & UART_USE_FIFO) {
  685. if ((up->port.uartclk / quot) < (2400 * 16))
  686. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
  687. #ifdef CONFIG_SERIAL_8250_RSA
  688. else if (up->port.type == PORT_RSA)
  689. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
  690. #endif
  691. else
  692. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
  693. }
  694. if (up->port.type == PORT_16750)
  695. fcr |= UART_FCR7_64BYTE;
  696. /*
  697. * Ok, we're now changing the port state. Do it with
  698. * interrupts disabled.
  699. */
  700. spin_lock_irqsave(&up->port.lock, flags);
  701. /*
  702. * Update the per-port timeout.
  703. */
  704. uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
  705. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  706. if (iflag & INPCK)
  707. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  708. if (iflag & (BRKINT | PARMRK))
  709. up->port.read_status_mask |= UART_LSR_BI;
  710. /*
  711. * Characteres to ignore
  712. */
  713. up->port.ignore_status_mask = 0;
  714. if (iflag & IGNPAR)
  715. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  716. if (iflag & IGNBRK) {
  717. up->port.ignore_status_mask |= UART_LSR_BI;
  718. /*
  719. * If we're ignoring parity and break indicators,
  720. * ignore overruns too (for real raw support).
  721. */
  722. if (iflag & IGNPAR)
  723. up->port.ignore_status_mask |= UART_LSR_OE;
  724. }
  725. /*
  726. * ignore all characters if CREAD is not set
  727. */
  728. if ((cflag & CREAD) == 0)
  729. up->port.ignore_status_mask |= UART_LSR_DR;
  730. /*
  731. * CTS flow control flag and modem status interrupts
  732. */
  733. up->ier &= ~UART_IER_MSI;
  734. if (UART_ENABLE_MS(&up->port, cflag))
  735. up->ier |= UART_IER_MSI;
  736. serial_out(up, UART_IER, up->ier);
  737. if (uart_config[up->port.type].flags & UART_STARTECH) {
  738. serial_outp(up, UART_LCR, 0xBF);
  739. serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
  740. }
  741. serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  742. serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
  743. serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
  744. if (up->port.type == PORT_16750)
  745. serial_outp(up, UART_FCR, fcr); /* set fcr */
  746. serial_outp(up, UART_LCR, cval); /* reset DLAB */
  747. up->lcr = cval; /* Save LCR */
  748. if (up->port.type != PORT_16750) {
  749. if (fcr & UART_FCR_ENABLE_FIFO) {
  750. /* emulated UARTs (Lucent Venus 167x) need two steps */
  751. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  752. }
  753. serial_outp(up, UART_FCR, fcr); /* set fcr */
  754. }
  755. up->cflag = cflag;
  756. spin_unlock_irqrestore(&up->port.lock, flags);
  757. }
  758. static void
  759. sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
  760. struct ktermios *old)
  761. {
  762. unsigned int baud, quot;
  763. /*
  764. * Ask the core to calculate the divisor for us.
  765. */
  766. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  767. quot = uart_get_divisor(port, baud);
  768. sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
  769. }
  770. static void sunsu_release_port(struct uart_port *port)
  771. {
  772. }
  773. static int sunsu_request_port(struct uart_port *port)
  774. {
  775. return 0;
  776. }
  777. static void sunsu_config_port(struct uart_port *port, int flags)
  778. {
  779. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  780. if (flags & UART_CONFIG_TYPE) {
  781. /*
  782. * We are supposed to call autoconfig here, but this requires
  783. * splitting all the OBP probing crap from the UART probing.
  784. * We'll do it when we kill sunsu.c altogether.
  785. */
  786. port->type = up->type_probed; /* XXX */
  787. }
  788. }
  789. static int
  790. sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
  791. {
  792. return -EINVAL;
  793. }
  794. static const char *
  795. sunsu_type(struct uart_port *port)
  796. {
  797. int type = port->type;
  798. if (type >= ARRAY_SIZE(uart_config))
  799. type = 0;
  800. return uart_config[type].name;
  801. }
  802. static struct uart_ops sunsu_pops = {
  803. .tx_empty = sunsu_tx_empty,
  804. .set_mctrl = sunsu_set_mctrl,
  805. .get_mctrl = sunsu_get_mctrl,
  806. .stop_tx = sunsu_stop_tx,
  807. .start_tx = sunsu_start_tx,
  808. .stop_rx = sunsu_stop_rx,
  809. .enable_ms = sunsu_enable_ms,
  810. .break_ctl = sunsu_break_ctl,
  811. .startup = sunsu_startup,
  812. .shutdown = sunsu_shutdown,
  813. .set_termios = sunsu_set_termios,
  814. .type = sunsu_type,
  815. .release_port = sunsu_release_port,
  816. .request_port = sunsu_request_port,
  817. .config_port = sunsu_config_port,
  818. .verify_port = sunsu_verify_port,
  819. };
  820. #define UART_NR 4
  821. static struct uart_sunsu_port sunsu_ports[UART_NR];
  822. static int nr_inst; /* Number of already registered ports */
  823. #ifdef CONFIG_SERIO
  824. static DEFINE_SPINLOCK(sunsu_serio_lock);
  825. static int sunsu_serio_write(struct serio *serio, unsigned char ch)
  826. {
  827. struct uart_sunsu_port *up = serio->port_data;
  828. unsigned long flags;
  829. int lsr;
  830. spin_lock_irqsave(&sunsu_serio_lock, flags);
  831. do {
  832. lsr = serial_in(up, UART_LSR);
  833. } while (!(lsr & UART_LSR_THRE));
  834. /* Send the character out. */
  835. serial_out(up, UART_TX, ch);
  836. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  837. return 0;
  838. }
  839. static int sunsu_serio_open(struct serio *serio)
  840. {
  841. struct uart_sunsu_port *up = serio->port_data;
  842. unsigned long flags;
  843. int ret;
  844. spin_lock_irqsave(&sunsu_serio_lock, flags);
  845. if (!up->serio_open) {
  846. up->serio_open = 1;
  847. ret = 0;
  848. } else
  849. ret = -EBUSY;
  850. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  851. return ret;
  852. }
  853. static void sunsu_serio_close(struct serio *serio)
  854. {
  855. struct uart_sunsu_port *up = serio->port_data;
  856. unsigned long flags;
  857. spin_lock_irqsave(&sunsu_serio_lock, flags);
  858. up->serio_open = 0;
  859. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  860. }
  861. #endif /* CONFIG_SERIO */
  862. static void sunsu_autoconfig(struct uart_sunsu_port *up)
  863. {
  864. unsigned char status1, status2, scratch, scratch2, scratch3;
  865. unsigned char save_lcr, save_mcr;
  866. unsigned long flags;
  867. if (up->su_type == SU_PORT_NONE)
  868. return;
  869. up->type_probed = PORT_UNKNOWN;
  870. up->port.iotype = UPIO_MEM;
  871. spin_lock_irqsave(&up->port.lock, flags);
  872. if (!(up->port.flags & UPF_BUGGY_UART)) {
  873. /*
  874. * Do a simple existence test first; if we fail this, there's
  875. * no point trying anything else.
  876. *
  877. * 0x80 is used as a nonsense port to prevent against false
  878. * positives due to ISA bus float. The assumption is that
  879. * 0x80 is a non-existent port; which should be safe since
  880. * include/asm/io.h also makes this assumption.
  881. */
  882. scratch = serial_inp(up, UART_IER);
  883. serial_outp(up, UART_IER, 0);
  884. #ifdef __i386__
  885. outb(0xff, 0x080);
  886. #endif
  887. scratch2 = serial_inp(up, UART_IER);
  888. serial_outp(up, UART_IER, 0x0f);
  889. #ifdef __i386__
  890. outb(0, 0x080);
  891. #endif
  892. scratch3 = serial_inp(up, UART_IER);
  893. serial_outp(up, UART_IER, scratch);
  894. if (scratch2 != 0 || scratch3 != 0x0F)
  895. goto out; /* We failed; there's nothing here */
  896. }
  897. save_mcr = serial_in(up, UART_MCR);
  898. save_lcr = serial_in(up, UART_LCR);
  899. /*
  900. * Check to see if a UART is really there. Certain broken
  901. * internal modems based on the Rockwell chipset fail this
  902. * test, because they apparently don't implement the loopback
  903. * test mode. So this test is skipped on the COM 1 through
  904. * COM 4 ports. This *should* be safe, since no board
  905. * manufacturer would be stupid enough to design a board
  906. * that conflicts with COM 1-4 --- we hope!
  907. */
  908. if (!(up->port.flags & UPF_SKIP_TEST)) {
  909. serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
  910. status1 = serial_inp(up, UART_MSR) & 0xF0;
  911. serial_outp(up, UART_MCR, save_mcr);
  912. if (status1 != 0x90)
  913. goto out; /* We failed loopback test */
  914. }
  915. serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
  916. serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
  917. serial_outp(up, UART_LCR, 0);
  918. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  919. scratch = serial_in(up, UART_IIR) >> 6;
  920. switch (scratch) {
  921. case 0:
  922. up->port.type = PORT_16450;
  923. break;
  924. case 1:
  925. up->port.type = PORT_UNKNOWN;
  926. break;
  927. case 2:
  928. up->port.type = PORT_16550;
  929. break;
  930. case 3:
  931. up->port.type = PORT_16550A;
  932. break;
  933. }
  934. if (up->port.type == PORT_16550A) {
  935. /* Check for Startech UART's */
  936. serial_outp(up, UART_LCR, UART_LCR_DLAB);
  937. if (serial_in(up, UART_EFR) == 0) {
  938. up->port.type = PORT_16650;
  939. } else {
  940. serial_outp(up, UART_LCR, 0xBF);
  941. if (serial_in(up, UART_EFR) == 0)
  942. up->port.type = PORT_16650V2;
  943. }
  944. }
  945. if (up->port.type == PORT_16550A) {
  946. /* Check for TI 16750 */
  947. serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
  948. serial_outp(up, UART_FCR,
  949. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  950. scratch = serial_in(up, UART_IIR) >> 5;
  951. if (scratch == 7) {
  952. /*
  953. * If this is a 16750, and not a cheap UART
  954. * clone, then it should only go into 64 byte
  955. * mode if the UART_FCR7_64BYTE bit was set
  956. * while UART_LCR_DLAB was latched.
  957. */
  958. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  959. serial_outp(up, UART_LCR, 0);
  960. serial_outp(up, UART_FCR,
  961. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  962. scratch = serial_in(up, UART_IIR) >> 5;
  963. if (scratch == 6)
  964. up->port.type = PORT_16750;
  965. }
  966. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  967. }
  968. serial_outp(up, UART_LCR, save_lcr);
  969. if (up->port.type == PORT_16450) {
  970. scratch = serial_in(up, UART_SCR);
  971. serial_outp(up, UART_SCR, 0xa5);
  972. status1 = serial_in(up, UART_SCR);
  973. serial_outp(up, UART_SCR, 0x5a);
  974. status2 = serial_in(up, UART_SCR);
  975. serial_outp(up, UART_SCR, scratch);
  976. if ((status1 != 0xa5) || (status2 != 0x5a))
  977. up->port.type = PORT_8250;
  978. }
  979. up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
  980. if (up->port.type == PORT_UNKNOWN)
  981. goto out;
  982. up->type_probed = up->port.type; /* XXX */
  983. /*
  984. * Reset the UART.
  985. */
  986. #ifdef CONFIG_SERIAL_8250_RSA
  987. if (up->port.type == PORT_RSA)
  988. serial_outp(up, UART_RSA_FRR, 0);
  989. #endif
  990. serial_outp(up, UART_MCR, save_mcr);
  991. serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
  992. UART_FCR_CLEAR_RCVR |
  993. UART_FCR_CLEAR_XMIT));
  994. serial_outp(up, UART_FCR, 0);
  995. (void)serial_in(up, UART_RX);
  996. serial_outp(up, UART_IER, 0);
  997. out:
  998. spin_unlock_irqrestore(&up->port.lock, flags);
  999. }
  1000. static struct uart_driver sunsu_reg = {
  1001. .owner = THIS_MODULE,
  1002. .driver_name = "sunsu",
  1003. .dev_name = "ttyS",
  1004. .major = TTY_MAJOR,
  1005. };
  1006. static int sunsu_kbd_ms_init(struct uart_sunsu_port *up)
  1007. {
  1008. int quot, baud;
  1009. #ifdef CONFIG_SERIO
  1010. struct serio *serio;
  1011. #endif
  1012. if (up->su_type == SU_PORT_KBD) {
  1013. up->cflag = B1200 | CS8 | CLOCAL | CREAD;
  1014. baud = 1200;
  1015. } else {
  1016. up->cflag = B4800 | CS8 | CLOCAL | CREAD;
  1017. baud = 4800;
  1018. }
  1019. quot = up->port.uartclk / (16 * baud);
  1020. sunsu_autoconfig(up);
  1021. if (up->port.type == PORT_UNKNOWN)
  1022. return -ENODEV;
  1023. printk("%s: %s port at %llx, irq %u\n",
  1024. up->port.dev->of_node->full_name,
  1025. (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
  1026. (unsigned long long) up->port.mapbase,
  1027. up->port.irq);
  1028. #ifdef CONFIG_SERIO
  1029. serio = &up->serio;
  1030. serio->port_data = up;
  1031. serio->id.type = SERIO_RS232;
  1032. if (up->su_type == SU_PORT_KBD) {
  1033. serio->id.proto = SERIO_SUNKBD;
  1034. strlcpy(serio->name, "sukbd", sizeof(serio->name));
  1035. } else {
  1036. serio->id.proto = SERIO_SUN;
  1037. serio->id.extra = 1;
  1038. strlcpy(serio->name, "sums", sizeof(serio->name));
  1039. }
  1040. strlcpy(serio->phys,
  1041. (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
  1042. sizeof(serio->phys));
  1043. serio->write = sunsu_serio_write;
  1044. serio->open = sunsu_serio_open;
  1045. serio->close = sunsu_serio_close;
  1046. serio->dev.parent = up->port.dev;
  1047. serio_register_port(serio);
  1048. #endif
  1049. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  1050. sunsu_startup(&up->port);
  1051. return 0;
  1052. }
  1053. /*
  1054. * ------------------------------------------------------------
  1055. * Serial console driver
  1056. * ------------------------------------------------------------
  1057. */
  1058. #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
  1059. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  1060. /*
  1061. * Wait for transmitter & holding register to empty
  1062. */
  1063. static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
  1064. {
  1065. unsigned int status, tmout = 10000;
  1066. /* Wait up to 10ms for the character(s) to be sent. */
  1067. do {
  1068. status = serial_in(up, UART_LSR);
  1069. if (status & UART_LSR_BI)
  1070. up->lsr_break_flag = UART_LSR_BI;
  1071. if (--tmout == 0)
  1072. break;
  1073. udelay(1);
  1074. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  1075. /* Wait up to 1s for flow control if necessary */
  1076. if (up->port.flags & UPF_CONS_FLOW) {
  1077. tmout = 1000000;
  1078. while (--tmout &&
  1079. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  1080. udelay(1);
  1081. }
  1082. }
  1083. static void sunsu_console_putchar(struct uart_port *port, int ch)
  1084. {
  1085. struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
  1086. wait_for_xmitr(up);
  1087. serial_out(up, UART_TX, ch);
  1088. }
  1089. /*
  1090. * Print a string to the serial port trying not to disturb
  1091. * any possible real use of the port...
  1092. */
  1093. static void sunsu_console_write(struct console *co, const char *s,
  1094. unsigned int count)
  1095. {
  1096. struct uart_sunsu_port *up = &sunsu_ports[co->index];
  1097. unsigned long flags;
  1098. unsigned int ier;
  1099. int locked = 1;
  1100. local_irq_save(flags);
  1101. if (up->port.sysrq) {
  1102. locked = 0;
  1103. } else if (oops_in_progress) {
  1104. locked = spin_trylock(&up->port.lock);
  1105. } else
  1106. spin_lock(&up->port.lock);
  1107. /*
  1108. * First save the UER then disable the interrupts
  1109. */
  1110. ier = serial_in(up, UART_IER);
  1111. serial_out(up, UART_IER, 0);
  1112. uart_console_write(&up->port, s, count, sunsu_console_putchar);
  1113. /*
  1114. * Finally, wait for transmitter to become empty
  1115. * and restore the IER
  1116. */
  1117. wait_for_xmitr(up);
  1118. serial_out(up, UART_IER, ier);
  1119. if (locked)
  1120. spin_unlock(&up->port.lock);
  1121. local_irq_restore(flags);
  1122. }
  1123. /*
  1124. * Setup initial baud/bits/parity. We do two things here:
  1125. * - construct a cflag setting for the first su_open()
  1126. * - initialize the serial port
  1127. * Return non-zero if we didn't find a serial port.
  1128. */
  1129. static int __init sunsu_console_setup(struct console *co, char *options)
  1130. {
  1131. static struct ktermios dummy;
  1132. struct ktermios termios;
  1133. struct uart_port *port;
  1134. printk("Console: ttyS%d (SU)\n",
  1135. (sunsu_reg.minor - 64) + co->index);
  1136. if (co->index > nr_inst)
  1137. return -ENODEV;
  1138. port = &sunsu_ports[co->index].port;
  1139. /*
  1140. * Temporary fix.
  1141. */
  1142. spin_lock_init(&port->lock);
  1143. /* Get firmware console settings. */
  1144. sunserial_console_termios(co, port->dev->of_node);
  1145. memset(&termios, 0, sizeof(struct ktermios));
  1146. termios.c_cflag = co->cflag;
  1147. port->mctrl |= TIOCM_DTR;
  1148. port->ops->set_termios(port, &termios, &dummy);
  1149. return 0;
  1150. }
  1151. static struct console sunsu_console = {
  1152. .name = "ttyS",
  1153. .write = sunsu_console_write,
  1154. .device = uart_console_device,
  1155. .setup = sunsu_console_setup,
  1156. .flags = CON_PRINTBUFFER,
  1157. .index = -1,
  1158. .data = &sunsu_reg,
  1159. };
  1160. /*
  1161. * Register console.
  1162. */
  1163. static inline struct console *SUNSU_CONSOLE(void)
  1164. {
  1165. return &sunsu_console;
  1166. }
  1167. #else
  1168. #define SUNSU_CONSOLE() (NULL)
  1169. #define sunsu_serial_console_init() do { } while (0)
  1170. #endif
  1171. static enum su_type su_get_type(struct device_node *dp)
  1172. {
  1173. struct device_node *ap = of_find_node_by_path("/aliases");
  1174. if (ap) {
  1175. const char *keyb = of_get_property(ap, "keyboard", NULL);
  1176. const char *ms = of_get_property(ap, "mouse", NULL);
  1177. if (keyb) {
  1178. if (dp == of_find_node_by_path(keyb))
  1179. return SU_PORT_KBD;
  1180. }
  1181. if (ms) {
  1182. if (dp == of_find_node_by_path(ms))
  1183. return SU_PORT_MS;
  1184. }
  1185. }
  1186. return SU_PORT_PORT;
  1187. }
  1188. static int su_probe(struct platform_device *op)
  1189. {
  1190. struct device_node *dp = op->dev.of_node;
  1191. struct uart_sunsu_port *up;
  1192. struct resource *rp;
  1193. enum su_type type;
  1194. bool ignore_line;
  1195. int err;
  1196. type = su_get_type(dp);
  1197. if (type == SU_PORT_PORT) {
  1198. if (nr_inst >= UART_NR)
  1199. return -EINVAL;
  1200. up = &sunsu_ports[nr_inst];
  1201. } else {
  1202. up = kzalloc(sizeof(*up), GFP_KERNEL);
  1203. if (!up)
  1204. return -ENOMEM;
  1205. }
  1206. up->port.line = nr_inst;
  1207. spin_lock_init(&up->port.lock);
  1208. up->su_type = type;
  1209. rp = &op->resource[0];
  1210. up->port.mapbase = rp->start;
  1211. up->reg_size = resource_size(rp);
  1212. up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
  1213. if (!up->port.membase) {
  1214. if (type != SU_PORT_PORT)
  1215. kfree(up);
  1216. return -ENOMEM;
  1217. }
  1218. up->port.irq = op->archdata.irqs[0];
  1219. up->port.dev = &op->dev;
  1220. up->port.type = PORT_UNKNOWN;
  1221. up->port.uartclk = (SU_BASE_BAUD * 16);
  1222. err = 0;
  1223. if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
  1224. err = sunsu_kbd_ms_init(up);
  1225. if (err) {
  1226. of_iounmap(&op->resource[0],
  1227. up->port.membase, up->reg_size);
  1228. kfree(up);
  1229. return err;
  1230. }
  1231. dev_set_drvdata(&op->dev, up);
  1232. nr_inst++;
  1233. return 0;
  1234. }
  1235. up->port.flags |= UPF_BOOT_AUTOCONF;
  1236. sunsu_autoconfig(up);
  1237. err = -ENODEV;
  1238. if (up->port.type == PORT_UNKNOWN)
  1239. goto out_unmap;
  1240. up->port.ops = &sunsu_pops;
  1241. ignore_line = false;
  1242. if (!strcmp(dp->name, "rsc-console") ||
  1243. !strcmp(dp->name, "lom-console"))
  1244. ignore_line = true;
  1245. sunserial_console_match(SUNSU_CONSOLE(), dp,
  1246. &sunsu_reg, up->port.line,
  1247. ignore_line);
  1248. err = uart_add_one_port(&sunsu_reg, &up->port);
  1249. if (err)
  1250. goto out_unmap;
  1251. dev_set_drvdata(&op->dev, up);
  1252. nr_inst++;
  1253. return 0;
  1254. out_unmap:
  1255. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1256. return err;
  1257. }
  1258. static int su_remove(struct platform_device *op)
  1259. {
  1260. struct uart_sunsu_port *up = dev_get_drvdata(&op->dev);
  1261. bool kbdms = false;
  1262. if (up->su_type == SU_PORT_MS ||
  1263. up->su_type == SU_PORT_KBD)
  1264. kbdms = true;
  1265. if (kbdms) {
  1266. #ifdef CONFIG_SERIO
  1267. serio_unregister_port(&up->serio);
  1268. #endif
  1269. } else if (up->port.type != PORT_UNKNOWN)
  1270. uart_remove_one_port(&sunsu_reg, &up->port);
  1271. if (up->port.membase)
  1272. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1273. if (kbdms)
  1274. kfree(up);
  1275. dev_set_drvdata(&op->dev, NULL);
  1276. return 0;
  1277. }
  1278. static const struct of_device_id su_match[] = {
  1279. {
  1280. .name = "su",
  1281. },
  1282. {
  1283. .name = "su_pnp",
  1284. },
  1285. {
  1286. .name = "serial",
  1287. .compatible = "su",
  1288. },
  1289. {
  1290. .type = "serial",
  1291. .compatible = "su",
  1292. },
  1293. {},
  1294. };
  1295. MODULE_DEVICE_TABLE(of, su_match);
  1296. static struct platform_driver su_driver = {
  1297. .driver = {
  1298. .name = "su",
  1299. .owner = THIS_MODULE,
  1300. .of_match_table = su_match,
  1301. },
  1302. .probe = su_probe,
  1303. .remove = su_remove,
  1304. };
  1305. static int __init sunsu_init(void)
  1306. {
  1307. struct device_node *dp;
  1308. int err;
  1309. int num_uart = 0;
  1310. for_each_node_by_name(dp, "su") {
  1311. if (su_get_type(dp) == SU_PORT_PORT)
  1312. num_uart++;
  1313. }
  1314. for_each_node_by_name(dp, "su_pnp") {
  1315. if (su_get_type(dp) == SU_PORT_PORT)
  1316. num_uart++;
  1317. }
  1318. for_each_node_by_name(dp, "serial") {
  1319. if (of_device_is_compatible(dp, "su")) {
  1320. if (su_get_type(dp) == SU_PORT_PORT)
  1321. num_uart++;
  1322. }
  1323. }
  1324. for_each_node_by_type(dp, "serial") {
  1325. if (of_device_is_compatible(dp, "su")) {
  1326. if (su_get_type(dp) == SU_PORT_PORT)
  1327. num_uart++;
  1328. }
  1329. }
  1330. if (num_uart) {
  1331. err = sunserial_register_minors(&sunsu_reg, num_uart);
  1332. if (err)
  1333. return err;
  1334. }
  1335. err = platform_driver_register(&su_driver);
  1336. if (err && num_uart)
  1337. sunserial_unregister_minors(&sunsu_reg, num_uart);
  1338. return err;
  1339. }
  1340. static void __exit sunsu_exit(void)
  1341. {
  1342. if (sunsu_reg.nr)
  1343. sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
  1344. }
  1345. module_init(sunsu_init);
  1346. module_exit(sunsu_exit);
  1347. MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
  1348. MODULE_DESCRIPTION("Sun SU serial port driver");
  1349. MODULE_VERSION("2.0");
  1350. MODULE_LICENSE("GPL");