of_serial.c 6.7 KB

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  1. /*
  2. * Serial Port driver for Open Firmware platform devices
  3. *
  4. * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. *
  11. */
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/delay.h>
  16. #include <linux/serial_core.h>
  17. #include <linux/serial_8250.h>
  18. #include <linux/serial_reg.h>
  19. #include <linux/of_address.h>
  20. #include <linux/of_irq.h>
  21. #include <linux/of_platform.h>
  22. #include <linux/nwpserial.h>
  23. #include <linux/clk.h>
  24. struct of_serial_info {
  25. struct clk *clk;
  26. int type;
  27. int line;
  28. };
  29. #ifdef CONFIG_ARCH_TEGRA
  30. void tegra_serial_handle_break(struct uart_port *p)
  31. {
  32. unsigned int status, tmout = 10000;
  33. do {
  34. status = p->serial_in(p, UART_LSR);
  35. if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
  36. status = p->serial_in(p, UART_RX);
  37. else
  38. break;
  39. if (--tmout == 0)
  40. break;
  41. udelay(1);
  42. } while (1);
  43. }
  44. #else
  45. static inline void tegra_serial_handle_break(struct uart_port *port)
  46. {
  47. }
  48. #endif
  49. /*
  50. * Fill a struct uart_port for a given device node
  51. */
  52. static int of_platform_serial_setup(struct platform_device *ofdev,
  53. int type, struct uart_port *port,
  54. struct of_serial_info *info)
  55. {
  56. struct resource resource;
  57. struct device_node *np = ofdev->dev.of_node;
  58. u32 clk, spd, prop;
  59. int ret;
  60. memset(port, 0, sizeof *port);
  61. if (of_property_read_u32(np, "clock-frequency", &clk)) {
  62. /* Get clk rate through clk driver if present */
  63. info->clk = clk_get(&ofdev->dev, NULL);
  64. if (IS_ERR(info->clk)) {
  65. dev_warn(&ofdev->dev,
  66. "clk or clock-frequency not defined\n");
  67. return PTR_ERR(info->clk);
  68. }
  69. clk_prepare_enable(info->clk);
  70. clk = clk_get_rate(info->clk);
  71. }
  72. /* If current-speed was set, then try not to change it. */
  73. if (of_property_read_u32(np, "current-speed", &spd) == 0)
  74. port->custom_divisor = clk / (16 * spd);
  75. ret = of_address_to_resource(np, 0, &resource);
  76. if (ret) {
  77. dev_warn(&ofdev->dev, "invalid address\n");
  78. goto out;
  79. }
  80. spin_lock_init(&port->lock);
  81. port->mapbase = resource.start;
  82. /* Check for shifted address mapping */
  83. if (of_property_read_u32(np, "reg-offset", &prop) == 0)
  84. port->mapbase += prop;
  85. /* Check for registers offset within the devices address range */
  86. if (of_property_read_u32(np, "reg-shift", &prop) == 0)
  87. port->regshift = prop;
  88. port->irq = irq_of_parse_and_map(np, 0);
  89. port->iotype = UPIO_MEM;
  90. if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
  91. switch (prop) {
  92. case 1:
  93. port->iotype = UPIO_MEM;
  94. break;
  95. case 4:
  96. port->iotype = UPIO_MEM32;
  97. break;
  98. default:
  99. dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
  100. prop);
  101. ret = -EINVAL;
  102. goto out;
  103. }
  104. }
  105. port->type = type;
  106. port->uartclk = clk;
  107. port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
  108. | UPF_FIXED_PORT | UPF_FIXED_TYPE;
  109. if (of_find_property(np, "no-loopback-test", NULL))
  110. port->flags |= UPF_SKIP_TEST;
  111. port->dev = &ofdev->dev;
  112. if (type == PORT_TEGRA)
  113. port->handle_break = tegra_serial_handle_break;
  114. return 0;
  115. out:
  116. if (info->clk)
  117. clk_disable_unprepare(info->clk);
  118. return ret;
  119. }
  120. /*
  121. * Try to register a serial port
  122. */
  123. static struct of_device_id of_platform_serial_table[];
  124. static int of_platform_serial_probe(struct platform_device *ofdev)
  125. {
  126. const struct of_device_id *match;
  127. struct of_serial_info *info;
  128. struct uart_port port;
  129. int port_type;
  130. int ret;
  131. match = of_match_device(of_platform_serial_table, &ofdev->dev);
  132. if (!match)
  133. return -EINVAL;
  134. if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
  135. return -EBUSY;
  136. info = kmalloc(sizeof(*info), GFP_KERNEL);
  137. if (info == NULL)
  138. return -ENOMEM;
  139. port_type = (unsigned long)match->data;
  140. ret = of_platform_serial_setup(ofdev, port_type, &port, info);
  141. if (ret)
  142. goto out;
  143. switch (port_type) {
  144. #ifdef CONFIG_SERIAL_8250
  145. case PORT_8250 ... PORT_MAX_8250:
  146. {
  147. /* For now the of bindings don't support the extra
  148. 8250 specific bits */
  149. struct uart_8250_port port8250;
  150. memset(&port8250, 0, sizeof(port8250));
  151. port8250.port = port;
  152. ret = serial8250_register_8250_port(&port8250);
  153. break;
  154. }
  155. #endif
  156. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
  157. case PORT_NWPSERIAL:
  158. ret = nwpserial_register_port(&port);
  159. break;
  160. #endif
  161. default:
  162. /* need to add code for these */
  163. case PORT_UNKNOWN:
  164. dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
  165. ret = -ENODEV;
  166. break;
  167. }
  168. if (ret < 0)
  169. goto out;
  170. info->type = port_type;
  171. info->line = ret;
  172. dev_set_drvdata(&ofdev->dev, info);
  173. return 0;
  174. out:
  175. kfree(info);
  176. irq_dispose_mapping(port.irq);
  177. return ret;
  178. }
  179. /*
  180. * Release a line
  181. */
  182. static int of_platform_serial_remove(struct platform_device *ofdev)
  183. {
  184. struct of_serial_info *info = dev_get_drvdata(&ofdev->dev);
  185. switch (info->type) {
  186. #ifdef CONFIG_SERIAL_8250
  187. case PORT_8250 ... PORT_MAX_8250:
  188. serial8250_unregister_port(info->line);
  189. break;
  190. #endif
  191. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
  192. case PORT_NWPSERIAL:
  193. nwpserial_unregister_port(info->line);
  194. break;
  195. #endif
  196. default:
  197. /* need to add code for these */
  198. break;
  199. }
  200. if (info->clk)
  201. clk_disable_unprepare(info->clk);
  202. kfree(info);
  203. return 0;
  204. }
  205. /*
  206. * A few common types, add more as needed.
  207. */
  208. static struct of_device_id of_platform_serial_table[] = {
  209. { .compatible = "ns8250", .data = (void *)PORT_8250, },
  210. { .compatible = "ns16450", .data = (void *)PORT_16450, },
  211. { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
  212. { .compatible = "ns16550", .data = (void *)PORT_16550, },
  213. { .compatible = "ns16750", .data = (void *)PORT_16750, },
  214. { .compatible = "ns16850", .data = (void *)PORT_16850, },
  215. { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
  216. { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
  217. { .compatible = "altr,16550-FIFO32",
  218. .data = (void *)PORT_ALTR_16550_F32, },
  219. { .compatible = "altr,16550-FIFO64",
  220. .data = (void *)PORT_ALTR_16550_F64, },
  221. { .compatible = "altr,16550-FIFO128",
  222. .data = (void *)PORT_ALTR_16550_F128, },
  223. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
  224. { .compatible = "ibm,qpace-nwp-serial",
  225. .data = (void *)PORT_NWPSERIAL, },
  226. #endif
  227. { .type = "serial", .data = (void *)PORT_UNKNOWN, },
  228. { /* end of list */ },
  229. };
  230. static struct platform_driver of_platform_serial_driver = {
  231. .driver = {
  232. .name = "of_serial",
  233. .owner = THIS_MODULE,
  234. .of_match_table = of_platform_serial_table,
  235. },
  236. .probe = of_platform_serial_probe,
  237. .remove = of_platform_serial_remove,
  238. };
  239. module_platform_driver(of_platform_serial_driver);
  240. MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
  241. MODULE_LICENSE("GPL");
  242. MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");