bfin_uart.c 40 KB

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  1. /*
  2. * Blackfin On-Chip Serial Driver
  3. *
  4. * Copyright 2006-2011 Analog Devices Inc.
  5. *
  6. * Enter bugs at http://blackfin.uclinux.org/
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  11. #define SUPPORT_SYSRQ
  12. #endif
  13. #define DRIVER_NAME "bfin-uart"
  14. #define pr_fmt(fmt) DRIVER_NAME ": " fmt
  15. #include <linux/module.h>
  16. #include <linux/ioport.h>
  17. #include <linux/gfp.h>
  18. #include <linux/io.h>
  19. #include <linux/init.h>
  20. #include <linux/console.h>
  21. #include <linux/sysrq.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/tty.h>
  24. #include <linux/tty_flip.h>
  25. #include <linux/serial_core.h>
  26. #include <linux/gpio.h>
  27. #include <linux/irq.h>
  28. #include <linux/kgdb.h>
  29. #include <linux/slab.h>
  30. #include <linux/dma-mapping.h>
  31. #include <asm/portmux.h>
  32. #include <asm/cacheflush.h>
  33. #include <asm/dma.h>
  34. #include <asm/bfin_serial.h>
  35. #ifdef CONFIG_SERIAL_BFIN_MODULE
  36. # undef CONFIG_EARLY_PRINTK
  37. #endif
  38. #ifdef CONFIG_SERIAL_BFIN_MODULE
  39. # undef CONFIG_EARLY_PRINTK
  40. #endif
  41. /* UART name and device definitions */
  42. #define BFIN_SERIAL_DEV_NAME "ttyBF"
  43. #define BFIN_SERIAL_MAJOR 204
  44. #define BFIN_SERIAL_MINOR 64
  45. static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
  46. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  47. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  48. # ifndef CONFIG_SERIAL_BFIN_PIO
  49. # error KGDB only support UART in PIO mode.
  50. # endif
  51. static int kgdboc_port_line;
  52. static int kgdboc_break_enabled;
  53. #endif
  54. /*
  55. * Setup for console. Argument comes from the menuconfig
  56. */
  57. #define DMA_RX_XCOUNT 512
  58. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  59. #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
  60. #ifdef CONFIG_SERIAL_BFIN_DMA
  61. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  62. #else
  63. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  64. #endif
  65. static void bfin_serial_reset_irda(struct uart_port *port);
  66. #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  67. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  68. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  69. {
  70. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  71. if (uart->cts_pin < 0)
  72. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  73. /* CTS PIN is negative assertive. */
  74. if (UART_GET_CTS(uart))
  75. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  76. else
  77. return TIOCM_DSR | TIOCM_CAR;
  78. }
  79. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  80. {
  81. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  82. if (uart->rts_pin < 0)
  83. return;
  84. /* RTS PIN is negative assertive. */
  85. if (mctrl & TIOCM_RTS)
  86. UART_ENABLE_RTS(uart);
  87. else
  88. UART_DISABLE_RTS(uart);
  89. }
  90. /*
  91. * Handle any change of modem status signal.
  92. */
  93. static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
  94. {
  95. struct bfin_serial_port *uart = dev_id;
  96. unsigned int status = bfin_serial_get_mctrl(&uart->port);
  97. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  98. struct tty_struct *tty = uart->port.state->port.tty;
  99. UART_CLEAR_SCTS(uart);
  100. if (tty->hw_stopped) {
  101. if (status) {
  102. tty->hw_stopped = 0;
  103. uart_write_wakeup(&uart->port);
  104. }
  105. } else {
  106. if (!status)
  107. tty->hw_stopped = 1;
  108. }
  109. #endif
  110. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  111. return IRQ_HANDLED;
  112. }
  113. #else
  114. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  115. {
  116. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  117. }
  118. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  119. {
  120. }
  121. #endif
  122. /*
  123. * interrupts are disabled on entry
  124. */
  125. static void bfin_serial_stop_tx(struct uart_port *port)
  126. {
  127. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  128. #ifdef CONFIG_SERIAL_BFIN_DMA
  129. struct circ_buf *xmit = &uart->port.state->xmit;
  130. #endif
  131. while (!(UART_GET_LSR(uart) & TEMT))
  132. cpu_relax();
  133. #ifdef CONFIG_SERIAL_BFIN_DMA
  134. disable_dma(uart->tx_dma_channel);
  135. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  136. uart->port.icount.tx += uart->tx_count;
  137. uart->tx_count = 0;
  138. uart->tx_done = 1;
  139. #else
  140. #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
  141. /* Clear TFI bit */
  142. UART_PUT_LSR(uart, TFI);
  143. #endif
  144. UART_CLEAR_IER(uart, ETBEI);
  145. #endif
  146. }
  147. /*
  148. * port is locked and interrupts are disabled
  149. */
  150. static void bfin_serial_start_tx(struct uart_port *port)
  151. {
  152. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  153. struct tty_struct *tty = uart->port.state->port.tty;
  154. /*
  155. * To avoid losting RX interrupt, we reset IR function
  156. * before sending data.
  157. */
  158. if (tty->termios.c_line == N_IRDA)
  159. bfin_serial_reset_irda(port);
  160. #ifdef CONFIG_SERIAL_BFIN_DMA
  161. if (uart->tx_done)
  162. bfin_serial_dma_tx_chars(uart);
  163. #else
  164. UART_SET_IER(uart, ETBEI);
  165. bfin_serial_tx_chars(uart);
  166. #endif
  167. }
  168. /*
  169. * Interrupts are enabled
  170. */
  171. static void bfin_serial_stop_rx(struct uart_port *port)
  172. {
  173. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  174. UART_CLEAR_IER(uart, ERBFI);
  175. }
  176. /*
  177. * Set the modem control timer to fire immediately.
  178. */
  179. static void bfin_serial_enable_ms(struct uart_port *port)
  180. {
  181. }
  182. #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
  183. # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
  184. # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
  185. #else
  186. # define UART_GET_ANOMALY_THRESHOLD(uart) 0
  187. # define UART_SET_ANOMALY_THRESHOLD(uart, v)
  188. #endif
  189. #ifdef CONFIG_SERIAL_BFIN_PIO
  190. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  191. {
  192. unsigned int status, ch, flg;
  193. static struct timeval anomaly_start = { .tv_sec = 0 };
  194. status = UART_GET_LSR(uart);
  195. UART_CLEAR_LSR(uart);
  196. ch = UART_GET_CHAR(uart);
  197. uart->port.icount.rx++;
  198. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  199. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  200. if (kgdb_connected && kgdboc_port_line == uart->port.line
  201. && kgdboc_break_enabled)
  202. if (ch == 0x3) {/* Ctrl + C */
  203. kgdb_breakpoint();
  204. return;
  205. }
  206. if (!uart->port.state)
  207. return;
  208. #endif
  209. if (ANOMALY_05000363) {
  210. /* The BF533 (and BF561) family of processors have a nice anomaly
  211. * where they continuously generate characters for a "single" break.
  212. * We have to basically ignore this flood until the "next" valid
  213. * character comes across. Due to the nature of the flood, it is
  214. * not possible to reliably catch bytes that are sent too quickly
  215. * after this break. So application code talking to the Blackfin
  216. * which sends a break signal must allow at least 1.5 character
  217. * times after the end of the break for things to stabilize. This
  218. * timeout was picked as it must absolutely be larger than 1
  219. * character time +/- some percent. So 1.5 sounds good. All other
  220. * Blackfin families operate properly. Woo.
  221. */
  222. if (anomaly_start.tv_sec) {
  223. struct timeval curr;
  224. suseconds_t usecs;
  225. if ((~ch & (~ch + 1)) & 0xff)
  226. goto known_good_char;
  227. do_gettimeofday(&curr);
  228. if (curr.tv_sec - anomaly_start.tv_sec > 1)
  229. goto known_good_char;
  230. usecs = 0;
  231. if (curr.tv_sec != anomaly_start.tv_sec)
  232. usecs += USEC_PER_SEC;
  233. usecs += curr.tv_usec - anomaly_start.tv_usec;
  234. if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
  235. goto known_good_char;
  236. if (ch)
  237. anomaly_start.tv_sec = 0;
  238. else
  239. anomaly_start = curr;
  240. return;
  241. known_good_char:
  242. status &= ~BI;
  243. anomaly_start.tv_sec = 0;
  244. }
  245. }
  246. if (status & BI) {
  247. if (ANOMALY_05000363)
  248. if (bfin_revid() < 5)
  249. do_gettimeofday(&anomaly_start);
  250. uart->port.icount.brk++;
  251. if (uart_handle_break(&uart->port))
  252. goto ignore_char;
  253. status &= ~(PE | FE);
  254. }
  255. if (status & PE)
  256. uart->port.icount.parity++;
  257. if (status & OE)
  258. uart->port.icount.overrun++;
  259. if (status & FE)
  260. uart->port.icount.frame++;
  261. status &= uart->port.read_status_mask;
  262. if (status & BI)
  263. flg = TTY_BREAK;
  264. else if (status & PE)
  265. flg = TTY_PARITY;
  266. else if (status & FE)
  267. flg = TTY_FRAME;
  268. else
  269. flg = TTY_NORMAL;
  270. if (uart_handle_sysrq_char(&uart->port, ch))
  271. goto ignore_char;
  272. uart_insert_char(&uart->port, status, OE, ch, flg);
  273. ignore_char:
  274. tty_flip_buffer_push(&uart->port.state->port);
  275. }
  276. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  277. {
  278. struct circ_buf *xmit = &uart->port.state->xmit;
  279. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  280. #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
  281. /* Clear TFI bit */
  282. UART_PUT_LSR(uart, TFI);
  283. #endif
  284. /* Anomaly notes:
  285. * 05000215 - we always clear ETBEI within last UART TX
  286. * interrupt to end a string. It is always set
  287. * when start a new tx.
  288. */
  289. UART_CLEAR_IER(uart, ETBEI);
  290. return;
  291. }
  292. if (uart->port.x_char) {
  293. UART_PUT_CHAR(uart, uart->port.x_char);
  294. uart->port.icount.tx++;
  295. uart->port.x_char = 0;
  296. }
  297. while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
  298. UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
  299. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  300. uart->port.icount.tx++;
  301. }
  302. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  303. uart_write_wakeup(&uart->port);
  304. }
  305. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  306. {
  307. struct bfin_serial_port *uart = dev_id;
  308. while (UART_GET_LSR(uart) & DR)
  309. bfin_serial_rx_chars(uart);
  310. return IRQ_HANDLED;
  311. }
  312. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  313. {
  314. struct bfin_serial_port *uart = dev_id;
  315. spin_lock(&uart->port.lock);
  316. if (UART_GET_LSR(uart) & THRE)
  317. bfin_serial_tx_chars(uart);
  318. spin_unlock(&uart->port.lock);
  319. return IRQ_HANDLED;
  320. }
  321. #endif
  322. #ifdef CONFIG_SERIAL_BFIN_DMA
  323. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  324. {
  325. struct circ_buf *xmit = &uart->port.state->xmit;
  326. uart->tx_done = 0;
  327. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  328. uart->tx_count = 0;
  329. uart->tx_done = 1;
  330. return;
  331. }
  332. if (uart->port.x_char) {
  333. UART_PUT_CHAR(uart, uart->port.x_char);
  334. uart->port.icount.tx++;
  335. uart->port.x_char = 0;
  336. }
  337. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  338. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  339. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  340. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  341. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  342. set_dma_config(uart->tx_dma_channel,
  343. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  344. INTR_ON_BUF,
  345. DIMENSION_LINEAR,
  346. DATA_SIZE_8,
  347. DMA_SYNC_RESTART));
  348. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  349. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  350. set_dma_x_modify(uart->tx_dma_channel, 1);
  351. SSYNC();
  352. enable_dma(uart->tx_dma_channel);
  353. UART_SET_IER(uart, ETBEI);
  354. }
  355. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  356. {
  357. int i, flg, status;
  358. status = UART_GET_LSR(uart);
  359. UART_CLEAR_LSR(uart);
  360. uart->port.icount.rx +=
  361. CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
  362. UART_XMIT_SIZE);
  363. if (status & BI) {
  364. uart->port.icount.brk++;
  365. if (uart_handle_break(&uart->port))
  366. goto dma_ignore_char;
  367. status &= ~(PE | FE);
  368. }
  369. if (status & PE)
  370. uart->port.icount.parity++;
  371. if (status & OE)
  372. uart->port.icount.overrun++;
  373. if (status & FE)
  374. uart->port.icount.frame++;
  375. status &= uart->port.read_status_mask;
  376. if (status & BI)
  377. flg = TTY_BREAK;
  378. else if (status & PE)
  379. flg = TTY_PARITY;
  380. else if (status & FE)
  381. flg = TTY_FRAME;
  382. else
  383. flg = TTY_NORMAL;
  384. for (i = uart->rx_dma_buf.tail; ; i++) {
  385. if (i >= UART_XMIT_SIZE)
  386. i = 0;
  387. if (i == uart->rx_dma_buf.head)
  388. break;
  389. if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  390. uart_insert_char(&uart->port, status, OE,
  391. uart->rx_dma_buf.buf[i], flg);
  392. }
  393. dma_ignore_char:
  394. tty_flip_buffer_push(&uart->port.state->port);
  395. }
  396. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  397. {
  398. int x_pos, pos;
  399. unsigned long flags;
  400. spin_lock_irqsave(&uart->rx_lock, flags);
  401. /* 2D DMA RX buffer ring is used. Because curr_y_count and
  402. * curr_x_count can't be read as an atomic operation,
  403. * curr_y_count should be read before curr_x_count. When
  404. * curr_x_count is read, curr_y_count may already indicate
  405. * next buffer line. But, the position calculated here is
  406. * still indicate the old line. The wrong position data may
  407. * be smaller than current buffer tail, which cause garbages
  408. * are received if it is not prohibit.
  409. */
  410. uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
  411. x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
  412. uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
  413. if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
  414. uart->rx_dma_nrows = 0;
  415. x_pos = DMA_RX_XCOUNT - x_pos;
  416. if (x_pos == DMA_RX_XCOUNT)
  417. x_pos = 0;
  418. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  419. /* Ignore receiving data if new position is in the same line of
  420. * current buffer tail and small.
  421. */
  422. if (pos > uart->rx_dma_buf.tail ||
  423. uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
  424. uart->rx_dma_buf.head = pos;
  425. bfin_serial_dma_rx_chars(uart);
  426. uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
  427. }
  428. spin_unlock_irqrestore(&uart->rx_lock, flags);
  429. mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
  430. }
  431. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  432. {
  433. struct bfin_serial_port *uart = dev_id;
  434. struct circ_buf *xmit = &uart->port.state->xmit;
  435. spin_lock(&uart->port.lock);
  436. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  437. disable_dma(uart->tx_dma_channel);
  438. clear_dma_irqstat(uart->tx_dma_channel);
  439. /* Anomaly notes:
  440. * 05000215 - we always clear ETBEI within last UART TX
  441. * interrupt to end a string. It is always set
  442. * when start a new tx.
  443. */
  444. UART_CLEAR_IER(uart, ETBEI);
  445. uart->port.icount.tx += uart->tx_count;
  446. if (!(xmit->tail == 0 && xmit->head == 0)) {
  447. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  448. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  449. uart_write_wakeup(&uart->port);
  450. }
  451. bfin_serial_dma_tx_chars(uart);
  452. }
  453. spin_unlock(&uart->port.lock);
  454. return IRQ_HANDLED;
  455. }
  456. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  457. {
  458. struct bfin_serial_port *uart = dev_id;
  459. unsigned int irqstat;
  460. int x_pos, pos;
  461. spin_lock(&uart->rx_lock);
  462. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  463. clear_dma_irqstat(uart->rx_dma_channel);
  464. uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
  465. x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
  466. uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
  467. if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
  468. uart->rx_dma_nrows = 0;
  469. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
  470. if (pos > uart->rx_dma_buf.tail ||
  471. uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
  472. uart->rx_dma_buf.head = pos;
  473. bfin_serial_dma_rx_chars(uart);
  474. uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
  475. }
  476. spin_unlock(&uart->rx_lock);
  477. return IRQ_HANDLED;
  478. }
  479. #endif
  480. /*
  481. * Return TIOCSER_TEMT when transmitter is not busy.
  482. */
  483. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  484. {
  485. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  486. unsigned int lsr;
  487. lsr = UART_GET_LSR(uart);
  488. if (lsr & TEMT)
  489. return TIOCSER_TEMT;
  490. else
  491. return 0;
  492. }
  493. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  494. {
  495. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  496. u32 lcr = UART_GET_LCR(uart);
  497. if (break_state)
  498. lcr |= SB;
  499. else
  500. lcr &= ~SB;
  501. UART_PUT_LCR(uart, lcr);
  502. SSYNC();
  503. }
  504. static int bfin_serial_startup(struct uart_port *port)
  505. {
  506. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  507. #ifdef CONFIG_SERIAL_BFIN_DMA
  508. dma_addr_t dma_handle;
  509. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  510. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  511. return -EBUSY;
  512. }
  513. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  514. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  515. free_dma(uart->rx_dma_channel);
  516. return -EBUSY;
  517. }
  518. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  519. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  520. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  521. uart->rx_dma_buf.head = 0;
  522. uart->rx_dma_buf.tail = 0;
  523. uart->rx_dma_nrows = 0;
  524. set_dma_config(uart->rx_dma_channel,
  525. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  526. INTR_ON_ROW, DIMENSION_2D,
  527. DATA_SIZE_8,
  528. DMA_SYNC_RESTART));
  529. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  530. set_dma_x_modify(uart->rx_dma_channel, 1);
  531. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  532. set_dma_y_modify(uart->rx_dma_channel, 1);
  533. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  534. enable_dma(uart->rx_dma_channel);
  535. uart->rx_dma_timer.data = (unsigned long)(uart);
  536. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  537. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  538. add_timer(&(uart->rx_dma_timer));
  539. #else
  540. # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  541. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  542. if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
  543. kgdboc_break_enabled = 0;
  544. else {
  545. # endif
  546. if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0,
  547. "BFIN_UART_RX", uart)) {
  548. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  549. return -EBUSY;
  550. }
  551. if (request_irq
  552. (uart->tx_irq, bfin_serial_tx_int, 0,
  553. "BFIN_UART_TX", uart)) {
  554. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  555. free_irq(uart->rx_irq, uart);
  556. return -EBUSY;
  557. }
  558. # ifdef CONFIG_BF54x
  559. {
  560. /*
  561. * UART2 and UART3 on BF548 share interrupt PINs and DMA
  562. * controllers with SPORT2 and SPORT3. UART rx and tx
  563. * interrupts are generated in PIO mode only when configure
  564. * their peripheral mapping registers properly, which means
  565. * request corresponding DMA channels in PIO mode as well.
  566. */
  567. unsigned uart_dma_ch_rx, uart_dma_ch_tx;
  568. switch (uart->rx_irq) {
  569. case IRQ_UART3_RX:
  570. uart_dma_ch_rx = CH_UART3_RX;
  571. uart_dma_ch_tx = CH_UART3_TX;
  572. break;
  573. case IRQ_UART2_RX:
  574. uart_dma_ch_rx = CH_UART2_RX;
  575. uart_dma_ch_tx = CH_UART2_TX;
  576. break;
  577. default:
  578. uart_dma_ch_rx = uart_dma_ch_tx = 0;
  579. break;
  580. };
  581. if (uart_dma_ch_rx &&
  582. request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
  583. printk(KERN_NOTICE"Fail to attach UART interrupt\n");
  584. free_irq(uart->rx_irq, uart);
  585. free_irq(uart->tx_irq, uart);
  586. return -EBUSY;
  587. }
  588. if (uart_dma_ch_tx &&
  589. request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
  590. printk(KERN_NOTICE "Fail to attach UART interrupt\n");
  591. free_dma(uart_dma_ch_rx);
  592. free_irq(uart->rx_irq, uart);
  593. free_irq(uart->tx_irq, uart);
  594. return -EBUSY;
  595. }
  596. }
  597. # endif
  598. # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  599. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  600. }
  601. # endif
  602. #endif
  603. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  604. if (uart->cts_pin >= 0) {
  605. if (request_irq(gpio_to_irq(uart->cts_pin),
  606. bfin_serial_mctrl_cts_int,
  607. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
  608. 0, "BFIN_UART_CTS", uart)) {
  609. uart->cts_pin = -1;
  610. pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
  611. }
  612. }
  613. if (uart->rts_pin >= 0) {
  614. if (gpio_request(uart->rts_pin, DRIVER_NAME)) {
  615. pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin);
  616. uart->rts_pin = -1;
  617. } else
  618. gpio_direction_output(uart->rts_pin, 0);
  619. }
  620. #endif
  621. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  622. if (uart->cts_pin >= 0) {
  623. if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
  624. IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
  625. uart->cts_pin = -1;
  626. dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n");
  627. }
  628. /* CTS RTS PINs are negative assertive. */
  629. UART_PUT_MCR(uart, UART_GET_MCR(uart) | ACTS);
  630. UART_SET_IER(uart, EDSSI);
  631. }
  632. #endif
  633. UART_SET_IER(uart, ERBFI);
  634. return 0;
  635. }
  636. static void bfin_serial_shutdown(struct uart_port *port)
  637. {
  638. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  639. #ifdef CONFIG_SERIAL_BFIN_DMA
  640. disable_dma(uart->tx_dma_channel);
  641. free_dma(uart->tx_dma_channel);
  642. disable_dma(uart->rx_dma_channel);
  643. free_dma(uart->rx_dma_channel);
  644. del_timer(&(uart->rx_dma_timer));
  645. dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
  646. #else
  647. #ifdef CONFIG_BF54x
  648. switch (uart->port.irq) {
  649. case IRQ_UART3_RX:
  650. free_dma(CH_UART3_RX);
  651. free_dma(CH_UART3_TX);
  652. break;
  653. case IRQ_UART2_RX:
  654. free_dma(CH_UART2_RX);
  655. free_dma(CH_UART2_TX);
  656. break;
  657. default:
  658. break;
  659. };
  660. #endif
  661. free_irq(uart->rx_irq, uart);
  662. free_irq(uart->tx_irq, uart);
  663. #endif
  664. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  665. if (uart->cts_pin >= 0)
  666. free_irq(gpio_to_irq(uart->cts_pin), uart);
  667. if (uart->rts_pin >= 0)
  668. gpio_free(uart->rts_pin);
  669. #endif
  670. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  671. if (uart->cts_pin >= 0)
  672. free_irq(uart->status_irq, uart);
  673. #endif
  674. }
  675. static void
  676. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  677. struct ktermios *old)
  678. {
  679. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  680. unsigned long flags;
  681. unsigned int baud, quot;
  682. unsigned int ier, lcr = 0;
  683. unsigned long timeout;
  684. switch (termios->c_cflag & CSIZE) {
  685. case CS8:
  686. lcr = WLS(8);
  687. break;
  688. case CS7:
  689. lcr = WLS(7);
  690. break;
  691. case CS6:
  692. lcr = WLS(6);
  693. break;
  694. case CS5:
  695. lcr = WLS(5);
  696. break;
  697. default:
  698. printk(KERN_ERR "%s: word length not supported\n",
  699. __func__);
  700. }
  701. /* Anomaly notes:
  702. * 05000231 - STOP bit is always set to 1 whatever the user is set.
  703. */
  704. if (termios->c_cflag & CSTOPB) {
  705. if (ANOMALY_05000231)
  706. printk(KERN_WARNING "STOP bits other than 1 is not "
  707. "supported in case of anomaly 05000231.\n");
  708. else
  709. lcr |= STB;
  710. }
  711. if (termios->c_cflag & PARENB)
  712. lcr |= PEN;
  713. if (!(termios->c_cflag & PARODD))
  714. lcr |= EPS;
  715. if (termios->c_cflag & CMSPAR)
  716. lcr |= STP;
  717. spin_lock_irqsave(&uart->port.lock, flags);
  718. port->read_status_mask = OE;
  719. if (termios->c_iflag & INPCK)
  720. port->read_status_mask |= (FE | PE);
  721. if (termios->c_iflag & (BRKINT | PARMRK))
  722. port->read_status_mask |= BI;
  723. /*
  724. * Characters to ignore
  725. */
  726. port->ignore_status_mask = 0;
  727. if (termios->c_iflag & IGNPAR)
  728. port->ignore_status_mask |= FE | PE;
  729. if (termios->c_iflag & IGNBRK) {
  730. port->ignore_status_mask |= BI;
  731. /*
  732. * If we're ignoring parity and break indicators,
  733. * ignore overruns too (for real raw support).
  734. */
  735. if (termios->c_iflag & IGNPAR)
  736. port->ignore_status_mask |= OE;
  737. }
  738. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  739. quot = uart_get_divisor(port, baud);
  740. /* If discipline is not IRDA, apply ANOMALY_05000230 */
  741. if (termios->c_line != N_IRDA)
  742. quot -= ANOMALY_05000230;
  743. UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
  744. /* Wait till the transfer buffer is empty */
  745. timeout = jiffies + msecs_to_jiffies(10);
  746. while (UART_GET_GCTL(uart) & UCEN && !(UART_GET_LSR(uart) & TEMT))
  747. if (time_after(jiffies, timeout)) {
  748. dev_warn(port->dev, "timeout waiting for TX buffer empty\n");
  749. break;
  750. }
  751. /* Disable UART */
  752. ier = UART_GET_IER(uart);
  753. UART_PUT_GCTL(uart, UART_GET_GCTL(uart) & ~UCEN);
  754. UART_DISABLE_INTS(uart);
  755. /* Set DLAB in LCR to Access CLK */
  756. UART_SET_DLAB(uart);
  757. UART_PUT_CLK(uart, quot);
  758. SSYNC();
  759. /* Clear DLAB in LCR to Access THR RBR IER */
  760. UART_CLEAR_DLAB(uart);
  761. UART_PUT_LCR(uart, (UART_GET_LCR(uart) & ~LCR_MASK) | lcr);
  762. /* Enable UART */
  763. UART_ENABLE_INTS(uart, ier);
  764. UART_PUT_GCTL(uart, UART_GET_GCTL(uart) | UCEN);
  765. /* Port speed changed, update the per-port timeout. */
  766. uart_update_timeout(port, termios->c_cflag, baud);
  767. spin_unlock_irqrestore(&uart->port.lock, flags);
  768. }
  769. static const char *bfin_serial_type(struct uart_port *port)
  770. {
  771. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  772. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  773. }
  774. /*
  775. * Release the memory region(s) being used by 'port'.
  776. */
  777. static void bfin_serial_release_port(struct uart_port *port)
  778. {
  779. }
  780. /*
  781. * Request the memory region(s) being used by 'port'.
  782. */
  783. static int bfin_serial_request_port(struct uart_port *port)
  784. {
  785. return 0;
  786. }
  787. /*
  788. * Configure/autoconfigure the port.
  789. */
  790. static void bfin_serial_config_port(struct uart_port *port, int flags)
  791. {
  792. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  793. if (flags & UART_CONFIG_TYPE &&
  794. bfin_serial_request_port(&uart->port) == 0)
  795. uart->port.type = PORT_BFIN;
  796. }
  797. /*
  798. * Verify the new serial_struct (for TIOCSSERIAL).
  799. * The only change we allow are to the flags and type, and
  800. * even then only between PORT_BFIN and PORT_UNKNOWN
  801. */
  802. static int
  803. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  804. {
  805. return 0;
  806. }
  807. /*
  808. * Enable the IrDA function if tty->ldisc.num is N_IRDA.
  809. * In other cases, disable IrDA function.
  810. */
  811. static void bfin_serial_set_ldisc(struct uart_port *port, int ld)
  812. {
  813. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  814. unsigned int val;
  815. switch (ld) {
  816. case N_IRDA:
  817. val = UART_GET_GCTL(uart);
  818. val |= (UMOD_IRDA | RPOLC);
  819. UART_PUT_GCTL(uart, val);
  820. break;
  821. default:
  822. val = UART_GET_GCTL(uart);
  823. val &= ~(UMOD_MASK | RPOLC);
  824. UART_PUT_GCTL(uart, val);
  825. }
  826. }
  827. static void bfin_serial_reset_irda(struct uart_port *port)
  828. {
  829. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  830. unsigned int val;
  831. val = UART_GET_GCTL(uart);
  832. val &= ~(UMOD_MASK | RPOLC);
  833. UART_PUT_GCTL(uart, val);
  834. SSYNC();
  835. val |= (UMOD_IRDA | RPOLC);
  836. UART_PUT_GCTL(uart, val);
  837. SSYNC();
  838. }
  839. #ifdef CONFIG_CONSOLE_POLL
  840. /* Anomaly notes:
  841. * 05000099 - Because we only use THRE in poll_put and DR in poll_get,
  842. * losing other bits of UART_LSR is not a problem here.
  843. */
  844. static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
  845. {
  846. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  847. while (!(UART_GET_LSR(uart) & THRE))
  848. cpu_relax();
  849. UART_CLEAR_DLAB(uart);
  850. UART_PUT_CHAR(uart, (unsigned char)chr);
  851. }
  852. static int bfin_serial_poll_get_char(struct uart_port *port)
  853. {
  854. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  855. unsigned char chr;
  856. while (!(UART_GET_LSR(uart) & DR))
  857. cpu_relax();
  858. UART_CLEAR_DLAB(uart);
  859. chr = UART_GET_CHAR(uart);
  860. return chr;
  861. }
  862. #endif
  863. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  864. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  865. static void bfin_kgdboc_port_shutdown(struct uart_port *port)
  866. {
  867. if (kgdboc_break_enabled) {
  868. kgdboc_break_enabled = 0;
  869. bfin_serial_shutdown(port);
  870. }
  871. }
  872. static int bfin_kgdboc_port_startup(struct uart_port *port)
  873. {
  874. kgdboc_port_line = port->line;
  875. kgdboc_break_enabled = !bfin_serial_startup(port);
  876. return 0;
  877. }
  878. #endif
  879. static struct uart_ops bfin_serial_pops = {
  880. .tx_empty = bfin_serial_tx_empty,
  881. .set_mctrl = bfin_serial_set_mctrl,
  882. .get_mctrl = bfin_serial_get_mctrl,
  883. .stop_tx = bfin_serial_stop_tx,
  884. .start_tx = bfin_serial_start_tx,
  885. .stop_rx = bfin_serial_stop_rx,
  886. .enable_ms = bfin_serial_enable_ms,
  887. .break_ctl = bfin_serial_break_ctl,
  888. .startup = bfin_serial_startup,
  889. .shutdown = bfin_serial_shutdown,
  890. .set_termios = bfin_serial_set_termios,
  891. .set_ldisc = bfin_serial_set_ldisc,
  892. .type = bfin_serial_type,
  893. .release_port = bfin_serial_release_port,
  894. .request_port = bfin_serial_request_port,
  895. .config_port = bfin_serial_config_port,
  896. .verify_port = bfin_serial_verify_port,
  897. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  898. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  899. .kgdboc_port_startup = bfin_kgdboc_port_startup,
  900. .kgdboc_port_shutdown = bfin_kgdboc_port_shutdown,
  901. #endif
  902. #ifdef CONFIG_CONSOLE_POLL
  903. .poll_put_char = bfin_serial_poll_put_char,
  904. .poll_get_char = bfin_serial_poll_get_char,
  905. #endif
  906. };
  907. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  908. /*
  909. * If the port was already initialised (eg, by a boot loader),
  910. * try to determine the current setup.
  911. */
  912. static void __init
  913. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  914. int *parity, int *bits)
  915. {
  916. unsigned int status;
  917. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  918. if (status == (ERBFI | ETBEI)) {
  919. /* ok, the port was enabled */
  920. u32 lcr, clk;
  921. lcr = UART_GET_LCR(uart);
  922. *parity = 'n';
  923. if (lcr & PEN) {
  924. if (lcr & EPS)
  925. *parity = 'e';
  926. else
  927. *parity = 'o';
  928. }
  929. *bits = ((lcr & WLS_MASK) >> WLS_OFFSET) + 5;
  930. /* Set DLAB in LCR to Access CLK */
  931. UART_SET_DLAB(uart);
  932. clk = UART_GET_CLK(uart);
  933. /* Clear DLAB in LCR to Access THR RBR IER */
  934. UART_CLEAR_DLAB(uart);
  935. *baud = get_sclk() / (16*clk);
  936. }
  937. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
  938. }
  939. static struct uart_driver bfin_serial_reg;
  940. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  941. {
  942. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  943. while (!(UART_GET_LSR(uart) & THRE))
  944. barrier();
  945. UART_PUT_CHAR(uart, ch);
  946. }
  947. #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
  948. defined (CONFIG_EARLY_PRINTK) */
  949. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  950. #define CLASS_BFIN_CONSOLE "bfin-console"
  951. /*
  952. * Interrupts are disabled on entering
  953. */
  954. static void
  955. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  956. {
  957. struct bfin_serial_port *uart = bfin_serial_ports[co->index];
  958. unsigned long flags;
  959. spin_lock_irqsave(&uart->port.lock, flags);
  960. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  961. spin_unlock_irqrestore(&uart->port.lock, flags);
  962. }
  963. static int __init
  964. bfin_serial_console_setup(struct console *co, char *options)
  965. {
  966. struct bfin_serial_port *uart;
  967. int baud = 57600;
  968. int bits = 8;
  969. int parity = 'n';
  970. # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  971. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  972. int flow = 'r';
  973. # else
  974. int flow = 'n';
  975. # endif
  976. /*
  977. * Check whether an invalid uart number has been specified, and
  978. * if so, search for the first available port that does have
  979. * console support.
  980. */
  981. if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
  982. return -ENODEV;
  983. uart = bfin_serial_ports[co->index];
  984. if (!uart)
  985. return -ENODEV;
  986. if (options)
  987. uart_parse_options(options, &baud, &parity, &bits, &flow);
  988. else
  989. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  990. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  991. }
  992. static struct console bfin_serial_console = {
  993. .name = BFIN_SERIAL_DEV_NAME,
  994. .write = bfin_serial_console_write,
  995. .device = uart_console_device,
  996. .setup = bfin_serial_console_setup,
  997. .flags = CON_PRINTBUFFER,
  998. .index = -1,
  999. .data = &bfin_serial_reg,
  1000. };
  1001. #define BFIN_SERIAL_CONSOLE (&bfin_serial_console)
  1002. #else
  1003. #define BFIN_SERIAL_CONSOLE NULL
  1004. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  1005. #ifdef CONFIG_EARLY_PRINTK
  1006. static struct bfin_serial_port bfin_earlyprintk_port;
  1007. #define CLASS_BFIN_EARLYPRINTK "bfin-earlyprintk"
  1008. /*
  1009. * Interrupts are disabled on entering
  1010. */
  1011. static void
  1012. bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
  1013. {
  1014. unsigned long flags;
  1015. if (bfin_earlyprintk_port.port.line != co->index)
  1016. return;
  1017. spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
  1018. uart_console_write(&bfin_earlyprintk_port.port, s, count,
  1019. bfin_serial_console_putchar);
  1020. spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
  1021. }
  1022. /*
  1023. * This should have a .setup or .early_setup in it, but then things get called
  1024. * without the command line options, and the baud rate gets messed up - so
  1025. * don't let the common infrastructure play with things. (see calls to setup
  1026. * & earlysetup in ./kernel/printk.c:register_console()
  1027. */
  1028. static struct __initdata console bfin_early_serial_console = {
  1029. .name = "early_BFuart",
  1030. .write = bfin_earlyprintk_console_write,
  1031. .device = uart_console_device,
  1032. .flags = CON_PRINTBUFFER,
  1033. .index = -1,
  1034. .data = &bfin_serial_reg,
  1035. };
  1036. #endif
  1037. static struct uart_driver bfin_serial_reg = {
  1038. .owner = THIS_MODULE,
  1039. .driver_name = DRIVER_NAME,
  1040. .dev_name = BFIN_SERIAL_DEV_NAME,
  1041. .major = BFIN_SERIAL_MAJOR,
  1042. .minor = BFIN_SERIAL_MINOR,
  1043. .nr = BFIN_UART_NR_PORTS,
  1044. .cons = BFIN_SERIAL_CONSOLE,
  1045. };
  1046. static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
  1047. {
  1048. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1049. return uart_suspend_port(&bfin_serial_reg, &uart->port);
  1050. }
  1051. static int bfin_serial_resume(struct platform_device *pdev)
  1052. {
  1053. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1054. return uart_resume_port(&bfin_serial_reg, &uart->port);
  1055. }
  1056. static int bfin_serial_probe(struct platform_device *pdev)
  1057. {
  1058. struct resource *res;
  1059. struct bfin_serial_port *uart = NULL;
  1060. int ret = 0;
  1061. if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
  1062. dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
  1063. return -ENOENT;
  1064. }
  1065. if (bfin_serial_ports[pdev->id] == NULL) {
  1066. uart = kzalloc(sizeof(*uart), GFP_KERNEL);
  1067. if (!uart) {
  1068. dev_err(&pdev->dev,
  1069. "fail to malloc bfin_serial_port\n");
  1070. return -ENOMEM;
  1071. }
  1072. bfin_serial_ports[pdev->id] = uart;
  1073. #ifdef CONFIG_EARLY_PRINTK
  1074. if (!(bfin_earlyprintk_port.port.membase
  1075. && bfin_earlyprintk_port.port.line == pdev->id)) {
  1076. /*
  1077. * If the peripheral PINs of current port is allocated
  1078. * in earlyprintk probe stage, don't do it again.
  1079. */
  1080. #endif
  1081. ret = peripheral_request_list(
  1082. (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
  1083. if (ret) {
  1084. dev_err(&pdev->dev,
  1085. "fail to request bfin serial peripherals\n");
  1086. goto out_error_free_mem;
  1087. }
  1088. #ifdef CONFIG_EARLY_PRINTK
  1089. }
  1090. #endif
  1091. spin_lock_init(&uart->port.lock);
  1092. uart->port.uartclk = get_sclk();
  1093. uart->port.fifosize = BFIN_UART_TX_FIFO_SIZE;
  1094. uart->port.ops = &bfin_serial_pops;
  1095. uart->port.line = pdev->id;
  1096. uart->port.iotype = UPIO_MEM;
  1097. uart->port.flags = UPF_BOOT_AUTOCONF;
  1098. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1099. if (res == NULL) {
  1100. dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
  1101. ret = -ENOENT;
  1102. goto out_error_free_peripherals;
  1103. }
  1104. uart->port.membase = ioremap(res->start, resource_size(res));
  1105. if (!uart->port.membase) {
  1106. dev_err(&pdev->dev, "Cannot map uart IO\n");
  1107. ret = -ENXIO;
  1108. goto out_error_free_peripherals;
  1109. }
  1110. uart->port.mapbase = res->start;
  1111. uart->tx_irq = platform_get_irq(pdev, 0);
  1112. if (uart->tx_irq < 0) {
  1113. dev_err(&pdev->dev, "No uart TX IRQ specified\n");
  1114. ret = -ENOENT;
  1115. goto out_error_unmap;
  1116. }
  1117. uart->rx_irq = platform_get_irq(pdev, 1);
  1118. if (uart->rx_irq < 0) {
  1119. dev_err(&pdev->dev, "No uart RX IRQ specified\n");
  1120. ret = -ENOENT;
  1121. goto out_error_unmap;
  1122. }
  1123. uart->port.irq = uart->rx_irq;
  1124. uart->status_irq = platform_get_irq(pdev, 2);
  1125. if (uart->status_irq < 0) {
  1126. dev_err(&pdev->dev, "No uart status IRQ specified\n");
  1127. ret = -ENOENT;
  1128. goto out_error_unmap;
  1129. }
  1130. #ifdef CONFIG_SERIAL_BFIN_DMA
  1131. spin_lock_init(&uart->rx_lock);
  1132. uart->tx_done = 1;
  1133. uart->tx_count = 0;
  1134. res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  1135. if (res == NULL) {
  1136. dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
  1137. ret = -ENOENT;
  1138. goto out_error_unmap;
  1139. }
  1140. uart->tx_dma_channel = res->start;
  1141. res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  1142. if (res == NULL) {
  1143. dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
  1144. ret = -ENOENT;
  1145. goto out_error_unmap;
  1146. }
  1147. uart->rx_dma_channel = res->start;
  1148. init_timer(&(uart->rx_dma_timer));
  1149. #endif
  1150. #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  1151. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  1152. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1153. if (res == NULL)
  1154. uart->cts_pin = -1;
  1155. else {
  1156. uart->cts_pin = res->start;
  1157. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  1158. uart->port.flags |= ASYNC_CTS_FLOW;
  1159. #endif
  1160. }
  1161. res = platform_get_resource(pdev, IORESOURCE_IO, 1);
  1162. if (res == NULL)
  1163. uart->rts_pin = -1;
  1164. else
  1165. uart->rts_pin = res->start;
  1166. #endif
  1167. }
  1168. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1169. if (!is_early_platform_device(pdev)) {
  1170. #endif
  1171. uart = bfin_serial_ports[pdev->id];
  1172. uart->port.dev = &pdev->dev;
  1173. dev_set_drvdata(&pdev->dev, uart);
  1174. ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
  1175. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1176. }
  1177. #endif
  1178. if (!ret)
  1179. return 0;
  1180. if (uart) {
  1181. out_error_unmap:
  1182. iounmap(uart->port.membase);
  1183. out_error_free_peripherals:
  1184. peripheral_free_list(
  1185. (unsigned short *)pdev->dev.platform_data);
  1186. out_error_free_mem:
  1187. kfree(uart);
  1188. bfin_serial_ports[pdev->id] = NULL;
  1189. }
  1190. return ret;
  1191. }
  1192. static int bfin_serial_remove(struct platform_device *pdev)
  1193. {
  1194. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1195. dev_set_drvdata(&pdev->dev, NULL);
  1196. if (uart) {
  1197. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  1198. iounmap(uart->port.membase);
  1199. peripheral_free_list(
  1200. (unsigned short *)pdev->dev.platform_data);
  1201. kfree(uart);
  1202. bfin_serial_ports[pdev->id] = NULL;
  1203. }
  1204. return 0;
  1205. }
  1206. static struct platform_driver bfin_serial_driver = {
  1207. .probe = bfin_serial_probe,
  1208. .remove = bfin_serial_remove,
  1209. .suspend = bfin_serial_suspend,
  1210. .resume = bfin_serial_resume,
  1211. .driver = {
  1212. .name = DRIVER_NAME,
  1213. .owner = THIS_MODULE,
  1214. },
  1215. };
  1216. #if defined(CONFIG_SERIAL_BFIN_CONSOLE)
  1217. static __initdata struct early_platform_driver early_bfin_serial_driver = {
  1218. .class_str = CLASS_BFIN_CONSOLE,
  1219. .pdrv = &bfin_serial_driver,
  1220. .requested_id = EARLY_PLATFORM_ID_UNSET,
  1221. };
  1222. static int __init bfin_serial_rs_console_init(void)
  1223. {
  1224. early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
  1225. early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
  1226. register_console(&bfin_serial_console);
  1227. return 0;
  1228. }
  1229. console_initcall(bfin_serial_rs_console_init);
  1230. #endif
  1231. #ifdef CONFIG_EARLY_PRINTK
  1232. /*
  1233. * Memory can't be allocated dynamically during earlyprink init stage.
  1234. * So, do individual probe for earlyprink with a static uart port variable.
  1235. */
  1236. static int bfin_earlyprintk_probe(struct platform_device *pdev)
  1237. {
  1238. struct resource *res;
  1239. int ret;
  1240. if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
  1241. dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
  1242. return -ENOENT;
  1243. }
  1244. ret = peripheral_request_list(
  1245. (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
  1246. if (ret) {
  1247. dev_err(&pdev->dev,
  1248. "fail to request bfin serial peripherals\n");
  1249. return ret;
  1250. }
  1251. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1252. if (res == NULL) {
  1253. dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
  1254. ret = -ENOENT;
  1255. goto out_error_free_peripherals;
  1256. }
  1257. bfin_earlyprintk_port.port.membase = ioremap(res->start,
  1258. resource_size(res));
  1259. if (!bfin_earlyprintk_port.port.membase) {
  1260. dev_err(&pdev->dev, "Cannot map uart IO\n");
  1261. ret = -ENXIO;
  1262. goto out_error_free_peripherals;
  1263. }
  1264. bfin_earlyprintk_port.port.mapbase = res->start;
  1265. bfin_earlyprintk_port.port.line = pdev->id;
  1266. bfin_earlyprintk_port.port.uartclk = get_sclk();
  1267. bfin_earlyprintk_port.port.fifosize = BFIN_UART_TX_FIFO_SIZE;
  1268. spin_lock_init(&bfin_earlyprintk_port.port.lock);
  1269. return 0;
  1270. out_error_free_peripherals:
  1271. peripheral_free_list(
  1272. (unsigned short *)pdev->dev.platform_data);
  1273. return ret;
  1274. }
  1275. static struct platform_driver bfin_earlyprintk_driver = {
  1276. .probe = bfin_earlyprintk_probe,
  1277. .driver = {
  1278. .name = DRIVER_NAME,
  1279. .owner = THIS_MODULE,
  1280. },
  1281. };
  1282. static __initdata struct early_platform_driver early_bfin_earlyprintk_driver = {
  1283. .class_str = CLASS_BFIN_EARLYPRINTK,
  1284. .pdrv = &bfin_earlyprintk_driver,
  1285. .requested_id = EARLY_PLATFORM_ID_UNSET,
  1286. };
  1287. struct console __init *bfin_earlyserial_init(unsigned int port,
  1288. unsigned int cflag)
  1289. {
  1290. struct ktermios t;
  1291. char port_name[20];
  1292. if (port < 0 || port >= BFIN_UART_NR_PORTS)
  1293. return NULL;
  1294. /*
  1295. * Only probe resource of the given port in earlyprintk boot arg.
  1296. * The expected port id should be indicated in port name string.
  1297. */
  1298. snprintf(port_name, 20, DRIVER_NAME ".%d", port);
  1299. early_platform_driver_register(&early_bfin_earlyprintk_driver,
  1300. port_name);
  1301. early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
  1302. if (!bfin_earlyprintk_port.port.membase)
  1303. return NULL;
  1304. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1305. /*
  1306. * If we are using early serial, don't let the normal console rewind
  1307. * log buffer, since that causes things to be printed multiple times
  1308. */
  1309. bfin_serial_console.flags &= ~CON_PRINTBUFFER;
  1310. #endif
  1311. bfin_early_serial_console.index = port;
  1312. t.c_cflag = cflag;
  1313. t.c_iflag = 0;
  1314. t.c_oflag = 0;
  1315. t.c_lflag = ICANON;
  1316. t.c_line = port;
  1317. bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
  1318. return &bfin_early_serial_console;
  1319. }
  1320. #endif /* CONFIG_EARLY_PRINTK */
  1321. static int __init bfin_serial_init(void)
  1322. {
  1323. int ret;
  1324. pr_info("Blackfin serial driver\n");
  1325. ret = uart_register_driver(&bfin_serial_reg);
  1326. if (ret) {
  1327. pr_err("failed to register %s:%d\n",
  1328. bfin_serial_reg.driver_name, ret);
  1329. }
  1330. ret = platform_driver_register(&bfin_serial_driver);
  1331. if (ret) {
  1332. pr_err("fail to register bfin uart\n");
  1333. uart_unregister_driver(&bfin_serial_reg);
  1334. }
  1335. return ret;
  1336. }
  1337. static void __exit bfin_serial_exit(void)
  1338. {
  1339. platform_driver_unregister(&bfin_serial_driver);
  1340. uart_unregister_driver(&bfin_serial_reg);
  1341. }
  1342. module_init(bfin_serial_init);
  1343. module_exit(bfin_serial_exit);
  1344. MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
  1345. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  1346. MODULE_LICENSE("GPL");
  1347. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
  1348. MODULE_ALIAS("platform:bfin-uart");