spi-sc18is602.c 8.4 KB

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  1. /*
  2. * NXP SC18IS602/603 SPI driver
  3. *
  4. * Copyright (C) Guenter Roeck <linux@roeck-us.net>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/err.h>
  22. #include <linux/module.h>
  23. #include <linux/spi/spi.h>
  24. #include <linux/i2c.h>
  25. #include <linux/delay.h>
  26. #include <linux/pm_runtime.h>
  27. #include <linux/of.h>
  28. #include <linux/platform_data/sc18is602.h>
  29. enum chips { sc18is602, sc18is602b, sc18is603 };
  30. #define SC18IS602_BUFSIZ 200
  31. #define SC18IS602_CLOCK 7372000
  32. #define SC18IS602_MODE_CPHA BIT(2)
  33. #define SC18IS602_MODE_CPOL BIT(3)
  34. #define SC18IS602_MODE_LSB_FIRST BIT(5)
  35. #define SC18IS602_MODE_CLOCK_DIV_4 0x0
  36. #define SC18IS602_MODE_CLOCK_DIV_16 0x1
  37. #define SC18IS602_MODE_CLOCK_DIV_64 0x2
  38. #define SC18IS602_MODE_CLOCK_DIV_128 0x3
  39. struct sc18is602 {
  40. struct spi_master *master;
  41. struct device *dev;
  42. u8 ctrl;
  43. u32 freq;
  44. u32 speed;
  45. /* I2C data */
  46. struct i2c_client *client;
  47. enum chips id;
  48. u8 buffer[SC18IS602_BUFSIZ + 1];
  49. int tlen; /* Data queued for tx in buffer */
  50. int rindex; /* Receive data index in buffer */
  51. };
  52. static int sc18is602_wait_ready(struct sc18is602 *hw, int len)
  53. {
  54. int i, err;
  55. int usecs = 1000000 * len / hw->speed + 1;
  56. u8 dummy[1];
  57. for (i = 0; i < 10; i++) {
  58. err = i2c_master_recv(hw->client, dummy, 1);
  59. if (err >= 0)
  60. return 0;
  61. usleep_range(usecs, usecs * 2);
  62. }
  63. return -ETIMEDOUT;
  64. }
  65. static int sc18is602_txrx(struct sc18is602 *hw, struct spi_message *msg,
  66. struct spi_transfer *t, bool do_transfer)
  67. {
  68. unsigned int len = t->len;
  69. int ret;
  70. if (hw->tlen == 0) {
  71. /* First byte (I2C command) is chip select */
  72. hw->buffer[0] = 1 << msg->spi->chip_select;
  73. hw->tlen = 1;
  74. hw->rindex = 0;
  75. }
  76. /*
  77. * We can not immediately send data to the chip, since each I2C message
  78. * resembles a full SPI message (from CS active to CS inactive).
  79. * Enqueue messages up to the first read or until do_transfer is true.
  80. */
  81. if (t->tx_buf) {
  82. memcpy(&hw->buffer[hw->tlen], t->tx_buf, len);
  83. hw->tlen += len;
  84. if (t->rx_buf)
  85. do_transfer = true;
  86. else
  87. hw->rindex = hw->tlen - 1;
  88. } else if (t->rx_buf) {
  89. /*
  90. * For receive-only transfers we still need to perform a dummy
  91. * write to receive data from the SPI chip.
  92. * Read data starts at the end of transmit data (minus 1 to
  93. * account for CS).
  94. */
  95. hw->rindex = hw->tlen - 1;
  96. memset(&hw->buffer[hw->tlen], 0, len);
  97. hw->tlen += len;
  98. do_transfer = true;
  99. }
  100. if (do_transfer && hw->tlen > 1) {
  101. ret = sc18is602_wait_ready(hw, SC18IS602_BUFSIZ);
  102. if (ret < 0)
  103. return ret;
  104. ret = i2c_master_send(hw->client, hw->buffer, hw->tlen);
  105. if (ret < 0)
  106. return ret;
  107. if (ret != hw->tlen)
  108. return -EIO;
  109. if (t->rx_buf) {
  110. int rlen = hw->rindex + len;
  111. ret = sc18is602_wait_ready(hw, hw->tlen);
  112. if (ret < 0)
  113. return ret;
  114. ret = i2c_master_recv(hw->client, hw->buffer, rlen);
  115. if (ret < 0)
  116. return ret;
  117. if (ret != rlen)
  118. return -EIO;
  119. memcpy(t->rx_buf, &hw->buffer[hw->rindex], len);
  120. }
  121. hw->tlen = 0;
  122. }
  123. return len;
  124. }
  125. static int sc18is602_setup_transfer(struct sc18is602 *hw, u32 hz, u8 mode)
  126. {
  127. u8 ctrl = 0;
  128. int ret;
  129. if (mode & SPI_CPHA)
  130. ctrl |= SC18IS602_MODE_CPHA;
  131. if (mode & SPI_CPOL)
  132. ctrl |= SC18IS602_MODE_CPOL;
  133. if (mode & SPI_LSB_FIRST)
  134. ctrl |= SC18IS602_MODE_LSB_FIRST;
  135. /* Find the closest clock speed */
  136. if (hz >= hw->freq / 4) {
  137. ctrl |= SC18IS602_MODE_CLOCK_DIV_4;
  138. hw->speed = hw->freq / 4;
  139. } else if (hz >= hw->freq / 16) {
  140. ctrl |= SC18IS602_MODE_CLOCK_DIV_16;
  141. hw->speed = hw->freq / 16;
  142. } else if (hz >= hw->freq / 64) {
  143. ctrl |= SC18IS602_MODE_CLOCK_DIV_64;
  144. hw->speed = hw->freq / 64;
  145. } else {
  146. ctrl |= SC18IS602_MODE_CLOCK_DIV_128;
  147. hw->speed = hw->freq / 128;
  148. }
  149. /*
  150. * Don't do anything if the control value did not change. The initial
  151. * value of 0xff for hw->ctrl ensures that the correct mode will be set
  152. * with the first call to this function.
  153. */
  154. if (ctrl == hw->ctrl)
  155. return 0;
  156. ret = i2c_smbus_write_byte_data(hw->client, 0xf0, ctrl);
  157. if (ret < 0)
  158. return ret;
  159. hw->ctrl = ctrl;
  160. return 0;
  161. }
  162. static int sc18is602_check_transfer(struct spi_device *spi,
  163. struct spi_transfer *t, int tlen)
  164. {
  165. int bpw;
  166. uint32_t hz;
  167. if (t && t->len + tlen > SC18IS602_BUFSIZ)
  168. return -EINVAL;
  169. bpw = spi->bits_per_word;
  170. if (t && t->bits_per_word)
  171. bpw = t->bits_per_word;
  172. if (bpw != 8)
  173. return -EINVAL;
  174. hz = spi->max_speed_hz;
  175. if (t && t->speed_hz)
  176. hz = t->speed_hz;
  177. if (hz == 0)
  178. return -EINVAL;
  179. return 0;
  180. }
  181. static int sc18is602_transfer_one(struct spi_master *master,
  182. struct spi_message *m)
  183. {
  184. struct sc18is602 *hw = spi_master_get_devdata(master);
  185. struct spi_device *spi = m->spi;
  186. struct spi_transfer *t;
  187. int status = 0;
  188. /* SC18IS602 does not support CS2 */
  189. if (hw->id == sc18is602 && spi->chip_select == 2) {
  190. status = -ENXIO;
  191. goto error;
  192. }
  193. hw->tlen = 0;
  194. list_for_each_entry(t, &m->transfers, transfer_list) {
  195. u32 hz = t->speed_hz ? : spi->max_speed_hz;
  196. bool do_transfer;
  197. status = sc18is602_check_transfer(spi, t, hw->tlen);
  198. if (status < 0)
  199. break;
  200. status = sc18is602_setup_transfer(hw, hz, spi->mode);
  201. if (status < 0)
  202. break;
  203. do_transfer = t->cs_change || list_is_last(&t->transfer_list,
  204. &m->transfers);
  205. if (t->len) {
  206. status = sc18is602_txrx(hw, m, t, do_transfer);
  207. if (status < 0)
  208. break;
  209. m->actual_length += status;
  210. }
  211. status = 0;
  212. if (t->delay_usecs)
  213. udelay(t->delay_usecs);
  214. }
  215. error:
  216. m->status = status;
  217. spi_finalize_current_message(master);
  218. return status;
  219. }
  220. static int sc18is602_setup(struct spi_device *spi)
  221. {
  222. if (!spi->bits_per_word)
  223. spi->bits_per_word = 8;
  224. if (spi->mode & ~(SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST))
  225. return -EINVAL;
  226. return sc18is602_check_transfer(spi, NULL, 0);
  227. }
  228. static int sc18is602_probe(struct i2c_client *client,
  229. const struct i2c_device_id *id)
  230. {
  231. struct device *dev = &client->dev;
  232. struct device_node *np = dev->of_node;
  233. struct sc18is602_platform_data *pdata = dev_get_platdata(dev);
  234. struct sc18is602 *hw;
  235. struct spi_master *master;
  236. int error;
  237. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
  238. I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  239. return -EINVAL;
  240. master = spi_alloc_master(dev, sizeof(struct sc18is602));
  241. if (!master)
  242. return -ENOMEM;
  243. hw = spi_master_get_devdata(master);
  244. i2c_set_clientdata(client, hw);
  245. hw->master = master;
  246. hw->client = client;
  247. hw->dev = dev;
  248. hw->ctrl = 0xff;
  249. hw->id = id->driver_data;
  250. switch (hw->id) {
  251. case sc18is602:
  252. case sc18is602b:
  253. master->num_chipselect = 4;
  254. hw->freq = SC18IS602_CLOCK;
  255. break;
  256. case sc18is603:
  257. master->num_chipselect = 2;
  258. if (pdata) {
  259. hw->freq = pdata->clock_frequency;
  260. } else {
  261. const __be32 *val;
  262. int len;
  263. val = of_get_property(np, "clock-frequency", &len);
  264. if (val && len >= sizeof(__be32))
  265. hw->freq = be32_to_cpup(val);
  266. }
  267. if (!hw->freq)
  268. hw->freq = SC18IS602_CLOCK;
  269. break;
  270. }
  271. master->bus_num = client->adapter->nr;
  272. master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST;
  273. master->setup = sc18is602_setup;
  274. master->transfer_one_message = sc18is602_transfer_one;
  275. master->dev.of_node = np;
  276. error = spi_register_master(master);
  277. if (error)
  278. goto error_reg;
  279. return 0;
  280. error_reg:
  281. spi_master_put(master);
  282. return error;
  283. }
  284. static int sc18is602_remove(struct i2c_client *client)
  285. {
  286. struct sc18is602 *hw = i2c_get_clientdata(client);
  287. struct spi_master *master = hw->master;
  288. spi_unregister_master(master);
  289. return 0;
  290. }
  291. static const struct i2c_device_id sc18is602_id[] = {
  292. { "sc18is602", sc18is602 },
  293. { "sc18is602b", sc18is602b },
  294. { "sc18is603", sc18is603 },
  295. { }
  296. };
  297. MODULE_DEVICE_TABLE(i2c, sc18is602_id);
  298. static struct i2c_driver sc18is602_driver = {
  299. .driver = {
  300. .name = "sc18is602",
  301. },
  302. .probe = sc18is602_probe,
  303. .remove = sc18is602_remove,
  304. .id_table = sc18is602_id,
  305. };
  306. module_i2c_driver(sc18is602_driver);
  307. MODULE_DESCRIPTION("SC18IC602/603 SPI Master Driver");
  308. MODULE_AUTHOR("Guenter Roeck");
  309. MODULE_LICENSE("GPL");