mpt2sas_base.c 132 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2012 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/errno.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/types.h>
  48. #include <linux/pci.h>
  49. #include <linux/kdev_t.h>
  50. #include <linux/blkdev.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/sort.h>
  55. #include <linux/io.h>
  56. #include <linux/time.h>
  57. #include <linux/kthread.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. #define MAX_HBA_QUEUE_DEPTH 30000
  63. #define MAX_CHAIN_DEPTH 100000
  64. static int max_queue_depth = -1;
  65. module_param(max_queue_depth, int, 0);
  66. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  67. static int max_sgl_entries = -1;
  68. module_param(max_sgl_entries, int, 0);
  69. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  70. static int msix_disable = -1;
  71. module_param(msix_disable, int, 0);
  72. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  73. static int missing_delay[2] = {-1, -1};
  74. module_param_array(missing_delay, int, NULL, 0);
  75. MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
  76. static int mpt2sas_fwfault_debug;
  77. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  78. "and halt firmware - (default=0)");
  79. static int disable_discovery = -1;
  80. module_param(disable_discovery, int, 0);
  81. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  82. /**
  83. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  84. *
  85. */
  86. static int
  87. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  88. {
  89. int ret = param_set_int(val, kp);
  90. struct MPT2SAS_ADAPTER *ioc;
  91. if (ret)
  92. return ret;
  93. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  94. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  95. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  96. return 0;
  97. }
  98. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  99. param_get_int, &mpt2sas_fwfault_debug, 0644);
  100. /**
  101. * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
  102. * @arg: input argument, used to derive ioc
  103. *
  104. * Return 0 if controller is removed from pci subsystem.
  105. * Return -1 for other case.
  106. */
  107. static int mpt2sas_remove_dead_ioc_func(void *arg)
  108. {
  109. struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
  110. struct pci_dev *pdev;
  111. if ((ioc == NULL))
  112. return -1;
  113. pdev = ioc->pdev;
  114. if ((pdev == NULL))
  115. return -1;
  116. pci_stop_and_remove_bus_device(pdev);
  117. return 0;
  118. }
  119. /**
  120. * _base_fault_reset_work - workq handling ioc fault conditions
  121. * @work: input argument, used to derive ioc
  122. * Context: sleep.
  123. *
  124. * Return nothing.
  125. */
  126. static void
  127. _base_fault_reset_work(struct work_struct *work)
  128. {
  129. struct MPT2SAS_ADAPTER *ioc =
  130. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  131. unsigned long flags;
  132. u32 doorbell;
  133. int rc;
  134. struct task_struct *p;
  135. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  136. if (ioc->shost_recovery || ioc->pci_error_recovery)
  137. goto rearm_timer;
  138. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  139. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  140. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
  141. printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
  142. ioc->name, __func__);
  143. /* It may be possible that EEH recovery can resolve some of
  144. * pci bus failure issues rather removing the dead ioc function
  145. * by considering controller is in a non-operational state. So
  146. * here priority is given to the EEH recovery. If it doesn't
  147. * not resolve this issue, mpt2sas driver will consider this
  148. * controller to non-operational state and remove the dead ioc
  149. * function.
  150. */
  151. if (ioc->non_operational_loop++ < 5) {
  152. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock,
  153. flags);
  154. goto rearm_timer;
  155. }
  156. /*
  157. * Call _scsih_flush_pending_cmds callback so that we flush all
  158. * pending commands back to OS. This call is required to aovid
  159. * deadlock at block layer. Dead IOC will fail to do diag reset,
  160. * and this call is safe since dead ioc will never return any
  161. * command back from HW.
  162. */
  163. ioc->schedule_dead_ioc_flush_running_cmds(ioc);
  164. /*
  165. * Set remove_host flag early since kernel thread will
  166. * take some time to execute.
  167. */
  168. ioc->remove_host = 1;
  169. /*Remove the Dead Host */
  170. p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
  171. "mpt2sas_dead_ioc_%d", ioc->id);
  172. if (IS_ERR(p)) {
  173. printk(MPT2SAS_ERR_FMT
  174. "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
  175. ioc->name, __func__);
  176. } else {
  177. printk(MPT2SAS_ERR_FMT
  178. "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
  179. ioc->name, __func__);
  180. }
  181. return; /* don't rearm timer */
  182. }
  183. ioc->non_operational_loop = 0;
  184. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  185. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  186. FORCE_BIG_HAMMER);
  187. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  188. __func__, (rc == 0) ? "success" : "failed");
  189. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  190. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  191. mpt2sas_base_fault_info(ioc, doorbell &
  192. MPI2_DOORBELL_DATA_MASK);
  193. }
  194. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  195. rearm_timer:
  196. if (ioc->fault_reset_work_q)
  197. queue_delayed_work(ioc->fault_reset_work_q,
  198. &ioc->fault_reset_work,
  199. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  200. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  201. }
  202. /**
  203. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  204. * @ioc: per adapter object
  205. * Context: sleep.
  206. *
  207. * Return nothing.
  208. */
  209. void
  210. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  211. {
  212. unsigned long flags;
  213. if (ioc->fault_reset_work_q)
  214. return;
  215. /* initialize fault polling */
  216. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  217. snprintf(ioc->fault_reset_work_q_name,
  218. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  219. ioc->fault_reset_work_q =
  220. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  221. if (!ioc->fault_reset_work_q) {
  222. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  223. ioc->name, __func__, __LINE__);
  224. return;
  225. }
  226. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  227. if (ioc->fault_reset_work_q)
  228. queue_delayed_work(ioc->fault_reset_work_q,
  229. &ioc->fault_reset_work,
  230. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  231. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  232. }
  233. /**
  234. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  235. * @ioc: per adapter object
  236. * Context: sleep.
  237. *
  238. * Return nothing.
  239. */
  240. void
  241. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  242. {
  243. unsigned long flags;
  244. struct workqueue_struct *wq;
  245. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  246. wq = ioc->fault_reset_work_q;
  247. ioc->fault_reset_work_q = NULL;
  248. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  249. if (wq) {
  250. if (!cancel_delayed_work(&ioc->fault_reset_work))
  251. flush_workqueue(wq);
  252. destroy_workqueue(wq);
  253. }
  254. }
  255. /**
  256. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  257. * @ioc: per adapter object
  258. * @fault_code: fault code
  259. *
  260. * Return nothing.
  261. */
  262. void
  263. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  264. {
  265. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  266. ioc->name, fault_code);
  267. }
  268. /**
  269. * mpt2sas_halt_firmware - halt's mpt controller firmware
  270. * @ioc: per adapter object
  271. *
  272. * For debugging timeout related issues. Writing 0xCOFFEE00
  273. * to the doorbell register will halt controller firmware. With
  274. * the purpose to stop both driver and firmware, the enduser can
  275. * obtain a ring buffer from controller UART.
  276. */
  277. void
  278. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  279. {
  280. u32 doorbell;
  281. if (!ioc->fwfault_debug)
  282. return;
  283. dump_stack();
  284. doorbell = readl(&ioc->chip->Doorbell);
  285. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  286. mpt2sas_base_fault_info(ioc , doorbell);
  287. else {
  288. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  289. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  290. "timeout\n", ioc->name);
  291. }
  292. panic("panic in %s\n", __func__);
  293. }
  294. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  295. /**
  296. * _base_sas_ioc_info - verbose translation of the ioc status
  297. * @ioc: per adapter object
  298. * @mpi_reply: reply mf payload returned from firmware
  299. * @request_hdr: request mf
  300. *
  301. * Return nothing.
  302. */
  303. static void
  304. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  305. MPI2RequestHeader_t *request_hdr)
  306. {
  307. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  308. MPI2_IOCSTATUS_MASK;
  309. char *desc = NULL;
  310. u16 frame_sz;
  311. char *func_str = NULL;
  312. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  313. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  314. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  315. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  316. return;
  317. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  318. return;
  319. switch (ioc_status) {
  320. /****************************************************************************
  321. * Common IOCStatus values for all replies
  322. ****************************************************************************/
  323. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  324. desc = "invalid function";
  325. break;
  326. case MPI2_IOCSTATUS_BUSY:
  327. desc = "busy";
  328. break;
  329. case MPI2_IOCSTATUS_INVALID_SGL:
  330. desc = "invalid sgl";
  331. break;
  332. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  333. desc = "internal error";
  334. break;
  335. case MPI2_IOCSTATUS_INVALID_VPID:
  336. desc = "invalid vpid";
  337. break;
  338. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  339. desc = "insufficient resources";
  340. break;
  341. case MPI2_IOCSTATUS_INVALID_FIELD:
  342. desc = "invalid field";
  343. break;
  344. case MPI2_IOCSTATUS_INVALID_STATE:
  345. desc = "invalid state";
  346. break;
  347. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  348. desc = "op state not supported";
  349. break;
  350. /****************************************************************************
  351. * Config IOCStatus values
  352. ****************************************************************************/
  353. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  354. desc = "config invalid action";
  355. break;
  356. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  357. desc = "config invalid type";
  358. break;
  359. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  360. desc = "config invalid page";
  361. break;
  362. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  363. desc = "config invalid data";
  364. break;
  365. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  366. desc = "config no defaults";
  367. break;
  368. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  369. desc = "config cant commit";
  370. break;
  371. /****************************************************************************
  372. * SCSI IO Reply
  373. ****************************************************************************/
  374. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  375. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  376. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  377. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  378. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  379. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  380. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  381. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  382. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  383. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  384. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  385. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  386. break;
  387. /****************************************************************************
  388. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  389. ****************************************************************************/
  390. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  391. desc = "eedp guard error";
  392. break;
  393. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  394. desc = "eedp ref tag error";
  395. break;
  396. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  397. desc = "eedp app tag error";
  398. break;
  399. /****************************************************************************
  400. * SCSI Target values
  401. ****************************************************************************/
  402. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  403. desc = "target invalid io index";
  404. break;
  405. case MPI2_IOCSTATUS_TARGET_ABORTED:
  406. desc = "target aborted";
  407. break;
  408. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  409. desc = "target no conn retryable";
  410. break;
  411. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  412. desc = "target no connection";
  413. break;
  414. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  415. desc = "target xfer count mismatch";
  416. break;
  417. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  418. desc = "target data offset error";
  419. break;
  420. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  421. desc = "target too much write data";
  422. break;
  423. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  424. desc = "target iu too short";
  425. break;
  426. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  427. desc = "target ack nak timeout";
  428. break;
  429. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  430. desc = "target nak received";
  431. break;
  432. /****************************************************************************
  433. * Serial Attached SCSI values
  434. ****************************************************************************/
  435. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  436. desc = "smp request failed";
  437. break;
  438. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  439. desc = "smp data overrun";
  440. break;
  441. /****************************************************************************
  442. * Diagnostic Buffer Post / Diagnostic Release values
  443. ****************************************************************************/
  444. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  445. desc = "diagnostic released";
  446. break;
  447. default:
  448. break;
  449. }
  450. if (!desc)
  451. return;
  452. switch (request_hdr->Function) {
  453. case MPI2_FUNCTION_CONFIG:
  454. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  455. func_str = "config_page";
  456. break;
  457. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  458. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  459. func_str = "task_mgmt";
  460. break;
  461. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  462. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  463. func_str = "sas_iounit_ctl";
  464. break;
  465. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  466. frame_sz = sizeof(Mpi2SepRequest_t);
  467. func_str = "enclosure";
  468. break;
  469. case MPI2_FUNCTION_IOC_INIT:
  470. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  471. func_str = "ioc_init";
  472. break;
  473. case MPI2_FUNCTION_PORT_ENABLE:
  474. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  475. func_str = "port_enable";
  476. break;
  477. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  478. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  479. func_str = "smp_passthru";
  480. break;
  481. default:
  482. frame_sz = 32;
  483. func_str = "unknown";
  484. break;
  485. }
  486. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  487. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  488. _debug_dump_mf(request_hdr, frame_sz/4);
  489. }
  490. /**
  491. * _base_display_event_data - verbose translation of firmware asyn events
  492. * @ioc: per adapter object
  493. * @mpi_reply: reply mf payload returned from firmware
  494. *
  495. * Return nothing.
  496. */
  497. static void
  498. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  499. Mpi2EventNotificationReply_t *mpi_reply)
  500. {
  501. char *desc = NULL;
  502. u16 event;
  503. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  504. return;
  505. event = le16_to_cpu(mpi_reply->Event);
  506. switch (event) {
  507. case MPI2_EVENT_LOG_DATA:
  508. desc = "Log Data";
  509. break;
  510. case MPI2_EVENT_STATE_CHANGE:
  511. desc = "Status Change";
  512. break;
  513. case MPI2_EVENT_HARD_RESET_RECEIVED:
  514. desc = "Hard Reset Received";
  515. break;
  516. case MPI2_EVENT_EVENT_CHANGE:
  517. desc = "Event Change";
  518. break;
  519. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  520. desc = "Device Status Change";
  521. break;
  522. case MPI2_EVENT_IR_OPERATION_STATUS:
  523. if (!ioc->hide_ir_msg)
  524. desc = "IR Operation Status";
  525. break;
  526. case MPI2_EVENT_SAS_DISCOVERY:
  527. {
  528. Mpi2EventDataSasDiscovery_t *event_data =
  529. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  530. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  531. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  532. "start" : "stop");
  533. if (event_data->DiscoveryStatus)
  534. printk("discovery_status(0x%08x)",
  535. le32_to_cpu(event_data->DiscoveryStatus));
  536. printk("\n");
  537. return;
  538. }
  539. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  540. desc = "SAS Broadcast Primitive";
  541. break;
  542. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  543. desc = "SAS Init Device Status Change";
  544. break;
  545. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  546. desc = "SAS Init Table Overflow";
  547. break;
  548. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  549. desc = "SAS Topology Change List";
  550. break;
  551. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  552. desc = "SAS Enclosure Device Status Change";
  553. break;
  554. case MPI2_EVENT_IR_VOLUME:
  555. if (!ioc->hide_ir_msg)
  556. desc = "IR Volume";
  557. break;
  558. case MPI2_EVENT_IR_PHYSICAL_DISK:
  559. if (!ioc->hide_ir_msg)
  560. desc = "IR Physical Disk";
  561. break;
  562. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  563. if (!ioc->hide_ir_msg)
  564. desc = "IR Configuration Change List";
  565. break;
  566. case MPI2_EVENT_LOG_ENTRY_ADDED:
  567. if (!ioc->hide_ir_msg)
  568. desc = "Log Entry Added";
  569. break;
  570. }
  571. if (!desc)
  572. return;
  573. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  574. }
  575. #endif
  576. /**
  577. * _base_sas_log_info - verbose translation of firmware log info
  578. * @ioc: per adapter object
  579. * @log_info: log info
  580. *
  581. * Return nothing.
  582. */
  583. static void
  584. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  585. {
  586. union loginfo_type {
  587. u32 loginfo;
  588. struct {
  589. u32 subcode:16;
  590. u32 code:8;
  591. u32 originator:4;
  592. u32 bus_type:4;
  593. } dw;
  594. };
  595. union loginfo_type sas_loginfo;
  596. char *originator_str = NULL;
  597. sas_loginfo.loginfo = log_info;
  598. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  599. return;
  600. /* each nexus loss loginfo */
  601. if (log_info == 0x31170000)
  602. return;
  603. /* eat the loginfos associated with task aborts */
  604. if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
  605. 0x31140000 || log_info == 0x31130000))
  606. return;
  607. switch (sas_loginfo.dw.originator) {
  608. case 0:
  609. originator_str = "IOP";
  610. break;
  611. case 1:
  612. originator_str = "PL";
  613. break;
  614. case 2:
  615. if (!ioc->hide_ir_msg)
  616. originator_str = "IR";
  617. else
  618. originator_str = "WarpDrive";
  619. break;
  620. }
  621. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  622. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  623. originator_str, sas_loginfo.dw.code,
  624. sas_loginfo.dw.subcode);
  625. }
  626. /**
  627. * _base_display_reply_info -
  628. * @ioc: per adapter object
  629. * @smid: system request message index
  630. * @msix_index: MSIX table index supplied by the OS
  631. * @reply: reply message frame(lower 32bit addr)
  632. *
  633. * Return nothing.
  634. */
  635. static void
  636. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  637. u32 reply)
  638. {
  639. MPI2DefaultReply_t *mpi_reply;
  640. u16 ioc_status;
  641. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  642. if (unlikely(!mpi_reply)) {
  643. printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n",
  644. ioc->name, __FILE__, __LINE__, __func__);
  645. return;
  646. }
  647. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  648. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  649. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  650. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  651. _base_sas_ioc_info(ioc , mpi_reply,
  652. mpt2sas_base_get_msg_frame(ioc, smid));
  653. }
  654. #endif
  655. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  656. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  657. }
  658. /**
  659. * mpt2sas_base_done - base internal command completion routine
  660. * @ioc: per adapter object
  661. * @smid: system request message index
  662. * @msix_index: MSIX table index supplied by the OS
  663. * @reply: reply message frame(lower 32bit addr)
  664. *
  665. * Return 1 meaning mf should be freed from _base_interrupt
  666. * 0 means the mf is freed from this function.
  667. */
  668. u8
  669. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  670. u32 reply)
  671. {
  672. MPI2DefaultReply_t *mpi_reply;
  673. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  674. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  675. return 1;
  676. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  677. return 1;
  678. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  679. if (mpi_reply) {
  680. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  681. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  682. }
  683. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  684. complete(&ioc->base_cmds.done);
  685. return 1;
  686. }
  687. /**
  688. * _base_async_event - main callback handler for firmware asyn events
  689. * @ioc: per adapter object
  690. * @msix_index: MSIX table index supplied by the OS
  691. * @reply: reply message frame(lower 32bit addr)
  692. *
  693. * Return 1 meaning mf should be freed from _base_interrupt
  694. * 0 means the mf is freed from this function.
  695. */
  696. static u8
  697. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  698. {
  699. Mpi2EventNotificationReply_t *mpi_reply;
  700. Mpi2EventAckRequest_t *ack_request;
  701. u16 smid;
  702. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  703. if (!mpi_reply)
  704. return 1;
  705. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  706. return 1;
  707. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  708. _base_display_event_data(ioc, mpi_reply);
  709. #endif
  710. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  711. goto out;
  712. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  713. if (!smid) {
  714. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  715. ioc->name, __func__);
  716. goto out;
  717. }
  718. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  719. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  720. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  721. ack_request->Event = mpi_reply->Event;
  722. ack_request->EventContext = mpi_reply->EventContext;
  723. ack_request->VF_ID = 0; /* TODO */
  724. ack_request->VP_ID = 0;
  725. mpt2sas_base_put_smid_default(ioc, smid);
  726. out:
  727. /* scsih callback handler */
  728. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  729. /* ctl callback handler */
  730. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  731. return 1;
  732. }
  733. /**
  734. * _base_get_cb_idx - obtain the callback index
  735. * @ioc: per adapter object
  736. * @smid: system request message index
  737. *
  738. * Return callback index.
  739. */
  740. static u8
  741. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  742. {
  743. int i;
  744. u8 cb_idx;
  745. if (smid < ioc->hi_priority_smid) {
  746. i = smid - 1;
  747. cb_idx = ioc->scsi_lookup[i].cb_idx;
  748. } else if (smid < ioc->internal_smid) {
  749. i = smid - ioc->hi_priority_smid;
  750. cb_idx = ioc->hpr_lookup[i].cb_idx;
  751. } else if (smid <= ioc->hba_queue_depth) {
  752. i = smid - ioc->internal_smid;
  753. cb_idx = ioc->internal_lookup[i].cb_idx;
  754. } else
  755. cb_idx = 0xFF;
  756. return cb_idx;
  757. }
  758. /**
  759. * _base_mask_interrupts - disable interrupts
  760. * @ioc: per adapter object
  761. *
  762. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  763. *
  764. * Return nothing.
  765. */
  766. static void
  767. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  768. {
  769. u32 him_register;
  770. ioc->mask_interrupts = 1;
  771. him_register = readl(&ioc->chip->HostInterruptMask);
  772. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  773. writel(him_register, &ioc->chip->HostInterruptMask);
  774. readl(&ioc->chip->HostInterruptMask);
  775. }
  776. /**
  777. * _base_unmask_interrupts - enable interrupts
  778. * @ioc: per adapter object
  779. *
  780. * Enabling only Reply Interrupts
  781. *
  782. * Return nothing.
  783. */
  784. static void
  785. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  786. {
  787. u32 him_register;
  788. him_register = readl(&ioc->chip->HostInterruptMask);
  789. him_register &= ~MPI2_HIM_RIM;
  790. writel(him_register, &ioc->chip->HostInterruptMask);
  791. ioc->mask_interrupts = 0;
  792. }
  793. union reply_descriptor {
  794. u64 word;
  795. struct {
  796. u32 low;
  797. u32 high;
  798. } u;
  799. };
  800. /**
  801. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  802. * @irq: irq number (not used)
  803. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  804. * @r: pt_regs pointer (not used)
  805. *
  806. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  807. */
  808. static irqreturn_t
  809. _base_interrupt(int irq, void *bus_id)
  810. {
  811. struct adapter_reply_queue *reply_q = bus_id;
  812. union reply_descriptor rd;
  813. u32 completed_cmds;
  814. u8 request_desript_type;
  815. u16 smid;
  816. u8 cb_idx;
  817. u32 reply;
  818. u8 msix_index = reply_q->msix_index;
  819. struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
  820. Mpi2ReplyDescriptorsUnion_t *rpf;
  821. u8 rc;
  822. if (ioc->mask_interrupts)
  823. return IRQ_NONE;
  824. if (!atomic_add_unless(&reply_q->busy, 1, 1))
  825. return IRQ_NONE;
  826. rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
  827. request_desript_type = rpf->Default.ReplyFlags
  828. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  829. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
  830. atomic_dec(&reply_q->busy);
  831. return IRQ_NONE;
  832. }
  833. completed_cmds = 0;
  834. cb_idx = 0xFF;
  835. do {
  836. rd.word = le64_to_cpu(rpf->Words);
  837. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  838. goto out;
  839. reply = 0;
  840. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  841. if (request_desript_type ==
  842. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  843. reply = le32_to_cpu
  844. (rpf->AddressReply.ReplyFrameAddress);
  845. if (reply > ioc->reply_dma_max_address ||
  846. reply < ioc->reply_dma_min_address)
  847. reply = 0;
  848. } else if (request_desript_type ==
  849. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  850. goto next;
  851. else if (request_desript_type ==
  852. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  853. goto next;
  854. if (smid) {
  855. cb_idx = _base_get_cb_idx(ioc, smid);
  856. if ((likely(cb_idx < MPT_MAX_CALLBACKS))
  857. && (likely(mpt_callbacks[cb_idx] != NULL))) {
  858. rc = mpt_callbacks[cb_idx](ioc, smid,
  859. msix_index, reply);
  860. if (reply)
  861. _base_display_reply_info(ioc, smid,
  862. msix_index, reply);
  863. if (rc)
  864. mpt2sas_base_free_smid(ioc, smid);
  865. }
  866. }
  867. if (!smid)
  868. _base_async_event(ioc, msix_index, reply);
  869. /* reply free queue handling */
  870. if (reply) {
  871. ioc->reply_free_host_index =
  872. (ioc->reply_free_host_index ==
  873. (ioc->reply_free_queue_depth - 1)) ?
  874. 0 : ioc->reply_free_host_index + 1;
  875. ioc->reply_free[ioc->reply_free_host_index] =
  876. cpu_to_le32(reply);
  877. wmb();
  878. writel(ioc->reply_free_host_index,
  879. &ioc->chip->ReplyFreeHostIndex);
  880. }
  881. next:
  882. rpf->Words = cpu_to_le64(ULLONG_MAX);
  883. reply_q->reply_post_host_index =
  884. (reply_q->reply_post_host_index ==
  885. (ioc->reply_post_queue_depth - 1)) ? 0 :
  886. reply_q->reply_post_host_index + 1;
  887. request_desript_type =
  888. reply_q->reply_post_free[reply_q->reply_post_host_index].
  889. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  890. completed_cmds++;
  891. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  892. goto out;
  893. if (!reply_q->reply_post_host_index)
  894. rpf = reply_q->reply_post_free;
  895. else
  896. rpf++;
  897. } while (1);
  898. out:
  899. if (!completed_cmds) {
  900. atomic_dec(&reply_q->busy);
  901. return IRQ_NONE;
  902. }
  903. wmb();
  904. if (ioc->is_warpdrive) {
  905. writel(reply_q->reply_post_host_index,
  906. ioc->reply_post_host_index[msix_index]);
  907. atomic_dec(&reply_q->busy);
  908. return IRQ_HANDLED;
  909. }
  910. writel(reply_q->reply_post_host_index | (msix_index <<
  911. MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
  912. atomic_dec(&reply_q->busy);
  913. return IRQ_HANDLED;
  914. }
  915. /**
  916. * _base_is_controller_msix_enabled - is controller support muli-reply queues
  917. * @ioc: per adapter object
  918. *
  919. */
  920. static inline int
  921. _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
  922. {
  923. return (ioc->facts.IOCCapabilities &
  924. MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
  925. }
  926. /**
  927. * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
  928. * @ioc: per adapter object
  929. * Context: ISR conext
  930. *
  931. * Called when a Task Management request has completed. We want
  932. * to flush the other reply queues so all the outstanding IO has been
  933. * completed back to OS before we process the TM completetion.
  934. *
  935. * Return nothing.
  936. */
  937. void
  938. mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  939. {
  940. struct adapter_reply_queue *reply_q;
  941. /* If MSIX capability is turned off
  942. * then multi-queues are not enabled
  943. */
  944. if (!_base_is_controller_msix_enabled(ioc))
  945. return;
  946. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  947. if (ioc->shost_recovery)
  948. return;
  949. /* TMs are on msix_index == 0 */
  950. if (reply_q->msix_index == 0)
  951. continue;
  952. _base_interrupt(reply_q->vector, (void *)reply_q);
  953. }
  954. }
  955. /**
  956. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  957. * @cb_idx: callback index
  958. *
  959. * Return nothing.
  960. */
  961. void
  962. mpt2sas_base_release_callback_handler(u8 cb_idx)
  963. {
  964. mpt_callbacks[cb_idx] = NULL;
  965. }
  966. /**
  967. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  968. * @cb_func: callback function
  969. *
  970. * Returns cb_func.
  971. */
  972. u8
  973. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  974. {
  975. u8 cb_idx;
  976. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  977. if (mpt_callbacks[cb_idx] == NULL)
  978. break;
  979. mpt_callbacks[cb_idx] = cb_func;
  980. return cb_idx;
  981. }
  982. /**
  983. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  984. *
  985. * Return nothing.
  986. */
  987. void
  988. mpt2sas_base_initialize_callback_handler(void)
  989. {
  990. u8 cb_idx;
  991. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  992. mpt2sas_base_release_callback_handler(cb_idx);
  993. }
  994. /**
  995. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  996. * @ioc: per adapter object
  997. * @paddr: virtual address for SGE
  998. *
  999. * Create a zero length scatter gather entry to insure the IOCs hardware has
  1000. * something to use if the target device goes brain dead and tries
  1001. * to send data even when none is asked for.
  1002. *
  1003. * Return nothing.
  1004. */
  1005. void
  1006. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  1007. {
  1008. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  1009. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  1010. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  1011. MPI2_SGE_FLAGS_SHIFT);
  1012. ioc->base_add_sg_single(paddr, flags_length, -1);
  1013. }
  1014. /**
  1015. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  1016. * @paddr: virtual address for SGE
  1017. * @flags_length: SGE flags and data transfer length
  1018. * @dma_addr: Physical address
  1019. *
  1020. * Return nothing.
  1021. */
  1022. static void
  1023. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1024. {
  1025. Mpi2SGESimple32_t *sgel = paddr;
  1026. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  1027. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1028. sgel->FlagsLength = cpu_to_le32(flags_length);
  1029. sgel->Address = cpu_to_le32(dma_addr);
  1030. }
  1031. /**
  1032. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  1033. * @paddr: virtual address for SGE
  1034. * @flags_length: SGE flags and data transfer length
  1035. * @dma_addr: Physical address
  1036. *
  1037. * Return nothing.
  1038. */
  1039. static void
  1040. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1041. {
  1042. Mpi2SGESimple64_t *sgel = paddr;
  1043. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  1044. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1045. sgel->FlagsLength = cpu_to_le32(flags_length);
  1046. sgel->Address = cpu_to_le64(dma_addr);
  1047. }
  1048. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  1049. /**
  1050. * _base_config_dma_addressing - set dma addressing
  1051. * @ioc: per adapter object
  1052. * @pdev: PCI device struct
  1053. *
  1054. * Returns 0 for success, non-zero for failure.
  1055. */
  1056. static int
  1057. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  1058. {
  1059. struct sysinfo s;
  1060. char *desc = NULL;
  1061. if (sizeof(dma_addr_t) > 4) {
  1062. const uint64_t required_mask =
  1063. dma_get_required_mask(&pdev->dev);
  1064. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  1065. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  1066. DMA_BIT_MASK(64))) {
  1067. ioc->base_add_sg_single = &_base_add_sg_single_64;
  1068. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  1069. desc = "64";
  1070. goto out;
  1071. }
  1072. }
  1073. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  1074. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  1075. ioc->base_add_sg_single = &_base_add_sg_single_32;
  1076. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  1077. desc = "32";
  1078. } else
  1079. return -ENODEV;
  1080. out:
  1081. si_meminfo(&s);
  1082. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  1083. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  1084. return 0;
  1085. }
  1086. /**
  1087. * _base_check_enable_msix - checks MSIX capabable.
  1088. * @ioc: per adapter object
  1089. *
  1090. * Check to see if card is capable of MSIX, and set number
  1091. * of available msix vectors
  1092. */
  1093. static int
  1094. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1095. {
  1096. int base;
  1097. u16 message_control;
  1098. /* Check whether controller SAS2008 B0 controller,
  1099. if it is SAS2008 B0 controller use IO-APIC instead of MSIX */
  1100. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
  1101. ioc->pdev->revision == 0x01) {
  1102. return -EINVAL;
  1103. }
  1104. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1105. if (!base) {
  1106. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1107. "supported\n", ioc->name));
  1108. return -EINVAL;
  1109. }
  1110. /* get msix vector count */
  1111. /* NUMA_IO not supported for older controllers */
  1112. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
  1113. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
  1114. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
  1115. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
  1116. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
  1117. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
  1118. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
  1119. ioc->msix_vector_count = 1;
  1120. else {
  1121. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1122. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1123. }
  1124. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1125. "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
  1126. return 0;
  1127. }
  1128. /**
  1129. * _base_free_irq - free irq
  1130. * @ioc: per adapter object
  1131. *
  1132. * Freeing respective reply_queue from the list.
  1133. */
  1134. static void
  1135. _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
  1136. {
  1137. struct adapter_reply_queue *reply_q, *next;
  1138. if (list_empty(&ioc->reply_queue_list))
  1139. return;
  1140. list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
  1141. list_del(&reply_q->list);
  1142. synchronize_irq(reply_q->vector);
  1143. free_irq(reply_q->vector, reply_q);
  1144. kfree(reply_q);
  1145. }
  1146. }
  1147. /**
  1148. * _base_request_irq - request irq
  1149. * @ioc: per adapter object
  1150. * @index: msix index into vector table
  1151. * @vector: irq vector
  1152. *
  1153. * Inserting respective reply_queue into the list.
  1154. */
  1155. static int
  1156. _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
  1157. {
  1158. struct adapter_reply_queue *reply_q;
  1159. int r;
  1160. reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
  1161. if (!reply_q) {
  1162. printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
  1163. ioc->name, (int)sizeof(struct adapter_reply_queue));
  1164. return -ENOMEM;
  1165. }
  1166. reply_q->ioc = ioc;
  1167. reply_q->msix_index = index;
  1168. reply_q->vector = vector;
  1169. atomic_set(&reply_q->busy, 0);
  1170. if (ioc->msix_enable)
  1171. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
  1172. MPT2SAS_DRIVER_NAME, ioc->id, index);
  1173. else
  1174. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
  1175. MPT2SAS_DRIVER_NAME, ioc->id);
  1176. r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
  1177. reply_q);
  1178. if (r) {
  1179. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1180. reply_q->name, vector);
  1181. kfree(reply_q);
  1182. return -EBUSY;
  1183. }
  1184. INIT_LIST_HEAD(&reply_q->list);
  1185. list_add_tail(&reply_q->list, &ioc->reply_queue_list);
  1186. return 0;
  1187. }
  1188. /**
  1189. * _base_assign_reply_queues - assigning msix index for each cpu
  1190. * @ioc: per adapter object
  1191. *
  1192. * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
  1193. *
  1194. * It would nice if we could call irq_set_affinity, however it is not
  1195. * an exported symbol
  1196. */
  1197. static void
  1198. _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  1199. {
  1200. struct adapter_reply_queue *reply_q;
  1201. int cpu_id;
  1202. int cpu_grouping, loop, grouping, grouping_mod;
  1203. if (!_base_is_controller_msix_enabled(ioc))
  1204. return;
  1205. memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
  1206. /* when there are more cpus than available msix vectors,
  1207. * then group cpus togeather on same irq
  1208. */
  1209. if (ioc->cpu_count > ioc->msix_vector_count) {
  1210. grouping = ioc->cpu_count / ioc->msix_vector_count;
  1211. grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
  1212. if (grouping < 2 || (grouping == 2 && !grouping_mod))
  1213. cpu_grouping = 2;
  1214. else if (grouping < 4 || (grouping == 4 && !grouping_mod))
  1215. cpu_grouping = 4;
  1216. else if (grouping < 8 || (grouping == 8 && !grouping_mod))
  1217. cpu_grouping = 8;
  1218. else
  1219. cpu_grouping = 16;
  1220. } else
  1221. cpu_grouping = 0;
  1222. loop = 0;
  1223. reply_q = list_entry(ioc->reply_queue_list.next,
  1224. struct adapter_reply_queue, list);
  1225. for_each_online_cpu(cpu_id) {
  1226. if (!cpu_grouping) {
  1227. ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
  1228. reply_q = list_entry(reply_q->list.next,
  1229. struct adapter_reply_queue, list);
  1230. } else {
  1231. if (loop < cpu_grouping) {
  1232. ioc->cpu_msix_table[cpu_id] =
  1233. reply_q->msix_index;
  1234. loop++;
  1235. } else {
  1236. reply_q = list_entry(reply_q->list.next,
  1237. struct adapter_reply_queue, list);
  1238. ioc->cpu_msix_table[cpu_id] =
  1239. reply_q->msix_index;
  1240. loop = 1;
  1241. }
  1242. }
  1243. }
  1244. }
  1245. /**
  1246. * _base_disable_msix - disables msix
  1247. * @ioc: per adapter object
  1248. *
  1249. */
  1250. static void
  1251. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1252. {
  1253. if (ioc->msix_enable) {
  1254. pci_disable_msix(ioc->pdev);
  1255. ioc->msix_enable = 0;
  1256. }
  1257. }
  1258. /**
  1259. * _base_enable_msix - enables msix, failback to io_apic
  1260. * @ioc: per adapter object
  1261. *
  1262. */
  1263. static int
  1264. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1265. {
  1266. struct msix_entry *entries, *a;
  1267. int r;
  1268. int i;
  1269. u8 try_msix = 0;
  1270. INIT_LIST_HEAD(&ioc->reply_queue_list);
  1271. if (msix_disable == -1 || msix_disable == 0)
  1272. try_msix = 1;
  1273. if (!try_msix)
  1274. goto try_ioapic;
  1275. if (_base_check_enable_msix(ioc) != 0)
  1276. goto try_ioapic;
  1277. ioc->reply_queue_count = min_t(int, ioc->cpu_count,
  1278. ioc->msix_vector_count);
  1279. entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
  1280. GFP_KERNEL);
  1281. if (!entries) {
  1282. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
  1283. "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
  1284. __LINE__, __func__));
  1285. goto try_ioapic;
  1286. }
  1287. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
  1288. a->entry = i;
  1289. r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
  1290. if (r) {
  1291. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1292. "failed (r=%d) !!!\n", ioc->name, r));
  1293. kfree(entries);
  1294. goto try_ioapic;
  1295. }
  1296. ioc->msix_enable = 1;
  1297. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
  1298. r = _base_request_irq(ioc, i, a->vector);
  1299. if (r) {
  1300. _base_free_irq(ioc);
  1301. _base_disable_msix(ioc);
  1302. kfree(entries);
  1303. goto try_ioapic;
  1304. }
  1305. }
  1306. kfree(entries);
  1307. return 0;
  1308. /* failback to io_apic interrupt routing */
  1309. try_ioapic:
  1310. r = _base_request_irq(ioc, 0, ioc->pdev->irq);
  1311. return r;
  1312. }
  1313. /**
  1314. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1315. * @ioc: per adapter object
  1316. *
  1317. * Returns 0 for success, non-zero for failure.
  1318. */
  1319. int
  1320. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1321. {
  1322. struct pci_dev *pdev = ioc->pdev;
  1323. u32 memap_sz;
  1324. u32 pio_sz;
  1325. int i, r = 0;
  1326. u64 pio_chip = 0;
  1327. u64 chip_phys = 0;
  1328. struct adapter_reply_queue *reply_q;
  1329. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1330. ioc->name, __func__));
  1331. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1332. if (pci_enable_device_mem(pdev)) {
  1333. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1334. "failed\n", ioc->name);
  1335. return -ENODEV;
  1336. }
  1337. if (pci_request_selected_regions(pdev, ioc->bars,
  1338. MPT2SAS_DRIVER_NAME)) {
  1339. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1340. "failed\n", ioc->name);
  1341. r = -ENODEV;
  1342. goto out_fail;
  1343. }
  1344. /* AER (Advanced Error Reporting) hooks */
  1345. pci_enable_pcie_error_reporting(pdev);
  1346. pci_set_master(pdev);
  1347. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1348. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1349. ioc->name, pci_name(pdev));
  1350. r = -ENODEV;
  1351. goto out_fail;
  1352. }
  1353. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1354. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1355. if (pio_sz)
  1356. continue;
  1357. pio_chip = (u64)pci_resource_start(pdev, i);
  1358. pio_sz = pci_resource_len(pdev, i);
  1359. } else {
  1360. if (memap_sz)
  1361. continue;
  1362. /* verify memory resource is valid before using */
  1363. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1364. ioc->chip_phys = pci_resource_start(pdev, i);
  1365. chip_phys = (u64)ioc->chip_phys;
  1366. memap_sz = pci_resource_len(pdev, i);
  1367. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1368. if (ioc->chip == NULL) {
  1369. printk(MPT2SAS_ERR_FMT "unable to map "
  1370. "adapter memory!\n", ioc->name);
  1371. r = -EINVAL;
  1372. goto out_fail;
  1373. }
  1374. }
  1375. }
  1376. }
  1377. _base_mask_interrupts(ioc);
  1378. r = _base_enable_msix(ioc);
  1379. if (r)
  1380. goto out_fail;
  1381. list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
  1382. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1383. reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1384. "IO-APIC enabled"), reply_q->vector);
  1385. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1386. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1387. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1388. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1389. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1390. pci_save_state(pdev);
  1391. return 0;
  1392. out_fail:
  1393. if (ioc->chip_phys)
  1394. iounmap(ioc->chip);
  1395. ioc->chip_phys = 0;
  1396. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1397. pci_disable_pcie_error_reporting(pdev);
  1398. pci_disable_device(pdev);
  1399. return r;
  1400. }
  1401. /**
  1402. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1403. * @ioc: per adapter object
  1404. * @smid: system request message index(smid zero is invalid)
  1405. *
  1406. * Returns virt pointer to message frame.
  1407. */
  1408. void *
  1409. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1410. {
  1411. return (void *)(ioc->request + (smid * ioc->request_sz));
  1412. }
  1413. /**
  1414. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1415. * @ioc: per adapter object
  1416. * @smid: system request message index
  1417. *
  1418. * Returns virt pointer to sense buffer.
  1419. */
  1420. void *
  1421. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1422. {
  1423. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1424. }
  1425. /**
  1426. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1427. * @ioc: per adapter object
  1428. * @smid: system request message index
  1429. *
  1430. * Returns phys pointer to the low 32bit address of the sense buffer.
  1431. */
  1432. __le32
  1433. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1434. {
  1435. return cpu_to_le32(ioc->sense_dma +
  1436. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1437. }
  1438. /**
  1439. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1440. * @ioc: per adapter object
  1441. * @phys_addr: lower 32 physical addr of the reply
  1442. *
  1443. * Converts 32bit lower physical addr into a virt address.
  1444. */
  1445. void *
  1446. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1447. {
  1448. if (!phys_addr)
  1449. return NULL;
  1450. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1451. }
  1452. /**
  1453. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1454. * @ioc: per adapter object
  1455. * @cb_idx: callback index
  1456. *
  1457. * Returns smid (zero is invalid)
  1458. */
  1459. u16
  1460. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1461. {
  1462. unsigned long flags;
  1463. struct request_tracker *request;
  1464. u16 smid;
  1465. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1466. if (list_empty(&ioc->internal_free_list)) {
  1467. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1468. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1469. ioc->name, __func__);
  1470. return 0;
  1471. }
  1472. request = list_entry(ioc->internal_free_list.next,
  1473. struct request_tracker, tracker_list);
  1474. request->cb_idx = cb_idx;
  1475. smid = request->smid;
  1476. list_del(&request->tracker_list);
  1477. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1478. return smid;
  1479. }
  1480. /**
  1481. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1482. * @ioc: per adapter object
  1483. * @cb_idx: callback index
  1484. * @scmd: pointer to scsi command object
  1485. *
  1486. * Returns smid (zero is invalid)
  1487. */
  1488. u16
  1489. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1490. struct scsi_cmnd *scmd)
  1491. {
  1492. unsigned long flags;
  1493. struct scsiio_tracker *request;
  1494. u16 smid;
  1495. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1496. if (list_empty(&ioc->free_list)) {
  1497. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1498. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1499. ioc->name, __func__);
  1500. return 0;
  1501. }
  1502. request = list_entry(ioc->free_list.next,
  1503. struct scsiio_tracker, tracker_list);
  1504. request->scmd = scmd;
  1505. request->cb_idx = cb_idx;
  1506. smid = request->smid;
  1507. list_del(&request->tracker_list);
  1508. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1509. return smid;
  1510. }
  1511. /**
  1512. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1513. * @ioc: per adapter object
  1514. * @cb_idx: callback index
  1515. *
  1516. * Returns smid (zero is invalid)
  1517. */
  1518. u16
  1519. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1520. {
  1521. unsigned long flags;
  1522. struct request_tracker *request;
  1523. u16 smid;
  1524. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1525. if (list_empty(&ioc->hpr_free_list)) {
  1526. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1527. return 0;
  1528. }
  1529. request = list_entry(ioc->hpr_free_list.next,
  1530. struct request_tracker, tracker_list);
  1531. request->cb_idx = cb_idx;
  1532. smid = request->smid;
  1533. list_del(&request->tracker_list);
  1534. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1535. return smid;
  1536. }
  1537. /**
  1538. * mpt2sas_base_free_smid - put smid back on free_list
  1539. * @ioc: per adapter object
  1540. * @smid: system request message index
  1541. *
  1542. * Return nothing.
  1543. */
  1544. void
  1545. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1546. {
  1547. unsigned long flags;
  1548. int i;
  1549. struct chain_tracker *chain_req, *next;
  1550. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1551. if (smid < ioc->hi_priority_smid) {
  1552. /* scsiio queue */
  1553. i = smid - 1;
  1554. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1555. list_for_each_entry_safe(chain_req, next,
  1556. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1557. list_del_init(&chain_req->tracker_list);
  1558. list_add_tail(&chain_req->tracker_list,
  1559. &ioc->free_chain_list);
  1560. }
  1561. }
  1562. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1563. ioc->scsi_lookup[i].scmd = NULL;
  1564. ioc->scsi_lookup[i].direct_io = 0;
  1565. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1566. &ioc->free_list);
  1567. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1568. /*
  1569. * See _wait_for_commands_to_complete() call with regards
  1570. * to this code.
  1571. */
  1572. if (ioc->shost_recovery && ioc->pending_io_count) {
  1573. if (ioc->pending_io_count == 1)
  1574. wake_up(&ioc->reset_wq);
  1575. ioc->pending_io_count--;
  1576. }
  1577. return;
  1578. } else if (smid < ioc->internal_smid) {
  1579. /* hi-priority */
  1580. i = smid - ioc->hi_priority_smid;
  1581. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1582. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1583. &ioc->hpr_free_list);
  1584. } else if (smid <= ioc->hba_queue_depth) {
  1585. /* internal queue */
  1586. i = smid - ioc->internal_smid;
  1587. ioc->internal_lookup[i].cb_idx = 0xFF;
  1588. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1589. &ioc->internal_free_list);
  1590. }
  1591. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1592. }
  1593. /**
  1594. * _base_writeq - 64 bit write to MMIO
  1595. * @ioc: per adapter object
  1596. * @b: data payload
  1597. * @addr: address in MMIO space
  1598. * @writeq_lock: spin lock
  1599. *
  1600. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1601. * care of 32 bit environment where its not quarenteed to send the entire word
  1602. * in one transfer.
  1603. */
  1604. #ifndef writeq
  1605. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1606. spinlock_t *writeq_lock)
  1607. {
  1608. unsigned long flags;
  1609. __u64 data_out = cpu_to_le64(b);
  1610. spin_lock_irqsave(writeq_lock, flags);
  1611. writel((u32)(data_out), addr);
  1612. writel((u32)(data_out >> 32), (addr + 4));
  1613. spin_unlock_irqrestore(writeq_lock, flags);
  1614. }
  1615. #else
  1616. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1617. spinlock_t *writeq_lock)
  1618. {
  1619. writeq(cpu_to_le64(b), addr);
  1620. }
  1621. #endif
  1622. static inline u8
  1623. _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
  1624. {
  1625. return ioc->cpu_msix_table[raw_smp_processor_id()];
  1626. }
  1627. /**
  1628. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1629. * @ioc: per adapter object
  1630. * @smid: system request message index
  1631. * @handle: device handle
  1632. *
  1633. * Return nothing.
  1634. */
  1635. void
  1636. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1637. {
  1638. Mpi2RequestDescriptorUnion_t descriptor;
  1639. u64 *request = (u64 *)&descriptor;
  1640. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1641. descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
  1642. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1643. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1644. descriptor.SCSIIO.LMID = 0;
  1645. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1646. &ioc->scsi_lookup_lock);
  1647. }
  1648. /**
  1649. * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
  1650. * @ioc: per adapter object
  1651. * @smid: system request message index
  1652. *
  1653. * Return nothing.
  1654. */
  1655. void
  1656. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1657. {
  1658. Mpi2RequestDescriptorUnion_t descriptor;
  1659. u64 *request = (u64 *)&descriptor;
  1660. descriptor.HighPriority.RequestFlags =
  1661. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1662. descriptor.HighPriority.MSIxIndex = 0;
  1663. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1664. descriptor.HighPriority.LMID = 0;
  1665. descriptor.HighPriority.Reserved1 = 0;
  1666. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1667. &ioc->scsi_lookup_lock);
  1668. }
  1669. /**
  1670. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1671. * @ioc: per adapter object
  1672. * @smid: system request message index
  1673. *
  1674. * Return nothing.
  1675. */
  1676. void
  1677. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1678. {
  1679. Mpi2RequestDescriptorUnion_t descriptor;
  1680. u64 *request = (u64 *)&descriptor;
  1681. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1682. descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
  1683. descriptor.Default.SMID = cpu_to_le16(smid);
  1684. descriptor.Default.LMID = 0;
  1685. descriptor.Default.DescriptorTypeDependent = 0;
  1686. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1687. &ioc->scsi_lookup_lock);
  1688. }
  1689. /**
  1690. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1691. * @ioc: per adapter object
  1692. * @smid: system request message index
  1693. * @io_index: value used to track the IO
  1694. *
  1695. * Return nothing.
  1696. */
  1697. void
  1698. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1699. u16 io_index)
  1700. {
  1701. Mpi2RequestDescriptorUnion_t descriptor;
  1702. u64 *request = (u64 *)&descriptor;
  1703. descriptor.SCSITarget.RequestFlags =
  1704. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1705. descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
  1706. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1707. descriptor.SCSITarget.LMID = 0;
  1708. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1709. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1710. &ioc->scsi_lookup_lock);
  1711. }
  1712. /**
  1713. * _base_display_dell_branding - Disply branding string
  1714. * @ioc: per adapter object
  1715. *
  1716. * Return nothing.
  1717. */
  1718. static void
  1719. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1720. {
  1721. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1722. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1723. return;
  1724. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1725. switch (ioc->pdev->subsystem_device) {
  1726. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1727. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1728. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1729. break;
  1730. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1731. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1732. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1733. break;
  1734. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1735. strncpy(dell_branding,
  1736. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1737. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1738. break;
  1739. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1740. strncpy(dell_branding,
  1741. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1742. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1743. break;
  1744. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1745. strncpy(dell_branding,
  1746. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1747. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1748. break;
  1749. case MPT2SAS_DELL_PERC_H200_SSDID:
  1750. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1751. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1752. break;
  1753. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1754. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1755. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1756. break;
  1757. default:
  1758. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1759. break;
  1760. }
  1761. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1762. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1763. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1764. ioc->pdev->subsystem_device);
  1765. }
  1766. /**
  1767. * _base_display_intel_branding - Display branding string
  1768. * @ioc: per adapter object
  1769. *
  1770. * Return nothing.
  1771. */
  1772. static void
  1773. _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
  1774. {
  1775. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
  1776. return;
  1777. switch (ioc->pdev->device) {
  1778. case MPI2_MFGPAGE_DEVID_SAS2008:
  1779. switch (ioc->pdev->subsystem_device) {
  1780. case MPT2SAS_INTEL_RMS2LL080_SSDID:
  1781. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1782. MPT2SAS_INTEL_RMS2LL080_BRANDING);
  1783. break;
  1784. case MPT2SAS_INTEL_RMS2LL040_SSDID:
  1785. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1786. MPT2SAS_INTEL_RMS2LL040_BRANDING);
  1787. break;
  1788. case MPT2SAS_INTEL_SSD910_SSDID:
  1789. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1790. MPT2SAS_INTEL_SSD910_BRANDING);
  1791. break;
  1792. default:
  1793. break;
  1794. }
  1795. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1796. switch (ioc->pdev->subsystem_device) {
  1797. case MPT2SAS_INTEL_RS25GB008_SSDID:
  1798. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1799. MPT2SAS_INTEL_RS25GB008_BRANDING);
  1800. break;
  1801. case MPT2SAS_INTEL_RMS25JB080_SSDID:
  1802. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1803. MPT2SAS_INTEL_RMS25JB080_BRANDING);
  1804. break;
  1805. case MPT2SAS_INTEL_RMS25JB040_SSDID:
  1806. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1807. MPT2SAS_INTEL_RMS25JB040_BRANDING);
  1808. break;
  1809. case MPT2SAS_INTEL_RMS25KB080_SSDID:
  1810. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1811. MPT2SAS_INTEL_RMS25KB080_BRANDING);
  1812. break;
  1813. case MPT2SAS_INTEL_RMS25KB040_SSDID:
  1814. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1815. MPT2SAS_INTEL_RMS25KB040_BRANDING);
  1816. break;
  1817. case MPT2SAS_INTEL_RMS25LB040_SSDID:
  1818. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1819. MPT2SAS_INTEL_RMS25LB040_BRANDING);
  1820. break;
  1821. case MPT2SAS_INTEL_RMS25LB080_SSDID:
  1822. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1823. MPT2SAS_INTEL_RMS25LB080_BRANDING);
  1824. break;
  1825. default:
  1826. break;
  1827. }
  1828. default:
  1829. break;
  1830. }
  1831. }
  1832. /**
  1833. * _base_display_hp_branding - Display branding string
  1834. * @ioc: per adapter object
  1835. *
  1836. * Return nothing.
  1837. */
  1838. static void
  1839. _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
  1840. {
  1841. if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
  1842. return;
  1843. switch (ioc->pdev->device) {
  1844. case MPI2_MFGPAGE_DEVID_SAS2004:
  1845. switch (ioc->pdev->subsystem_device) {
  1846. case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
  1847. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1848. MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
  1849. break;
  1850. default:
  1851. break;
  1852. }
  1853. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1854. switch (ioc->pdev->subsystem_device) {
  1855. case MPT2SAS_HP_2_4_INTERNAL_SSDID:
  1856. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1857. MPT2SAS_HP_2_4_INTERNAL_BRANDING);
  1858. break;
  1859. case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
  1860. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1861. MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
  1862. break;
  1863. case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
  1864. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1865. MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
  1866. break;
  1867. case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
  1868. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1869. MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
  1870. break;
  1871. default:
  1872. break;
  1873. }
  1874. default:
  1875. break;
  1876. }
  1877. }
  1878. /**
  1879. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1880. * @ioc: per adapter object
  1881. *
  1882. * Return nothing.
  1883. */
  1884. static void
  1885. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1886. {
  1887. int i = 0;
  1888. char desc[16];
  1889. u32 iounit_pg1_flags;
  1890. u32 bios_version;
  1891. bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
  1892. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1893. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1894. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1895. ioc->name, desc,
  1896. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1897. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1898. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1899. ioc->facts.FWVersion.Word & 0x000000FF,
  1900. ioc->pdev->revision,
  1901. (bios_version & 0xFF000000) >> 24,
  1902. (bios_version & 0x00FF0000) >> 16,
  1903. (bios_version & 0x0000FF00) >> 8,
  1904. bios_version & 0x000000FF);
  1905. _base_display_dell_branding(ioc);
  1906. _base_display_intel_branding(ioc);
  1907. _base_display_hp_branding(ioc);
  1908. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1909. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1910. printk("Initiator");
  1911. i++;
  1912. }
  1913. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1914. printk("%sTarget", i ? "," : "");
  1915. i++;
  1916. }
  1917. i = 0;
  1918. printk("), ");
  1919. printk("Capabilities=(");
  1920. if (!ioc->hide_ir_msg) {
  1921. if (ioc->facts.IOCCapabilities &
  1922. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1923. printk("Raid");
  1924. i++;
  1925. }
  1926. }
  1927. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1928. printk("%sTLR", i ? "," : "");
  1929. i++;
  1930. }
  1931. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1932. printk("%sMulticast", i ? "," : "");
  1933. i++;
  1934. }
  1935. if (ioc->facts.IOCCapabilities &
  1936. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1937. printk("%sBIDI Target", i ? "," : "");
  1938. i++;
  1939. }
  1940. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1941. printk("%sEEDP", i ? "," : "");
  1942. i++;
  1943. }
  1944. if (ioc->facts.IOCCapabilities &
  1945. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1946. printk("%sSnapshot Buffer", i ? "," : "");
  1947. i++;
  1948. }
  1949. if (ioc->facts.IOCCapabilities &
  1950. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1951. printk("%sDiag Trace Buffer", i ? "," : "");
  1952. i++;
  1953. }
  1954. if (ioc->facts.IOCCapabilities &
  1955. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1956. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1957. i++;
  1958. }
  1959. if (ioc->facts.IOCCapabilities &
  1960. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1961. printk("%sTask Set Full", i ? "," : "");
  1962. i++;
  1963. }
  1964. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1965. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1966. printk("%sNCQ", i ? "," : "");
  1967. i++;
  1968. }
  1969. printk(")\n");
  1970. }
  1971. /**
  1972. * _base_update_missing_delay - change the missing delay timers
  1973. * @ioc: per adapter object
  1974. * @device_missing_delay: amount of time till device is reported missing
  1975. * @io_missing_delay: interval IO is returned when there is a missing device
  1976. *
  1977. * Return nothing.
  1978. *
  1979. * Passed on the command line, this function will modify the device missing
  1980. * delay, as well as the io missing delay. This should be called at driver
  1981. * load time.
  1982. */
  1983. static void
  1984. _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1985. u16 device_missing_delay, u8 io_missing_delay)
  1986. {
  1987. u16 dmd, dmd_new, dmd_orignal;
  1988. u8 io_missing_delay_original;
  1989. u16 sz;
  1990. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1991. Mpi2ConfigReply_t mpi_reply;
  1992. u8 num_phys = 0;
  1993. u16 ioc_status;
  1994. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1995. if (!num_phys)
  1996. return;
  1997. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1998. sizeof(Mpi2SasIOUnit1PhyData_t));
  1999. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  2000. if (!sas_iounit_pg1) {
  2001. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  2002. ioc->name, __FILE__, __LINE__, __func__);
  2003. goto out;
  2004. }
  2005. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  2006. sas_iounit_pg1, sz))) {
  2007. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  2008. ioc->name, __FILE__, __LINE__, __func__);
  2009. goto out;
  2010. }
  2011. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  2012. MPI2_IOCSTATUS_MASK;
  2013. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  2014. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  2015. ioc->name, __FILE__, __LINE__, __func__);
  2016. goto out;
  2017. }
  2018. /* device missing delay */
  2019. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  2020. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  2021. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2022. else
  2023. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2024. dmd_orignal = dmd;
  2025. if (device_missing_delay > 0x7F) {
  2026. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  2027. device_missing_delay;
  2028. dmd = dmd / 16;
  2029. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  2030. } else
  2031. dmd = device_missing_delay;
  2032. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  2033. /* io missing delay */
  2034. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  2035. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  2036. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  2037. sz)) {
  2038. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  2039. dmd_new = (dmd &
  2040. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2041. else
  2042. dmd_new =
  2043. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2044. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  2045. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  2046. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  2047. "new(%d)\n", ioc->name, io_missing_delay_original,
  2048. io_missing_delay);
  2049. ioc->device_missing_delay = dmd_new;
  2050. ioc->io_missing_delay = io_missing_delay;
  2051. }
  2052. out:
  2053. kfree(sas_iounit_pg1);
  2054. }
  2055. /**
  2056. * _base_static_config_pages - static start of day config pages
  2057. * @ioc: per adapter object
  2058. *
  2059. * Return nothing.
  2060. */
  2061. static void
  2062. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  2063. {
  2064. Mpi2ConfigReply_t mpi_reply;
  2065. u32 iounit_pg1_flags;
  2066. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  2067. if (ioc->ir_firmware)
  2068. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  2069. &ioc->manu_pg10);
  2070. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  2071. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  2072. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  2073. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  2074. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2075. _base_display_ioc_capabilities(ioc);
  2076. /*
  2077. * Enable task_set_full handling in iounit_pg1 when the
  2078. * facts capabilities indicate that its supported.
  2079. */
  2080. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  2081. if ((ioc->facts.IOCCapabilities &
  2082. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  2083. iounit_pg1_flags &=
  2084. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2085. else
  2086. iounit_pg1_flags |=
  2087. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2088. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  2089. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2090. }
  2091. /**
  2092. * _base_release_memory_pools - release memory
  2093. * @ioc: per adapter object
  2094. *
  2095. * Free memory allocated from _base_allocate_memory_pools.
  2096. *
  2097. * Return nothing.
  2098. */
  2099. static void
  2100. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  2101. {
  2102. int i;
  2103. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2104. __func__));
  2105. if (ioc->request) {
  2106. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  2107. ioc->request, ioc->request_dma);
  2108. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  2109. ": free\n", ioc->name, ioc->request));
  2110. ioc->request = NULL;
  2111. }
  2112. if (ioc->sense) {
  2113. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  2114. if (ioc->sense_dma_pool)
  2115. pci_pool_destroy(ioc->sense_dma_pool);
  2116. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  2117. ": free\n", ioc->name, ioc->sense));
  2118. ioc->sense = NULL;
  2119. }
  2120. if (ioc->reply) {
  2121. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  2122. if (ioc->reply_dma_pool)
  2123. pci_pool_destroy(ioc->reply_dma_pool);
  2124. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  2125. ": free\n", ioc->name, ioc->reply));
  2126. ioc->reply = NULL;
  2127. }
  2128. if (ioc->reply_free) {
  2129. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  2130. ioc->reply_free_dma);
  2131. if (ioc->reply_free_dma_pool)
  2132. pci_pool_destroy(ioc->reply_free_dma_pool);
  2133. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  2134. "(0x%p): free\n", ioc->name, ioc->reply_free));
  2135. ioc->reply_free = NULL;
  2136. }
  2137. if (ioc->reply_post_free) {
  2138. pci_pool_free(ioc->reply_post_free_dma_pool,
  2139. ioc->reply_post_free, ioc->reply_post_free_dma);
  2140. if (ioc->reply_post_free_dma_pool)
  2141. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  2142. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2143. "reply_post_free_pool(0x%p): free\n", ioc->name,
  2144. ioc->reply_post_free));
  2145. ioc->reply_post_free = NULL;
  2146. }
  2147. if (ioc->config_page) {
  2148. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2149. "config_page(0x%p): free\n", ioc->name,
  2150. ioc->config_page));
  2151. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  2152. ioc->config_page, ioc->config_page_dma);
  2153. }
  2154. if (ioc->scsi_lookup) {
  2155. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  2156. ioc->scsi_lookup = NULL;
  2157. }
  2158. kfree(ioc->hpr_lookup);
  2159. kfree(ioc->internal_lookup);
  2160. if (ioc->chain_lookup) {
  2161. for (i = 0; i < ioc->chain_depth; i++) {
  2162. if (ioc->chain_lookup[i].chain_buffer)
  2163. pci_pool_free(ioc->chain_dma_pool,
  2164. ioc->chain_lookup[i].chain_buffer,
  2165. ioc->chain_lookup[i].chain_buffer_dma);
  2166. }
  2167. if (ioc->chain_dma_pool)
  2168. pci_pool_destroy(ioc->chain_dma_pool);
  2169. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  2170. ioc->chain_lookup = NULL;
  2171. }
  2172. }
  2173. /**
  2174. * _base_allocate_memory_pools - allocate start of day memory pools
  2175. * @ioc: per adapter object
  2176. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2177. *
  2178. * Returns 0 success, anything else error
  2179. */
  2180. static int
  2181. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2182. {
  2183. struct mpt2sas_facts *facts;
  2184. u16 max_sge_elements;
  2185. u16 chains_needed_per_io;
  2186. u32 sz, total_sz, reply_post_free_sz;
  2187. u32 retry_sz;
  2188. u16 max_request_credit;
  2189. int i;
  2190. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2191. __func__));
  2192. retry_sz = 0;
  2193. facts = &ioc->facts;
  2194. /* command line tunables for max sgl entries */
  2195. if (max_sgl_entries != -1) {
  2196. ioc->shost->sg_tablesize = (max_sgl_entries <
  2197. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  2198. MPT2SAS_SG_DEPTH;
  2199. } else {
  2200. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  2201. }
  2202. /* command line tunables for max controller queue depth */
  2203. if (max_queue_depth != -1 && max_queue_depth != 0) {
  2204. max_request_credit = min_t(u16, max_queue_depth +
  2205. ioc->hi_priority_depth + ioc->internal_depth,
  2206. facts->RequestCredit);
  2207. if (max_request_credit > MAX_HBA_QUEUE_DEPTH)
  2208. max_request_credit = MAX_HBA_QUEUE_DEPTH;
  2209. } else
  2210. max_request_credit = min_t(u16, facts->RequestCredit,
  2211. MAX_HBA_QUEUE_DEPTH);
  2212. ioc->hba_queue_depth = max_request_credit;
  2213. ioc->hi_priority_depth = facts->HighPriorityCredit;
  2214. ioc->internal_depth = ioc->hi_priority_depth + 5;
  2215. /* request frame size */
  2216. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  2217. /* reply frame size */
  2218. ioc->reply_sz = facts->ReplyFrameSize * 4;
  2219. retry_allocation:
  2220. total_sz = 0;
  2221. /* calculate number of sg elements left over in the 1st frame */
  2222. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  2223. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  2224. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  2225. /* now do the same for a chain buffer */
  2226. max_sge_elements = ioc->request_sz - ioc->sge_size;
  2227. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  2228. ioc->chain_offset_value_for_main_message =
  2229. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  2230. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  2231. /*
  2232. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  2233. */
  2234. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  2235. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  2236. + 1;
  2237. if (chains_needed_per_io > facts->MaxChainDepth) {
  2238. chains_needed_per_io = facts->MaxChainDepth;
  2239. ioc->shost->sg_tablesize = min_t(u16,
  2240. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  2241. * chains_needed_per_io), ioc->shost->sg_tablesize);
  2242. }
  2243. ioc->chains_needed_per_io = chains_needed_per_io;
  2244. /* reply free queue sizing - taking into account for 64 FW events */
  2245. ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
  2246. /* align the reply post queue on the next 16 count boundary */
  2247. if (!ioc->reply_free_queue_depth % 16)
  2248. ioc->reply_post_queue_depth = ioc->reply_free_queue_depth + 16;
  2249. else
  2250. ioc->reply_post_queue_depth = ioc->reply_free_queue_depth +
  2251. 32 - (ioc->reply_free_queue_depth % 16);
  2252. if (ioc->reply_post_queue_depth >
  2253. facts->MaxReplyDescriptorPostQueueDepth) {
  2254. ioc->reply_post_queue_depth = min_t(u16,
  2255. (facts->MaxReplyDescriptorPostQueueDepth -
  2256. (facts->MaxReplyDescriptorPostQueueDepth % 16)),
  2257. (ioc->hba_queue_depth - (ioc->hba_queue_depth % 16)));
  2258. ioc->reply_free_queue_depth = ioc->reply_post_queue_depth - 16;
  2259. ioc->hba_queue_depth = ioc->reply_free_queue_depth - 64;
  2260. }
  2261. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  2262. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  2263. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  2264. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  2265. ioc->chains_needed_per_io));
  2266. ioc->scsiio_depth = ioc->hba_queue_depth -
  2267. ioc->hi_priority_depth - ioc->internal_depth;
  2268. /* set the scsi host can_queue depth
  2269. * with some internal commands that could be outstanding
  2270. */
  2271. ioc->shost->can_queue = ioc->scsiio_depth;
  2272. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  2273. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  2274. /* contiguous pool for request and chains, 16 byte align, one extra "
  2275. * "frame for smid=0
  2276. */
  2277. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  2278. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  2279. /* hi-priority queue */
  2280. sz += (ioc->hi_priority_depth * ioc->request_sz);
  2281. /* internal queue */
  2282. sz += (ioc->internal_depth * ioc->request_sz);
  2283. ioc->request_dma_sz = sz;
  2284. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  2285. if (!ioc->request) {
  2286. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2287. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2288. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  2289. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2290. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  2291. goto out;
  2292. retry_sz += 64;
  2293. ioc->hba_queue_depth = max_request_credit - retry_sz;
  2294. goto retry_allocation;
  2295. }
  2296. if (retry_sz)
  2297. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2298. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2299. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  2300. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2301. /* hi-priority queue */
  2302. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  2303. ioc->request_sz);
  2304. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  2305. ioc->request_sz);
  2306. /* internal queue */
  2307. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  2308. ioc->request_sz);
  2309. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  2310. ioc->request_sz);
  2311. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  2312. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2313. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  2314. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  2315. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  2316. ioc->name, (unsigned long long) ioc->request_dma));
  2317. total_sz += sz;
  2318. sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
  2319. ioc->scsi_lookup_pages = get_order(sz);
  2320. ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
  2321. GFP_KERNEL, ioc->scsi_lookup_pages);
  2322. if (!ioc->scsi_lookup) {
  2323. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2324. "sz(%d)\n", ioc->name, (int)sz);
  2325. goto out;
  2326. }
  2327. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2328. "depth(%d)\n", ioc->name, ioc->request,
  2329. ioc->scsiio_depth));
  2330. ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
  2331. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2332. ioc->chain_pages = get_order(sz);
  2333. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2334. GFP_KERNEL, ioc->chain_pages);
  2335. if (!ioc->chain_lookup) {
  2336. printk(MPT2SAS_ERR_FMT "chain_lookup: get_free_pages failed, "
  2337. "sz(%d)\n", ioc->name, (int)sz);
  2338. goto out;
  2339. }
  2340. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2341. ioc->request_sz, 16, 0);
  2342. if (!ioc->chain_dma_pool) {
  2343. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2344. "failed\n", ioc->name);
  2345. goto out;
  2346. }
  2347. for (i = 0; i < ioc->chain_depth; i++) {
  2348. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2349. ioc->chain_dma_pool , GFP_KERNEL,
  2350. &ioc->chain_lookup[i].chain_buffer_dma);
  2351. if (!ioc->chain_lookup[i].chain_buffer) {
  2352. ioc->chain_depth = i;
  2353. goto chain_done;
  2354. }
  2355. total_sz += ioc->request_sz;
  2356. }
  2357. chain_done:
  2358. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2359. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2360. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2361. ioc->request_sz))/1024));
  2362. /* initialize hi-priority queue smid's */
  2363. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2364. sizeof(struct request_tracker), GFP_KERNEL);
  2365. if (!ioc->hpr_lookup) {
  2366. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2367. ioc->name);
  2368. goto out;
  2369. }
  2370. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2371. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2372. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2373. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2374. /* initialize internal queue smid's */
  2375. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2376. sizeof(struct request_tracker), GFP_KERNEL);
  2377. if (!ioc->internal_lookup) {
  2378. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2379. ioc->name);
  2380. goto out;
  2381. }
  2382. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2383. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2384. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2385. ioc->internal_depth, ioc->internal_smid));
  2386. /* sense buffers, 4 byte align */
  2387. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2388. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2389. 0);
  2390. if (!ioc->sense_dma_pool) {
  2391. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2392. ioc->name);
  2393. goto out;
  2394. }
  2395. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2396. &ioc->sense_dma);
  2397. if (!ioc->sense) {
  2398. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2399. ioc->name);
  2400. goto out;
  2401. }
  2402. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2403. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2404. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2405. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2406. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2407. ioc->name, (unsigned long long)ioc->sense_dma));
  2408. total_sz += sz;
  2409. /* reply pool, 4 byte align */
  2410. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2411. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2412. 0);
  2413. if (!ioc->reply_dma_pool) {
  2414. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2415. ioc->name);
  2416. goto out;
  2417. }
  2418. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2419. &ioc->reply_dma);
  2420. if (!ioc->reply) {
  2421. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2422. ioc->name);
  2423. goto out;
  2424. }
  2425. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2426. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2427. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2428. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2429. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2430. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2431. ioc->name, (unsigned long long)ioc->reply_dma));
  2432. total_sz += sz;
  2433. /* reply free queue, 16 byte align */
  2434. sz = ioc->reply_free_queue_depth * 4;
  2435. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2436. ioc->pdev, sz, 16, 0);
  2437. if (!ioc->reply_free_dma_pool) {
  2438. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2439. "failed\n", ioc->name);
  2440. goto out;
  2441. }
  2442. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2443. &ioc->reply_free_dma);
  2444. if (!ioc->reply_free) {
  2445. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2446. "failed\n", ioc->name);
  2447. goto out;
  2448. }
  2449. memset(ioc->reply_free, 0, sz);
  2450. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2451. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2452. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2453. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2454. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2455. total_sz += sz;
  2456. /* reply post queue, 16 byte align */
  2457. reply_post_free_sz = ioc->reply_post_queue_depth *
  2458. sizeof(Mpi2DefaultReplyDescriptor_t);
  2459. if (_base_is_controller_msix_enabled(ioc))
  2460. sz = reply_post_free_sz * ioc->reply_queue_count;
  2461. else
  2462. sz = reply_post_free_sz;
  2463. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2464. ioc->pdev, sz, 16, 0);
  2465. if (!ioc->reply_post_free_dma_pool) {
  2466. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2467. "failed\n", ioc->name);
  2468. goto out;
  2469. }
  2470. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2471. GFP_KERNEL, &ioc->reply_post_free_dma);
  2472. if (!ioc->reply_post_free) {
  2473. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2474. "failed\n", ioc->name);
  2475. goto out;
  2476. }
  2477. memset(ioc->reply_post_free, 0, sz);
  2478. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2479. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2480. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2481. sz/1024));
  2482. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2483. "(0x%llx)\n", ioc->name, (unsigned long long)
  2484. ioc->reply_post_free_dma));
  2485. total_sz += sz;
  2486. ioc->config_page_sz = 512;
  2487. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2488. ioc->config_page_sz, &ioc->config_page_dma);
  2489. if (!ioc->config_page) {
  2490. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2491. "failed\n", ioc->name);
  2492. goto out;
  2493. }
  2494. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2495. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2496. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2497. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2498. total_sz += ioc->config_page_sz;
  2499. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2500. ioc->name, total_sz/1024);
  2501. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2502. "Max Controller Queue Depth(%d)\n",
  2503. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2504. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2505. ioc->name, ioc->shost->sg_tablesize);
  2506. return 0;
  2507. out:
  2508. return -ENOMEM;
  2509. }
  2510. /**
  2511. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2512. * @ioc: Pointer to MPT_ADAPTER structure
  2513. * @cooked: Request raw or cooked IOC state
  2514. *
  2515. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2516. * Doorbell bits in MPI_IOC_STATE_MASK.
  2517. */
  2518. u32
  2519. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2520. {
  2521. u32 s, sc;
  2522. s = readl(&ioc->chip->Doorbell);
  2523. sc = s & MPI2_IOC_STATE_MASK;
  2524. return cooked ? sc : s;
  2525. }
  2526. /**
  2527. * _base_wait_on_iocstate - waiting on a particular ioc state
  2528. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2529. * @timeout: timeout in second
  2530. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2531. *
  2532. * Returns 0 for success, non-zero for failure.
  2533. */
  2534. static int
  2535. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2536. int sleep_flag)
  2537. {
  2538. u32 count, cntdn;
  2539. u32 current_state;
  2540. count = 0;
  2541. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2542. do {
  2543. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2544. if (current_state == ioc_state)
  2545. return 0;
  2546. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2547. break;
  2548. if (sleep_flag == CAN_SLEEP)
  2549. msleep(1);
  2550. else
  2551. udelay(500);
  2552. count++;
  2553. } while (--cntdn);
  2554. return current_state;
  2555. }
  2556. /**
  2557. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2558. * a write to the doorbell)
  2559. * @ioc: per adapter object
  2560. * @timeout: timeout in second
  2561. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2562. *
  2563. * Returns 0 for success, non-zero for failure.
  2564. *
  2565. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2566. */
  2567. static int
  2568. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2569. int sleep_flag)
  2570. {
  2571. u32 cntdn, count;
  2572. u32 int_status;
  2573. count = 0;
  2574. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2575. do {
  2576. int_status = readl(&ioc->chip->HostInterruptStatus);
  2577. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2578. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2579. "successful count(%d), timeout(%d)\n", ioc->name,
  2580. __func__, count, timeout));
  2581. return 0;
  2582. }
  2583. if (sleep_flag == CAN_SLEEP)
  2584. msleep(1);
  2585. else
  2586. udelay(500);
  2587. count++;
  2588. } while (--cntdn);
  2589. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2590. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2591. return -EFAULT;
  2592. }
  2593. /**
  2594. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2595. * @ioc: per adapter object
  2596. * @timeout: timeout in second
  2597. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2598. *
  2599. * Returns 0 for success, non-zero for failure.
  2600. *
  2601. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2602. * doorbell.
  2603. */
  2604. static int
  2605. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2606. int sleep_flag)
  2607. {
  2608. u32 cntdn, count;
  2609. u32 int_status;
  2610. u32 doorbell;
  2611. count = 0;
  2612. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2613. do {
  2614. int_status = readl(&ioc->chip->HostInterruptStatus);
  2615. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2616. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2617. "successful count(%d), timeout(%d)\n", ioc->name,
  2618. __func__, count, timeout));
  2619. return 0;
  2620. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2621. doorbell = readl(&ioc->chip->Doorbell);
  2622. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2623. MPI2_IOC_STATE_FAULT) {
  2624. mpt2sas_base_fault_info(ioc , doorbell);
  2625. return -EFAULT;
  2626. }
  2627. } else if (int_status == 0xFFFFFFFF)
  2628. goto out;
  2629. if (sleep_flag == CAN_SLEEP)
  2630. msleep(1);
  2631. else
  2632. udelay(500);
  2633. count++;
  2634. } while (--cntdn);
  2635. out:
  2636. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2637. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2638. return -EFAULT;
  2639. }
  2640. /**
  2641. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2642. * @ioc: per adapter object
  2643. * @timeout: timeout in second
  2644. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2645. *
  2646. * Returns 0 for success, non-zero for failure.
  2647. *
  2648. */
  2649. static int
  2650. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2651. int sleep_flag)
  2652. {
  2653. u32 cntdn, count;
  2654. u32 doorbell_reg;
  2655. count = 0;
  2656. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2657. do {
  2658. doorbell_reg = readl(&ioc->chip->Doorbell);
  2659. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2660. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2661. "successful count(%d), timeout(%d)\n", ioc->name,
  2662. __func__, count, timeout));
  2663. return 0;
  2664. }
  2665. if (sleep_flag == CAN_SLEEP)
  2666. msleep(1);
  2667. else
  2668. udelay(500);
  2669. count++;
  2670. } while (--cntdn);
  2671. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2672. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2673. return -EFAULT;
  2674. }
  2675. /**
  2676. * _base_send_ioc_reset - send doorbell reset
  2677. * @ioc: per adapter object
  2678. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2679. * @timeout: timeout in second
  2680. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2681. *
  2682. * Returns 0 for success, non-zero for failure.
  2683. */
  2684. static int
  2685. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2686. int sleep_flag)
  2687. {
  2688. u32 ioc_state;
  2689. int r = 0;
  2690. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2691. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2692. ioc->name, __func__);
  2693. return -EFAULT;
  2694. }
  2695. if (!(ioc->facts.IOCCapabilities &
  2696. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2697. return -EFAULT;
  2698. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2699. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2700. &ioc->chip->Doorbell);
  2701. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2702. r = -EFAULT;
  2703. goto out;
  2704. }
  2705. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2706. timeout, sleep_flag);
  2707. if (ioc_state) {
  2708. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2709. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2710. r = -EFAULT;
  2711. goto out;
  2712. }
  2713. out:
  2714. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2715. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2716. return r;
  2717. }
  2718. /**
  2719. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2720. * @ioc: per adapter object
  2721. * @request_bytes: request length
  2722. * @request: pointer having request payload
  2723. * @reply_bytes: reply length
  2724. * @reply: pointer to reply payload
  2725. * @timeout: timeout in second
  2726. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2727. *
  2728. * Returns 0 for success, non-zero for failure.
  2729. */
  2730. static int
  2731. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2732. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2733. {
  2734. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2735. int i;
  2736. u8 failed;
  2737. u16 dummy;
  2738. __le32 *mfp;
  2739. /* make sure doorbell is not in use */
  2740. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2741. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2742. " (line=%d)\n", ioc->name, __LINE__);
  2743. return -EFAULT;
  2744. }
  2745. /* clear pending doorbell interrupts from previous state changes */
  2746. if (readl(&ioc->chip->HostInterruptStatus) &
  2747. MPI2_HIS_IOC2SYS_DB_STATUS)
  2748. writel(0, &ioc->chip->HostInterruptStatus);
  2749. /* send message to ioc */
  2750. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2751. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2752. &ioc->chip->Doorbell);
  2753. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2754. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2755. "int failed (line=%d)\n", ioc->name, __LINE__);
  2756. return -EFAULT;
  2757. }
  2758. writel(0, &ioc->chip->HostInterruptStatus);
  2759. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2760. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2761. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2762. return -EFAULT;
  2763. }
  2764. /* send message 32-bits at a time */
  2765. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2766. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2767. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2768. failed = 1;
  2769. }
  2770. if (failed) {
  2771. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2772. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2773. return -EFAULT;
  2774. }
  2775. /* now wait for the reply */
  2776. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2777. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2778. "int failed (line=%d)\n", ioc->name, __LINE__);
  2779. return -EFAULT;
  2780. }
  2781. /* read the first two 16-bits, it gives the total length of the reply */
  2782. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2783. & MPI2_DOORBELL_DATA_MASK);
  2784. writel(0, &ioc->chip->HostInterruptStatus);
  2785. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2786. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2787. "int failed (line=%d)\n", ioc->name, __LINE__);
  2788. return -EFAULT;
  2789. }
  2790. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2791. & MPI2_DOORBELL_DATA_MASK);
  2792. writel(0, &ioc->chip->HostInterruptStatus);
  2793. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2794. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2795. printk(MPT2SAS_ERR_FMT "doorbell "
  2796. "handshake int failed (line=%d)\n", ioc->name,
  2797. __LINE__);
  2798. return -EFAULT;
  2799. }
  2800. if (i >= reply_bytes/2) /* overflow case */
  2801. dummy = readl(&ioc->chip->Doorbell);
  2802. else
  2803. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2804. & MPI2_DOORBELL_DATA_MASK);
  2805. writel(0, &ioc->chip->HostInterruptStatus);
  2806. }
  2807. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2808. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2809. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2810. " (line=%d)\n", ioc->name, __LINE__));
  2811. }
  2812. writel(0, &ioc->chip->HostInterruptStatus);
  2813. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2814. mfp = (__le32 *)reply;
  2815. printk(KERN_INFO "\toffset:data\n");
  2816. for (i = 0; i < reply_bytes/4; i++)
  2817. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2818. le32_to_cpu(mfp[i]));
  2819. }
  2820. return 0;
  2821. }
  2822. /**
  2823. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2824. * @ioc: per adapter object
  2825. * @mpi_reply: the reply payload from FW
  2826. * @mpi_request: the request payload sent to FW
  2827. *
  2828. * The SAS IO Unit Control Request message allows the host to perform low-level
  2829. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2830. * to obtain the IOC assigned device handles for a device if it has other
  2831. * identifying information about the device, in addition allows the host to
  2832. * remove IOC resources associated with the device.
  2833. *
  2834. * Returns 0 for success, non-zero for failure.
  2835. */
  2836. int
  2837. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2838. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2839. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2840. {
  2841. u16 smid;
  2842. u32 ioc_state;
  2843. unsigned long timeleft;
  2844. u8 issue_reset;
  2845. int rc;
  2846. void *request;
  2847. u16 wait_state_count;
  2848. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2849. __func__));
  2850. mutex_lock(&ioc->base_cmds.mutex);
  2851. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2852. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2853. ioc->name, __func__);
  2854. rc = -EAGAIN;
  2855. goto out;
  2856. }
  2857. wait_state_count = 0;
  2858. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2859. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2860. if (wait_state_count++ == 10) {
  2861. printk(MPT2SAS_ERR_FMT
  2862. "%s: failed due to ioc not operational\n",
  2863. ioc->name, __func__);
  2864. rc = -EFAULT;
  2865. goto out;
  2866. }
  2867. ssleep(1);
  2868. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2869. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2870. "operational state(count=%d)\n", ioc->name,
  2871. __func__, wait_state_count);
  2872. }
  2873. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2874. if (!smid) {
  2875. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2876. ioc->name, __func__);
  2877. rc = -EAGAIN;
  2878. goto out;
  2879. }
  2880. rc = 0;
  2881. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2882. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2883. ioc->base_cmds.smid = smid;
  2884. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2885. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2886. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2887. ioc->ioc_link_reset_in_progress = 1;
  2888. init_completion(&ioc->base_cmds.done);
  2889. mpt2sas_base_put_smid_default(ioc, smid);
  2890. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2891. msecs_to_jiffies(10000));
  2892. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2893. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2894. ioc->ioc_link_reset_in_progress)
  2895. ioc->ioc_link_reset_in_progress = 0;
  2896. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2897. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2898. ioc->name, __func__);
  2899. _debug_dump_mf(mpi_request,
  2900. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2901. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2902. issue_reset = 1;
  2903. goto issue_host_reset;
  2904. }
  2905. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2906. memcpy(mpi_reply, ioc->base_cmds.reply,
  2907. sizeof(Mpi2SasIoUnitControlReply_t));
  2908. else
  2909. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2910. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2911. goto out;
  2912. issue_host_reset:
  2913. if (issue_reset)
  2914. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2915. FORCE_BIG_HAMMER);
  2916. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2917. rc = -EFAULT;
  2918. out:
  2919. mutex_unlock(&ioc->base_cmds.mutex);
  2920. return rc;
  2921. }
  2922. /**
  2923. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2924. * @ioc: per adapter object
  2925. * @mpi_reply: the reply payload from FW
  2926. * @mpi_request: the request payload sent to FW
  2927. *
  2928. * The SCSI Enclosure Processor request message causes the IOC to
  2929. * communicate with SES devices to control LED status signals.
  2930. *
  2931. * Returns 0 for success, non-zero for failure.
  2932. */
  2933. int
  2934. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2935. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2936. {
  2937. u16 smid;
  2938. u32 ioc_state;
  2939. unsigned long timeleft;
  2940. u8 issue_reset;
  2941. int rc;
  2942. void *request;
  2943. u16 wait_state_count;
  2944. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2945. __func__));
  2946. mutex_lock(&ioc->base_cmds.mutex);
  2947. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2948. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2949. ioc->name, __func__);
  2950. rc = -EAGAIN;
  2951. goto out;
  2952. }
  2953. wait_state_count = 0;
  2954. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2955. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2956. if (wait_state_count++ == 10) {
  2957. printk(MPT2SAS_ERR_FMT
  2958. "%s: failed due to ioc not operational\n",
  2959. ioc->name, __func__);
  2960. rc = -EFAULT;
  2961. goto out;
  2962. }
  2963. ssleep(1);
  2964. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2965. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2966. "operational state(count=%d)\n", ioc->name,
  2967. __func__, wait_state_count);
  2968. }
  2969. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2970. if (!smid) {
  2971. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2972. ioc->name, __func__);
  2973. rc = -EAGAIN;
  2974. goto out;
  2975. }
  2976. rc = 0;
  2977. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2978. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2979. ioc->base_cmds.smid = smid;
  2980. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2981. init_completion(&ioc->base_cmds.done);
  2982. mpt2sas_base_put_smid_default(ioc, smid);
  2983. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2984. msecs_to_jiffies(10000));
  2985. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2986. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2987. ioc->name, __func__);
  2988. _debug_dump_mf(mpi_request,
  2989. sizeof(Mpi2SepRequest_t)/4);
  2990. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2991. issue_reset = 1;
  2992. goto issue_host_reset;
  2993. }
  2994. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2995. memcpy(mpi_reply, ioc->base_cmds.reply,
  2996. sizeof(Mpi2SepReply_t));
  2997. else
  2998. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2999. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3000. goto out;
  3001. issue_host_reset:
  3002. if (issue_reset)
  3003. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  3004. FORCE_BIG_HAMMER);
  3005. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3006. rc = -EFAULT;
  3007. out:
  3008. mutex_unlock(&ioc->base_cmds.mutex);
  3009. return rc;
  3010. }
  3011. /**
  3012. * _base_get_port_facts - obtain port facts reply and save in ioc
  3013. * @ioc: per adapter object
  3014. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3015. *
  3016. * Returns 0 for success, non-zero for failure.
  3017. */
  3018. static int
  3019. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  3020. {
  3021. Mpi2PortFactsRequest_t mpi_request;
  3022. Mpi2PortFactsReply_t mpi_reply;
  3023. struct mpt2sas_port_facts *pfacts;
  3024. int mpi_reply_sz, mpi_request_sz, r;
  3025. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3026. __func__));
  3027. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  3028. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  3029. memset(&mpi_request, 0, mpi_request_sz);
  3030. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  3031. mpi_request.PortNumber = port;
  3032. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3033. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3034. if (r != 0) {
  3035. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3036. ioc->name, __func__, r);
  3037. return r;
  3038. }
  3039. pfacts = &ioc->pfacts[port];
  3040. memset(pfacts, 0, sizeof(struct mpt2sas_port_facts));
  3041. pfacts->PortNumber = mpi_reply.PortNumber;
  3042. pfacts->VP_ID = mpi_reply.VP_ID;
  3043. pfacts->VF_ID = mpi_reply.VF_ID;
  3044. pfacts->MaxPostedCmdBuffers =
  3045. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  3046. return 0;
  3047. }
  3048. /**
  3049. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  3050. * @ioc: per adapter object
  3051. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3052. *
  3053. * Returns 0 for success, non-zero for failure.
  3054. */
  3055. static int
  3056. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3057. {
  3058. Mpi2IOCFactsRequest_t mpi_request;
  3059. Mpi2IOCFactsReply_t mpi_reply;
  3060. struct mpt2sas_facts *facts;
  3061. int mpi_reply_sz, mpi_request_sz, r;
  3062. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3063. __func__));
  3064. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  3065. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  3066. memset(&mpi_request, 0, mpi_request_sz);
  3067. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  3068. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3069. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3070. if (r != 0) {
  3071. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3072. ioc->name, __func__, r);
  3073. return r;
  3074. }
  3075. facts = &ioc->facts;
  3076. memset(facts, 0, sizeof(struct mpt2sas_facts));
  3077. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  3078. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  3079. facts->VP_ID = mpi_reply.VP_ID;
  3080. facts->VF_ID = mpi_reply.VF_ID;
  3081. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  3082. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  3083. facts->WhoInit = mpi_reply.WhoInit;
  3084. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  3085. facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
  3086. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  3087. facts->MaxReplyDescriptorPostQueueDepth =
  3088. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  3089. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  3090. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  3091. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  3092. ioc->ir_firmware = 1;
  3093. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  3094. facts->IOCRequestFrameSize =
  3095. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  3096. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  3097. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  3098. ioc->shost->max_id = -1;
  3099. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  3100. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  3101. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  3102. facts->HighPriorityCredit =
  3103. le16_to_cpu(mpi_reply.HighPriorityCredit);
  3104. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  3105. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  3106. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  3107. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  3108. facts->MaxChainDepth));
  3109. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  3110. "reply frame size(%d)\n", ioc->name,
  3111. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  3112. return 0;
  3113. }
  3114. /**
  3115. * _base_send_ioc_init - send ioc_init to firmware
  3116. * @ioc: per adapter object
  3117. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3118. *
  3119. * Returns 0 for success, non-zero for failure.
  3120. */
  3121. static int
  3122. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3123. {
  3124. Mpi2IOCInitRequest_t mpi_request;
  3125. Mpi2IOCInitReply_t mpi_reply;
  3126. int r;
  3127. struct timeval current_time;
  3128. u16 ioc_status;
  3129. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3130. __func__));
  3131. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  3132. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  3133. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  3134. mpi_request.VF_ID = 0; /* TODO */
  3135. mpi_request.VP_ID = 0;
  3136. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  3137. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  3138. if (_base_is_controller_msix_enabled(ioc))
  3139. mpi_request.HostMSIxVectors = ioc->reply_queue_count;
  3140. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  3141. mpi_request.ReplyDescriptorPostQueueDepth =
  3142. cpu_to_le16(ioc->reply_post_queue_depth);
  3143. mpi_request.ReplyFreeQueueDepth =
  3144. cpu_to_le16(ioc->reply_free_queue_depth);
  3145. mpi_request.SenseBufferAddressHigh =
  3146. cpu_to_le32((u64)ioc->sense_dma >> 32);
  3147. mpi_request.SystemReplyAddressHigh =
  3148. cpu_to_le32((u64)ioc->reply_dma >> 32);
  3149. mpi_request.SystemRequestFrameBaseAddress =
  3150. cpu_to_le64((u64)ioc->request_dma);
  3151. mpi_request.ReplyFreeQueueAddress =
  3152. cpu_to_le64((u64)ioc->reply_free_dma);
  3153. mpi_request.ReplyDescriptorPostQueueAddress =
  3154. cpu_to_le64((u64)ioc->reply_post_free_dma);
  3155. /* This time stamp specifies number of milliseconds
  3156. * since epoch ~ midnight January 1, 1970.
  3157. */
  3158. do_gettimeofday(&current_time);
  3159. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  3160. (current_time.tv_usec / 1000));
  3161. if (ioc->logging_level & MPT_DEBUG_INIT) {
  3162. __le32 *mfp;
  3163. int i;
  3164. mfp = (__le32 *)&mpi_request;
  3165. printk(KERN_INFO "\toffset:data\n");
  3166. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  3167. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  3168. le32_to_cpu(mfp[i]));
  3169. }
  3170. r = _base_handshake_req_reply_wait(ioc,
  3171. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  3172. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  3173. sleep_flag);
  3174. if (r != 0) {
  3175. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3176. ioc->name, __func__, r);
  3177. return r;
  3178. }
  3179. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  3180. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  3181. mpi_reply.IOCLogInfo) {
  3182. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  3183. r = -EIO;
  3184. }
  3185. return 0;
  3186. }
  3187. /**
  3188. * mpt2sas_port_enable_done - command completion routine for port enable
  3189. * @ioc: per adapter object
  3190. * @smid: system request message index
  3191. * @msix_index: MSIX table index supplied by the OS
  3192. * @reply: reply message frame(lower 32bit addr)
  3193. *
  3194. * Return 1 meaning mf should be freed from _base_interrupt
  3195. * 0 means the mf is freed from this function.
  3196. */
  3197. u8
  3198. mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  3199. u32 reply)
  3200. {
  3201. MPI2DefaultReply_t *mpi_reply;
  3202. u16 ioc_status;
  3203. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  3204. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  3205. return 1;
  3206. if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
  3207. return 1;
  3208. ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
  3209. if (mpi_reply) {
  3210. ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
  3211. memcpy(ioc->port_enable_cmds.reply, mpi_reply,
  3212. mpi_reply->MsgLength*4);
  3213. }
  3214. ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
  3215. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3216. if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
  3217. ioc->port_enable_failed = 1;
  3218. if (ioc->is_driver_loading) {
  3219. if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
  3220. mpt2sas_port_enable_complete(ioc);
  3221. return 1;
  3222. } else {
  3223. ioc->start_scan_failed = ioc_status;
  3224. ioc->start_scan = 0;
  3225. return 1;
  3226. }
  3227. }
  3228. complete(&ioc->port_enable_cmds.done);
  3229. return 1;
  3230. }
  3231. /**
  3232. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  3233. * @ioc: per adapter object
  3234. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3235. *
  3236. * Returns 0 for success, non-zero for failure.
  3237. */
  3238. static int
  3239. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3240. {
  3241. Mpi2PortEnableRequest_t *mpi_request;
  3242. Mpi2PortEnableReply_t *mpi_reply;
  3243. unsigned long timeleft;
  3244. int r = 0;
  3245. u16 smid;
  3246. u16 ioc_status;
  3247. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3248. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3249. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3250. ioc->name, __func__);
  3251. return -EAGAIN;
  3252. }
  3253. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3254. if (!smid) {
  3255. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3256. ioc->name, __func__);
  3257. return -EAGAIN;
  3258. }
  3259. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3260. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3261. ioc->port_enable_cmds.smid = smid;
  3262. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3263. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3264. init_completion(&ioc->port_enable_cmds.done);
  3265. mpt2sas_base_put_smid_default(ioc, smid);
  3266. timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
  3267. 300*HZ);
  3268. if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
  3269. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3270. ioc->name, __func__);
  3271. _debug_dump_mf(mpi_request,
  3272. sizeof(Mpi2PortEnableRequest_t)/4);
  3273. if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
  3274. r = -EFAULT;
  3275. else
  3276. r = -ETIME;
  3277. goto out;
  3278. }
  3279. mpi_reply = ioc->port_enable_cmds.reply;
  3280. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3281. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  3282. printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
  3283. ioc->name, __func__, ioc_status);
  3284. r = -EFAULT;
  3285. goto out;
  3286. }
  3287. out:
  3288. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3289. printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
  3290. "SUCCESS" : "FAILED"));
  3291. return r;
  3292. }
  3293. /**
  3294. * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
  3295. * @ioc: per adapter object
  3296. *
  3297. * Returns 0 for success, non-zero for failure.
  3298. */
  3299. int
  3300. mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
  3301. {
  3302. Mpi2PortEnableRequest_t *mpi_request;
  3303. u16 smid;
  3304. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3305. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3306. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3307. ioc->name, __func__);
  3308. return -EAGAIN;
  3309. }
  3310. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3311. if (!smid) {
  3312. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3313. ioc->name, __func__);
  3314. return -EAGAIN;
  3315. }
  3316. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3317. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3318. ioc->port_enable_cmds.smid = smid;
  3319. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3320. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3321. mpt2sas_base_put_smid_default(ioc, smid);
  3322. return 0;
  3323. }
  3324. /**
  3325. * _base_determine_wait_on_discovery - desposition
  3326. * @ioc: per adapter object
  3327. *
  3328. * Decide whether to wait on discovery to complete. Used to either
  3329. * locate boot device, or report volumes ahead of physical devices.
  3330. *
  3331. * Returns 1 for wait, 0 for don't wait
  3332. */
  3333. static int
  3334. _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
  3335. {
  3336. /* We wait for discovery to complete if IR firmware is loaded.
  3337. * The sas topology events arrive before PD events, so we need time to
  3338. * turn on the bit in ioc->pd_handles to indicate PD
  3339. * Also, it maybe required to report Volumes ahead of physical
  3340. * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
  3341. */
  3342. if (ioc->ir_firmware)
  3343. return 1;
  3344. /* if no Bios, then we don't need to wait */
  3345. if (!ioc->bios_pg3.BiosVersion)
  3346. return 0;
  3347. /* Bios is present, then we drop down here.
  3348. *
  3349. * If there any entries in the Bios Page 2, then we wait
  3350. * for discovery to complete.
  3351. */
  3352. /* Current Boot Device */
  3353. if ((ioc->bios_pg2.CurrentBootDeviceForm &
  3354. MPI2_BIOSPAGE2_FORM_MASK) ==
  3355. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3356. /* Request Boot Device */
  3357. (ioc->bios_pg2.ReqBootDeviceForm &
  3358. MPI2_BIOSPAGE2_FORM_MASK) ==
  3359. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3360. /* Alternate Request Boot Device */
  3361. (ioc->bios_pg2.ReqAltBootDeviceForm &
  3362. MPI2_BIOSPAGE2_FORM_MASK) ==
  3363. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
  3364. return 0;
  3365. return 1;
  3366. }
  3367. /**
  3368. * _base_unmask_events - turn on notification for this event
  3369. * @ioc: per adapter object
  3370. * @event: firmware event
  3371. *
  3372. * The mask is stored in ioc->event_masks.
  3373. */
  3374. static void
  3375. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  3376. {
  3377. u32 desired_event;
  3378. if (event >= 128)
  3379. return;
  3380. desired_event = (1 << (event % 32));
  3381. if (event < 32)
  3382. ioc->event_masks[0] &= ~desired_event;
  3383. else if (event < 64)
  3384. ioc->event_masks[1] &= ~desired_event;
  3385. else if (event < 96)
  3386. ioc->event_masks[2] &= ~desired_event;
  3387. else if (event < 128)
  3388. ioc->event_masks[3] &= ~desired_event;
  3389. }
  3390. /**
  3391. * _base_event_notification - send event notification
  3392. * @ioc: per adapter object
  3393. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3394. *
  3395. * Returns 0 for success, non-zero for failure.
  3396. */
  3397. static int
  3398. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3399. {
  3400. Mpi2EventNotificationRequest_t *mpi_request;
  3401. unsigned long timeleft;
  3402. u16 smid;
  3403. int r = 0;
  3404. int i;
  3405. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3406. __func__));
  3407. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3408. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3409. ioc->name, __func__);
  3410. return -EAGAIN;
  3411. }
  3412. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3413. if (!smid) {
  3414. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3415. ioc->name, __func__);
  3416. return -EAGAIN;
  3417. }
  3418. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3419. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3420. ioc->base_cmds.smid = smid;
  3421. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  3422. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  3423. mpi_request->VF_ID = 0; /* TODO */
  3424. mpi_request->VP_ID = 0;
  3425. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3426. mpi_request->EventMasks[i] =
  3427. cpu_to_le32(ioc->event_masks[i]);
  3428. init_completion(&ioc->base_cmds.done);
  3429. mpt2sas_base_put_smid_default(ioc, smid);
  3430. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3431. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3432. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3433. ioc->name, __func__);
  3434. _debug_dump_mf(mpi_request,
  3435. sizeof(Mpi2EventNotificationRequest_t)/4);
  3436. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3437. r = -EFAULT;
  3438. else
  3439. r = -ETIME;
  3440. } else
  3441. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3442. ioc->name, __func__));
  3443. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3444. return r;
  3445. }
  3446. /**
  3447. * mpt2sas_base_validate_event_type - validating event types
  3448. * @ioc: per adapter object
  3449. * @event: firmware event
  3450. *
  3451. * This will turn on firmware event notification when application
  3452. * ask for that event. We don't mask events that are already enabled.
  3453. */
  3454. void
  3455. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3456. {
  3457. int i, j;
  3458. u32 event_mask, desired_event;
  3459. u8 send_update_to_fw;
  3460. for (i = 0, send_update_to_fw = 0; i <
  3461. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3462. event_mask = ~event_type[i];
  3463. desired_event = 1;
  3464. for (j = 0; j < 32; j++) {
  3465. if (!(event_mask & desired_event) &&
  3466. (ioc->event_masks[i] & desired_event)) {
  3467. ioc->event_masks[i] &= ~desired_event;
  3468. send_update_to_fw = 1;
  3469. }
  3470. desired_event = (desired_event << 1);
  3471. }
  3472. }
  3473. if (!send_update_to_fw)
  3474. return;
  3475. mutex_lock(&ioc->base_cmds.mutex);
  3476. _base_event_notification(ioc, CAN_SLEEP);
  3477. mutex_unlock(&ioc->base_cmds.mutex);
  3478. }
  3479. /**
  3480. * _base_diag_reset - the "big hammer" start of day reset
  3481. * @ioc: per adapter object
  3482. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3483. *
  3484. * Returns 0 for success, non-zero for failure.
  3485. */
  3486. static int
  3487. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3488. {
  3489. u32 host_diagnostic;
  3490. u32 ioc_state;
  3491. u32 count;
  3492. u32 hcb_size;
  3493. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3494. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3495. ioc->name));
  3496. count = 0;
  3497. do {
  3498. /* Write magic sequence to WriteSequence register
  3499. * Loop until in diagnostic mode
  3500. */
  3501. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3502. "sequence\n", ioc->name));
  3503. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3504. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3505. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3506. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3507. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3508. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3509. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3510. /* wait 100 msec */
  3511. if (sleep_flag == CAN_SLEEP)
  3512. msleep(100);
  3513. else
  3514. mdelay(100);
  3515. if (count++ > 20)
  3516. goto out;
  3517. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3518. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3519. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3520. ioc->name, count, host_diagnostic));
  3521. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3522. hcb_size = readl(&ioc->chip->HCBSize);
  3523. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3524. ioc->name));
  3525. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3526. &ioc->chip->HostDiagnostic);
  3527. /* don't access any registers for 50 milliseconds */
  3528. msleep(50);
  3529. /* 300 second max wait */
  3530. for (count = 0; count < 3000000 ; count++) {
  3531. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3532. if (host_diagnostic == 0xFFFFFFFF)
  3533. goto out;
  3534. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3535. break;
  3536. /* wait 100 msec */
  3537. if (sleep_flag == CAN_SLEEP)
  3538. msleep(1);
  3539. else
  3540. mdelay(1);
  3541. }
  3542. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3543. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3544. "assuming the HCB Address points to good F/W\n",
  3545. ioc->name));
  3546. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3547. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3548. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3549. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3550. "re-enable the HCDW\n", ioc->name));
  3551. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3552. &ioc->chip->HCBSize);
  3553. }
  3554. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3555. ioc->name));
  3556. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3557. &ioc->chip->HostDiagnostic);
  3558. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3559. "diagnostic register\n", ioc->name));
  3560. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3561. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3562. "READY state\n", ioc->name));
  3563. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3564. sleep_flag);
  3565. if (ioc_state) {
  3566. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3567. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3568. goto out;
  3569. }
  3570. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3571. return 0;
  3572. out:
  3573. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3574. return -EFAULT;
  3575. }
  3576. /**
  3577. * _base_make_ioc_ready - put controller in READY state
  3578. * @ioc: per adapter object
  3579. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3580. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3581. *
  3582. * Returns 0 for success, non-zero for failure.
  3583. */
  3584. static int
  3585. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3586. enum reset_type type)
  3587. {
  3588. u32 ioc_state;
  3589. int rc;
  3590. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3591. __func__));
  3592. if (ioc->pci_error_recovery)
  3593. return 0;
  3594. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3595. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3596. ioc->name, __func__, ioc_state));
  3597. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3598. return 0;
  3599. if (ioc_state & MPI2_DOORBELL_USED) {
  3600. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3601. "active!\n", ioc->name));
  3602. goto issue_diag_reset;
  3603. }
  3604. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3605. mpt2sas_base_fault_info(ioc, ioc_state &
  3606. MPI2_DOORBELL_DATA_MASK);
  3607. goto issue_diag_reset;
  3608. }
  3609. if (type == FORCE_BIG_HAMMER)
  3610. goto issue_diag_reset;
  3611. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3612. if (!(_base_send_ioc_reset(ioc,
  3613. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3614. ioc->ioc_reset_count++;
  3615. return 0;
  3616. }
  3617. issue_diag_reset:
  3618. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3619. ioc->ioc_reset_count++;
  3620. return rc;
  3621. }
  3622. /**
  3623. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3624. * @ioc: per adapter object
  3625. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3626. *
  3627. * Returns 0 for success, non-zero for failure.
  3628. */
  3629. static int
  3630. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3631. {
  3632. int r, i;
  3633. unsigned long flags;
  3634. u32 reply_address;
  3635. u16 smid;
  3636. struct _tr_list *delayed_tr, *delayed_tr_next;
  3637. u8 hide_flag;
  3638. struct adapter_reply_queue *reply_q;
  3639. long reply_post_free;
  3640. u32 reply_post_free_sz;
  3641. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3642. __func__));
  3643. /* clean the delayed target reset list */
  3644. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3645. &ioc->delayed_tr_list, list) {
  3646. list_del(&delayed_tr->list);
  3647. kfree(delayed_tr);
  3648. }
  3649. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3650. &ioc->delayed_tr_volume_list, list) {
  3651. list_del(&delayed_tr->list);
  3652. kfree(delayed_tr);
  3653. }
  3654. /* initialize the scsi lookup free list */
  3655. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3656. INIT_LIST_HEAD(&ioc->free_list);
  3657. smid = 1;
  3658. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3659. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3660. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3661. ioc->scsi_lookup[i].smid = smid;
  3662. ioc->scsi_lookup[i].scmd = NULL;
  3663. ioc->scsi_lookup[i].direct_io = 0;
  3664. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3665. &ioc->free_list);
  3666. }
  3667. /* hi-priority queue */
  3668. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3669. smid = ioc->hi_priority_smid;
  3670. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3671. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3672. ioc->hpr_lookup[i].smid = smid;
  3673. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3674. &ioc->hpr_free_list);
  3675. }
  3676. /* internal queue */
  3677. INIT_LIST_HEAD(&ioc->internal_free_list);
  3678. smid = ioc->internal_smid;
  3679. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3680. ioc->internal_lookup[i].cb_idx = 0xFF;
  3681. ioc->internal_lookup[i].smid = smid;
  3682. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3683. &ioc->internal_free_list);
  3684. }
  3685. /* chain pool */
  3686. INIT_LIST_HEAD(&ioc->free_chain_list);
  3687. for (i = 0; i < ioc->chain_depth; i++)
  3688. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3689. &ioc->free_chain_list);
  3690. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3691. /* initialize Reply Free Queue */
  3692. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3693. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3694. ioc->reply_sz)
  3695. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3696. /* initialize reply queues */
  3697. if (ioc->is_driver_loading)
  3698. _base_assign_reply_queues(ioc);
  3699. /* initialize Reply Post Free Queue */
  3700. reply_post_free = (long)ioc->reply_post_free;
  3701. reply_post_free_sz = ioc->reply_post_queue_depth *
  3702. sizeof(Mpi2DefaultReplyDescriptor_t);
  3703. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3704. reply_q->reply_post_host_index = 0;
  3705. reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
  3706. reply_post_free;
  3707. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3708. reply_q->reply_post_free[i].Words =
  3709. cpu_to_le64(ULLONG_MAX);
  3710. if (!_base_is_controller_msix_enabled(ioc))
  3711. goto skip_init_reply_post_free_queue;
  3712. reply_post_free += reply_post_free_sz;
  3713. }
  3714. skip_init_reply_post_free_queue:
  3715. r = _base_send_ioc_init(ioc, sleep_flag);
  3716. if (r)
  3717. return r;
  3718. /* initialize reply free host index */
  3719. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3720. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3721. /* initialize reply post host index */
  3722. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3723. writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
  3724. &ioc->chip->ReplyPostHostIndex);
  3725. if (!_base_is_controller_msix_enabled(ioc))
  3726. goto skip_init_reply_post_host_index;
  3727. }
  3728. skip_init_reply_post_host_index:
  3729. _base_unmask_interrupts(ioc);
  3730. r = _base_event_notification(ioc, sleep_flag);
  3731. if (r)
  3732. return r;
  3733. if (sleep_flag == CAN_SLEEP)
  3734. _base_static_config_pages(ioc);
  3735. if (ioc->is_driver_loading) {
  3736. if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
  3737. == 0x80) {
  3738. hide_flag = (u8) (
  3739. le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) &
  3740. MFG_PAGE10_HIDE_SSDS_MASK);
  3741. if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
  3742. ioc->mfg_pg10_hide_flag = hide_flag;
  3743. }
  3744. ioc->wait_for_discovery_to_complete =
  3745. _base_determine_wait_on_discovery(ioc);
  3746. return r; /* scan_start and scan_finished support */
  3747. }
  3748. r = _base_send_port_enable(ioc, sleep_flag);
  3749. if (r)
  3750. return r;
  3751. return r;
  3752. }
  3753. /**
  3754. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3755. * @ioc: per adapter object
  3756. *
  3757. * Return nothing.
  3758. */
  3759. void
  3760. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3761. {
  3762. struct pci_dev *pdev = ioc->pdev;
  3763. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3764. __func__));
  3765. _base_mask_interrupts(ioc);
  3766. ioc->shost_recovery = 1;
  3767. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3768. ioc->shost_recovery = 0;
  3769. _base_free_irq(ioc);
  3770. _base_disable_msix(ioc);
  3771. if (ioc->chip_phys)
  3772. iounmap(ioc->chip);
  3773. ioc->chip_phys = 0;
  3774. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3775. pci_disable_pcie_error_reporting(pdev);
  3776. pci_disable_device(pdev);
  3777. return;
  3778. }
  3779. /**
  3780. * mpt2sas_base_attach - attach controller instance
  3781. * @ioc: per adapter object
  3782. *
  3783. * Returns 0 for success, non-zero for failure.
  3784. */
  3785. int
  3786. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3787. {
  3788. int r, i;
  3789. int cpu_id, last_cpu_id = 0;
  3790. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3791. __func__));
  3792. /* setup cpu_msix_table */
  3793. ioc->cpu_count = num_online_cpus();
  3794. for_each_online_cpu(cpu_id)
  3795. last_cpu_id = cpu_id;
  3796. ioc->cpu_msix_table_sz = last_cpu_id + 1;
  3797. ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
  3798. ioc->reply_queue_count = 1;
  3799. if (!ioc->cpu_msix_table) {
  3800. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  3801. "cpu_msix_table failed!!!\n", ioc->name));
  3802. r = -ENOMEM;
  3803. goto out_free_resources;
  3804. }
  3805. if (ioc->is_warpdrive) {
  3806. ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
  3807. sizeof(resource_size_t *), GFP_KERNEL);
  3808. if (!ioc->reply_post_host_index) {
  3809. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
  3810. "for cpu_msix_table failed!!!\n", ioc->name));
  3811. r = -ENOMEM;
  3812. goto out_free_resources;
  3813. }
  3814. }
  3815. r = mpt2sas_base_map_resources(ioc);
  3816. if (r)
  3817. goto out_free_resources;
  3818. if (ioc->is_warpdrive) {
  3819. ioc->reply_post_host_index[0] =
  3820. (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
  3821. for (i = 1; i < ioc->cpu_msix_table_sz; i++)
  3822. ioc->reply_post_host_index[i] = (resource_size_t *)
  3823. ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
  3824. * 4)));
  3825. }
  3826. pci_set_drvdata(ioc->pdev, ioc->shost);
  3827. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3828. if (r)
  3829. goto out_free_resources;
  3830. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3831. if (r)
  3832. goto out_free_resources;
  3833. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3834. sizeof(struct mpt2sas_port_facts), GFP_KERNEL);
  3835. if (!ioc->pfacts) {
  3836. r = -ENOMEM;
  3837. goto out_free_resources;
  3838. }
  3839. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3840. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3841. if (r)
  3842. goto out_free_resources;
  3843. }
  3844. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3845. if (r)
  3846. goto out_free_resources;
  3847. init_waitqueue_head(&ioc->reset_wq);
  3848. /* allocate memory pd handle bitmask list */
  3849. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3850. if (ioc->facts.MaxDevHandle % 8)
  3851. ioc->pd_handles_sz++;
  3852. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3853. GFP_KERNEL);
  3854. if (!ioc->pd_handles) {
  3855. r = -ENOMEM;
  3856. goto out_free_resources;
  3857. }
  3858. ioc->blocking_handles = kzalloc(ioc->pd_handles_sz,
  3859. GFP_KERNEL);
  3860. if (!ioc->blocking_handles) {
  3861. r = -ENOMEM;
  3862. goto out_free_resources;
  3863. }
  3864. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3865. /* base internal command bits */
  3866. mutex_init(&ioc->base_cmds.mutex);
  3867. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3868. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3869. /* port_enable command bits */
  3870. ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3871. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3872. /* transport internal command bits */
  3873. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3874. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3875. mutex_init(&ioc->transport_cmds.mutex);
  3876. /* scsih internal command bits */
  3877. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3878. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3879. mutex_init(&ioc->scsih_cmds.mutex);
  3880. /* task management internal command bits */
  3881. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3882. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3883. mutex_init(&ioc->tm_cmds.mutex);
  3884. /* config page internal command bits */
  3885. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3886. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3887. mutex_init(&ioc->config_cmds.mutex);
  3888. /* ctl module internal command bits */
  3889. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3890. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3891. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3892. mutex_init(&ioc->ctl_cmds.mutex);
  3893. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3894. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3895. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3896. !ioc->ctl_cmds.sense) {
  3897. r = -ENOMEM;
  3898. goto out_free_resources;
  3899. }
  3900. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3901. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3902. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3903. r = -ENOMEM;
  3904. goto out_free_resources;
  3905. }
  3906. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3907. ioc->event_masks[i] = -1;
  3908. /* here we enable the events we care about */
  3909. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3910. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3911. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3912. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3913. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3914. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3915. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3916. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3917. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3918. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3919. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3920. if (r)
  3921. goto out_free_resources;
  3922. if (missing_delay[0] != -1 && missing_delay[1] != -1)
  3923. _base_update_missing_delay(ioc, missing_delay[0],
  3924. missing_delay[1]);
  3925. ioc->non_operational_loop = 0;
  3926. return 0;
  3927. out_free_resources:
  3928. ioc->remove_host = 1;
  3929. mpt2sas_base_free_resources(ioc);
  3930. _base_release_memory_pools(ioc);
  3931. pci_set_drvdata(ioc->pdev, NULL);
  3932. kfree(ioc->cpu_msix_table);
  3933. if (ioc->is_warpdrive)
  3934. kfree(ioc->reply_post_host_index);
  3935. kfree(ioc->pd_handles);
  3936. kfree(ioc->blocking_handles);
  3937. kfree(ioc->tm_cmds.reply);
  3938. kfree(ioc->transport_cmds.reply);
  3939. kfree(ioc->scsih_cmds.reply);
  3940. kfree(ioc->config_cmds.reply);
  3941. kfree(ioc->base_cmds.reply);
  3942. kfree(ioc->port_enable_cmds.reply);
  3943. kfree(ioc->ctl_cmds.reply);
  3944. kfree(ioc->ctl_cmds.sense);
  3945. kfree(ioc->pfacts);
  3946. ioc->ctl_cmds.reply = NULL;
  3947. ioc->base_cmds.reply = NULL;
  3948. ioc->tm_cmds.reply = NULL;
  3949. ioc->scsih_cmds.reply = NULL;
  3950. ioc->transport_cmds.reply = NULL;
  3951. ioc->config_cmds.reply = NULL;
  3952. ioc->pfacts = NULL;
  3953. return r;
  3954. }
  3955. /**
  3956. * mpt2sas_base_detach - remove controller instance
  3957. * @ioc: per adapter object
  3958. *
  3959. * Return nothing.
  3960. */
  3961. void
  3962. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3963. {
  3964. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3965. __func__));
  3966. mpt2sas_base_stop_watchdog(ioc);
  3967. mpt2sas_base_free_resources(ioc);
  3968. _base_release_memory_pools(ioc);
  3969. pci_set_drvdata(ioc->pdev, NULL);
  3970. kfree(ioc->cpu_msix_table);
  3971. if (ioc->is_warpdrive)
  3972. kfree(ioc->reply_post_host_index);
  3973. kfree(ioc->pd_handles);
  3974. kfree(ioc->blocking_handles);
  3975. kfree(ioc->pfacts);
  3976. kfree(ioc->ctl_cmds.reply);
  3977. kfree(ioc->ctl_cmds.sense);
  3978. kfree(ioc->base_cmds.reply);
  3979. kfree(ioc->port_enable_cmds.reply);
  3980. kfree(ioc->tm_cmds.reply);
  3981. kfree(ioc->transport_cmds.reply);
  3982. kfree(ioc->scsih_cmds.reply);
  3983. kfree(ioc->config_cmds.reply);
  3984. }
  3985. /**
  3986. * _base_reset_handler - reset callback handler (for base)
  3987. * @ioc: per adapter object
  3988. * @reset_phase: phase
  3989. *
  3990. * The handler for doing any required cleanup or initialization.
  3991. *
  3992. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3993. * MPT2_IOC_DONE_RESET
  3994. *
  3995. * Return nothing.
  3996. */
  3997. static void
  3998. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3999. {
  4000. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  4001. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  4002. switch (reset_phase) {
  4003. case MPT2_IOC_PRE_RESET:
  4004. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4005. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  4006. break;
  4007. case MPT2_IOC_AFTER_RESET:
  4008. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4009. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  4010. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  4011. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  4012. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  4013. complete(&ioc->transport_cmds.done);
  4014. }
  4015. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  4016. ioc->base_cmds.status |= MPT2_CMD_RESET;
  4017. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  4018. complete(&ioc->base_cmds.done);
  4019. }
  4020. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  4021. ioc->port_enable_failed = 1;
  4022. ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
  4023. mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
  4024. if (ioc->is_driver_loading) {
  4025. ioc->start_scan_failed =
  4026. MPI2_IOCSTATUS_INTERNAL_ERROR;
  4027. ioc->start_scan = 0;
  4028. ioc->port_enable_cmds.status =
  4029. MPT2_CMD_NOT_USED;
  4030. } else
  4031. complete(&ioc->port_enable_cmds.done);
  4032. }
  4033. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  4034. ioc->config_cmds.status |= MPT2_CMD_RESET;
  4035. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  4036. ioc->config_cmds.smid = USHRT_MAX;
  4037. complete(&ioc->config_cmds.done);
  4038. }
  4039. break;
  4040. case MPT2_IOC_DONE_RESET:
  4041. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4042. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  4043. break;
  4044. }
  4045. }
  4046. /**
  4047. * _wait_for_commands_to_complete - reset controller
  4048. * @ioc: Pointer to MPT_ADAPTER structure
  4049. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4050. *
  4051. * This function waiting(3s) for all pending commands to complete
  4052. * prior to putting controller in reset.
  4053. */
  4054. static void
  4055. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  4056. {
  4057. u32 ioc_state;
  4058. unsigned long flags;
  4059. u16 i;
  4060. ioc->pending_io_count = 0;
  4061. if (sleep_flag != CAN_SLEEP)
  4062. return;
  4063. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  4064. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  4065. return;
  4066. /* pending command count */
  4067. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  4068. for (i = 0; i < ioc->scsiio_depth; i++)
  4069. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  4070. ioc->pending_io_count++;
  4071. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  4072. if (!ioc->pending_io_count)
  4073. return;
  4074. /* wait for pending commands to complete */
  4075. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  4076. }
  4077. /**
  4078. * mpt2sas_base_hard_reset_handler - reset controller
  4079. * @ioc: Pointer to MPT_ADAPTER structure
  4080. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4081. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  4082. *
  4083. * Returns 0 for success, non-zero for failure.
  4084. */
  4085. int
  4086. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  4087. enum reset_type type)
  4088. {
  4089. int r;
  4090. unsigned long flags;
  4091. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  4092. __func__));
  4093. if (ioc->pci_error_recovery) {
  4094. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  4095. ioc->name, __func__);
  4096. r = 0;
  4097. goto out_unlocked;
  4098. }
  4099. if (mpt2sas_fwfault_debug)
  4100. mpt2sas_halt_firmware(ioc);
  4101. /* TODO - What we really should be doing is pulling
  4102. * out all the code associated with NO_SLEEP; its never used.
  4103. * That is legacy code from mpt fusion driver, ported over.
  4104. * I will leave this BUG_ON here for now till its been resolved.
  4105. */
  4106. BUG_ON(sleep_flag == NO_SLEEP);
  4107. /* wait for an active reset in progress to complete */
  4108. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  4109. do {
  4110. ssleep(1);
  4111. } while (ioc->shost_recovery == 1);
  4112. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4113. __func__));
  4114. return ioc->ioc_reset_in_progress_status;
  4115. }
  4116. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4117. ioc->shost_recovery = 1;
  4118. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4119. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  4120. _wait_for_commands_to_complete(ioc, sleep_flag);
  4121. _base_mask_interrupts(ioc);
  4122. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  4123. if (r)
  4124. goto out;
  4125. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  4126. /* If this hard reset is called while port enable is active, then
  4127. * there is no reason to call make_ioc_operational
  4128. */
  4129. if (ioc->is_driver_loading && ioc->port_enable_failed) {
  4130. ioc->remove_host = 1;
  4131. r = -EFAULT;
  4132. goto out;
  4133. }
  4134. r = _base_make_ioc_operational(ioc, sleep_flag);
  4135. if (!r)
  4136. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  4137. out:
  4138. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  4139. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  4140. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4141. ioc->ioc_reset_in_progress_status = r;
  4142. ioc->shost_recovery = 0;
  4143. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4144. mutex_unlock(&ioc->reset_in_progress_mutex);
  4145. out_unlocked:
  4146. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4147. __func__));
  4148. return r;
  4149. }