ipr.c 278 KB

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  1. /*
  2. * ipr.c -- driver for IBM Power Linux RAID adapters
  3. *
  4. * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
  5. *
  6. * Copyright (C) 2003, 2004 IBM Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. /*
  24. * Notes:
  25. *
  26. * This driver is used to control the following SCSI adapters:
  27. *
  28. * IBM iSeries: 5702, 5703, 2780, 5709, 570A, 570B
  29. *
  30. * IBM pSeries: PCI-X Dual Channel Ultra 320 SCSI RAID Adapter
  31. * PCI-X Dual Channel Ultra 320 SCSI Adapter
  32. * PCI-X Dual Channel Ultra 320 SCSI RAID Enablement Card
  33. * Embedded SCSI adapter on p615 and p655 systems
  34. *
  35. * Supported Hardware Features:
  36. * - Ultra 320 SCSI controller
  37. * - PCI-X host interface
  38. * - Embedded PowerPC RISC Processor and Hardware XOR DMA Engine
  39. * - Non-Volatile Write Cache
  40. * - Supports attachment of non-RAID disks, tape, and optical devices
  41. * - RAID Levels 0, 5, 10
  42. * - Hot spare
  43. * - Background Parity Checking
  44. * - Background Data Scrubbing
  45. * - Ability to increase the capacity of an existing RAID 5 disk array
  46. * by adding disks
  47. *
  48. * Driver Features:
  49. * - Tagged command queuing
  50. * - Adapter microcode download
  51. * - PCI hot plug
  52. * - SCSI device hot plug
  53. *
  54. */
  55. #include <linux/fs.h>
  56. #include <linux/init.h>
  57. #include <linux/types.h>
  58. #include <linux/errno.h>
  59. #include <linux/kernel.h>
  60. #include <linux/slab.h>
  61. #include <linux/vmalloc.h>
  62. #include <linux/ioport.h>
  63. #include <linux/delay.h>
  64. #include <linux/pci.h>
  65. #include <linux/wait.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/sched.h>
  68. #include <linux/interrupt.h>
  69. #include <linux/blkdev.h>
  70. #include <linux/firmware.h>
  71. #include <linux/module.h>
  72. #include <linux/moduleparam.h>
  73. #include <linux/libata.h>
  74. #include <linux/hdreg.h>
  75. #include <linux/reboot.h>
  76. #include <linux/stringify.h>
  77. #include <asm/io.h>
  78. #include <asm/irq.h>
  79. #include <asm/processor.h>
  80. #include <scsi/scsi.h>
  81. #include <scsi/scsi_host.h>
  82. #include <scsi/scsi_tcq.h>
  83. #include <scsi/scsi_eh.h>
  84. #include <scsi/scsi_cmnd.h>
  85. #include "ipr.h"
  86. /*
  87. * Global Data
  88. */
  89. static LIST_HEAD(ipr_ioa_head);
  90. static unsigned int ipr_log_level = IPR_DEFAULT_LOG_LEVEL;
  91. static unsigned int ipr_max_speed = 1;
  92. static int ipr_testmode = 0;
  93. static unsigned int ipr_fastfail = 0;
  94. static unsigned int ipr_transop_timeout = 0;
  95. static unsigned int ipr_debug = 0;
  96. static unsigned int ipr_max_devs = IPR_DEFAULT_SIS64_DEVS;
  97. static unsigned int ipr_dual_ioa_raid = 1;
  98. static unsigned int ipr_number_of_msix = 2;
  99. static DEFINE_SPINLOCK(ipr_driver_lock);
  100. /* This table describes the differences between DMA controller chips */
  101. static const struct ipr_chip_cfg_t ipr_chip_cfg[] = {
  102. { /* Gemstone, Citrine, Obsidian, and Obsidian-E */
  103. .mailbox = 0x0042C,
  104. .max_cmds = 100,
  105. .cache_line_size = 0x20,
  106. .clear_isr = 1,
  107. .iopoll_weight = 0,
  108. {
  109. .set_interrupt_mask_reg = 0x0022C,
  110. .clr_interrupt_mask_reg = 0x00230,
  111. .clr_interrupt_mask_reg32 = 0x00230,
  112. .sense_interrupt_mask_reg = 0x0022C,
  113. .sense_interrupt_mask_reg32 = 0x0022C,
  114. .clr_interrupt_reg = 0x00228,
  115. .clr_interrupt_reg32 = 0x00228,
  116. .sense_interrupt_reg = 0x00224,
  117. .sense_interrupt_reg32 = 0x00224,
  118. .ioarrin_reg = 0x00404,
  119. .sense_uproc_interrupt_reg = 0x00214,
  120. .sense_uproc_interrupt_reg32 = 0x00214,
  121. .set_uproc_interrupt_reg = 0x00214,
  122. .set_uproc_interrupt_reg32 = 0x00214,
  123. .clr_uproc_interrupt_reg = 0x00218,
  124. .clr_uproc_interrupt_reg32 = 0x00218
  125. }
  126. },
  127. { /* Snipe and Scamp */
  128. .mailbox = 0x0052C,
  129. .max_cmds = 100,
  130. .cache_line_size = 0x20,
  131. .clear_isr = 1,
  132. .iopoll_weight = 0,
  133. {
  134. .set_interrupt_mask_reg = 0x00288,
  135. .clr_interrupt_mask_reg = 0x0028C,
  136. .clr_interrupt_mask_reg32 = 0x0028C,
  137. .sense_interrupt_mask_reg = 0x00288,
  138. .sense_interrupt_mask_reg32 = 0x00288,
  139. .clr_interrupt_reg = 0x00284,
  140. .clr_interrupt_reg32 = 0x00284,
  141. .sense_interrupt_reg = 0x00280,
  142. .sense_interrupt_reg32 = 0x00280,
  143. .ioarrin_reg = 0x00504,
  144. .sense_uproc_interrupt_reg = 0x00290,
  145. .sense_uproc_interrupt_reg32 = 0x00290,
  146. .set_uproc_interrupt_reg = 0x00290,
  147. .set_uproc_interrupt_reg32 = 0x00290,
  148. .clr_uproc_interrupt_reg = 0x00294,
  149. .clr_uproc_interrupt_reg32 = 0x00294
  150. }
  151. },
  152. { /* CRoC */
  153. .mailbox = 0x00044,
  154. .max_cmds = 1000,
  155. .cache_line_size = 0x20,
  156. .clear_isr = 0,
  157. .iopoll_weight = 64,
  158. {
  159. .set_interrupt_mask_reg = 0x00010,
  160. .clr_interrupt_mask_reg = 0x00018,
  161. .clr_interrupt_mask_reg32 = 0x0001C,
  162. .sense_interrupt_mask_reg = 0x00010,
  163. .sense_interrupt_mask_reg32 = 0x00014,
  164. .clr_interrupt_reg = 0x00008,
  165. .clr_interrupt_reg32 = 0x0000C,
  166. .sense_interrupt_reg = 0x00000,
  167. .sense_interrupt_reg32 = 0x00004,
  168. .ioarrin_reg = 0x00070,
  169. .sense_uproc_interrupt_reg = 0x00020,
  170. .sense_uproc_interrupt_reg32 = 0x00024,
  171. .set_uproc_interrupt_reg = 0x00020,
  172. .set_uproc_interrupt_reg32 = 0x00024,
  173. .clr_uproc_interrupt_reg = 0x00028,
  174. .clr_uproc_interrupt_reg32 = 0x0002C,
  175. .init_feedback_reg = 0x0005C,
  176. .dump_addr_reg = 0x00064,
  177. .dump_data_reg = 0x00068,
  178. .endian_swap_reg = 0x00084
  179. }
  180. },
  181. };
  182. static const struct ipr_chip_t ipr_chip[] = {
  183. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  184. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  185. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  186. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  187. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, IPR_USE_MSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  188. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  189. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  190. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] },
  191. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] }
  192. };
  193. static int ipr_max_bus_speeds[] = {
  194. IPR_80MBs_SCSI_RATE, IPR_U160_SCSI_RATE, IPR_U320_SCSI_RATE
  195. };
  196. MODULE_AUTHOR("Brian King <brking@us.ibm.com>");
  197. MODULE_DESCRIPTION("IBM Power RAID SCSI Adapter Driver");
  198. module_param_named(max_speed, ipr_max_speed, uint, 0);
  199. MODULE_PARM_DESC(max_speed, "Maximum bus speed (0-2). Default: 1=U160. Speeds: 0=80 MB/s, 1=U160, 2=U320");
  200. module_param_named(log_level, ipr_log_level, uint, 0);
  201. MODULE_PARM_DESC(log_level, "Set to 0 - 4 for increasing verbosity of device driver");
  202. module_param_named(testmode, ipr_testmode, int, 0);
  203. MODULE_PARM_DESC(testmode, "DANGEROUS!!! Allows unsupported configurations");
  204. module_param_named(fastfail, ipr_fastfail, int, S_IRUGO | S_IWUSR);
  205. MODULE_PARM_DESC(fastfail, "Reduce timeouts and retries");
  206. module_param_named(transop_timeout, ipr_transop_timeout, int, 0);
  207. MODULE_PARM_DESC(transop_timeout, "Time in seconds to wait for adapter to come operational (default: 300)");
  208. module_param_named(debug, ipr_debug, int, S_IRUGO | S_IWUSR);
  209. MODULE_PARM_DESC(debug, "Enable device driver debugging logging. Set to 1 to enable. (default: 0)");
  210. module_param_named(dual_ioa_raid, ipr_dual_ioa_raid, int, 0);
  211. MODULE_PARM_DESC(dual_ioa_raid, "Enable dual adapter RAID support. Set to 1 to enable. (default: 1)");
  212. module_param_named(max_devs, ipr_max_devs, int, 0);
  213. MODULE_PARM_DESC(max_devs, "Specify the maximum number of physical devices. "
  214. "[Default=" __stringify(IPR_DEFAULT_SIS64_DEVS) "]");
  215. module_param_named(number_of_msix, ipr_number_of_msix, int, 0);
  216. MODULE_PARM_DESC(number_of_msix, "Specify the number of MSIX interrupts to use on capable adapters (1 - 5). (default:2)");
  217. MODULE_LICENSE("GPL");
  218. MODULE_VERSION(IPR_DRIVER_VERSION);
  219. /* A constant array of IOASCs/URCs/Error Messages */
  220. static const
  221. struct ipr_error_table_t ipr_error_table[] = {
  222. {0x00000000, 1, IPR_DEFAULT_LOG_LEVEL,
  223. "8155: An unknown error was received"},
  224. {0x00330000, 0, 0,
  225. "Soft underlength error"},
  226. {0x005A0000, 0, 0,
  227. "Command to be cancelled not found"},
  228. {0x00808000, 0, 0,
  229. "Qualified success"},
  230. {0x01080000, 1, IPR_DEFAULT_LOG_LEVEL,
  231. "FFFE: Soft device bus error recovered by the IOA"},
  232. {0x01088100, 0, IPR_DEFAULT_LOG_LEVEL,
  233. "4101: Soft device bus fabric error"},
  234. {0x01100100, 0, IPR_DEFAULT_LOG_LEVEL,
  235. "FFFC: Logical block guard error recovered by the device"},
  236. {0x01100300, 0, IPR_DEFAULT_LOG_LEVEL,
  237. "FFFC: Logical block reference tag error recovered by the device"},
  238. {0x01108300, 0, IPR_DEFAULT_LOG_LEVEL,
  239. "4171: Recovered scatter list tag / sequence number error"},
  240. {0x01109000, 0, IPR_DEFAULT_LOG_LEVEL,
  241. "FF3D: Recovered logical block CRC error on IOA to Host transfer"},
  242. {0x01109200, 0, IPR_DEFAULT_LOG_LEVEL,
  243. "4171: Recovered logical block sequence number error on IOA to Host transfer"},
  244. {0x0110A000, 0, IPR_DEFAULT_LOG_LEVEL,
  245. "FFFD: Recovered logical block reference tag error detected by the IOA"},
  246. {0x0110A100, 0, IPR_DEFAULT_LOG_LEVEL,
  247. "FFFD: Logical block guard error recovered by the IOA"},
  248. {0x01170600, 0, IPR_DEFAULT_LOG_LEVEL,
  249. "FFF9: Device sector reassign successful"},
  250. {0x01170900, 0, IPR_DEFAULT_LOG_LEVEL,
  251. "FFF7: Media error recovered by device rewrite procedures"},
  252. {0x01180200, 0, IPR_DEFAULT_LOG_LEVEL,
  253. "7001: IOA sector reassignment successful"},
  254. {0x01180500, 0, IPR_DEFAULT_LOG_LEVEL,
  255. "FFF9: Soft media error. Sector reassignment recommended"},
  256. {0x01180600, 0, IPR_DEFAULT_LOG_LEVEL,
  257. "FFF7: Media error recovered by IOA rewrite procedures"},
  258. {0x01418000, 0, IPR_DEFAULT_LOG_LEVEL,
  259. "FF3D: Soft PCI bus error recovered by the IOA"},
  260. {0x01440000, 1, IPR_DEFAULT_LOG_LEVEL,
  261. "FFF6: Device hardware error recovered by the IOA"},
  262. {0x01448100, 0, IPR_DEFAULT_LOG_LEVEL,
  263. "FFF6: Device hardware error recovered by the device"},
  264. {0x01448200, 1, IPR_DEFAULT_LOG_LEVEL,
  265. "FF3D: Soft IOA error recovered by the IOA"},
  266. {0x01448300, 0, IPR_DEFAULT_LOG_LEVEL,
  267. "FFFA: Undefined device response recovered by the IOA"},
  268. {0x014A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  269. "FFF6: Device bus error, message or command phase"},
  270. {0x014A8000, 0, IPR_DEFAULT_LOG_LEVEL,
  271. "FFFE: Task Management Function failed"},
  272. {0x015D0000, 0, IPR_DEFAULT_LOG_LEVEL,
  273. "FFF6: Failure prediction threshold exceeded"},
  274. {0x015D9200, 0, IPR_DEFAULT_LOG_LEVEL,
  275. "8009: Impending cache battery pack failure"},
  276. {0x02040400, 0, 0,
  277. "34FF: Disk device format in progress"},
  278. {0x02048000, 0, IPR_DEFAULT_LOG_LEVEL,
  279. "9070: IOA requested reset"},
  280. {0x023F0000, 0, 0,
  281. "Synchronization required"},
  282. {0x024E0000, 0, 0,
  283. "No ready, IOA shutdown"},
  284. {0x025A0000, 0, 0,
  285. "Not ready, IOA has been shutdown"},
  286. {0x02670100, 0, IPR_DEFAULT_LOG_LEVEL,
  287. "3020: Storage subsystem configuration error"},
  288. {0x03110B00, 0, 0,
  289. "FFF5: Medium error, data unreadable, recommend reassign"},
  290. {0x03110C00, 0, 0,
  291. "7000: Medium error, data unreadable, do not reassign"},
  292. {0x03310000, 0, IPR_DEFAULT_LOG_LEVEL,
  293. "FFF3: Disk media format bad"},
  294. {0x04050000, 0, IPR_DEFAULT_LOG_LEVEL,
  295. "3002: Addressed device failed to respond to selection"},
  296. {0x04080000, 1, IPR_DEFAULT_LOG_LEVEL,
  297. "3100: Device bus error"},
  298. {0x04080100, 0, IPR_DEFAULT_LOG_LEVEL,
  299. "3109: IOA timed out a device command"},
  300. {0x04088000, 0, 0,
  301. "3120: SCSI bus is not operational"},
  302. {0x04088100, 0, IPR_DEFAULT_LOG_LEVEL,
  303. "4100: Hard device bus fabric error"},
  304. {0x04100100, 0, IPR_DEFAULT_LOG_LEVEL,
  305. "310C: Logical block guard error detected by the device"},
  306. {0x04100300, 0, IPR_DEFAULT_LOG_LEVEL,
  307. "310C: Logical block reference tag error detected by the device"},
  308. {0x04108300, 1, IPR_DEFAULT_LOG_LEVEL,
  309. "4170: Scatter list tag / sequence number error"},
  310. {0x04109000, 1, IPR_DEFAULT_LOG_LEVEL,
  311. "8150: Logical block CRC error on IOA to Host transfer"},
  312. {0x04109200, 1, IPR_DEFAULT_LOG_LEVEL,
  313. "4170: Logical block sequence number error on IOA to Host transfer"},
  314. {0x0410A000, 0, IPR_DEFAULT_LOG_LEVEL,
  315. "310D: Logical block reference tag error detected by the IOA"},
  316. {0x0410A100, 0, IPR_DEFAULT_LOG_LEVEL,
  317. "310D: Logical block guard error detected by the IOA"},
  318. {0x04118000, 0, IPR_DEFAULT_LOG_LEVEL,
  319. "9000: IOA reserved area data check"},
  320. {0x04118100, 0, IPR_DEFAULT_LOG_LEVEL,
  321. "9001: IOA reserved area invalid data pattern"},
  322. {0x04118200, 0, IPR_DEFAULT_LOG_LEVEL,
  323. "9002: IOA reserved area LRC error"},
  324. {0x04118300, 1, IPR_DEFAULT_LOG_LEVEL,
  325. "Hardware Error, IOA metadata access error"},
  326. {0x04320000, 0, IPR_DEFAULT_LOG_LEVEL,
  327. "102E: Out of alternate sectors for disk storage"},
  328. {0x04330000, 1, IPR_DEFAULT_LOG_LEVEL,
  329. "FFF4: Data transfer underlength error"},
  330. {0x04338000, 1, IPR_DEFAULT_LOG_LEVEL,
  331. "FFF4: Data transfer overlength error"},
  332. {0x043E0100, 0, IPR_DEFAULT_LOG_LEVEL,
  333. "3400: Logical unit failure"},
  334. {0x04408500, 0, IPR_DEFAULT_LOG_LEVEL,
  335. "FFF4: Device microcode is corrupt"},
  336. {0x04418000, 1, IPR_DEFAULT_LOG_LEVEL,
  337. "8150: PCI bus error"},
  338. {0x04430000, 1, 0,
  339. "Unsupported device bus message received"},
  340. {0x04440000, 1, IPR_DEFAULT_LOG_LEVEL,
  341. "FFF4: Disk device problem"},
  342. {0x04448200, 1, IPR_DEFAULT_LOG_LEVEL,
  343. "8150: Permanent IOA failure"},
  344. {0x04448300, 0, IPR_DEFAULT_LOG_LEVEL,
  345. "3010: Disk device returned wrong response to IOA"},
  346. {0x04448400, 0, IPR_DEFAULT_LOG_LEVEL,
  347. "8151: IOA microcode error"},
  348. {0x04448500, 0, 0,
  349. "Device bus status error"},
  350. {0x04448600, 0, IPR_DEFAULT_LOG_LEVEL,
  351. "8157: IOA error requiring IOA reset to recover"},
  352. {0x04448700, 0, 0,
  353. "ATA device status error"},
  354. {0x04490000, 0, 0,
  355. "Message reject received from the device"},
  356. {0x04449200, 0, IPR_DEFAULT_LOG_LEVEL,
  357. "8008: A permanent cache battery pack failure occurred"},
  358. {0x0444A000, 0, IPR_DEFAULT_LOG_LEVEL,
  359. "9090: Disk unit has been modified after the last known status"},
  360. {0x0444A200, 0, IPR_DEFAULT_LOG_LEVEL,
  361. "9081: IOA detected device error"},
  362. {0x0444A300, 0, IPR_DEFAULT_LOG_LEVEL,
  363. "9082: IOA detected device error"},
  364. {0x044A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  365. "3110: Device bus error, message or command phase"},
  366. {0x044A8000, 1, IPR_DEFAULT_LOG_LEVEL,
  367. "3110: SAS Command / Task Management Function failed"},
  368. {0x04670400, 0, IPR_DEFAULT_LOG_LEVEL,
  369. "9091: Incorrect hardware configuration change has been detected"},
  370. {0x04678000, 0, IPR_DEFAULT_LOG_LEVEL,
  371. "9073: Invalid multi-adapter configuration"},
  372. {0x04678100, 0, IPR_DEFAULT_LOG_LEVEL,
  373. "4010: Incorrect connection between cascaded expanders"},
  374. {0x04678200, 0, IPR_DEFAULT_LOG_LEVEL,
  375. "4020: Connections exceed IOA design limits"},
  376. {0x04678300, 0, IPR_DEFAULT_LOG_LEVEL,
  377. "4030: Incorrect multipath connection"},
  378. {0x04679000, 0, IPR_DEFAULT_LOG_LEVEL,
  379. "4110: Unsupported enclosure function"},
  380. {0x046E0000, 0, IPR_DEFAULT_LOG_LEVEL,
  381. "FFF4: Command to logical unit failed"},
  382. {0x05240000, 1, 0,
  383. "Illegal request, invalid request type or request packet"},
  384. {0x05250000, 0, 0,
  385. "Illegal request, invalid resource handle"},
  386. {0x05258000, 0, 0,
  387. "Illegal request, commands not allowed to this device"},
  388. {0x05258100, 0, 0,
  389. "Illegal request, command not allowed to a secondary adapter"},
  390. {0x05258200, 0, 0,
  391. "Illegal request, command not allowed to a non-optimized resource"},
  392. {0x05260000, 0, 0,
  393. "Illegal request, invalid field in parameter list"},
  394. {0x05260100, 0, 0,
  395. "Illegal request, parameter not supported"},
  396. {0x05260200, 0, 0,
  397. "Illegal request, parameter value invalid"},
  398. {0x052C0000, 0, 0,
  399. "Illegal request, command sequence error"},
  400. {0x052C8000, 1, 0,
  401. "Illegal request, dual adapter support not enabled"},
  402. {0x06040500, 0, IPR_DEFAULT_LOG_LEVEL,
  403. "9031: Array protection temporarily suspended, protection resuming"},
  404. {0x06040600, 0, IPR_DEFAULT_LOG_LEVEL,
  405. "9040: Array protection temporarily suspended, protection resuming"},
  406. {0x06288000, 0, IPR_DEFAULT_LOG_LEVEL,
  407. "3140: Device bus not ready to ready transition"},
  408. {0x06290000, 0, IPR_DEFAULT_LOG_LEVEL,
  409. "FFFB: SCSI bus was reset"},
  410. {0x06290500, 0, 0,
  411. "FFFE: SCSI bus transition to single ended"},
  412. {0x06290600, 0, 0,
  413. "FFFE: SCSI bus transition to LVD"},
  414. {0x06298000, 0, IPR_DEFAULT_LOG_LEVEL,
  415. "FFFB: SCSI bus was reset by another initiator"},
  416. {0x063F0300, 0, IPR_DEFAULT_LOG_LEVEL,
  417. "3029: A device replacement has occurred"},
  418. {0x064C8000, 0, IPR_DEFAULT_LOG_LEVEL,
  419. "9051: IOA cache data exists for a missing or failed device"},
  420. {0x064C8100, 0, IPR_DEFAULT_LOG_LEVEL,
  421. "9055: Auxiliary cache IOA contains cache data needed by the primary IOA"},
  422. {0x06670100, 0, IPR_DEFAULT_LOG_LEVEL,
  423. "9025: Disk unit is not supported at its physical location"},
  424. {0x06670600, 0, IPR_DEFAULT_LOG_LEVEL,
  425. "3020: IOA detected a SCSI bus configuration error"},
  426. {0x06678000, 0, IPR_DEFAULT_LOG_LEVEL,
  427. "3150: SCSI bus configuration error"},
  428. {0x06678100, 0, IPR_DEFAULT_LOG_LEVEL,
  429. "9074: Asymmetric advanced function disk configuration"},
  430. {0x06678300, 0, IPR_DEFAULT_LOG_LEVEL,
  431. "4040: Incomplete multipath connection between IOA and enclosure"},
  432. {0x06678400, 0, IPR_DEFAULT_LOG_LEVEL,
  433. "4041: Incomplete multipath connection between enclosure and device"},
  434. {0x06678500, 0, IPR_DEFAULT_LOG_LEVEL,
  435. "9075: Incomplete multipath connection between IOA and remote IOA"},
  436. {0x06678600, 0, IPR_DEFAULT_LOG_LEVEL,
  437. "9076: Configuration error, missing remote IOA"},
  438. {0x06679100, 0, IPR_DEFAULT_LOG_LEVEL,
  439. "4050: Enclosure does not support a required multipath function"},
  440. {0x06690000, 0, IPR_DEFAULT_LOG_LEVEL,
  441. "4070: Logically bad block written on device"},
  442. {0x06690200, 0, IPR_DEFAULT_LOG_LEVEL,
  443. "9041: Array protection temporarily suspended"},
  444. {0x06698200, 0, IPR_DEFAULT_LOG_LEVEL,
  445. "9042: Corrupt array parity detected on specified device"},
  446. {0x066B0200, 0, IPR_DEFAULT_LOG_LEVEL,
  447. "9030: Array no longer protected due to missing or failed disk unit"},
  448. {0x066B8000, 0, IPR_DEFAULT_LOG_LEVEL,
  449. "9071: Link operational transition"},
  450. {0x066B8100, 0, IPR_DEFAULT_LOG_LEVEL,
  451. "9072: Link not operational transition"},
  452. {0x066B8200, 0, IPR_DEFAULT_LOG_LEVEL,
  453. "9032: Array exposed but still protected"},
  454. {0x066B8300, 0, IPR_DEFAULT_LOG_LEVEL + 1,
  455. "70DD: Device forced failed by disrupt device command"},
  456. {0x066B9100, 0, IPR_DEFAULT_LOG_LEVEL,
  457. "4061: Multipath redundancy level got better"},
  458. {0x066B9200, 0, IPR_DEFAULT_LOG_LEVEL,
  459. "4060: Multipath redundancy level got worse"},
  460. {0x07270000, 0, 0,
  461. "Failure due to other device"},
  462. {0x07278000, 0, IPR_DEFAULT_LOG_LEVEL,
  463. "9008: IOA does not support functions expected by devices"},
  464. {0x07278100, 0, IPR_DEFAULT_LOG_LEVEL,
  465. "9010: Cache data associated with attached devices cannot be found"},
  466. {0x07278200, 0, IPR_DEFAULT_LOG_LEVEL,
  467. "9011: Cache data belongs to devices other than those attached"},
  468. {0x07278400, 0, IPR_DEFAULT_LOG_LEVEL,
  469. "9020: Array missing 2 or more devices with only 1 device present"},
  470. {0x07278500, 0, IPR_DEFAULT_LOG_LEVEL,
  471. "9021: Array missing 2 or more devices with 2 or more devices present"},
  472. {0x07278600, 0, IPR_DEFAULT_LOG_LEVEL,
  473. "9022: Exposed array is missing a required device"},
  474. {0x07278700, 0, IPR_DEFAULT_LOG_LEVEL,
  475. "9023: Array member(s) not at required physical locations"},
  476. {0x07278800, 0, IPR_DEFAULT_LOG_LEVEL,
  477. "9024: Array not functional due to present hardware configuration"},
  478. {0x07278900, 0, IPR_DEFAULT_LOG_LEVEL,
  479. "9026: Array not functional due to present hardware configuration"},
  480. {0x07278A00, 0, IPR_DEFAULT_LOG_LEVEL,
  481. "9027: Array is missing a device and parity is out of sync"},
  482. {0x07278B00, 0, IPR_DEFAULT_LOG_LEVEL,
  483. "9028: Maximum number of arrays already exist"},
  484. {0x07278C00, 0, IPR_DEFAULT_LOG_LEVEL,
  485. "9050: Required cache data cannot be located for a disk unit"},
  486. {0x07278D00, 0, IPR_DEFAULT_LOG_LEVEL,
  487. "9052: Cache data exists for a device that has been modified"},
  488. {0x07278F00, 0, IPR_DEFAULT_LOG_LEVEL,
  489. "9054: IOA resources not available due to previous problems"},
  490. {0x07279100, 0, IPR_DEFAULT_LOG_LEVEL,
  491. "9092: Disk unit requires initialization before use"},
  492. {0x07279200, 0, IPR_DEFAULT_LOG_LEVEL,
  493. "9029: Incorrect hardware configuration change has been detected"},
  494. {0x07279600, 0, IPR_DEFAULT_LOG_LEVEL,
  495. "9060: One or more disk pairs are missing from an array"},
  496. {0x07279700, 0, IPR_DEFAULT_LOG_LEVEL,
  497. "9061: One or more disks are missing from an array"},
  498. {0x07279800, 0, IPR_DEFAULT_LOG_LEVEL,
  499. "9062: One or more disks are missing from an array"},
  500. {0x07279900, 0, IPR_DEFAULT_LOG_LEVEL,
  501. "9063: Maximum number of functional arrays has been exceeded"},
  502. {0x0B260000, 0, 0,
  503. "Aborted command, invalid descriptor"},
  504. {0x0B5A0000, 0, 0,
  505. "Command terminated by host"}
  506. };
  507. static const struct ipr_ses_table_entry ipr_ses_table[] = {
  508. { "2104-DL1 ", "XXXXXXXXXXXXXXXX", 80 },
  509. { "2104-TL1 ", "XXXXXXXXXXXXXXXX", 80 },
  510. { "HSBP07M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 7 slot */
  511. { "HSBP05M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 5 slot */
  512. { "HSBP05M S U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Bowtie */
  513. { "HSBP06E ASU2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* MartinFenning */
  514. { "2104-DU3 ", "XXXXXXXXXXXXXXXX", 160 },
  515. { "2104-TU3 ", "XXXXXXXXXXXXXXXX", 160 },
  516. { "HSBP04C RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  517. { "HSBP06E RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  518. { "St V1S2 ", "XXXXXXXXXXXXXXXX", 160 },
  519. { "HSBPD4M PU3SCSI", "XXXXXXX*XXXXXXXX", 160 },
  520. { "VSBPD1H U3SCSI", "XXXXXXX*XXXXXXXX", 160 }
  521. };
  522. /*
  523. * Function Prototypes
  524. */
  525. static int ipr_reset_alert(struct ipr_cmnd *);
  526. static void ipr_process_ccn(struct ipr_cmnd *);
  527. static void ipr_process_error(struct ipr_cmnd *);
  528. static void ipr_reset_ioa_job(struct ipr_cmnd *);
  529. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *,
  530. enum ipr_shutdown_type);
  531. #ifdef CONFIG_SCSI_IPR_TRACE
  532. /**
  533. * ipr_trc_hook - Add a trace entry to the driver trace
  534. * @ipr_cmd: ipr command struct
  535. * @type: trace type
  536. * @add_data: additional data
  537. *
  538. * Return value:
  539. * none
  540. **/
  541. static void ipr_trc_hook(struct ipr_cmnd *ipr_cmd,
  542. u8 type, u32 add_data)
  543. {
  544. struct ipr_trace_entry *trace_entry;
  545. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  546. trace_entry = &ioa_cfg->trace[atomic_add_return
  547. (1, &ioa_cfg->trace_index)%IPR_NUM_TRACE_ENTRIES];
  548. trace_entry->time = jiffies;
  549. trace_entry->op_code = ipr_cmd->ioarcb.cmd_pkt.cdb[0];
  550. trace_entry->type = type;
  551. if (ipr_cmd->ioa_cfg->sis64)
  552. trace_entry->ata_op_code = ipr_cmd->i.ata_ioadl.regs.command;
  553. else
  554. trace_entry->ata_op_code = ipr_cmd->ioarcb.u.add_data.u.regs.command;
  555. trace_entry->cmd_index = ipr_cmd->cmd_index & 0xff;
  556. trace_entry->res_handle = ipr_cmd->ioarcb.res_handle;
  557. trace_entry->u.add_data = add_data;
  558. wmb();
  559. }
  560. #else
  561. #define ipr_trc_hook(ipr_cmd, type, add_data) do { } while (0)
  562. #endif
  563. /**
  564. * ipr_lock_and_done - Acquire lock and complete command
  565. * @ipr_cmd: ipr command struct
  566. *
  567. * Return value:
  568. * none
  569. **/
  570. static void ipr_lock_and_done(struct ipr_cmnd *ipr_cmd)
  571. {
  572. unsigned long lock_flags;
  573. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  574. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  575. ipr_cmd->done(ipr_cmd);
  576. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  577. }
  578. /**
  579. * ipr_reinit_ipr_cmnd - Re-initialize an IPR Cmnd block for reuse
  580. * @ipr_cmd: ipr command struct
  581. *
  582. * Return value:
  583. * none
  584. **/
  585. static void ipr_reinit_ipr_cmnd(struct ipr_cmnd *ipr_cmd)
  586. {
  587. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  588. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  589. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  590. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  591. int hrrq_id;
  592. hrrq_id = ioarcb->cmd_pkt.hrrq_id;
  593. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  594. ioarcb->cmd_pkt.hrrq_id = hrrq_id;
  595. ioarcb->data_transfer_length = 0;
  596. ioarcb->read_data_transfer_length = 0;
  597. ioarcb->ioadl_len = 0;
  598. ioarcb->read_ioadl_len = 0;
  599. if (ipr_cmd->ioa_cfg->sis64) {
  600. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  601. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  602. ioasa64->u.gata.status = 0;
  603. } else {
  604. ioarcb->write_ioadl_addr =
  605. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  606. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  607. ioasa->u.gata.status = 0;
  608. }
  609. ioasa->hdr.ioasc = 0;
  610. ioasa->hdr.residual_data_len = 0;
  611. ipr_cmd->scsi_cmd = NULL;
  612. ipr_cmd->qc = NULL;
  613. ipr_cmd->sense_buffer[0] = 0;
  614. ipr_cmd->dma_use_sg = 0;
  615. }
  616. /**
  617. * ipr_init_ipr_cmnd - Initialize an IPR Cmnd block
  618. * @ipr_cmd: ipr command struct
  619. *
  620. * Return value:
  621. * none
  622. **/
  623. static void ipr_init_ipr_cmnd(struct ipr_cmnd *ipr_cmd,
  624. void (*fast_done) (struct ipr_cmnd *))
  625. {
  626. ipr_reinit_ipr_cmnd(ipr_cmd);
  627. ipr_cmd->u.scratch = 0;
  628. ipr_cmd->sibling = NULL;
  629. ipr_cmd->fast_done = fast_done;
  630. init_timer(&ipr_cmd->timer);
  631. }
  632. /**
  633. * __ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block
  634. * @ioa_cfg: ioa config struct
  635. *
  636. * Return value:
  637. * pointer to ipr command struct
  638. **/
  639. static
  640. struct ipr_cmnd *__ipr_get_free_ipr_cmnd(struct ipr_hrr_queue *hrrq)
  641. {
  642. struct ipr_cmnd *ipr_cmd = NULL;
  643. if (likely(!list_empty(&hrrq->hrrq_free_q))) {
  644. ipr_cmd = list_entry(hrrq->hrrq_free_q.next,
  645. struct ipr_cmnd, queue);
  646. list_del(&ipr_cmd->queue);
  647. }
  648. return ipr_cmd;
  649. }
  650. /**
  651. * ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block and initialize it
  652. * @ioa_cfg: ioa config struct
  653. *
  654. * Return value:
  655. * pointer to ipr command struct
  656. **/
  657. static
  658. struct ipr_cmnd *ipr_get_free_ipr_cmnd(struct ipr_ioa_cfg *ioa_cfg)
  659. {
  660. struct ipr_cmnd *ipr_cmd =
  661. __ipr_get_free_ipr_cmnd(&ioa_cfg->hrrq[IPR_INIT_HRRQ]);
  662. ipr_init_ipr_cmnd(ipr_cmd, ipr_lock_and_done);
  663. return ipr_cmd;
  664. }
  665. /**
  666. * ipr_mask_and_clear_interrupts - Mask all and clear specified interrupts
  667. * @ioa_cfg: ioa config struct
  668. * @clr_ints: interrupts to clear
  669. *
  670. * This function masks all interrupts on the adapter, then clears the
  671. * interrupts specified in the mask
  672. *
  673. * Return value:
  674. * none
  675. **/
  676. static void ipr_mask_and_clear_interrupts(struct ipr_ioa_cfg *ioa_cfg,
  677. u32 clr_ints)
  678. {
  679. volatile u32 int_reg;
  680. int i;
  681. /* Stop new interrupts */
  682. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  683. spin_lock(&ioa_cfg->hrrq[i]._lock);
  684. ioa_cfg->hrrq[i].allow_interrupts = 0;
  685. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  686. }
  687. wmb();
  688. /* Set interrupt mask to stop all new interrupts */
  689. if (ioa_cfg->sis64)
  690. writeq(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  691. else
  692. writel(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  693. /* Clear any pending interrupts */
  694. if (ioa_cfg->sis64)
  695. writel(~0, ioa_cfg->regs.clr_interrupt_reg);
  696. writel(clr_ints, ioa_cfg->regs.clr_interrupt_reg32);
  697. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  698. }
  699. /**
  700. * ipr_save_pcix_cmd_reg - Save PCI-X command register
  701. * @ioa_cfg: ioa config struct
  702. *
  703. * Return value:
  704. * 0 on success / -EIO on failure
  705. **/
  706. static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  707. {
  708. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  709. if (pcix_cmd_reg == 0)
  710. return 0;
  711. if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  712. &ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  713. dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n");
  714. return -EIO;
  715. }
  716. ioa_cfg->saved_pcix_cmd_reg |= PCI_X_CMD_DPERR_E | PCI_X_CMD_ERO;
  717. return 0;
  718. }
  719. /**
  720. * ipr_set_pcix_cmd_reg - Setup PCI-X command register
  721. * @ioa_cfg: ioa config struct
  722. *
  723. * Return value:
  724. * 0 on success / -EIO on failure
  725. **/
  726. static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  727. {
  728. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  729. if (pcix_cmd_reg) {
  730. if (pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  731. ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  732. dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X command register\n");
  733. return -EIO;
  734. }
  735. }
  736. return 0;
  737. }
  738. /**
  739. * ipr_sata_eh_done - done function for aborted SATA commands
  740. * @ipr_cmd: ipr command struct
  741. *
  742. * This function is invoked for ops generated to SATA
  743. * devices which are being aborted.
  744. *
  745. * Return value:
  746. * none
  747. **/
  748. static void ipr_sata_eh_done(struct ipr_cmnd *ipr_cmd)
  749. {
  750. struct ata_queued_cmd *qc = ipr_cmd->qc;
  751. struct ipr_sata_port *sata_port = qc->ap->private_data;
  752. qc->err_mask |= AC_ERR_OTHER;
  753. sata_port->ioasa.status |= ATA_BUSY;
  754. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  755. ata_qc_complete(qc);
  756. }
  757. /**
  758. * ipr_scsi_eh_done - mid-layer done function for aborted ops
  759. * @ipr_cmd: ipr command struct
  760. *
  761. * This function is invoked by the interrupt handler for
  762. * ops generated by the SCSI mid-layer which are being aborted.
  763. *
  764. * Return value:
  765. * none
  766. **/
  767. static void ipr_scsi_eh_done(struct ipr_cmnd *ipr_cmd)
  768. {
  769. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  770. scsi_cmd->result |= (DID_ERROR << 16);
  771. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  772. scsi_cmd->scsi_done(scsi_cmd);
  773. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  774. }
  775. /**
  776. * ipr_fail_all_ops - Fails all outstanding ops.
  777. * @ioa_cfg: ioa config struct
  778. *
  779. * This function fails all outstanding ops.
  780. *
  781. * Return value:
  782. * none
  783. **/
  784. static void ipr_fail_all_ops(struct ipr_ioa_cfg *ioa_cfg)
  785. {
  786. struct ipr_cmnd *ipr_cmd, *temp;
  787. struct ipr_hrr_queue *hrrq;
  788. ENTER;
  789. for_each_hrrq(hrrq, ioa_cfg) {
  790. spin_lock(&hrrq->_lock);
  791. list_for_each_entry_safe(ipr_cmd,
  792. temp, &hrrq->hrrq_pending_q, queue) {
  793. list_del(&ipr_cmd->queue);
  794. ipr_cmd->s.ioasa.hdr.ioasc =
  795. cpu_to_be32(IPR_IOASC_IOA_WAS_RESET);
  796. ipr_cmd->s.ioasa.hdr.ilid =
  797. cpu_to_be32(IPR_DRIVER_ILID);
  798. if (ipr_cmd->scsi_cmd)
  799. ipr_cmd->done = ipr_scsi_eh_done;
  800. else if (ipr_cmd->qc)
  801. ipr_cmd->done = ipr_sata_eh_done;
  802. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH,
  803. IPR_IOASC_IOA_WAS_RESET);
  804. del_timer(&ipr_cmd->timer);
  805. ipr_cmd->done(ipr_cmd);
  806. }
  807. spin_unlock(&hrrq->_lock);
  808. }
  809. LEAVE;
  810. }
  811. /**
  812. * ipr_send_command - Send driver initiated requests.
  813. * @ipr_cmd: ipr command struct
  814. *
  815. * This function sends a command to the adapter using the correct write call.
  816. * In the case of sis64, calculate the ioarcb size required. Then or in the
  817. * appropriate bits.
  818. *
  819. * Return value:
  820. * none
  821. **/
  822. static void ipr_send_command(struct ipr_cmnd *ipr_cmd)
  823. {
  824. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  825. dma_addr_t send_dma_addr = ipr_cmd->dma_addr;
  826. if (ioa_cfg->sis64) {
  827. /* The default size is 256 bytes */
  828. send_dma_addr |= 0x1;
  829. /* If the number of ioadls * size of ioadl > 128 bytes,
  830. then use a 512 byte ioarcb */
  831. if (ipr_cmd->dma_use_sg * sizeof(struct ipr_ioadl64_desc) > 128 )
  832. send_dma_addr |= 0x4;
  833. writeq(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  834. } else
  835. writel(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  836. }
  837. /**
  838. * ipr_do_req - Send driver initiated requests.
  839. * @ipr_cmd: ipr command struct
  840. * @done: done function
  841. * @timeout_func: timeout function
  842. * @timeout: timeout value
  843. *
  844. * This function sends the specified command to the adapter with the
  845. * timeout given. The done function is invoked on command completion.
  846. *
  847. * Return value:
  848. * none
  849. **/
  850. static void ipr_do_req(struct ipr_cmnd *ipr_cmd,
  851. void (*done) (struct ipr_cmnd *),
  852. void (*timeout_func) (struct ipr_cmnd *), u32 timeout)
  853. {
  854. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  855. ipr_cmd->done = done;
  856. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  857. ipr_cmd->timer.expires = jiffies + timeout;
  858. ipr_cmd->timer.function = (void (*)(unsigned long))timeout_func;
  859. add_timer(&ipr_cmd->timer);
  860. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, 0);
  861. ipr_send_command(ipr_cmd);
  862. }
  863. /**
  864. * ipr_internal_cmd_done - Op done function for an internally generated op.
  865. * @ipr_cmd: ipr command struct
  866. *
  867. * This function is the op done function for an internally generated,
  868. * blocking op. It simply wakes the sleeping thread.
  869. *
  870. * Return value:
  871. * none
  872. **/
  873. static void ipr_internal_cmd_done(struct ipr_cmnd *ipr_cmd)
  874. {
  875. if (ipr_cmd->sibling)
  876. ipr_cmd->sibling = NULL;
  877. else
  878. complete(&ipr_cmd->completion);
  879. }
  880. /**
  881. * ipr_init_ioadl - initialize the ioadl for the correct SIS type
  882. * @ipr_cmd: ipr command struct
  883. * @dma_addr: dma address
  884. * @len: transfer length
  885. * @flags: ioadl flag value
  886. *
  887. * This function initializes an ioadl in the case where there is only a single
  888. * descriptor.
  889. *
  890. * Return value:
  891. * nothing
  892. **/
  893. static void ipr_init_ioadl(struct ipr_cmnd *ipr_cmd, dma_addr_t dma_addr,
  894. u32 len, int flags)
  895. {
  896. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  897. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  898. ipr_cmd->dma_use_sg = 1;
  899. if (ipr_cmd->ioa_cfg->sis64) {
  900. ioadl64->flags = cpu_to_be32(flags);
  901. ioadl64->data_len = cpu_to_be32(len);
  902. ioadl64->address = cpu_to_be64(dma_addr);
  903. ipr_cmd->ioarcb.ioadl_len =
  904. cpu_to_be32(sizeof(struct ipr_ioadl64_desc));
  905. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  906. } else {
  907. ioadl->flags_and_data_len = cpu_to_be32(flags | len);
  908. ioadl->address = cpu_to_be32(dma_addr);
  909. if (flags == IPR_IOADL_FLAGS_READ_LAST) {
  910. ipr_cmd->ioarcb.read_ioadl_len =
  911. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  912. ipr_cmd->ioarcb.read_data_transfer_length = cpu_to_be32(len);
  913. } else {
  914. ipr_cmd->ioarcb.ioadl_len =
  915. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  916. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  917. }
  918. }
  919. }
  920. /**
  921. * ipr_send_blocking_cmd - Send command and sleep on its completion.
  922. * @ipr_cmd: ipr command struct
  923. * @timeout_func: function to invoke if command times out
  924. * @timeout: timeout
  925. *
  926. * Return value:
  927. * none
  928. **/
  929. static void ipr_send_blocking_cmd(struct ipr_cmnd *ipr_cmd,
  930. void (*timeout_func) (struct ipr_cmnd *ipr_cmd),
  931. u32 timeout)
  932. {
  933. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  934. init_completion(&ipr_cmd->completion);
  935. ipr_do_req(ipr_cmd, ipr_internal_cmd_done, timeout_func, timeout);
  936. spin_unlock_irq(ioa_cfg->host->host_lock);
  937. wait_for_completion(&ipr_cmd->completion);
  938. spin_lock_irq(ioa_cfg->host->host_lock);
  939. }
  940. static int ipr_get_hrrq_index(struct ipr_ioa_cfg *ioa_cfg)
  941. {
  942. if (ioa_cfg->hrrq_num == 1)
  943. return 0;
  944. else
  945. return (atomic_add_return(1, &ioa_cfg->hrrq_index) % (ioa_cfg->hrrq_num - 1)) + 1;
  946. }
  947. /**
  948. * ipr_send_hcam - Send an HCAM to the adapter.
  949. * @ioa_cfg: ioa config struct
  950. * @type: HCAM type
  951. * @hostrcb: hostrcb struct
  952. *
  953. * This function will send a Host Controlled Async command to the adapter.
  954. * If HCAMs are currently not allowed to be issued to the adapter, it will
  955. * place the hostrcb on the free queue.
  956. *
  957. * Return value:
  958. * none
  959. **/
  960. static void ipr_send_hcam(struct ipr_ioa_cfg *ioa_cfg, u8 type,
  961. struct ipr_hostrcb *hostrcb)
  962. {
  963. struct ipr_cmnd *ipr_cmd;
  964. struct ipr_ioarcb *ioarcb;
  965. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
  966. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  967. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  968. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_pending_q);
  969. ipr_cmd->u.hostrcb = hostrcb;
  970. ioarcb = &ipr_cmd->ioarcb;
  971. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  972. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_HCAM;
  973. ioarcb->cmd_pkt.cdb[0] = IPR_HOST_CONTROLLED_ASYNC;
  974. ioarcb->cmd_pkt.cdb[1] = type;
  975. ioarcb->cmd_pkt.cdb[7] = (sizeof(hostrcb->hcam) >> 8) & 0xff;
  976. ioarcb->cmd_pkt.cdb[8] = sizeof(hostrcb->hcam) & 0xff;
  977. ipr_init_ioadl(ipr_cmd, hostrcb->hostrcb_dma,
  978. sizeof(hostrcb->hcam), IPR_IOADL_FLAGS_READ_LAST);
  979. if (type == IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE)
  980. ipr_cmd->done = ipr_process_ccn;
  981. else
  982. ipr_cmd->done = ipr_process_error;
  983. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_IOA_RES_ADDR);
  984. ipr_send_command(ipr_cmd);
  985. } else {
  986. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  987. }
  988. }
  989. /**
  990. * ipr_update_ata_class - Update the ata class in the resource entry
  991. * @res: resource entry struct
  992. * @proto: cfgte device bus protocol value
  993. *
  994. * Return value:
  995. * none
  996. **/
  997. static void ipr_update_ata_class(struct ipr_resource_entry *res, unsigned int proto)
  998. {
  999. switch (proto) {
  1000. case IPR_PROTO_SATA:
  1001. case IPR_PROTO_SAS_STP:
  1002. res->ata_class = ATA_DEV_ATA;
  1003. break;
  1004. case IPR_PROTO_SATA_ATAPI:
  1005. case IPR_PROTO_SAS_STP_ATAPI:
  1006. res->ata_class = ATA_DEV_ATAPI;
  1007. break;
  1008. default:
  1009. res->ata_class = ATA_DEV_UNKNOWN;
  1010. break;
  1011. };
  1012. }
  1013. /**
  1014. * ipr_init_res_entry - Initialize a resource entry struct.
  1015. * @res: resource entry struct
  1016. * @cfgtew: config table entry wrapper struct
  1017. *
  1018. * Return value:
  1019. * none
  1020. **/
  1021. static void ipr_init_res_entry(struct ipr_resource_entry *res,
  1022. struct ipr_config_table_entry_wrapper *cfgtew)
  1023. {
  1024. int found = 0;
  1025. unsigned int proto;
  1026. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1027. struct ipr_resource_entry *gscsi_res = NULL;
  1028. res->needs_sync_complete = 0;
  1029. res->in_erp = 0;
  1030. res->add_to_ml = 0;
  1031. res->del_from_ml = 0;
  1032. res->resetting_device = 0;
  1033. res->sdev = NULL;
  1034. res->sata_port = NULL;
  1035. if (ioa_cfg->sis64) {
  1036. proto = cfgtew->u.cfgte64->proto;
  1037. res->res_flags = cfgtew->u.cfgte64->res_flags;
  1038. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1039. res->type = cfgtew->u.cfgte64->res_type;
  1040. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1041. sizeof(res->res_path));
  1042. res->bus = 0;
  1043. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1044. sizeof(res->dev_lun.scsi_lun));
  1045. res->lun = scsilun_to_int(&res->dev_lun);
  1046. if (res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1047. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue) {
  1048. if (gscsi_res->dev_id == cfgtew->u.cfgte64->dev_id) {
  1049. found = 1;
  1050. res->target = gscsi_res->target;
  1051. break;
  1052. }
  1053. }
  1054. if (!found) {
  1055. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1056. ioa_cfg->max_devs_supported);
  1057. set_bit(res->target, ioa_cfg->target_ids);
  1058. }
  1059. } else if (res->type == IPR_RES_TYPE_IOAFP) {
  1060. res->bus = IPR_IOAFP_VIRTUAL_BUS;
  1061. res->target = 0;
  1062. } else if (res->type == IPR_RES_TYPE_ARRAY) {
  1063. res->bus = IPR_ARRAY_VIRTUAL_BUS;
  1064. res->target = find_first_zero_bit(ioa_cfg->array_ids,
  1065. ioa_cfg->max_devs_supported);
  1066. set_bit(res->target, ioa_cfg->array_ids);
  1067. } else if (res->type == IPR_RES_TYPE_VOLUME_SET) {
  1068. res->bus = IPR_VSET_VIRTUAL_BUS;
  1069. res->target = find_first_zero_bit(ioa_cfg->vset_ids,
  1070. ioa_cfg->max_devs_supported);
  1071. set_bit(res->target, ioa_cfg->vset_ids);
  1072. } else {
  1073. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1074. ioa_cfg->max_devs_supported);
  1075. set_bit(res->target, ioa_cfg->target_ids);
  1076. }
  1077. } else {
  1078. proto = cfgtew->u.cfgte->proto;
  1079. res->qmodel = IPR_QUEUEING_MODEL(res);
  1080. res->flags = cfgtew->u.cfgte->flags;
  1081. if (res->flags & IPR_IS_IOA_RESOURCE)
  1082. res->type = IPR_RES_TYPE_IOAFP;
  1083. else
  1084. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1085. res->bus = cfgtew->u.cfgte->res_addr.bus;
  1086. res->target = cfgtew->u.cfgte->res_addr.target;
  1087. res->lun = cfgtew->u.cfgte->res_addr.lun;
  1088. res->lun_wwn = get_unaligned_be64(cfgtew->u.cfgte->lun_wwn);
  1089. }
  1090. ipr_update_ata_class(res, proto);
  1091. }
  1092. /**
  1093. * ipr_is_same_device - Determine if two devices are the same.
  1094. * @res: resource entry struct
  1095. * @cfgtew: config table entry wrapper struct
  1096. *
  1097. * Return value:
  1098. * 1 if the devices are the same / 0 otherwise
  1099. **/
  1100. static int ipr_is_same_device(struct ipr_resource_entry *res,
  1101. struct ipr_config_table_entry_wrapper *cfgtew)
  1102. {
  1103. if (res->ioa_cfg->sis64) {
  1104. if (!memcmp(&res->dev_id, &cfgtew->u.cfgte64->dev_id,
  1105. sizeof(cfgtew->u.cfgte64->dev_id)) &&
  1106. !memcmp(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1107. sizeof(cfgtew->u.cfgte64->lun))) {
  1108. return 1;
  1109. }
  1110. } else {
  1111. if (res->bus == cfgtew->u.cfgte->res_addr.bus &&
  1112. res->target == cfgtew->u.cfgte->res_addr.target &&
  1113. res->lun == cfgtew->u.cfgte->res_addr.lun)
  1114. return 1;
  1115. }
  1116. return 0;
  1117. }
  1118. /**
  1119. * __ipr_format_res_path - Format the resource path for printing.
  1120. * @res_path: resource path
  1121. * @buf: buffer
  1122. * @len: length of buffer provided
  1123. *
  1124. * Return value:
  1125. * pointer to buffer
  1126. **/
  1127. static char *__ipr_format_res_path(u8 *res_path, char *buffer, int len)
  1128. {
  1129. int i;
  1130. char *p = buffer;
  1131. *p = '\0';
  1132. p += snprintf(p, buffer + len - p, "%02X", res_path[0]);
  1133. for (i = 1; res_path[i] != 0xff && ((i * 3) < len); i++)
  1134. p += snprintf(p, buffer + len - p, "-%02X", res_path[i]);
  1135. return buffer;
  1136. }
  1137. /**
  1138. * ipr_format_res_path - Format the resource path for printing.
  1139. * @ioa_cfg: ioa config struct
  1140. * @res_path: resource path
  1141. * @buf: buffer
  1142. * @len: length of buffer provided
  1143. *
  1144. * Return value:
  1145. * pointer to buffer
  1146. **/
  1147. static char *ipr_format_res_path(struct ipr_ioa_cfg *ioa_cfg,
  1148. u8 *res_path, char *buffer, int len)
  1149. {
  1150. char *p = buffer;
  1151. *p = '\0';
  1152. p += snprintf(p, buffer + len - p, "%d/", ioa_cfg->host->host_no);
  1153. __ipr_format_res_path(res_path, p, len - (buffer - p));
  1154. return buffer;
  1155. }
  1156. /**
  1157. * ipr_update_res_entry - Update the resource entry.
  1158. * @res: resource entry struct
  1159. * @cfgtew: config table entry wrapper struct
  1160. *
  1161. * Return value:
  1162. * none
  1163. **/
  1164. static void ipr_update_res_entry(struct ipr_resource_entry *res,
  1165. struct ipr_config_table_entry_wrapper *cfgtew)
  1166. {
  1167. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1168. unsigned int proto;
  1169. int new_path = 0;
  1170. if (res->ioa_cfg->sis64) {
  1171. res->flags = cfgtew->u.cfgte64->flags;
  1172. res->res_flags = cfgtew->u.cfgte64->res_flags;
  1173. res->type = cfgtew->u.cfgte64->res_type;
  1174. memcpy(&res->std_inq_data, &cfgtew->u.cfgte64->std_inq_data,
  1175. sizeof(struct ipr_std_inq_data));
  1176. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1177. proto = cfgtew->u.cfgte64->proto;
  1178. res->res_handle = cfgtew->u.cfgte64->res_handle;
  1179. res->dev_id = cfgtew->u.cfgte64->dev_id;
  1180. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1181. sizeof(res->dev_lun.scsi_lun));
  1182. if (memcmp(res->res_path, &cfgtew->u.cfgte64->res_path,
  1183. sizeof(res->res_path))) {
  1184. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1185. sizeof(res->res_path));
  1186. new_path = 1;
  1187. }
  1188. if (res->sdev && new_path)
  1189. sdev_printk(KERN_INFO, res->sdev, "Resource path: %s\n",
  1190. ipr_format_res_path(res->ioa_cfg,
  1191. res->res_path, buffer, sizeof(buffer)));
  1192. } else {
  1193. res->flags = cfgtew->u.cfgte->flags;
  1194. if (res->flags & IPR_IS_IOA_RESOURCE)
  1195. res->type = IPR_RES_TYPE_IOAFP;
  1196. else
  1197. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1198. memcpy(&res->std_inq_data, &cfgtew->u.cfgte->std_inq_data,
  1199. sizeof(struct ipr_std_inq_data));
  1200. res->qmodel = IPR_QUEUEING_MODEL(res);
  1201. proto = cfgtew->u.cfgte->proto;
  1202. res->res_handle = cfgtew->u.cfgte->res_handle;
  1203. }
  1204. ipr_update_ata_class(res, proto);
  1205. }
  1206. /**
  1207. * ipr_clear_res_target - Clear the bit in the bit map representing the target
  1208. * for the resource.
  1209. * @res: resource entry struct
  1210. * @cfgtew: config table entry wrapper struct
  1211. *
  1212. * Return value:
  1213. * none
  1214. **/
  1215. static void ipr_clear_res_target(struct ipr_resource_entry *res)
  1216. {
  1217. struct ipr_resource_entry *gscsi_res = NULL;
  1218. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1219. if (!ioa_cfg->sis64)
  1220. return;
  1221. if (res->bus == IPR_ARRAY_VIRTUAL_BUS)
  1222. clear_bit(res->target, ioa_cfg->array_ids);
  1223. else if (res->bus == IPR_VSET_VIRTUAL_BUS)
  1224. clear_bit(res->target, ioa_cfg->vset_ids);
  1225. else if (res->bus == 0 && res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1226. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue)
  1227. if (gscsi_res->dev_id == res->dev_id && gscsi_res != res)
  1228. return;
  1229. clear_bit(res->target, ioa_cfg->target_ids);
  1230. } else if (res->bus == 0)
  1231. clear_bit(res->target, ioa_cfg->target_ids);
  1232. }
  1233. /**
  1234. * ipr_handle_config_change - Handle a config change from the adapter
  1235. * @ioa_cfg: ioa config struct
  1236. * @hostrcb: hostrcb
  1237. *
  1238. * Return value:
  1239. * none
  1240. **/
  1241. static void ipr_handle_config_change(struct ipr_ioa_cfg *ioa_cfg,
  1242. struct ipr_hostrcb *hostrcb)
  1243. {
  1244. struct ipr_resource_entry *res = NULL;
  1245. struct ipr_config_table_entry_wrapper cfgtew;
  1246. __be32 cc_res_handle;
  1247. u32 is_ndn = 1;
  1248. if (ioa_cfg->sis64) {
  1249. cfgtew.u.cfgte64 = &hostrcb->hcam.u.ccn.u.cfgte64;
  1250. cc_res_handle = cfgtew.u.cfgte64->res_handle;
  1251. } else {
  1252. cfgtew.u.cfgte = &hostrcb->hcam.u.ccn.u.cfgte;
  1253. cc_res_handle = cfgtew.u.cfgte->res_handle;
  1254. }
  1255. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  1256. if (res->res_handle == cc_res_handle) {
  1257. is_ndn = 0;
  1258. break;
  1259. }
  1260. }
  1261. if (is_ndn) {
  1262. if (list_empty(&ioa_cfg->free_res_q)) {
  1263. ipr_send_hcam(ioa_cfg,
  1264. IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE,
  1265. hostrcb);
  1266. return;
  1267. }
  1268. res = list_entry(ioa_cfg->free_res_q.next,
  1269. struct ipr_resource_entry, queue);
  1270. list_del(&res->queue);
  1271. ipr_init_res_entry(res, &cfgtew);
  1272. list_add_tail(&res->queue, &ioa_cfg->used_res_q);
  1273. }
  1274. ipr_update_res_entry(res, &cfgtew);
  1275. if (hostrcb->hcam.notify_type == IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY) {
  1276. if (res->sdev) {
  1277. res->del_from_ml = 1;
  1278. res->res_handle = IPR_INVALID_RES_HANDLE;
  1279. if (ioa_cfg->allow_ml_add_del)
  1280. schedule_work(&ioa_cfg->work_q);
  1281. } else {
  1282. ipr_clear_res_target(res);
  1283. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  1284. }
  1285. } else if (!res->sdev || res->del_from_ml) {
  1286. res->add_to_ml = 1;
  1287. if (ioa_cfg->allow_ml_add_del)
  1288. schedule_work(&ioa_cfg->work_q);
  1289. }
  1290. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1291. }
  1292. /**
  1293. * ipr_process_ccn - Op done function for a CCN.
  1294. * @ipr_cmd: ipr command struct
  1295. *
  1296. * This function is the op done function for a configuration
  1297. * change notification host controlled async from the adapter.
  1298. *
  1299. * Return value:
  1300. * none
  1301. **/
  1302. static void ipr_process_ccn(struct ipr_cmnd *ipr_cmd)
  1303. {
  1304. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  1305. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  1306. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  1307. list_del(&hostrcb->queue);
  1308. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  1309. if (ioasc) {
  1310. if (ioasc != IPR_IOASC_IOA_WAS_RESET)
  1311. dev_err(&ioa_cfg->pdev->dev,
  1312. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  1313. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1314. } else {
  1315. ipr_handle_config_change(ioa_cfg, hostrcb);
  1316. }
  1317. }
  1318. /**
  1319. * strip_and_pad_whitespace - Strip and pad trailing whitespace.
  1320. * @i: index into buffer
  1321. * @buf: string to modify
  1322. *
  1323. * This function will strip all trailing whitespace, pad the end
  1324. * of the string with a single space, and NULL terminate the string.
  1325. *
  1326. * Return value:
  1327. * new length of string
  1328. **/
  1329. static int strip_and_pad_whitespace(int i, char *buf)
  1330. {
  1331. while (i && buf[i] == ' ')
  1332. i--;
  1333. buf[i+1] = ' ';
  1334. buf[i+2] = '\0';
  1335. return i + 2;
  1336. }
  1337. /**
  1338. * ipr_log_vpd_compact - Log the passed extended VPD compactly.
  1339. * @prefix: string to print at start of printk
  1340. * @hostrcb: hostrcb pointer
  1341. * @vpd: vendor/product id/sn struct
  1342. *
  1343. * Return value:
  1344. * none
  1345. **/
  1346. static void ipr_log_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1347. struct ipr_vpd *vpd)
  1348. {
  1349. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN + IPR_SERIAL_NUM_LEN + 3];
  1350. int i = 0;
  1351. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1352. i = strip_and_pad_whitespace(IPR_VENDOR_ID_LEN - 1, buffer);
  1353. memcpy(&buffer[i], vpd->vpids.product_id, IPR_PROD_ID_LEN);
  1354. i = strip_and_pad_whitespace(i + IPR_PROD_ID_LEN - 1, buffer);
  1355. memcpy(&buffer[i], vpd->sn, IPR_SERIAL_NUM_LEN);
  1356. buffer[IPR_SERIAL_NUM_LEN + i] = '\0';
  1357. ipr_hcam_err(hostrcb, "%s VPID/SN: %s\n", prefix, buffer);
  1358. }
  1359. /**
  1360. * ipr_log_vpd - Log the passed VPD to the error log.
  1361. * @vpd: vendor/product id/sn struct
  1362. *
  1363. * Return value:
  1364. * none
  1365. **/
  1366. static void ipr_log_vpd(struct ipr_vpd *vpd)
  1367. {
  1368. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN
  1369. + IPR_SERIAL_NUM_LEN];
  1370. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1371. memcpy(buffer + IPR_VENDOR_ID_LEN, vpd->vpids.product_id,
  1372. IPR_PROD_ID_LEN);
  1373. buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN] = '\0';
  1374. ipr_err("Vendor/Product ID: %s\n", buffer);
  1375. memcpy(buffer, vpd->sn, IPR_SERIAL_NUM_LEN);
  1376. buffer[IPR_SERIAL_NUM_LEN] = '\0';
  1377. ipr_err(" Serial Number: %s\n", buffer);
  1378. }
  1379. /**
  1380. * ipr_log_ext_vpd_compact - Log the passed extended VPD compactly.
  1381. * @prefix: string to print at start of printk
  1382. * @hostrcb: hostrcb pointer
  1383. * @vpd: vendor/product id/sn/wwn struct
  1384. *
  1385. * Return value:
  1386. * none
  1387. **/
  1388. static void ipr_log_ext_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1389. struct ipr_ext_vpd *vpd)
  1390. {
  1391. ipr_log_vpd_compact(prefix, hostrcb, &vpd->vpd);
  1392. ipr_hcam_err(hostrcb, "%s WWN: %08X%08X\n", prefix,
  1393. be32_to_cpu(vpd->wwid[0]), be32_to_cpu(vpd->wwid[1]));
  1394. }
  1395. /**
  1396. * ipr_log_ext_vpd - Log the passed extended VPD to the error log.
  1397. * @vpd: vendor/product id/sn/wwn struct
  1398. *
  1399. * Return value:
  1400. * none
  1401. **/
  1402. static void ipr_log_ext_vpd(struct ipr_ext_vpd *vpd)
  1403. {
  1404. ipr_log_vpd(&vpd->vpd);
  1405. ipr_err(" WWN: %08X%08X\n", be32_to_cpu(vpd->wwid[0]),
  1406. be32_to_cpu(vpd->wwid[1]));
  1407. }
  1408. /**
  1409. * ipr_log_enhanced_cache_error - Log a cache error.
  1410. * @ioa_cfg: ioa config struct
  1411. * @hostrcb: hostrcb struct
  1412. *
  1413. * Return value:
  1414. * none
  1415. **/
  1416. static void ipr_log_enhanced_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1417. struct ipr_hostrcb *hostrcb)
  1418. {
  1419. struct ipr_hostrcb_type_12_error *error;
  1420. if (ioa_cfg->sis64)
  1421. error = &hostrcb->hcam.u.error64.u.type_12_error;
  1422. else
  1423. error = &hostrcb->hcam.u.error.u.type_12_error;
  1424. ipr_err("-----Current Configuration-----\n");
  1425. ipr_err("Cache Directory Card Information:\n");
  1426. ipr_log_ext_vpd(&error->ioa_vpd);
  1427. ipr_err("Adapter Card Information:\n");
  1428. ipr_log_ext_vpd(&error->cfc_vpd);
  1429. ipr_err("-----Expected Configuration-----\n");
  1430. ipr_err("Cache Directory Card Information:\n");
  1431. ipr_log_ext_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1432. ipr_err("Adapter Card Information:\n");
  1433. ipr_log_ext_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1434. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1435. be32_to_cpu(error->ioa_data[0]),
  1436. be32_to_cpu(error->ioa_data[1]),
  1437. be32_to_cpu(error->ioa_data[2]));
  1438. }
  1439. /**
  1440. * ipr_log_cache_error - Log a cache error.
  1441. * @ioa_cfg: ioa config struct
  1442. * @hostrcb: hostrcb struct
  1443. *
  1444. * Return value:
  1445. * none
  1446. **/
  1447. static void ipr_log_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1448. struct ipr_hostrcb *hostrcb)
  1449. {
  1450. struct ipr_hostrcb_type_02_error *error =
  1451. &hostrcb->hcam.u.error.u.type_02_error;
  1452. ipr_err("-----Current Configuration-----\n");
  1453. ipr_err("Cache Directory Card Information:\n");
  1454. ipr_log_vpd(&error->ioa_vpd);
  1455. ipr_err("Adapter Card Information:\n");
  1456. ipr_log_vpd(&error->cfc_vpd);
  1457. ipr_err("-----Expected Configuration-----\n");
  1458. ipr_err("Cache Directory Card Information:\n");
  1459. ipr_log_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1460. ipr_err("Adapter Card Information:\n");
  1461. ipr_log_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1462. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1463. be32_to_cpu(error->ioa_data[0]),
  1464. be32_to_cpu(error->ioa_data[1]),
  1465. be32_to_cpu(error->ioa_data[2]));
  1466. }
  1467. /**
  1468. * ipr_log_enhanced_config_error - Log a configuration error.
  1469. * @ioa_cfg: ioa config struct
  1470. * @hostrcb: hostrcb struct
  1471. *
  1472. * Return value:
  1473. * none
  1474. **/
  1475. static void ipr_log_enhanced_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1476. struct ipr_hostrcb *hostrcb)
  1477. {
  1478. int errors_logged, i;
  1479. struct ipr_hostrcb_device_data_entry_enhanced *dev_entry;
  1480. struct ipr_hostrcb_type_13_error *error;
  1481. error = &hostrcb->hcam.u.error.u.type_13_error;
  1482. errors_logged = be32_to_cpu(error->errors_logged);
  1483. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1484. be32_to_cpu(error->errors_detected), errors_logged);
  1485. dev_entry = error->dev;
  1486. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1487. ipr_err_separator;
  1488. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1489. ipr_log_ext_vpd(&dev_entry->vpd);
  1490. ipr_err("-----New Device Information-----\n");
  1491. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1492. ipr_err("Cache Directory Card Information:\n");
  1493. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1494. ipr_err("Adapter Card Information:\n");
  1495. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1496. }
  1497. }
  1498. /**
  1499. * ipr_log_sis64_config_error - Log a device error.
  1500. * @ioa_cfg: ioa config struct
  1501. * @hostrcb: hostrcb struct
  1502. *
  1503. * Return value:
  1504. * none
  1505. **/
  1506. static void ipr_log_sis64_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1507. struct ipr_hostrcb *hostrcb)
  1508. {
  1509. int errors_logged, i;
  1510. struct ipr_hostrcb64_device_data_entry_enhanced *dev_entry;
  1511. struct ipr_hostrcb_type_23_error *error;
  1512. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1513. error = &hostrcb->hcam.u.error64.u.type_23_error;
  1514. errors_logged = be32_to_cpu(error->errors_logged);
  1515. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1516. be32_to_cpu(error->errors_detected), errors_logged);
  1517. dev_entry = error->dev;
  1518. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1519. ipr_err_separator;
  1520. ipr_err("Device %d : %s", i + 1,
  1521. __ipr_format_res_path(dev_entry->res_path,
  1522. buffer, sizeof(buffer)));
  1523. ipr_log_ext_vpd(&dev_entry->vpd);
  1524. ipr_err("-----New Device Information-----\n");
  1525. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1526. ipr_err("Cache Directory Card Information:\n");
  1527. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1528. ipr_err("Adapter Card Information:\n");
  1529. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1530. }
  1531. }
  1532. /**
  1533. * ipr_log_config_error - Log a configuration error.
  1534. * @ioa_cfg: ioa config struct
  1535. * @hostrcb: hostrcb struct
  1536. *
  1537. * Return value:
  1538. * none
  1539. **/
  1540. static void ipr_log_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1541. struct ipr_hostrcb *hostrcb)
  1542. {
  1543. int errors_logged, i;
  1544. struct ipr_hostrcb_device_data_entry *dev_entry;
  1545. struct ipr_hostrcb_type_03_error *error;
  1546. error = &hostrcb->hcam.u.error.u.type_03_error;
  1547. errors_logged = be32_to_cpu(error->errors_logged);
  1548. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1549. be32_to_cpu(error->errors_detected), errors_logged);
  1550. dev_entry = error->dev;
  1551. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1552. ipr_err_separator;
  1553. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1554. ipr_log_vpd(&dev_entry->vpd);
  1555. ipr_err("-----New Device Information-----\n");
  1556. ipr_log_vpd(&dev_entry->new_vpd);
  1557. ipr_err("Cache Directory Card Information:\n");
  1558. ipr_log_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1559. ipr_err("Adapter Card Information:\n");
  1560. ipr_log_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1561. ipr_err("Additional IOA Data: %08X %08X %08X %08X %08X\n",
  1562. be32_to_cpu(dev_entry->ioa_data[0]),
  1563. be32_to_cpu(dev_entry->ioa_data[1]),
  1564. be32_to_cpu(dev_entry->ioa_data[2]),
  1565. be32_to_cpu(dev_entry->ioa_data[3]),
  1566. be32_to_cpu(dev_entry->ioa_data[4]));
  1567. }
  1568. }
  1569. /**
  1570. * ipr_log_enhanced_array_error - Log an array configuration error.
  1571. * @ioa_cfg: ioa config struct
  1572. * @hostrcb: hostrcb struct
  1573. *
  1574. * Return value:
  1575. * none
  1576. **/
  1577. static void ipr_log_enhanced_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1578. struct ipr_hostrcb *hostrcb)
  1579. {
  1580. int i, num_entries;
  1581. struct ipr_hostrcb_type_14_error *error;
  1582. struct ipr_hostrcb_array_data_entry_enhanced *array_entry;
  1583. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1584. error = &hostrcb->hcam.u.error.u.type_14_error;
  1585. ipr_err_separator;
  1586. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1587. error->protection_level,
  1588. ioa_cfg->host->host_no,
  1589. error->last_func_vset_res_addr.bus,
  1590. error->last_func_vset_res_addr.target,
  1591. error->last_func_vset_res_addr.lun);
  1592. ipr_err_separator;
  1593. array_entry = error->array_member;
  1594. num_entries = min_t(u32, be32_to_cpu(error->num_entries),
  1595. ARRAY_SIZE(error->array_member));
  1596. for (i = 0; i < num_entries; i++, array_entry++) {
  1597. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1598. continue;
  1599. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1600. ipr_err("Exposed Array Member %d:\n", i);
  1601. else
  1602. ipr_err("Array Member %d:\n", i);
  1603. ipr_log_ext_vpd(&array_entry->vpd);
  1604. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1605. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1606. "Expected Location");
  1607. ipr_err_separator;
  1608. }
  1609. }
  1610. /**
  1611. * ipr_log_array_error - Log an array configuration error.
  1612. * @ioa_cfg: ioa config struct
  1613. * @hostrcb: hostrcb struct
  1614. *
  1615. * Return value:
  1616. * none
  1617. **/
  1618. static void ipr_log_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1619. struct ipr_hostrcb *hostrcb)
  1620. {
  1621. int i;
  1622. struct ipr_hostrcb_type_04_error *error;
  1623. struct ipr_hostrcb_array_data_entry *array_entry;
  1624. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1625. error = &hostrcb->hcam.u.error.u.type_04_error;
  1626. ipr_err_separator;
  1627. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1628. error->protection_level,
  1629. ioa_cfg->host->host_no,
  1630. error->last_func_vset_res_addr.bus,
  1631. error->last_func_vset_res_addr.target,
  1632. error->last_func_vset_res_addr.lun);
  1633. ipr_err_separator;
  1634. array_entry = error->array_member;
  1635. for (i = 0; i < 18; i++) {
  1636. if (!memcmp(array_entry->vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1637. continue;
  1638. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1639. ipr_err("Exposed Array Member %d:\n", i);
  1640. else
  1641. ipr_err("Array Member %d:\n", i);
  1642. ipr_log_vpd(&array_entry->vpd);
  1643. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1644. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1645. "Expected Location");
  1646. ipr_err_separator;
  1647. if (i == 9)
  1648. array_entry = error->array_member2;
  1649. else
  1650. array_entry++;
  1651. }
  1652. }
  1653. /**
  1654. * ipr_log_hex_data - Log additional hex IOA error data.
  1655. * @ioa_cfg: ioa config struct
  1656. * @data: IOA error data
  1657. * @len: data length
  1658. *
  1659. * Return value:
  1660. * none
  1661. **/
  1662. static void ipr_log_hex_data(struct ipr_ioa_cfg *ioa_cfg, u32 *data, int len)
  1663. {
  1664. int i;
  1665. if (len == 0)
  1666. return;
  1667. if (ioa_cfg->log_level <= IPR_DEFAULT_LOG_LEVEL)
  1668. len = min_t(int, len, IPR_DEFAULT_MAX_ERROR_DUMP);
  1669. for (i = 0; i < len / 4; i += 4) {
  1670. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  1671. be32_to_cpu(data[i]),
  1672. be32_to_cpu(data[i+1]),
  1673. be32_to_cpu(data[i+2]),
  1674. be32_to_cpu(data[i+3]));
  1675. }
  1676. }
  1677. /**
  1678. * ipr_log_enhanced_dual_ioa_error - Log an enhanced dual adapter error.
  1679. * @ioa_cfg: ioa config struct
  1680. * @hostrcb: hostrcb struct
  1681. *
  1682. * Return value:
  1683. * none
  1684. **/
  1685. static void ipr_log_enhanced_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1686. struct ipr_hostrcb *hostrcb)
  1687. {
  1688. struct ipr_hostrcb_type_17_error *error;
  1689. if (ioa_cfg->sis64)
  1690. error = &hostrcb->hcam.u.error64.u.type_17_error;
  1691. else
  1692. error = &hostrcb->hcam.u.error.u.type_17_error;
  1693. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1694. strim(error->failure_reason);
  1695. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1696. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1697. ipr_log_ext_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1698. ipr_log_hex_data(ioa_cfg, error->data,
  1699. be32_to_cpu(hostrcb->hcam.length) -
  1700. (offsetof(struct ipr_hostrcb_error, u) +
  1701. offsetof(struct ipr_hostrcb_type_17_error, data)));
  1702. }
  1703. /**
  1704. * ipr_log_dual_ioa_error - Log a dual adapter error.
  1705. * @ioa_cfg: ioa config struct
  1706. * @hostrcb: hostrcb struct
  1707. *
  1708. * Return value:
  1709. * none
  1710. **/
  1711. static void ipr_log_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1712. struct ipr_hostrcb *hostrcb)
  1713. {
  1714. struct ipr_hostrcb_type_07_error *error;
  1715. error = &hostrcb->hcam.u.error.u.type_07_error;
  1716. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1717. strim(error->failure_reason);
  1718. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1719. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1720. ipr_log_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1721. ipr_log_hex_data(ioa_cfg, error->data,
  1722. be32_to_cpu(hostrcb->hcam.length) -
  1723. (offsetof(struct ipr_hostrcb_error, u) +
  1724. offsetof(struct ipr_hostrcb_type_07_error, data)));
  1725. }
  1726. static const struct {
  1727. u8 active;
  1728. char *desc;
  1729. } path_active_desc[] = {
  1730. { IPR_PATH_NO_INFO, "Path" },
  1731. { IPR_PATH_ACTIVE, "Active path" },
  1732. { IPR_PATH_NOT_ACTIVE, "Inactive path" }
  1733. };
  1734. static const struct {
  1735. u8 state;
  1736. char *desc;
  1737. } path_state_desc[] = {
  1738. { IPR_PATH_STATE_NO_INFO, "has no path state information available" },
  1739. { IPR_PATH_HEALTHY, "is healthy" },
  1740. { IPR_PATH_DEGRADED, "is degraded" },
  1741. { IPR_PATH_FAILED, "is failed" }
  1742. };
  1743. /**
  1744. * ipr_log_fabric_path - Log a fabric path error
  1745. * @hostrcb: hostrcb struct
  1746. * @fabric: fabric descriptor
  1747. *
  1748. * Return value:
  1749. * none
  1750. **/
  1751. static void ipr_log_fabric_path(struct ipr_hostrcb *hostrcb,
  1752. struct ipr_hostrcb_fabric_desc *fabric)
  1753. {
  1754. int i, j;
  1755. u8 path_state = fabric->path_state;
  1756. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1757. u8 state = path_state & IPR_PATH_STATE_MASK;
  1758. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1759. if (path_active_desc[i].active != active)
  1760. continue;
  1761. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1762. if (path_state_desc[j].state != state)
  1763. continue;
  1764. if (fabric->cascaded_expander == 0xff && fabric->phy == 0xff) {
  1765. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d\n",
  1766. path_active_desc[i].desc, path_state_desc[j].desc,
  1767. fabric->ioa_port);
  1768. } else if (fabric->cascaded_expander == 0xff) {
  1769. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Phy=%d\n",
  1770. path_active_desc[i].desc, path_state_desc[j].desc,
  1771. fabric->ioa_port, fabric->phy);
  1772. } else if (fabric->phy == 0xff) {
  1773. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d\n",
  1774. path_active_desc[i].desc, path_state_desc[j].desc,
  1775. fabric->ioa_port, fabric->cascaded_expander);
  1776. } else {
  1777. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d, Phy=%d\n",
  1778. path_active_desc[i].desc, path_state_desc[j].desc,
  1779. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1780. }
  1781. return;
  1782. }
  1783. }
  1784. ipr_err("Path state=%02X IOA Port=%d Cascade=%d Phy=%d\n", path_state,
  1785. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1786. }
  1787. /**
  1788. * ipr_log64_fabric_path - Log a fabric path error
  1789. * @hostrcb: hostrcb struct
  1790. * @fabric: fabric descriptor
  1791. *
  1792. * Return value:
  1793. * none
  1794. **/
  1795. static void ipr_log64_fabric_path(struct ipr_hostrcb *hostrcb,
  1796. struct ipr_hostrcb64_fabric_desc *fabric)
  1797. {
  1798. int i, j;
  1799. u8 path_state = fabric->path_state;
  1800. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1801. u8 state = path_state & IPR_PATH_STATE_MASK;
  1802. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1803. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1804. if (path_active_desc[i].active != active)
  1805. continue;
  1806. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1807. if (path_state_desc[j].state != state)
  1808. continue;
  1809. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s\n",
  1810. path_active_desc[i].desc, path_state_desc[j].desc,
  1811. ipr_format_res_path(hostrcb->ioa_cfg,
  1812. fabric->res_path,
  1813. buffer, sizeof(buffer)));
  1814. return;
  1815. }
  1816. }
  1817. ipr_err("Path state=%02X Resource Path=%s\n", path_state,
  1818. ipr_format_res_path(hostrcb->ioa_cfg, fabric->res_path,
  1819. buffer, sizeof(buffer)));
  1820. }
  1821. static const struct {
  1822. u8 type;
  1823. char *desc;
  1824. } path_type_desc[] = {
  1825. { IPR_PATH_CFG_IOA_PORT, "IOA port" },
  1826. { IPR_PATH_CFG_EXP_PORT, "Expander port" },
  1827. { IPR_PATH_CFG_DEVICE_PORT, "Device port" },
  1828. { IPR_PATH_CFG_DEVICE_LUN, "Device LUN" }
  1829. };
  1830. static const struct {
  1831. u8 status;
  1832. char *desc;
  1833. } path_status_desc[] = {
  1834. { IPR_PATH_CFG_NO_PROB, "Functional" },
  1835. { IPR_PATH_CFG_DEGRADED, "Degraded" },
  1836. { IPR_PATH_CFG_FAILED, "Failed" },
  1837. { IPR_PATH_CFG_SUSPECT, "Suspect" },
  1838. { IPR_PATH_NOT_DETECTED, "Missing" },
  1839. { IPR_PATH_INCORRECT_CONN, "Incorrectly connected" }
  1840. };
  1841. static const char *link_rate[] = {
  1842. "unknown",
  1843. "disabled",
  1844. "phy reset problem",
  1845. "spinup hold",
  1846. "port selector",
  1847. "unknown",
  1848. "unknown",
  1849. "unknown",
  1850. "1.5Gbps",
  1851. "3.0Gbps",
  1852. "unknown",
  1853. "unknown",
  1854. "unknown",
  1855. "unknown",
  1856. "unknown",
  1857. "unknown"
  1858. };
  1859. /**
  1860. * ipr_log_path_elem - Log a fabric path element.
  1861. * @hostrcb: hostrcb struct
  1862. * @cfg: fabric path element struct
  1863. *
  1864. * Return value:
  1865. * none
  1866. **/
  1867. static void ipr_log_path_elem(struct ipr_hostrcb *hostrcb,
  1868. struct ipr_hostrcb_config_element *cfg)
  1869. {
  1870. int i, j;
  1871. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  1872. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  1873. if (type == IPR_PATH_CFG_NOT_EXIST)
  1874. return;
  1875. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  1876. if (path_type_desc[i].type != type)
  1877. continue;
  1878. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  1879. if (path_status_desc[j].status != status)
  1880. continue;
  1881. if (type == IPR_PATH_CFG_IOA_PORT) {
  1882. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, WWN=%08X%08X\n",
  1883. path_status_desc[j].desc, path_type_desc[i].desc,
  1884. cfg->phy, link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1885. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1886. } else {
  1887. if (cfg->cascaded_expander == 0xff && cfg->phy == 0xff) {
  1888. ipr_hcam_err(hostrcb, "%s %s: Link rate=%s, WWN=%08X%08X\n",
  1889. path_status_desc[j].desc, path_type_desc[i].desc,
  1890. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1891. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1892. } else if (cfg->cascaded_expander == 0xff) {
  1893. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, "
  1894. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1895. path_type_desc[i].desc, cfg->phy,
  1896. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1897. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1898. } else if (cfg->phy == 0xff) {
  1899. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Link rate=%s, "
  1900. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1901. path_type_desc[i].desc, cfg->cascaded_expander,
  1902. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1903. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1904. } else {
  1905. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Phy=%d, Link rate=%s "
  1906. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1907. path_type_desc[i].desc, cfg->cascaded_expander, cfg->phy,
  1908. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1909. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1910. }
  1911. }
  1912. return;
  1913. }
  1914. }
  1915. ipr_hcam_err(hostrcb, "Path element=%02X: Cascade=%d Phy=%d Link rate=%s "
  1916. "WWN=%08X%08X\n", cfg->type_status, cfg->cascaded_expander, cfg->phy,
  1917. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1918. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1919. }
  1920. /**
  1921. * ipr_log64_path_elem - Log a fabric path element.
  1922. * @hostrcb: hostrcb struct
  1923. * @cfg: fabric path element struct
  1924. *
  1925. * Return value:
  1926. * none
  1927. **/
  1928. static void ipr_log64_path_elem(struct ipr_hostrcb *hostrcb,
  1929. struct ipr_hostrcb64_config_element *cfg)
  1930. {
  1931. int i, j;
  1932. u8 desc_id = cfg->descriptor_id & IPR_DESCRIPTOR_MASK;
  1933. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  1934. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  1935. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1936. if (type == IPR_PATH_CFG_NOT_EXIST || desc_id != IPR_DESCRIPTOR_SIS64)
  1937. return;
  1938. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  1939. if (path_type_desc[i].type != type)
  1940. continue;
  1941. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  1942. if (path_status_desc[j].status != status)
  1943. continue;
  1944. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s, Link rate=%s, WWN=%08X%08X\n",
  1945. path_status_desc[j].desc, path_type_desc[i].desc,
  1946. ipr_format_res_path(hostrcb->ioa_cfg,
  1947. cfg->res_path, buffer, sizeof(buffer)),
  1948. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1949. be32_to_cpu(cfg->wwid[0]),
  1950. be32_to_cpu(cfg->wwid[1]));
  1951. return;
  1952. }
  1953. }
  1954. ipr_hcam_err(hostrcb, "Path element=%02X: Resource Path=%s, Link rate=%s "
  1955. "WWN=%08X%08X\n", cfg->type_status,
  1956. ipr_format_res_path(hostrcb->ioa_cfg,
  1957. cfg->res_path, buffer, sizeof(buffer)),
  1958. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1959. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1960. }
  1961. /**
  1962. * ipr_log_fabric_error - Log a fabric error.
  1963. * @ioa_cfg: ioa config struct
  1964. * @hostrcb: hostrcb struct
  1965. *
  1966. * Return value:
  1967. * none
  1968. **/
  1969. static void ipr_log_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  1970. struct ipr_hostrcb *hostrcb)
  1971. {
  1972. struct ipr_hostrcb_type_20_error *error;
  1973. struct ipr_hostrcb_fabric_desc *fabric;
  1974. struct ipr_hostrcb_config_element *cfg;
  1975. int i, add_len;
  1976. error = &hostrcb->hcam.u.error.u.type_20_error;
  1977. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1978. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  1979. add_len = be32_to_cpu(hostrcb->hcam.length) -
  1980. (offsetof(struct ipr_hostrcb_error, u) +
  1981. offsetof(struct ipr_hostrcb_type_20_error, desc));
  1982. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  1983. ipr_log_fabric_path(hostrcb, fabric);
  1984. for_each_fabric_cfg(fabric, cfg)
  1985. ipr_log_path_elem(hostrcb, cfg);
  1986. add_len -= be16_to_cpu(fabric->length);
  1987. fabric = (struct ipr_hostrcb_fabric_desc *)
  1988. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  1989. }
  1990. ipr_log_hex_data(ioa_cfg, (u32 *)fabric, add_len);
  1991. }
  1992. /**
  1993. * ipr_log_sis64_array_error - Log a sis64 array error.
  1994. * @ioa_cfg: ioa config struct
  1995. * @hostrcb: hostrcb struct
  1996. *
  1997. * Return value:
  1998. * none
  1999. **/
  2000. static void ipr_log_sis64_array_error(struct ipr_ioa_cfg *ioa_cfg,
  2001. struct ipr_hostrcb *hostrcb)
  2002. {
  2003. int i, num_entries;
  2004. struct ipr_hostrcb_type_24_error *error;
  2005. struct ipr_hostrcb64_array_data_entry *array_entry;
  2006. char buffer[IPR_MAX_RES_PATH_LENGTH];
  2007. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  2008. error = &hostrcb->hcam.u.error64.u.type_24_error;
  2009. ipr_err_separator;
  2010. ipr_err("RAID %s Array Configuration: %s\n",
  2011. error->protection_level,
  2012. ipr_format_res_path(ioa_cfg, error->last_res_path,
  2013. buffer, sizeof(buffer)));
  2014. ipr_err_separator;
  2015. array_entry = error->array_member;
  2016. num_entries = min_t(u32, error->num_entries,
  2017. ARRAY_SIZE(error->array_member));
  2018. for (i = 0; i < num_entries; i++, array_entry++) {
  2019. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  2020. continue;
  2021. if (error->exposed_mode_adn == i)
  2022. ipr_err("Exposed Array Member %d:\n", i);
  2023. else
  2024. ipr_err("Array Member %d:\n", i);
  2025. ipr_err("Array Member %d:\n", i);
  2026. ipr_log_ext_vpd(&array_entry->vpd);
  2027. ipr_err("Current Location: %s\n",
  2028. ipr_format_res_path(ioa_cfg, array_entry->res_path,
  2029. buffer, sizeof(buffer)));
  2030. ipr_err("Expected Location: %s\n",
  2031. ipr_format_res_path(ioa_cfg,
  2032. array_entry->expected_res_path,
  2033. buffer, sizeof(buffer)));
  2034. ipr_err_separator;
  2035. }
  2036. }
  2037. /**
  2038. * ipr_log_sis64_fabric_error - Log a sis64 fabric error.
  2039. * @ioa_cfg: ioa config struct
  2040. * @hostrcb: hostrcb struct
  2041. *
  2042. * Return value:
  2043. * none
  2044. **/
  2045. static void ipr_log_sis64_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  2046. struct ipr_hostrcb *hostrcb)
  2047. {
  2048. struct ipr_hostrcb_type_30_error *error;
  2049. struct ipr_hostrcb64_fabric_desc *fabric;
  2050. struct ipr_hostrcb64_config_element *cfg;
  2051. int i, add_len;
  2052. error = &hostrcb->hcam.u.error64.u.type_30_error;
  2053. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  2054. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  2055. add_len = be32_to_cpu(hostrcb->hcam.length) -
  2056. (offsetof(struct ipr_hostrcb64_error, u) +
  2057. offsetof(struct ipr_hostrcb_type_30_error, desc));
  2058. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  2059. ipr_log64_fabric_path(hostrcb, fabric);
  2060. for_each_fabric_cfg(fabric, cfg)
  2061. ipr_log64_path_elem(hostrcb, cfg);
  2062. add_len -= be16_to_cpu(fabric->length);
  2063. fabric = (struct ipr_hostrcb64_fabric_desc *)
  2064. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  2065. }
  2066. ipr_log_hex_data(ioa_cfg, (u32 *)fabric, add_len);
  2067. }
  2068. /**
  2069. * ipr_log_generic_error - Log an adapter error.
  2070. * @ioa_cfg: ioa config struct
  2071. * @hostrcb: hostrcb struct
  2072. *
  2073. * Return value:
  2074. * none
  2075. **/
  2076. static void ipr_log_generic_error(struct ipr_ioa_cfg *ioa_cfg,
  2077. struct ipr_hostrcb *hostrcb)
  2078. {
  2079. ipr_log_hex_data(ioa_cfg, hostrcb->hcam.u.raw.data,
  2080. be32_to_cpu(hostrcb->hcam.length));
  2081. }
  2082. /**
  2083. * ipr_get_error - Find the specfied IOASC in the ipr_error_table.
  2084. * @ioasc: IOASC
  2085. *
  2086. * This function will return the index of into the ipr_error_table
  2087. * for the specified IOASC. If the IOASC is not in the table,
  2088. * 0 will be returned, which points to the entry used for unknown errors.
  2089. *
  2090. * Return value:
  2091. * index into the ipr_error_table
  2092. **/
  2093. static u32 ipr_get_error(u32 ioasc)
  2094. {
  2095. int i;
  2096. for (i = 0; i < ARRAY_SIZE(ipr_error_table); i++)
  2097. if (ipr_error_table[i].ioasc == (ioasc & IPR_IOASC_IOASC_MASK))
  2098. return i;
  2099. return 0;
  2100. }
  2101. /**
  2102. * ipr_handle_log_data - Log an adapter error.
  2103. * @ioa_cfg: ioa config struct
  2104. * @hostrcb: hostrcb struct
  2105. *
  2106. * This function logs an adapter error to the system.
  2107. *
  2108. * Return value:
  2109. * none
  2110. **/
  2111. static void ipr_handle_log_data(struct ipr_ioa_cfg *ioa_cfg,
  2112. struct ipr_hostrcb *hostrcb)
  2113. {
  2114. u32 ioasc;
  2115. int error_index;
  2116. if (hostrcb->hcam.notify_type != IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY)
  2117. return;
  2118. if (hostrcb->hcam.notifications_lost == IPR_HOST_RCB_NOTIFICATIONS_LOST)
  2119. dev_err(&ioa_cfg->pdev->dev, "Error notifications lost\n");
  2120. if (ioa_cfg->sis64)
  2121. ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2122. else
  2123. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2124. if (!ioa_cfg->sis64 && (ioasc == IPR_IOASC_BUS_WAS_RESET ||
  2125. ioasc == IPR_IOASC_BUS_WAS_RESET_BY_OTHER)) {
  2126. /* Tell the midlayer we had a bus reset so it will handle the UA properly */
  2127. scsi_report_bus_reset(ioa_cfg->host,
  2128. hostrcb->hcam.u.error.fd_res_addr.bus);
  2129. }
  2130. error_index = ipr_get_error(ioasc);
  2131. if (!ipr_error_table[error_index].log_hcam)
  2132. return;
  2133. ipr_hcam_err(hostrcb, "%s\n", ipr_error_table[error_index].error);
  2134. /* Set indication we have logged an error */
  2135. ioa_cfg->errors_logged++;
  2136. if (ioa_cfg->log_level < ipr_error_table[error_index].log_hcam)
  2137. return;
  2138. if (be32_to_cpu(hostrcb->hcam.length) > sizeof(hostrcb->hcam.u.raw))
  2139. hostrcb->hcam.length = cpu_to_be32(sizeof(hostrcb->hcam.u.raw));
  2140. switch (hostrcb->hcam.overlay_id) {
  2141. case IPR_HOST_RCB_OVERLAY_ID_2:
  2142. ipr_log_cache_error(ioa_cfg, hostrcb);
  2143. break;
  2144. case IPR_HOST_RCB_OVERLAY_ID_3:
  2145. ipr_log_config_error(ioa_cfg, hostrcb);
  2146. break;
  2147. case IPR_HOST_RCB_OVERLAY_ID_4:
  2148. case IPR_HOST_RCB_OVERLAY_ID_6:
  2149. ipr_log_array_error(ioa_cfg, hostrcb);
  2150. break;
  2151. case IPR_HOST_RCB_OVERLAY_ID_7:
  2152. ipr_log_dual_ioa_error(ioa_cfg, hostrcb);
  2153. break;
  2154. case IPR_HOST_RCB_OVERLAY_ID_12:
  2155. ipr_log_enhanced_cache_error(ioa_cfg, hostrcb);
  2156. break;
  2157. case IPR_HOST_RCB_OVERLAY_ID_13:
  2158. ipr_log_enhanced_config_error(ioa_cfg, hostrcb);
  2159. break;
  2160. case IPR_HOST_RCB_OVERLAY_ID_14:
  2161. case IPR_HOST_RCB_OVERLAY_ID_16:
  2162. ipr_log_enhanced_array_error(ioa_cfg, hostrcb);
  2163. break;
  2164. case IPR_HOST_RCB_OVERLAY_ID_17:
  2165. ipr_log_enhanced_dual_ioa_error(ioa_cfg, hostrcb);
  2166. break;
  2167. case IPR_HOST_RCB_OVERLAY_ID_20:
  2168. ipr_log_fabric_error(ioa_cfg, hostrcb);
  2169. break;
  2170. case IPR_HOST_RCB_OVERLAY_ID_23:
  2171. ipr_log_sis64_config_error(ioa_cfg, hostrcb);
  2172. break;
  2173. case IPR_HOST_RCB_OVERLAY_ID_24:
  2174. case IPR_HOST_RCB_OVERLAY_ID_26:
  2175. ipr_log_sis64_array_error(ioa_cfg, hostrcb);
  2176. break;
  2177. case IPR_HOST_RCB_OVERLAY_ID_30:
  2178. ipr_log_sis64_fabric_error(ioa_cfg, hostrcb);
  2179. break;
  2180. case IPR_HOST_RCB_OVERLAY_ID_1:
  2181. case IPR_HOST_RCB_OVERLAY_ID_DEFAULT:
  2182. default:
  2183. ipr_log_generic_error(ioa_cfg, hostrcb);
  2184. break;
  2185. }
  2186. }
  2187. /**
  2188. * ipr_process_error - Op done function for an adapter error log.
  2189. * @ipr_cmd: ipr command struct
  2190. *
  2191. * This function is the op done function for an error log host
  2192. * controlled async from the adapter. It will log the error and
  2193. * send the HCAM back to the adapter.
  2194. *
  2195. * Return value:
  2196. * none
  2197. **/
  2198. static void ipr_process_error(struct ipr_cmnd *ipr_cmd)
  2199. {
  2200. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2201. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  2202. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  2203. u32 fd_ioasc;
  2204. if (ioa_cfg->sis64)
  2205. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2206. else
  2207. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2208. list_del(&hostrcb->queue);
  2209. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  2210. if (!ioasc) {
  2211. ipr_handle_log_data(ioa_cfg, hostrcb);
  2212. if (fd_ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED)
  2213. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  2214. } else if (ioasc != IPR_IOASC_IOA_WAS_RESET) {
  2215. dev_err(&ioa_cfg->pdev->dev,
  2216. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  2217. }
  2218. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_LOG_DATA, hostrcb);
  2219. }
  2220. /**
  2221. * ipr_timeout - An internally generated op has timed out.
  2222. * @ipr_cmd: ipr command struct
  2223. *
  2224. * This function blocks host requests and initiates an
  2225. * adapter reset.
  2226. *
  2227. * Return value:
  2228. * none
  2229. **/
  2230. static void ipr_timeout(struct ipr_cmnd *ipr_cmd)
  2231. {
  2232. unsigned long lock_flags = 0;
  2233. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2234. ENTER;
  2235. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2236. ioa_cfg->errors_logged++;
  2237. dev_err(&ioa_cfg->pdev->dev,
  2238. "Adapter being reset due to command timeout.\n");
  2239. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2240. ioa_cfg->sdt_state = GET_DUMP;
  2241. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd)
  2242. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2243. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2244. LEAVE;
  2245. }
  2246. /**
  2247. * ipr_oper_timeout - Adapter timed out transitioning to operational
  2248. * @ipr_cmd: ipr command struct
  2249. *
  2250. * This function blocks host requests and initiates an
  2251. * adapter reset.
  2252. *
  2253. * Return value:
  2254. * none
  2255. **/
  2256. static void ipr_oper_timeout(struct ipr_cmnd *ipr_cmd)
  2257. {
  2258. unsigned long lock_flags = 0;
  2259. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2260. ENTER;
  2261. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2262. ioa_cfg->errors_logged++;
  2263. dev_err(&ioa_cfg->pdev->dev,
  2264. "Adapter timed out transitioning to operational.\n");
  2265. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2266. ioa_cfg->sdt_state = GET_DUMP;
  2267. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd) {
  2268. if (ipr_fastfail)
  2269. ioa_cfg->reset_retries += IPR_NUM_RESET_RELOAD_RETRIES;
  2270. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2271. }
  2272. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2273. LEAVE;
  2274. }
  2275. /**
  2276. * ipr_find_ses_entry - Find matching SES in SES table
  2277. * @res: resource entry struct of SES
  2278. *
  2279. * Return value:
  2280. * pointer to SES table entry / NULL on failure
  2281. **/
  2282. static const struct ipr_ses_table_entry *
  2283. ipr_find_ses_entry(struct ipr_resource_entry *res)
  2284. {
  2285. int i, j, matches;
  2286. struct ipr_std_inq_vpids *vpids;
  2287. const struct ipr_ses_table_entry *ste = ipr_ses_table;
  2288. for (i = 0; i < ARRAY_SIZE(ipr_ses_table); i++, ste++) {
  2289. for (j = 0, matches = 0; j < IPR_PROD_ID_LEN; j++) {
  2290. if (ste->compare_product_id_byte[j] == 'X') {
  2291. vpids = &res->std_inq_data.vpids;
  2292. if (vpids->product_id[j] == ste->product_id[j])
  2293. matches++;
  2294. else
  2295. break;
  2296. } else
  2297. matches++;
  2298. }
  2299. if (matches == IPR_PROD_ID_LEN)
  2300. return ste;
  2301. }
  2302. return NULL;
  2303. }
  2304. /**
  2305. * ipr_get_max_scsi_speed - Determine max SCSI speed for a given bus
  2306. * @ioa_cfg: ioa config struct
  2307. * @bus: SCSI bus
  2308. * @bus_width: bus width
  2309. *
  2310. * Return value:
  2311. * SCSI bus speed in units of 100KHz, 1600 is 160 MHz
  2312. * For a 2-byte wide SCSI bus, the maximum transfer speed is
  2313. * twice the maximum transfer rate (e.g. for a wide enabled bus,
  2314. * max 160MHz = max 320MB/sec).
  2315. **/
  2316. static u32 ipr_get_max_scsi_speed(struct ipr_ioa_cfg *ioa_cfg, u8 bus, u8 bus_width)
  2317. {
  2318. struct ipr_resource_entry *res;
  2319. const struct ipr_ses_table_entry *ste;
  2320. u32 max_xfer_rate = IPR_MAX_SCSI_RATE(bus_width);
  2321. /* Loop through each config table entry in the config table buffer */
  2322. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2323. if (!(IPR_IS_SES_DEVICE(res->std_inq_data)))
  2324. continue;
  2325. if (bus != res->bus)
  2326. continue;
  2327. if (!(ste = ipr_find_ses_entry(res)))
  2328. continue;
  2329. max_xfer_rate = (ste->max_bus_speed_limit * 10) / (bus_width / 8);
  2330. }
  2331. return max_xfer_rate;
  2332. }
  2333. /**
  2334. * ipr_wait_iodbg_ack - Wait for an IODEBUG ACK from the IOA
  2335. * @ioa_cfg: ioa config struct
  2336. * @max_delay: max delay in micro-seconds to wait
  2337. *
  2338. * Waits for an IODEBUG ACK from the IOA, doing busy looping.
  2339. *
  2340. * Return value:
  2341. * 0 on success / other on failure
  2342. **/
  2343. static int ipr_wait_iodbg_ack(struct ipr_ioa_cfg *ioa_cfg, int max_delay)
  2344. {
  2345. volatile u32 pcii_reg;
  2346. int delay = 1;
  2347. /* Read interrupt reg until IOA signals IO Debug Acknowledge */
  2348. while (delay < max_delay) {
  2349. pcii_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  2350. if (pcii_reg & IPR_PCII_IO_DEBUG_ACKNOWLEDGE)
  2351. return 0;
  2352. /* udelay cannot be used if delay is more than a few milliseconds */
  2353. if ((delay / 1000) > MAX_UDELAY_MS)
  2354. mdelay(delay / 1000);
  2355. else
  2356. udelay(delay);
  2357. delay += delay;
  2358. }
  2359. return -EIO;
  2360. }
  2361. /**
  2362. * ipr_get_sis64_dump_data_section - Dump IOA memory
  2363. * @ioa_cfg: ioa config struct
  2364. * @start_addr: adapter address to dump
  2365. * @dest: destination kernel buffer
  2366. * @length_in_words: length to dump in 4 byte words
  2367. *
  2368. * Return value:
  2369. * 0 on success
  2370. **/
  2371. static int ipr_get_sis64_dump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2372. u32 start_addr,
  2373. __be32 *dest, u32 length_in_words)
  2374. {
  2375. int i;
  2376. for (i = 0; i < length_in_words; i++) {
  2377. writel(start_addr+(i*4), ioa_cfg->regs.dump_addr_reg);
  2378. *dest = cpu_to_be32(readl(ioa_cfg->regs.dump_data_reg));
  2379. dest++;
  2380. }
  2381. return 0;
  2382. }
  2383. /**
  2384. * ipr_get_ldump_data_section - Dump IOA memory
  2385. * @ioa_cfg: ioa config struct
  2386. * @start_addr: adapter address to dump
  2387. * @dest: destination kernel buffer
  2388. * @length_in_words: length to dump in 4 byte words
  2389. *
  2390. * Return value:
  2391. * 0 on success / -EIO on failure
  2392. **/
  2393. static int ipr_get_ldump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2394. u32 start_addr,
  2395. __be32 *dest, u32 length_in_words)
  2396. {
  2397. volatile u32 temp_pcii_reg;
  2398. int i, delay = 0;
  2399. if (ioa_cfg->sis64)
  2400. return ipr_get_sis64_dump_data_section(ioa_cfg, start_addr,
  2401. dest, length_in_words);
  2402. /* Write IOA interrupt reg starting LDUMP state */
  2403. writel((IPR_UPROCI_RESET_ALERT | IPR_UPROCI_IO_DEBUG_ALERT),
  2404. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2405. /* Wait for IO debug acknowledge */
  2406. if (ipr_wait_iodbg_ack(ioa_cfg,
  2407. IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC)) {
  2408. dev_err(&ioa_cfg->pdev->dev,
  2409. "IOA dump long data transfer timeout\n");
  2410. return -EIO;
  2411. }
  2412. /* Signal LDUMP interlocked - clear IO debug ack */
  2413. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2414. ioa_cfg->regs.clr_interrupt_reg);
  2415. /* Write Mailbox with starting address */
  2416. writel(start_addr, ioa_cfg->ioa_mailbox);
  2417. /* Signal address valid - clear IOA Reset alert */
  2418. writel(IPR_UPROCI_RESET_ALERT,
  2419. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2420. for (i = 0; i < length_in_words; i++) {
  2421. /* Wait for IO debug acknowledge */
  2422. if (ipr_wait_iodbg_ack(ioa_cfg,
  2423. IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC)) {
  2424. dev_err(&ioa_cfg->pdev->dev,
  2425. "IOA dump short data transfer timeout\n");
  2426. return -EIO;
  2427. }
  2428. /* Read data from mailbox and increment destination pointer */
  2429. *dest = cpu_to_be32(readl(ioa_cfg->ioa_mailbox));
  2430. dest++;
  2431. /* For all but the last word of data, signal data received */
  2432. if (i < (length_in_words - 1)) {
  2433. /* Signal dump data received - Clear IO debug Ack */
  2434. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2435. ioa_cfg->regs.clr_interrupt_reg);
  2436. }
  2437. }
  2438. /* Signal end of block transfer. Set reset alert then clear IO debug ack */
  2439. writel(IPR_UPROCI_RESET_ALERT,
  2440. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2441. writel(IPR_UPROCI_IO_DEBUG_ALERT,
  2442. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2443. /* Signal dump data received - Clear IO debug Ack */
  2444. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2445. ioa_cfg->regs.clr_interrupt_reg);
  2446. /* Wait for IOA to signal LDUMP exit - IOA reset alert will be cleared */
  2447. while (delay < IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC) {
  2448. temp_pcii_reg =
  2449. readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  2450. if (!(temp_pcii_reg & IPR_UPROCI_RESET_ALERT))
  2451. return 0;
  2452. udelay(10);
  2453. delay += 10;
  2454. }
  2455. return 0;
  2456. }
  2457. #ifdef CONFIG_SCSI_IPR_DUMP
  2458. /**
  2459. * ipr_sdt_copy - Copy Smart Dump Table to kernel buffer
  2460. * @ioa_cfg: ioa config struct
  2461. * @pci_address: adapter address
  2462. * @length: length of data to copy
  2463. *
  2464. * Copy data from PCI adapter to kernel buffer.
  2465. * Note: length MUST be a 4 byte multiple
  2466. * Return value:
  2467. * 0 on success / other on failure
  2468. **/
  2469. static int ipr_sdt_copy(struct ipr_ioa_cfg *ioa_cfg,
  2470. unsigned long pci_address, u32 length)
  2471. {
  2472. int bytes_copied = 0;
  2473. int cur_len, rc, rem_len, rem_page_len, max_dump_size;
  2474. __be32 *page;
  2475. unsigned long lock_flags = 0;
  2476. struct ipr_ioa_dump *ioa_dump = &ioa_cfg->dump->ioa_dump;
  2477. if (ioa_cfg->sis64)
  2478. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2479. else
  2480. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2481. while (bytes_copied < length &&
  2482. (ioa_dump->hdr.len + bytes_copied) < max_dump_size) {
  2483. if (ioa_dump->page_offset >= PAGE_SIZE ||
  2484. ioa_dump->page_offset == 0) {
  2485. page = (__be32 *)__get_free_page(GFP_ATOMIC);
  2486. if (!page) {
  2487. ipr_trace;
  2488. return bytes_copied;
  2489. }
  2490. ioa_dump->page_offset = 0;
  2491. ioa_dump->ioa_data[ioa_dump->next_page_index] = page;
  2492. ioa_dump->next_page_index++;
  2493. } else
  2494. page = ioa_dump->ioa_data[ioa_dump->next_page_index - 1];
  2495. rem_len = length - bytes_copied;
  2496. rem_page_len = PAGE_SIZE - ioa_dump->page_offset;
  2497. cur_len = min(rem_len, rem_page_len);
  2498. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2499. if (ioa_cfg->sdt_state == ABORT_DUMP) {
  2500. rc = -EIO;
  2501. } else {
  2502. rc = ipr_get_ldump_data_section(ioa_cfg,
  2503. pci_address + bytes_copied,
  2504. &page[ioa_dump->page_offset / 4],
  2505. (cur_len / sizeof(u32)));
  2506. }
  2507. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2508. if (!rc) {
  2509. ioa_dump->page_offset += cur_len;
  2510. bytes_copied += cur_len;
  2511. } else {
  2512. ipr_trace;
  2513. break;
  2514. }
  2515. schedule();
  2516. }
  2517. return bytes_copied;
  2518. }
  2519. /**
  2520. * ipr_init_dump_entry_hdr - Initialize a dump entry header.
  2521. * @hdr: dump entry header struct
  2522. *
  2523. * Return value:
  2524. * nothing
  2525. **/
  2526. static void ipr_init_dump_entry_hdr(struct ipr_dump_entry_header *hdr)
  2527. {
  2528. hdr->eye_catcher = IPR_DUMP_EYE_CATCHER;
  2529. hdr->num_elems = 1;
  2530. hdr->offset = sizeof(*hdr);
  2531. hdr->status = IPR_DUMP_STATUS_SUCCESS;
  2532. }
  2533. /**
  2534. * ipr_dump_ioa_type_data - Fill in the adapter type in the dump.
  2535. * @ioa_cfg: ioa config struct
  2536. * @driver_dump: driver dump struct
  2537. *
  2538. * Return value:
  2539. * nothing
  2540. **/
  2541. static void ipr_dump_ioa_type_data(struct ipr_ioa_cfg *ioa_cfg,
  2542. struct ipr_driver_dump *driver_dump)
  2543. {
  2544. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  2545. ipr_init_dump_entry_hdr(&driver_dump->ioa_type_entry.hdr);
  2546. driver_dump->ioa_type_entry.hdr.len =
  2547. sizeof(struct ipr_dump_ioa_type_entry) -
  2548. sizeof(struct ipr_dump_entry_header);
  2549. driver_dump->ioa_type_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2550. driver_dump->ioa_type_entry.hdr.id = IPR_DUMP_DRIVER_TYPE_ID;
  2551. driver_dump->ioa_type_entry.type = ioa_cfg->type;
  2552. driver_dump->ioa_type_entry.fw_version = (ucode_vpd->major_release << 24) |
  2553. (ucode_vpd->card_type << 16) | (ucode_vpd->minor_release[0] << 8) |
  2554. ucode_vpd->minor_release[1];
  2555. driver_dump->hdr.num_entries++;
  2556. }
  2557. /**
  2558. * ipr_dump_version_data - Fill in the driver version in the dump.
  2559. * @ioa_cfg: ioa config struct
  2560. * @driver_dump: driver dump struct
  2561. *
  2562. * Return value:
  2563. * nothing
  2564. **/
  2565. static void ipr_dump_version_data(struct ipr_ioa_cfg *ioa_cfg,
  2566. struct ipr_driver_dump *driver_dump)
  2567. {
  2568. ipr_init_dump_entry_hdr(&driver_dump->version_entry.hdr);
  2569. driver_dump->version_entry.hdr.len =
  2570. sizeof(struct ipr_dump_version_entry) -
  2571. sizeof(struct ipr_dump_entry_header);
  2572. driver_dump->version_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2573. driver_dump->version_entry.hdr.id = IPR_DUMP_DRIVER_VERSION_ID;
  2574. strcpy(driver_dump->version_entry.version, IPR_DRIVER_VERSION);
  2575. driver_dump->hdr.num_entries++;
  2576. }
  2577. /**
  2578. * ipr_dump_trace_data - Fill in the IOA trace in the dump.
  2579. * @ioa_cfg: ioa config struct
  2580. * @driver_dump: driver dump struct
  2581. *
  2582. * Return value:
  2583. * nothing
  2584. **/
  2585. static void ipr_dump_trace_data(struct ipr_ioa_cfg *ioa_cfg,
  2586. struct ipr_driver_dump *driver_dump)
  2587. {
  2588. ipr_init_dump_entry_hdr(&driver_dump->trace_entry.hdr);
  2589. driver_dump->trace_entry.hdr.len =
  2590. sizeof(struct ipr_dump_trace_entry) -
  2591. sizeof(struct ipr_dump_entry_header);
  2592. driver_dump->trace_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2593. driver_dump->trace_entry.hdr.id = IPR_DUMP_TRACE_ID;
  2594. memcpy(driver_dump->trace_entry.trace, ioa_cfg->trace, IPR_TRACE_SIZE);
  2595. driver_dump->hdr.num_entries++;
  2596. }
  2597. /**
  2598. * ipr_dump_location_data - Fill in the IOA location in the dump.
  2599. * @ioa_cfg: ioa config struct
  2600. * @driver_dump: driver dump struct
  2601. *
  2602. * Return value:
  2603. * nothing
  2604. **/
  2605. static void ipr_dump_location_data(struct ipr_ioa_cfg *ioa_cfg,
  2606. struct ipr_driver_dump *driver_dump)
  2607. {
  2608. ipr_init_dump_entry_hdr(&driver_dump->location_entry.hdr);
  2609. driver_dump->location_entry.hdr.len =
  2610. sizeof(struct ipr_dump_location_entry) -
  2611. sizeof(struct ipr_dump_entry_header);
  2612. driver_dump->location_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2613. driver_dump->location_entry.hdr.id = IPR_DUMP_LOCATION_ID;
  2614. strcpy(driver_dump->location_entry.location, dev_name(&ioa_cfg->pdev->dev));
  2615. driver_dump->hdr.num_entries++;
  2616. }
  2617. /**
  2618. * ipr_get_ioa_dump - Perform a dump of the driver and adapter.
  2619. * @ioa_cfg: ioa config struct
  2620. * @dump: dump struct
  2621. *
  2622. * Return value:
  2623. * nothing
  2624. **/
  2625. static void ipr_get_ioa_dump(struct ipr_ioa_cfg *ioa_cfg, struct ipr_dump *dump)
  2626. {
  2627. unsigned long start_addr, sdt_word;
  2628. unsigned long lock_flags = 0;
  2629. struct ipr_driver_dump *driver_dump = &dump->driver_dump;
  2630. struct ipr_ioa_dump *ioa_dump = &dump->ioa_dump;
  2631. u32 num_entries, max_num_entries, start_off, end_off;
  2632. u32 max_dump_size, bytes_to_copy, bytes_copied, rc;
  2633. struct ipr_sdt *sdt;
  2634. int valid = 1;
  2635. int i;
  2636. ENTER;
  2637. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2638. if (ioa_cfg->sdt_state != READ_DUMP) {
  2639. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2640. return;
  2641. }
  2642. if (ioa_cfg->sis64) {
  2643. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2644. ssleep(IPR_DUMP_DELAY_SECONDS);
  2645. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2646. }
  2647. start_addr = readl(ioa_cfg->ioa_mailbox);
  2648. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(start_addr)) {
  2649. dev_err(&ioa_cfg->pdev->dev,
  2650. "Invalid dump table format: %lx\n", start_addr);
  2651. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2652. return;
  2653. }
  2654. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA initiated\n");
  2655. driver_dump->hdr.eye_catcher = IPR_DUMP_EYE_CATCHER;
  2656. /* Initialize the overall dump header */
  2657. driver_dump->hdr.len = sizeof(struct ipr_driver_dump);
  2658. driver_dump->hdr.num_entries = 1;
  2659. driver_dump->hdr.first_entry_offset = sizeof(struct ipr_dump_header);
  2660. driver_dump->hdr.status = IPR_DUMP_STATUS_SUCCESS;
  2661. driver_dump->hdr.os = IPR_DUMP_OS_LINUX;
  2662. driver_dump->hdr.driver_name = IPR_DUMP_DRIVER_NAME;
  2663. ipr_dump_version_data(ioa_cfg, driver_dump);
  2664. ipr_dump_location_data(ioa_cfg, driver_dump);
  2665. ipr_dump_ioa_type_data(ioa_cfg, driver_dump);
  2666. ipr_dump_trace_data(ioa_cfg, driver_dump);
  2667. /* Update dump_header */
  2668. driver_dump->hdr.len += sizeof(struct ipr_dump_entry_header);
  2669. /* IOA Dump entry */
  2670. ipr_init_dump_entry_hdr(&ioa_dump->hdr);
  2671. ioa_dump->hdr.len = 0;
  2672. ioa_dump->hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2673. ioa_dump->hdr.id = IPR_DUMP_IOA_DUMP_ID;
  2674. /* First entries in sdt are actually a list of dump addresses and
  2675. lengths to gather the real dump data. sdt represents the pointer
  2676. to the ioa generated dump table. Dump data will be extracted based
  2677. on entries in this table */
  2678. sdt = &ioa_dump->sdt;
  2679. if (ioa_cfg->sis64) {
  2680. max_num_entries = IPR_FMT3_NUM_SDT_ENTRIES;
  2681. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2682. } else {
  2683. max_num_entries = IPR_FMT2_NUM_SDT_ENTRIES;
  2684. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2685. }
  2686. bytes_to_copy = offsetof(struct ipr_sdt, entry) +
  2687. (max_num_entries * sizeof(struct ipr_sdt_entry));
  2688. rc = ipr_get_ldump_data_section(ioa_cfg, start_addr, (__be32 *)sdt,
  2689. bytes_to_copy / sizeof(__be32));
  2690. /* Smart Dump table is ready to use and the first entry is valid */
  2691. if (rc || ((be32_to_cpu(sdt->hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  2692. (be32_to_cpu(sdt->hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  2693. dev_err(&ioa_cfg->pdev->dev,
  2694. "Dump of IOA failed. Dump table not valid: %d, %X.\n",
  2695. rc, be32_to_cpu(sdt->hdr.state));
  2696. driver_dump->hdr.status = IPR_DUMP_STATUS_FAILED;
  2697. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2698. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2699. return;
  2700. }
  2701. num_entries = be32_to_cpu(sdt->hdr.num_entries_used);
  2702. if (num_entries > max_num_entries)
  2703. num_entries = max_num_entries;
  2704. /* Update dump length to the actual data to be copied */
  2705. dump->driver_dump.hdr.len += sizeof(struct ipr_sdt_header);
  2706. if (ioa_cfg->sis64)
  2707. dump->driver_dump.hdr.len += num_entries * sizeof(struct ipr_sdt_entry);
  2708. else
  2709. dump->driver_dump.hdr.len += max_num_entries * sizeof(struct ipr_sdt_entry);
  2710. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2711. for (i = 0; i < num_entries; i++) {
  2712. if (ioa_dump->hdr.len > max_dump_size) {
  2713. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2714. break;
  2715. }
  2716. if (sdt->entry[i].flags & IPR_SDT_VALID_ENTRY) {
  2717. sdt_word = be32_to_cpu(sdt->entry[i].start_token);
  2718. if (ioa_cfg->sis64)
  2719. bytes_to_copy = be32_to_cpu(sdt->entry[i].end_token);
  2720. else {
  2721. start_off = sdt_word & IPR_FMT2_MBX_ADDR_MASK;
  2722. end_off = be32_to_cpu(sdt->entry[i].end_token);
  2723. if (ipr_sdt_is_fmt2(sdt_word) && sdt_word)
  2724. bytes_to_copy = end_off - start_off;
  2725. else
  2726. valid = 0;
  2727. }
  2728. if (valid) {
  2729. if (bytes_to_copy > max_dump_size) {
  2730. sdt->entry[i].flags &= ~IPR_SDT_VALID_ENTRY;
  2731. continue;
  2732. }
  2733. /* Copy data from adapter to driver buffers */
  2734. bytes_copied = ipr_sdt_copy(ioa_cfg, sdt_word,
  2735. bytes_to_copy);
  2736. ioa_dump->hdr.len += bytes_copied;
  2737. if (bytes_copied != bytes_to_copy) {
  2738. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2739. break;
  2740. }
  2741. }
  2742. }
  2743. }
  2744. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA completed.\n");
  2745. /* Update dump_header */
  2746. driver_dump->hdr.len += ioa_dump->hdr.len;
  2747. wmb();
  2748. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2749. LEAVE;
  2750. }
  2751. #else
  2752. #define ipr_get_ioa_dump(ioa_cfg, dump) do { } while (0)
  2753. #endif
  2754. /**
  2755. * ipr_release_dump - Free adapter dump memory
  2756. * @kref: kref struct
  2757. *
  2758. * Return value:
  2759. * nothing
  2760. **/
  2761. static void ipr_release_dump(struct kref *kref)
  2762. {
  2763. struct ipr_dump *dump = container_of(kref, struct ipr_dump, kref);
  2764. struct ipr_ioa_cfg *ioa_cfg = dump->ioa_cfg;
  2765. unsigned long lock_flags = 0;
  2766. int i;
  2767. ENTER;
  2768. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2769. ioa_cfg->dump = NULL;
  2770. ioa_cfg->sdt_state = INACTIVE;
  2771. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2772. for (i = 0; i < dump->ioa_dump.next_page_index; i++)
  2773. free_page((unsigned long) dump->ioa_dump.ioa_data[i]);
  2774. vfree(dump->ioa_dump.ioa_data);
  2775. kfree(dump);
  2776. LEAVE;
  2777. }
  2778. /**
  2779. * ipr_worker_thread - Worker thread
  2780. * @work: ioa config struct
  2781. *
  2782. * Called at task level from a work thread. This function takes care
  2783. * of adding and removing device from the mid-layer as configuration
  2784. * changes are detected by the adapter.
  2785. *
  2786. * Return value:
  2787. * nothing
  2788. **/
  2789. static void ipr_worker_thread(struct work_struct *work)
  2790. {
  2791. unsigned long lock_flags;
  2792. struct ipr_resource_entry *res;
  2793. struct scsi_device *sdev;
  2794. struct ipr_dump *dump;
  2795. struct ipr_ioa_cfg *ioa_cfg =
  2796. container_of(work, struct ipr_ioa_cfg, work_q);
  2797. u8 bus, target, lun;
  2798. int did_work;
  2799. ENTER;
  2800. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2801. if (ioa_cfg->sdt_state == READ_DUMP) {
  2802. dump = ioa_cfg->dump;
  2803. if (!dump) {
  2804. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2805. return;
  2806. }
  2807. kref_get(&dump->kref);
  2808. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2809. ipr_get_ioa_dump(ioa_cfg, dump);
  2810. kref_put(&dump->kref, ipr_release_dump);
  2811. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2812. if (ioa_cfg->sdt_state == DUMP_OBTAINED && !ioa_cfg->dump_timeout)
  2813. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2814. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2815. return;
  2816. }
  2817. restart:
  2818. do {
  2819. did_work = 0;
  2820. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds ||
  2821. !ioa_cfg->allow_ml_add_del) {
  2822. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2823. return;
  2824. }
  2825. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2826. if (res->del_from_ml && res->sdev) {
  2827. did_work = 1;
  2828. sdev = res->sdev;
  2829. if (!scsi_device_get(sdev)) {
  2830. if (!res->add_to_ml)
  2831. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  2832. else
  2833. res->del_from_ml = 0;
  2834. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2835. scsi_remove_device(sdev);
  2836. scsi_device_put(sdev);
  2837. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2838. }
  2839. break;
  2840. }
  2841. }
  2842. } while (did_work);
  2843. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2844. if (res->add_to_ml) {
  2845. bus = res->bus;
  2846. target = res->target;
  2847. lun = res->lun;
  2848. res->add_to_ml = 0;
  2849. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2850. scsi_add_device(ioa_cfg->host, bus, target, lun);
  2851. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2852. goto restart;
  2853. }
  2854. }
  2855. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2856. kobject_uevent(&ioa_cfg->host->shost_dev.kobj, KOBJ_CHANGE);
  2857. LEAVE;
  2858. }
  2859. #ifdef CONFIG_SCSI_IPR_TRACE
  2860. /**
  2861. * ipr_read_trace - Dump the adapter trace
  2862. * @filp: open sysfs file
  2863. * @kobj: kobject struct
  2864. * @bin_attr: bin_attribute struct
  2865. * @buf: buffer
  2866. * @off: offset
  2867. * @count: buffer size
  2868. *
  2869. * Return value:
  2870. * number of bytes printed to buffer
  2871. **/
  2872. static ssize_t ipr_read_trace(struct file *filp, struct kobject *kobj,
  2873. struct bin_attribute *bin_attr,
  2874. char *buf, loff_t off, size_t count)
  2875. {
  2876. struct device *dev = container_of(kobj, struct device, kobj);
  2877. struct Scsi_Host *shost = class_to_shost(dev);
  2878. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2879. unsigned long lock_flags = 0;
  2880. ssize_t ret;
  2881. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2882. ret = memory_read_from_buffer(buf, count, &off, ioa_cfg->trace,
  2883. IPR_TRACE_SIZE);
  2884. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2885. return ret;
  2886. }
  2887. static struct bin_attribute ipr_trace_attr = {
  2888. .attr = {
  2889. .name = "trace",
  2890. .mode = S_IRUGO,
  2891. },
  2892. .size = 0,
  2893. .read = ipr_read_trace,
  2894. };
  2895. #endif
  2896. /**
  2897. * ipr_show_fw_version - Show the firmware version
  2898. * @dev: class device struct
  2899. * @buf: buffer
  2900. *
  2901. * Return value:
  2902. * number of bytes printed to buffer
  2903. **/
  2904. static ssize_t ipr_show_fw_version(struct device *dev,
  2905. struct device_attribute *attr, char *buf)
  2906. {
  2907. struct Scsi_Host *shost = class_to_shost(dev);
  2908. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2909. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  2910. unsigned long lock_flags = 0;
  2911. int len;
  2912. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2913. len = snprintf(buf, PAGE_SIZE, "%02X%02X%02X%02X\n",
  2914. ucode_vpd->major_release, ucode_vpd->card_type,
  2915. ucode_vpd->minor_release[0],
  2916. ucode_vpd->minor_release[1]);
  2917. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2918. return len;
  2919. }
  2920. static struct device_attribute ipr_fw_version_attr = {
  2921. .attr = {
  2922. .name = "fw_version",
  2923. .mode = S_IRUGO,
  2924. },
  2925. .show = ipr_show_fw_version,
  2926. };
  2927. /**
  2928. * ipr_show_log_level - Show the adapter's error logging level
  2929. * @dev: class device struct
  2930. * @buf: buffer
  2931. *
  2932. * Return value:
  2933. * number of bytes printed to buffer
  2934. **/
  2935. static ssize_t ipr_show_log_level(struct device *dev,
  2936. struct device_attribute *attr, char *buf)
  2937. {
  2938. struct Scsi_Host *shost = class_to_shost(dev);
  2939. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2940. unsigned long lock_flags = 0;
  2941. int len;
  2942. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2943. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->log_level);
  2944. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2945. return len;
  2946. }
  2947. /**
  2948. * ipr_store_log_level - Change the adapter's error logging level
  2949. * @dev: class device struct
  2950. * @buf: buffer
  2951. *
  2952. * Return value:
  2953. * number of bytes printed to buffer
  2954. **/
  2955. static ssize_t ipr_store_log_level(struct device *dev,
  2956. struct device_attribute *attr,
  2957. const char *buf, size_t count)
  2958. {
  2959. struct Scsi_Host *shost = class_to_shost(dev);
  2960. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2961. unsigned long lock_flags = 0;
  2962. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2963. ioa_cfg->log_level = simple_strtoul(buf, NULL, 10);
  2964. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2965. return strlen(buf);
  2966. }
  2967. static struct device_attribute ipr_log_level_attr = {
  2968. .attr = {
  2969. .name = "log_level",
  2970. .mode = S_IRUGO | S_IWUSR,
  2971. },
  2972. .show = ipr_show_log_level,
  2973. .store = ipr_store_log_level
  2974. };
  2975. /**
  2976. * ipr_store_diagnostics - IOA Diagnostics interface
  2977. * @dev: device struct
  2978. * @buf: buffer
  2979. * @count: buffer size
  2980. *
  2981. * This function will reset the adapter and wait a reasonable
  2982. * amount of time for any errors that the adapter might log.
  2983. *
  2984. * Return value:
  2985. * count on success / other on failure
  2986. **/
  2987. static ssize_t ipr_store_diagnostics(struct device *dev,
  2988. struct device_attribute *attr,
  2989. const char *buf, size_t count)
  2990. {
  2991. struct Scsi_Host *shost = class_to_shost(dev);
  2992. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2993. unsigned long lock_flags = 0;
  2994. int rc = count;
  2995. if (!capable(CAP_SYS_ADMIN))
  2996. return -EACCES;
  2997. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2998. while (ioa_cfg->in_reset_reload) {
  2999. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3000. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3001. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3002. }
  3003. ioa_cfg->errors_logged = 0;
  3004. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3005. if (ioa_cfg->in_reset_reload) {
  3006. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3007. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3008. /* Wait for a second for any errors to be logged */
  3009. msleep(1000);
  3010. } else {
  3011. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3012. return -EIO;
  3013. }
  3014. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3015. if (ioa_cfg->in_reset_reload || ioa_cfg->errors_logged)
  3016. rc = -EIO;
  3017. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3018. return rc;
  3019. }
  3020. static struct device_attribute ipr_diagnostics_attr = {
  3021. .attr = {
  3022. .name = "run_diagnostics",
  3023. .mode = S_IWUSR,
  3024. },
  3025. .store = ipr_store_diagnostics
  3026. };
  3027. /**
  3028. * ipr_show_adapter_state - Show the adapter's state
  3029. * @class_dev: device struct
  3030. * @buf: buffer
  3031. *
  3032. * Return value:
  3033. * number of bytes printed to buffer
  3034. **/
  3035. static ssize_t ipr_show_adapter_state(struct device *dev,
  3036. struct device_attribute *attr, char *buf)
  3037. {
  3038. struct Scsi_Host *shost = class_to_shost(dev);
  3039. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3040. unsigned long lock_flags = 0;
  3041. int len;
  3042. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3043. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  3044. len = snprintf(buf, PAGE_SIZE, "offline\n");
  3045. else
  3046. len = snprintf(buf, PAGE_SIZE, "online\n");
  3047. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3048. return len;
  3049. }
  3050. /**
  3051. * ipr_store_adapter_state - Change adapter state
  3052. * @dev: device struct
  3053. * @buf: buffer
  3054. * @count: buffer size
  3055. *
  3056. * This function will change the adapter's state.
  3057. *
  3058. * Return value:
  3059. * count on success / other on failure
  3060. **/
  3061. static ssize_t ipr_store_adapter_state(struct device *dev,
  3062. struct device_attribute *attr,
  3063. const char *buf, size_t count)
  3064. {
  3065. struct Scsi_Host *shost = class_to_shost(dev);
  3066. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3067. unsigned long lock_flags;
  3068. int result = count, i;
  3069. if (!capable(CAP_SYS_ADMIN))
  3070. return -EACCES;
  3071. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3072. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead &&
  3073. !strncmp(buf, "online", 6)) {
  3074. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  3075. spin_lock(&ioa_cfg->hrrq[i]._lock);
  3076. ioa_cfg->hrrq[i].ioa_is_dead = 0;
  3077. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  3078. }
  3079. wmb();
  3080. ioa_cfg->reset_retries = 0;
  3081. ioa_cfg->in_ioa_bringdown = 0;
  3082. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  3083. }
  3084. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3085. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3086. return result;
  3087. }
  3088. static struct device_attribute ipr_ioa_state_attr = {
  3089. .attr = {
  3090. .name = "online_state",
  3091. .mode = S_IRUGO | S_IWUSR,
  3092. },
  3093. .show = ipr_show_adapter_state,
  3094. .store = ipr_store_adapter_state
  3095. };
  3096. /**
  3097. * ipr_store_reset_adapter - Reset the adapter
  3098. * @dev: device struct
  3099. * @buf: buffer
  3100. * @count: buffer size
  3101. *
  3102. * This function will reset the adapter.
  3103. *
  3104. * Return value:
  3105. * count on success / other on failure
  3106. **/
  3107. static ssize_t ipr_store_reset_adapter(struct device *dev,
  3108. struct device_attribute *attr,
  3109. const char *buf, size_t count)
  3110. {
  3111. struct Scsi_Host *shost = class_to_shost(dev);
  3112. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3113. unsigned long lock_flags;
  3114. int result = count;
  3115. if (!capable(CAP_SYS_ADMIN))
  3116. return -EACCES;
  3117. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3118. if (!ioa_cfg->in_reset_reload)
  3119. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3120. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3121. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3122. return result;
  3123. }
  3124. static struct device_attribute ipr_ioa_reset_attr = {
  3125. .attr = {
  3126. .name = "reset_host",
  3127. .mode = S_IWUSR,
  3128. },
  3129. .store = ipr_store_reset_adapter
  3130. };
  3131. static int ipr_iopoll(struct blk_iopoll *iop, int budget);
  3132. /**
  3133. * ipr_show_iopoll_weight - Show ipr polling mode
  3134. * @dev: class device struct
  3135. * @buf: buffer
  3136. *
  3137. * Return value:
  3138. * number of bytes printed to buffer
  3139. **/
  3140. static ssize_t ipr_show_iopoll_weight(struct device *dev,
  3141. struct device_attribute *attr, char *buf)
  3142. {
  3143. struct Scsi_Host *shost = class_to_shost(dev);
  3144. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3145. unsigned long lock_flags = 0;
  3146. int len;
  3147. spin_lock_irqsave(shost->host_lock, lock_flags);
  3148. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->iopoll_weight);
  3149. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  3150. return len;
  3151. }
  3152. /**
  3153. * ipr_store_iopoll_weight - Change the adapter's polling mode
  3154. * @dev: class device struct
  3155. * @buf: buffer
  3156. *
  3157. * Return value:
  3158. * number of bytes printed to buffer
  3159. **/
  3160. static ssize_t ipr_store_iopoll_weight(struct device *dev,
  3161. struct device_attribute *attr,
  3162. const char *buf, size_t count)
  3163. {
  3164. struct Scsi_Host *shost = class_to_shost(dev);
  3165. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3166. unsigned long user_iopoll_weight;
  3167. unsigned long lock_flags = 0;
  3168. int i;
  3169. if (!ioa_cfg->sis64) {
  3170. dev_info(&ioa_cfg->pdev->dev, "blk-iopoll not supported on this adapter\n");
  3171. return -EINVAL;
  3172. }
  3173. if (kstrtoul(buf, 10, &user_iopoll_weight))
  3174. return -EINVAL;
  3175. if (user_iopoll_weight > 256) {
  3176. dev_info(&ioa_cfg->pdev->dev, "Invalid blk-iopoll weight. It must be less than 256\n");
  3177. return -EINVAL;
  3178. }
  3179. if (user_iopoll_weight == ioa_cfg->iopoll_weight) {
  3180. dev_info(&ioa_cfg->pdev->dev, "Current blk-iopoll weight has the same weight\n");
  3181. return strlen(buf);
  3182. }
  3183. if (blk_iopoll_enabled && ioa_cfg->iopoll_weight &&
  3184. ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  3185. for (i = 1; i < ioa_cfg->hrrq_num; i++)
  3186. blk_iopoll_disable(&ioa_cfg->hrrq[i].iopoll);
  3187. }
  3188. spin_lock_irqsave(shost->host_lock, lock_flags);
  3189. ioa_cfg->iopoll_weight = user_iopoll_weight;
  3190. if (blk_iopoll_enabled && ioa_cfg->iopoll_weight &&
  3191. ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  3192. for (i = 1; i < ioa_cfg->hrrq_num; i++) {
  3193. blk_iopoll_init(&ioa_cfg->hrrq[i].iopoll,
  3194. ioa_cfg->iopoll_weight, ipr_iopoll);
  3195. blk_iopoll_enable(&ioa_cfg->hrrq[i].iopoll);
  3196. }
  3197. }
  3198. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  3199. return strlen(buf);
  3200. }
  3201. static struct device_attribute ipr_iopoll_weight_attr = {
  3202. .attr = {
  3203. .name = "iopoll_weight",
  3204. .mode = S_IRUGO | S_IWUSR,
  3205. },
  3206. .show = ipr_show_iopoll_weight,
  3207. .store = ipr_store_iopoll_weight
  3208. };
  3209. /**
  3210. * ipr_alloc_ucode_buffer - Allocates a microcode download buffer
  3211. * @buf_len: buffer length
  3212. *
  3213. * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
  3214. * list to use for microcode download
  3215. *
  3216. * Return value:
  3217. * pointer to sglist / NULL on failure
  3218. **/
  3219. static struct ipr_sglist *ipr_alloc_ucode_buffer(int buf_len)
  3220. {
  3221. int sg_size, order, bsize_elem, num_elem, i, j;
  3222. struct ipr_sglist *sglist;
  3223. struct scatterlist *scatterlist;
  3224. struct page *page;
  3225. /* Get the minimum size per scatter/gather element */
  3226. sg_size = buf_len / (IPR_MAX_SGLIST - 1);
  3227. /* Get the actual size per element */
  3228. order = get_order(sg_size);
  3229. /* Determine the actual number of bytes per element */
  3230. bsize_elem = PAGE_SIZE * (1 << order);
  3231. /* Determine the actual number of sg entries needed */
  3232. if (buf_len % bsize_elem)
  3233. num_elem = (buf_len / bsize_elem) + 1;
  3234. else
  3235. num_elem = buf_len / bsize_elem;
  3236. /* Allocate a scatter/gather list for the DMA */
  3237. sglist = kzalloc(sizeof(struct ipr_sglist) +
  3238. (sizeof(struct scatterlist) * (num_elem - 1)),
  3239. GFP_KERNEL);
  3240. if (sglist == NULL) {
  3241. ipr_trace;
  3242. return NULL;
  3243. }
  3244. scatterlist = sglist->scatterlist;
  3245. sg_init_table(scatterlist, num_elem);
  3246. sglist->order = order;
  3247. sglist->num_sg = num_elem;
  3248. /* Allocate a bunch of sg elements */
  3249. for (i = 0; i < num_elem; i++) {
  3250. page = alloc_pages(GFP_KERNEL, order);
  3251. if (!page) {
  3252. ipr_trace;
  3253. /* Free up what we already allocated */
  3254. for (j = i - 1; j >= 0; j--)
  3255. __free_pages(sg_page(&scatterlist[j]), order);
  3256. kfree(sglist);
  3257. return NULL;
  3258. }
  3259. sg_set_page(&scatterlist[i], page, 0, 0);
  3260. }
  3261. return sglist;
  3262. }
  3263. /**
  3264. * ipr_free_ucode_buffer - Frees a microcode download buffer
  3265. * @p_dnld: scatter/gather list pointer
  3266. *
  3267. * Free a DMA'able ucode download buffer previously allocated with
  3268. * ipr_alloc_ucode_buffer
  3269. *
  3270. * Return value:
  3271. * nothing
  3272. **/
  3273. static void ipr_free_ucode_buffer(struct ipr_sglist *sglist)
  3274. {
  3275. int i;
  3276. for (i = 0; i < sglist->num_sg; i++)
  3277. __free_pages(sg_page(&sglist->scatterlist[i]), sglist->order);
  3278. kfree(sglist);
  3279. }
  3280. /**
  3281. * ipr_copy_ucode_buffer - Copy user buffer to kernel buffer
  3282. * @sglist: scatter/gather list pointer
  3283. * @buffer: buffer pointer
  3284. * @len: buffer length
  3285. *
  3286. * Copy a microcode image from a user buffer into a buffer allocated by
  3287. * ipr_alloc_ucode_buffer
  3288. *
  3289. * Return value:
  3290. * 0 on success / other on failure
  3291. **/
  3292. static int ipr_copy_ucode_buffer(struct ipr_sglist *sglist,
  3293. u8 *buffer, u32 len)
  3294. {
  3295. int bsize_elem, i, result = 0;
  3296. struct scatterlist *scatterlist;
  3297. void *kaddr;
  3298. /* Determine the actual number of bytes per element */
  3299. bsize_elem = PAGE_SIZE * (1 << sglist->order);
  3300. scatterlist = sglist->scatterlist;
  3301. for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
  3302. struct page *page = sg_page(&scatterlist[i]);
  3303. kaddr = kmap(page);
  3304. memcpy(kaddr, buffer, bsize_elem);
  3305. kunmap(page);
  3306. scatterlist[i].length = bsize_elem;
  3307. if (result != 0) {
  3308. ipr_trace;
  3309. return result;
  3310. }
  3311. }
  3312. if (len % bsize_elem) {
  3313. struct page *page = sg_page(&scatterlist[i]);
  3314. kaddr = kmap(page);
  3315. memcpy(kaddr, buffer, len % bsize_elem);
  3316. kunmap(page);
  3317. scatterlist[i].length = len % bsize_elem;
  3318. }
  3319. sglist->buffer_len = len;
  3320. return result;
  3321. }
  3322. /**
  3323. * ipr_build_ucode_ioadl64 - Build a microcode download IOADL
  3324. * @ipr_cmd: ipr command struct
  3325. * @sglist: scatter/gather list
  3326. *
  3327. * Builds a microcode download IOA data list (IOADL).
  3328. *
  3329. **/
  3330. static void ipr_build_ucode_ioadl64(struct ipr_cmnd *ipr_cmd,
  3331. struct ipr_sglist *sglist)
  3332. {
  3333. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3334. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  3335. struct scatterlist *scatterlist = sglist->scatterlist;
  3336. int i;
  3337. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3338. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3339. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3340. ioarcb->ioadl_len =
  3341. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  3342. for (i = 0; i < ipr_cmd->dma_use_sg; i++) {
  3343. ioadl64[i].flags = cpu_to_be32(IPR_IOADL_FLAGS_WRITE);
  3344. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(&scatterlist[i]));
  3345. ioadl64[i].address = cpu_to_be64(sg_dma_address(&scatterlist[i]));
  3346. }
  3347. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3348. }
  3349. /**
  3350. * ipr_build_ucode_ioadl - Build a microcode download IOADL
  3351. * @ipr_cmd: ipr command struct
  3352. * @sglist: scatter/gather list
  3353. *
  3354. * Builds a microcode download IOA data list (IOADL).
  3355. *
  3356. **/
  3357. static void ipr_build_ucode_ioadl(struct ipr_cmnd *ipr_cmd,
  3358. struct ipr_sglist *sglist)
  3359. {
  3360. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3361. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  3362. struct scatterlist *scatterlist = sglist->scatterlist;
  3363. int i;
  3364. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3365. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3366. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3367. ioarcb->ioadl_len =
  3368. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  3369. for (i = 0; i < ipr_cmd->dma_use_sg; i++) {
  3370. ioadl[i].flags_and_data_len =
  3371. cpu_to_be32(IPR_IOADL_FLAGS_WRITE | sg_dma_len(&scatterlist[i]));
  3372. ioadl[i].address =
  3373. cpu_to_be32(sg_dma_address(&scatterlist[i]));
  3374. }
  3375. ioadl[i-1].flags_and_data_len |=
  3376. cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3377. }
  3378. /**
  3379. * ipr_update_ioa_ucode - Update IOA's microcode
  3380. * @ioa_cfg: ioa config struct
  3381. * @sglist: scatter/gather list
  3382. *
  3383. * Initiate an adapter reset to update the IOA's microcode
  3384. *
  3385. * Return value:
  3386. * 0 on success / -EIO on failure
  3387. **/
  3388. static int ipr_update_ioa_ucode(struct ipr_ioa_cfg *ioa_cfg,
  3389. struct ipr_sglist *sglist)
  3390. {
  3391. unsigned long lock_flags;
  3392. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3393. while (ioa_cfg->in_reset_reload) {
  3394. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3395. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3396. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3397. }
  3398. if (ioa_cfg->ucode_sglist) {
  3399. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3400. dev_err(&ioa_cfg->pdev->dev,
  3401. "Microcode download already in progress\n");
  3402. return -EIO;
  3403. }
  3404. sglist->num_dma_sg = pci_map_sg(ioa_cfg->pdev, sglist->scatterlist,
  3405. sglist->num_sg, DMA_TO_DEVICE);
  3406. if (!sglist->num_dma_sg) {
  3407. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3408. dev_err(&ioa_cfg->pdev->dev,
  3409. "Failed to map microcode download buffer!\n");
  3410. return -EIO;
  3411. }
  3412. ioa_cfg->ucode_sglist = sglist;
  3413. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3414. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3415. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3416. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3417. ioa_cfg->ucode_sglist = NULL;
  3418. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3419. return 0;
  3420. }
  3421. /**
  3422. * ipr_store_update_fw - Update the firmware on the adapter
  3423. * @class_dev: device struct
  3424. * @buf: buffer
  3425. * @count: buffer size
  3426. *
  3427. * This function will update the firmware on the adapter.
  3428. *
  3429. * Return value:
  3430. * count on success / other on failure
  3431. **/
  3432. static ssize_t ipr_store_update_fw(struct device *dev,
  3433. struct device_attribute *attr,
  3434. const char *buf, size_t count)
  3435. {
  3436. struct Scsi_Host *shost = class_to_shost(dev);
  3437. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3438. struct ipr_ucode_image_header *image_hdr;
  3439. const struct firmware *fw_entry;
  3440. struct ipr_sglist *sglist;
  3441. char fname[100];
  3442. char *src;
  3443. int len, result, dnld_size;
  3444. if (!capable(CAP_SYS_ADMIN))
  3445. return -EACCES;
  3446. len = snprintf(fname, 99, "%s", buf);
  3447. fname[len-1] = '\0';
  3448. if (request_firmware(&fw_entry, fname, &ioa_cfg->pdev->dev)) {
  3449. dev_err(&ioa_cfg->pdev->dev, "Firmware file %s not found\n", fname);
  3450. return -EIO;
  3451. }
  3452. image_hdr = (struct ipr_ucode_image_header *)fw_entry->data;
  3453. src = (u8 *)image_hdr + be32_to_cpu(image_hdr->header_length);
  3454. dnld_size = fw_entry->size - be32_to_cpu(image_hdr->header_length);
  3455. sglist = ipr_alloc_ucode_buffer(dnld_size);
  3456. if (!sglist) {
  3457. dev_err(&ioa_cfg->pdev->dev, "Microcode buffer allocation failed\n");
  3458. release_firmware(fw_entry);
  3459. return -ENOMEM;
  3460. }
  3461. result = ipr_copy_ucode_buffer(sglist, src, dnld_size);
  3462. if (result) {
  3463. dev_err(&ioa_cfg->pdev->dev,
  3464. "Microcode buffer copy to DMA buffer failed\n");
  3465. goto out;
  3466. }
  3467. ipr_info("Updating microcode, please be patient. This may take up to 30 minutes.\n");
  3468. result = ipr_update_ioa_ucode(ioa_cfg, sglist);
  3469. if (!result)
  3470. result = count;
  3471. out:
  3472. ipr_free_ucode_buffer(sglist);
  3473. release_firmware(fw_entry);
  3474. return result;
  3475. }
  3476. static struct device_attribute ipr_update_fw_attr = {
  3477. .attr = {
  3478. .name = "update_fw",
  3479. .mode = S_IWUSR,
  3480. },
  3481. .store = ipr_store_update_fw
  3482. };
  3483. /**
  3484. * ipr_show_fw_type - Show the adapter's firmware type.
  3485. * @dev: class device struct
  3486. * @buf: buffer
  3487. *
  3488. * Return value:
  3489. * number of bytes printed to buffer
  3490. **/
  3491. static ssize_t ipr_show_fw_type(struct device *dev,
  3492. struct device_attribute *attr, char *buf)
  3493. {
  3494. struct Scsi_Host *shost = class_to_shost(dev);
  3495. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3496. unsigned long lock_flags = 0;
  3497. int len;
  3498. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3499. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->sis64);
  3500. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3501. return len;
  3502. }
  3503. static struct device_attribute ipr_ioa_fw_type_attr = {
  3504. .attr = {
  3505. .name = "fw_type",
  3506. .mode = S_IRUGO,
  3507. },
  3508. .show = ipr_show_fw_type
  3509. };
  3510. static struct device_attribute *ipr_ioa_attrs[] = {
  3511. &ipr_fw_version_attr,
  3512. &ipr_log_level_attr,
  3513. &ipr_diagnostics_attr,
  3514. &ipr_ioa_state_attr,
  3515. &ipr_ioa_reset_attr,
  3516. &ipr_update_fw_attr,
  3517. &ipr_ioa_fw_type_attr,
  3518. &ipr_iopoll_weight_attr,
  3519. NULL,
  3520. };
  3521. #ifdef CONFIG_SCSI_IPR_DUMP
  3522. /**
  3523. * ipr_read_dump - Dump the adapter
  3524. * @filp: open sysfs file
  3525. * @kobj: kobject struct
  3526. * @bin_attr: bin_attribute struct
  3527. * @buf: buffer
  3528. * @off: offset
  3529. * @count: buffer size
  3530. *
  3531. * Return value:
  3532. * number of bytes printed to buffer
  3533. **/
  3534. static ssize_t ipr_read_dump(struct file *filp, struct kobject *kobj,
  3535. struct bin_attribute *bin_attr,
  3536. char *buf, loff_t off, size_t count)
  3537. {
  3538. struct device *cdev = container_of(kobj, struct device, kobj);
  3539. struct Scsi_Host *shost = class_to_shost(cdev);
  3540. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3541. struct ipr_dump *dump;
  3542. unsigned long lock_flags = 0;
  3543. char *src;
  3544. int len, sdt_end;
  3545. size_t rc = count;
  3546. if (!capable(CAP_SYS_ADMIN))
  3547. return -EACCES;
  3548. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3549. dump = ioa_cfg->dump;
  3550. if (ioa_cfg->sdt_state != DUMP_OBTAINED || !dump) {
  3551. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3552. return 0;
  3553. }
  3554. kref_get(&dump->kref);
  3555. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3556. if (off > dump->driver_dump.hdr.len) {
  3557. kref_put(&dump->kref, ipr_release_dump);
  3558. return 0;
  3559. }
  3560. if (off + count > dump->driver_dump.hdr.len) {
  3561. count = dump->driver_dump.hdr.len - off;
  3562. rc = count;
  3563. }
  3564. if (count && off < sizeof(dump->driver_dump)) {
  3565. if (off + count > sizeof(dump->driver_dump))
  3566. len = sizeof(dump->driver_dump) - off;
  3567. else
  3568. len = count;
  3569. src = (u8 *)&dump->driver_dump + off;
  3570. memcpy(buf, src, len);
  3571. buf += len;
  3572. off += len;
  3573. count -= len;
  3574. }
  3575. off -= sizeof(dump->driver_dump);
  3576. if (ioa_cfg->sis64)
  3577. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3578. (be32_to_cpu(dump->ioa_dump.sdt.hdr.num_entries_used) *
  3579. sizeof(struct ipr_sdt_entry));
  3580. else
  3581. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3582. (IPR_FMT2_NUM_SDT_ENTRIES * sizeof(struct ipr_sdt_entry));
  3583. if (count && off < sdt_end) {
  3584. if (off + count > sdt_end)
  3585. len = sdt_end - off;
  3586. else
  3587. len = count;
  3588. src = (u8 *)&dump->ioa_dump + off;
  3589. memcpy(buf, src, len);
  3590. buf += len;
  3591. off += len;
  3592. count -= len;
  3593. }
  3594. off -= sdt_end;
  3595. while (count) {
  3596. if ((off & PAGE_MASK) != ((off + count) & PAGE_MASK))
  3597. len = PAGE_ALIGN(off) - off;
  3598. else
  3599. len = count;
  3600. src = (u8 *)dump->ioa_dump.ioa_data[(off & PAGE_MASK) >> PAGE_SHIFT];
  3601. src += off & ~PAGE_MASK;
  3602. memcpy(buf, src, len);
  3603. buf += len;
  3604. off += len;
  3605. count -= len;
  3606. }
  3607. kref_put(&dump->kref, ipr_release_dump);
  3608. return rc;
  3609. }
  3610. /**
  3611. * ipr_alloc_dump - Prepare for adapter dump
  3612. * @ioa_cfg: ioa config struct
  3613. *
  3614. * Return value:
  3615. * 0 on success / other on failure
  3616. **/
  3617. static int ipr_alloc_dump(struct ipr_ioa_cfg *ioa_cfg)
  3618. {
  3619. struct ipr_dump *dump;
  3620. __be32 **ioa_data;
  3621. unsigned long lock_flags = 0;
  3622. dump = kzalloc(sizeof(struct ipr_dump), GFP_KERNEL);
  3623. if (!dump) {
  3624. ipr_err("Dump memory allocation failed\n");
  3625. return -ENOMEM;
  3626. }
  3627. if (ioa_cfg->sis64)
  3628. ioa_data = vmalloc(IPR_FMT3_MAX_NUM_DUMP_PAGES * sizeof(__be32 *));
  3629. else
  3630. ioa_data = vmalloc(IPR_FMT2_MAX_NUM_DUMP_PAGES * sizeof(__be32 *));
  3631. if (!ioa_data) {
  3632. ipr_err("Dump memory allocation failed\n");
  3633. kfree(dump);
  3634. return -ENOMEM;
  3635. }
  3636. dump->ioa_dump.ioa_data = ioa_data;
  3637. kref_init(&dump->kref);
  3638. dump->ioa_cfg = ioa_cfg;
  3639. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3640. if (INACTIVE != ioa_cfg->sdt_state) {
  3641. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3642. vfree(dump->ioa_dump.ioa_data);
  3643. kfree(dump);
  3644. return 0;
  3645. }
  3646. ioa_cfg->dump = dump;
  3647. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  3648. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead && !ioa_cfg->dump_taken) {
  3649. ioa_cfg->dump_taken = 1;
  3650. schedule_work(&ioa_cfg->work_q);
  3651. }
  3652. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3653. return 0;
  3654. }
  3655. /**
  3656. * ipr_free_dump - Free adapter dump memory
  3657. * @ioa_cfg: ioa config struct
  3658. *
  3659. * Return value:
  3660. * 0 on success / other on failure
  3661. **/
  3662. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg)
  3663. {
  3664. struct ipr_dump *dump;
  3665. unsigned long lock_flags = 0;
  3666. ENTER;
  3667. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3668. dump = ioa_cfg->dump;
  3669. if (!dump) {
  3670. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3671. return 0;
  3672. }
  3673. ioa_cfg->dump = NULL;
  3674. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3675. kref_put(&dump->kref, ipr_release_dump);
  3676. LEAVE;
  3677. return 0;
  3678. }
  3679. /**
  3680. * ipr_write_dump - Setup dump state of adapter
  3681. * @filp: open sysfs file
  3682. * @kobj: kobject struct
  3683. * @bin_attr: bin_attribute struct
  3684. * @buf: buffer
  3685. * @off: offset
  3686. * @count: buffer size
  3687. *
  3688. * Return value:
  3689. * number of bytes printed to buffer
  3690. **/
  3691. static ssize_t ipr_write_dump(struct file *filp, struct kobject *kobj,
  3692. struct bin_attribute *bin_attr,
  3693. char *buf, loff_t off, size_t count)
  3694. {
  3695. struct device *cdev = container_of(kobj, struct device, kobj);
  3696. struct Scsi_Host *shost = class_to_shost(cdev);
  3697. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3698. int rc;
  3699. if (!capable(CAP_SYS_ADMIN))
  3700. return -EACCES;
  3701. if (buf[0] == '1')
  3702. rc = ipr_alloc_dump(ioa_cfg);
  3703. else if (buf[0] == '0')
  3704. rc = ipr_free_dump(ioa_cfg);
  3705. else
  3706. return -EINVAL;
  3707. if (rc)
  3708. return rc;
  3709. else
  3710. return count;
  3711. }
  3712. static struct bin_attribute ipr_dump_attr = {
  3713. .attr = {
  3714. .name = "dump",
  3715. .mode = S_IRUSR | S_IWUSR,
  3716. },
  3717. .size = 0,
  3718. .read = ipr_read_dump,
  3719. .write = ipr_write_dump
  3720. };
  3721. #else
  3722. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg) { return 0; };
  3723. #endif
  3724. /**
  3725. * ipr_change_queue_depth - Change the device's queue depth
  3726. * @sdev: scsi device struct
  3727. * @qdepth: depth to set
  3728. * @reason: calling context
  3729. *
  3730. * Return value:
  3731. * actual depth set
  3732. **/
  3733. static int ipr_change_queue_depth(struct scsi_device *sdev, int qdepth,
  3734. int reason)
  3735. {
  3736. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3737. struct ipr_resource_entry *res;
  3738. unsigned long lock_flags = 0;
  3739. if (reason != SCSI_QDEPTH_DEFAULT)
  3740. return -EOPNOTSUPP;
  3741. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3742. res = (struct ipr_resource_entry *)sdev->hostdata;
  3743. if (res && ipr_is_gata(res) && qdepth > IPR_MAX_CMD_PER_ATA_LUN)
  3744. qdepth = IPR_MAX_CMD_PER_ATA_LUN;
  3745. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3746. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  3747. return sdev->queue_depth;
  3748. }
  3749. /**
  3750. * ipr_change_queue_type - Change the device's queue type
  3751. * @dsev: scsi device struct
  3752. * @tag_type: type of tags to use
  3753. *
  3754. * Return value:
  3755. * actual queue type set
  3756. **/
  3757. static int ipr_change_queue_type(struct scsi_device *sdev, int tag_type)
  3758. {
  3759. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3760. struct ipr_resource_entry *res;
  3761. unsigned long lock_flags = 0;
  3762. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3763. res = (struct ipr_resource_entry *)sdev->hostdata;
  3764. if (res) {
  3765. if (ipr_is_gscsi(res) && sdev->tagged_supported) {
  3766. /*
  3767. * We don't bother quiescing the device here since the
  3768. * adapter firmware does it for us.
  3769. */
  3770. scsi_set_tag_type(sdev, tag_type);
  3771. if (tag_type)
  3772. scsi_activate_tcq(sdev, sdev->queue_depth);
  3773. else
  3774. scsi_deactivate_tcq(sdev, sdev->queue_depth);
  3775. } else
  3776. tag_type = 0;
  3777. } else
  3778. tag_type = 0;
  3779. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3780. return tag_type;
  3781. }
  3782. /**
  3783. * ipr_show_adapter_handle - Show the adapter's resource handle for this device
  3784. * @dev: device struct
  3785. * @attr: device attribute structure
  3786. * @buf: buffer
  3787. *
  3788. * Return value:
  3789. * number of bytes printed to buffer
  3790. **/
  3791. static ssize_t ipr_show_adapter_handle(struct device *dev, struct device_attribute *attr, char *buf)
  3792. {
  3793. struct scsi_device *sdev = to_scsi_device(dev);
  3794. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3795. struct ipr_resource_entry *res;
  3796. unsigned long lock_flags = 0;
  3797. ssize_t len = -ENXIO;
  3798. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3799. res = (struct ipr_resource_entry *)sdev->hostdata;
  3800. if (res)
  3801. len = snprintf(buf, PAGE_SIZE, "%08X\n", res->res_handle);
  3802. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3803. return len;
  3804. }
  3805. static struct device_attribute ipr_adapter_handle_attr = {
  3806. .attr = {
  3807. .name = "adapter_handle",
  3808. .mode = S_IRUSR,
  3809. },
  3810. .show = ipr_show_adapter_handle
  3811. };
  3812. /**
  3813. * ipr_show_resource_path - Show the resource path or the resource address for
  3814. * this device.
  3815. * @dev: device struct
  3816. * @attr: device attribute structure
  3817. * @buf: buffer
  3818. *
  3819. * Return value:
  3820. * number of bytes printed to buffer
  3821. **/
  3822. static ssize_t ipr_show_resource_path(struct device *dev, struct device_attribute *attr, char *buf)
  3823. {
  3824. struct scsi_device *sdev = to_scsi_device(dev);
  3825. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3826. struct ipr_resource_entry *res;
  3827. unsigned long lock_flags = 0;
  3828. ssize_t len = -ENXIO;
  3829. char buffer[IPR_MAX_RES_PATH_LENGTH];
  3830. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3831. res = (struct ipr_resource_entry *)sdev->hostdata;
  3832. if (res && ioa_cfg->sis64)
  3833. len = snprintf(buf, PAGE_SIZE, "%s\n",
  3834. __ipr_format_res_path(res->res_path, buffer,
  3835. sizeof(buffer)));
  3836. else if (res)
  3837. len = snprintf(buf, PAGE_SIZE, "%d:%d:%d:%d\n", ioa_cfg->host->host_no,
  3838. res->bus, res->target, res->lun);
  3839. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3840. return len;
  3841. }
  3842. static struct device_attribute ipr_resource_path_attr = {
  3843. .attr = {
  3844. .name = "resource_path",
  3845. .mode = S_IRUGO,
  3846. },
  3847. .show = ipr_show_resource_path
  3848. };
  3849. /**
  3850. * ipr_show_device_id - Show the device_id for this device.
  3851. * @dev: device struct
  3852. * @attr: device attribute structure
  3853. * @buf: buffer
  3854. *
  3855. * Return value:
  3856. * number of bytes printed to buffer
  3857. **/
  3858. static ssize_t ipr_show_device_id(struct device *dev, struct device_attribute *attr, char *buf)
  3859. {
  3860. struct scsi_device *sdev = to_scsi_device(dev);
  3861. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3862. struct ipr_resource_entry *res;
  3863. unsigned long lock_flags = 0;
  3864. ssize_t len = -ENXIO;
  3865. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3866. res = (struct ipr_resource_entry *)sdev->hostdata;
  3867. if (res && ioa_cfg->sis64)
  3868. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", res->dev_id);
  3869. else if (res)
  3870. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", res->lun_wwn);
  3871. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3872. return len;
  3873. }
  3874. static struct device_attribute ipr_device_id_attr = {
  3875. .attr = {
  3876. .name = "device_id",
  3877. .mode = S_IRUGO,
  3878. },
  3879. .show = ipr_show_device_id
  3880. };
  3881. /**
  3882. * ipr_show_resource_type - Show the resource type for this device.
  3883. * @dev: device struct
  3884. * @attr: device attribute structure
  3885. * @buf: buffer
  3886. *
  3887. * Return value:
  3888. * number of bytes printed to buffer
  3889. **/
  3890. static ssize_t ipr_show_resource_type(struct device *dev, struct device_attribute *attr, char *buf)
  3891. {
  3892. struct scsi_device *sdev = to_scsi_device(dev);
  3893. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3894. struct ipr_resource_entry *res;
  3895. unsigned long lock_flags = 0;
  3896. ssize_t len = -ENXIO;
  3897. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3898. res = (struct ipr_resource_entry *)sdev->hostdata;
  3899. if (res)
  3900. len = snprintf(buf, PAGE_SIZE, "%x\n", res->type);
  3901. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3902. return len;
  3903. }
  3904. static struct device_attribute ipr_resource_type_attr = {
  3905. .attr = {
  3906. .name = "resource_type",
  3907. .mode = S_IRUGO,
  3908. },
  3909. .show = ipr_show_resource_type
  3910. };
  3911. static struct device_attribute *ipr_dev_attrs[] = {
  3912. &ipr_adapter_handle_attr,
  3913. &ipr_resource_path_attr,
  3914. &ipr_device_id_attr,
  3915. &ipr_resource_type_attr,
  3916. NULL,
  3917. };
  3918. /**
  3919. * ipr_biosparam - Return the HSC mapping
  3920. * @sdev: scsi device struct
  3921. * @block_device: block device pointer
  3922. * @capacity: capacity of the device
  3923. * @parm: Array containing returned HSC values.
  3924. *
  3925. * This function generates the HSC parms that fdisk uses.
  3926. * We want to make sure we return something that places partitions
  3927. * on 4k boundaries for best performance with the IOA.
  3928. *
  3929. * Return value:
  3930. * 0 on success
  3931. **/
  3932. static int ipr_biosparam(struct scsi_device *sdev,
  3933. struct block_device *block_device,
  3934. sector_t capacity, int *parm)
  3935. {
  3936. int heads, sectors;
  3937. sector_t cylinders;
  3938. heads = 128;
  3939. sectors = 32;
  3940. cylinders = capacity;
  3941. sector_div(cylinders, (128 * 32));
  3942. /* return result */
  3943. parm[0] = heads;
  3944. parm[1] = sectors;
  3945. parm[2] = cylinders;
  3946. return 0;
  3947. }
  3948. /**
  3949. * ipr_find_starget - Find target based on bus/target.
  3950. * @starget: scsi target struct
  3951. *
  3952. * Return value:
  3953. * resource entry pointer if found / NULL if not found
  3954. **/
  3955. static struct ipr_resource_entry *ipr_find_starget(struct scsi_target *starget)
  3956. {
  3957. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  3958. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  3959. struct ipr_resource_entry *res;
  3960. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  3961. if ((res->bus == starget->channel) &&
  3962. (res->target == starget->id)) {
  3963. return res;
  3964. }
  3965. }
  3966. return NULL;
  3967. }
  3968. static struct ata_port_info sata_port_info;
  3969. /**
  3970. * ipr_target_alloc - Prepare for commands to a SCSI target
  3971. * @starget: scsi target struct
  3972. *
  3973. * If the device is a SATA device, this function allocates an
  3974. * ATA port with libata, else it does nothing.
  3975. *
  3976. * Return value:
  3977. * 0 on success / non-0 on failure
  3978. **/
  3979. static int ipr_target_alloc(struct scsi_target *starget)
  3980. {
  3981. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  3982. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  3983. struct ipr_sata_port *sata_port;
  3984. struct ata_port *ap;
  3985. struct ipr_resource_entry *res;
  3986. unsigned long lock_flags;
  3987. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3988. res = ipr_find_starget(starget);
  3989. starget->hostdata = NULL;
  3990. if (res && ipr_is_gata(res)) {
  3991. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3992. sata_port = kzalloc(sizeof(*sata_port), GFP_KERNEL);
  3993. if (!sata_port)
  3994. return -ENOMEM;
  3995. ap = ata_sas_port_alloc(&ioa_cfg->ata_host, &sata_port_info, shost);
  3996. if (ap) {
  3997. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3998. sata_port->ioa_cfg = ioa_cfg;
  3999. sata_port->ap = ap;
  4000. sata_port->res = res;
  4001. res->sata_port = sata_port;
  4002. ap->private_data = sata_port;
  4003. starget->hostdata = sata_port;
  4004. } else {
  4005. kfree(sata_port);
  4006. return -ENOMEM;
  4007. }
  4008. }
  4009. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4010. return 0;
  4011. }
  4012. /**
  4013. * ipr_target_destroy - Destroy a SCSI target
  4014. * @starget: scsi target struct
  4015. *
  4016. * If the device was a SATA device, this function frees the libata
  4017. * ATA port, else it does nothing.
  4018. *
  4019. **/
  4020. static void ipr_target_destroy(struct scsi_target *starget)
  4021. {
  4022. struct ipr_sata_port *sata_port = starget->hostdata;
  4023. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  4024. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4025. if (ioa_cfg->sis64) {
  4026. if (!ipr_find_starget(starget)) {
  4027. if (starget->channel == IPR_ARRAY_VIRTUAL_BUS)
  4028. clear_bit(starget->id, ioa_cfg->array_ids);
  4029. else if (starget->channel == IPR_VSET_VIRTUAL_BUS)
  4030. clear_bit(starget->id, ioa_cfg->vset_ids);
  4031. else if (starget->channel == 0)
  4032. clear_bit(starget->id, ioa_cfg->target_ids);
  4033. }
  4034. }
  4035. if (sata_port) {
  4036. starget->hostdata = NULL;
  4037. ata_sas_port_destroy(sata_port->ap);
  4038. kfree(sata_port);
  4039. }
  4040. }
  4041. /**
  4042. * ipr_find_sdev - Find device based on bus/target/lun.
  4043. * @sdev: scsi device struct
  4044. *
  4045. * Return value:
  4046. * resource entry pointer if found / NULL if not found
  4047. **/
  4048. static struct ipr_resource_entry *ipr_find_sdev(struct scsi_device *sdev)
  4049. {
  4050. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4051. struct ipr_resource_entry *res;
  4052. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4053. if ((res->bus == sdev->channel) &&
  4054. (res->target == sdev->id) &&
  4055. (res->lun == sdev->lun))
  4056. return res;
  4057. }
  4058. return NULL;
  4059. }
  4060. /**
  4061. * ipr_slave_destroy - Unconfigure a SCSI device
  4062. * @sdev: scsi device struct
  4063. *
  4064. * Return value:
  4065. * nothing
  4066. **/
  4067. static void ipr_slave_destroy(struct scsi_device *sdev)
  4068. {
  4069. struct ipr_resource_entry *res;
  4070. struct ipr_ioa_cfg *ioa_cfg;
  4071. unsigned long lock_flags = 0;
  4072. ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4073. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4074. res = (struct ipr_resource_entry *) sdev->hostdata;
  4075. if (res) {
  4076. if (res->sata_port)
  4077. res->sata_port->ap->link.device[0].class = ATA_DEV_NONE;
  4078. sdev->hostdata = NULL;
  4079. res->sdev = NULL;
  4080. res->sata_port = NULL;
  4081. }
  4082. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4083. }
  4084. /**
  4085. * ipr_slave_configure - Configure a SCSI device
  4086. * @sdev: scsi device struct
  4087. *
  4088. * This function configures the specified scsi device.
  4089. *
  4090. * Return value:
  4091. * 0 on success
  4092. **/
  4093. static int ipr_slave_configure(struct scsi_device *sdev)
  4094. {
  4095. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4096. struct ipr_resource_entry *res;
  4097. struct ata_port *ap = NULL;
  4098. unsigned long lock_flags = 0;
  4099. char buffer[IPR_MAX_RES_PATH_LENGTH];
  4100. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4101. res = sdev->hostdata;
  4102. if (res) {
  4103. if (ipr_is_af_dasd_device(res))
  4104. sdev->type = TYPE_RAID;
  4105. if (ipr_is_af_dasd_device(res) || ipr_is_ioa_resource(res)) {
  4106. sdev->scsi_level = 4;
  4107. sdev->no_uld_attach = 1;
  4108. }
  4109. if (ipr_is_vset_device(res)) {
  4110. blk_queue_rq_timeout(sdev->request_queue,
  4111. IPR_VSET_RW_TIMEOUT);
  4112. blk_queue_max_hw_sectors(sdev->request_queue, IPR_VSET_MAX_SECTORS);
  4113. }
  4114. if (ipr_is_gata(res) && res->sata_port)
  4115. ap = res->sata_port->ap;
  4116. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4117. if (ap) {
  4118. scsi_adjust_queue_depth(sdev, 0, IPR_MAX_CMD_PER_ATA_LUN);
  4119. ata_sas_slave_configure(sdev, ap);
  4120. } else
  4121. scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
  4122. if (ioa_cfg->sis64)
  4123. sdev_printk(KERN_INFO, sdev, "Resource path: %s\n",
  4124. ipr_format_res_path(ioa_cfg,
  4125. res->res_path, buffer, sizeof(buffer)));
  4126. return 0;
  4127. }
  4128. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4129. return 0;
  4130. }
  4131. /**
  4132. * ipr_ata_slave_alloc - Prepare for commands to a SATA device
  4133. * @sdev: scsi device struct
  4134. *
  4135. * This function initializes an ATA port so that future commands
  4136. * sent through queuecommand will work.
  4137. *
  4138. * Return value:
  4139. * 0 on success
  4140. **/
  4141. static int ipr_ata_slave_alloc(struct scsi_device *sdev)
  4142. {
  4143. struct ipr_sata_port *sata_port = NULL;
  4144. int rc = -ENXIO;
  4145. ENTER;
  4146. if (sdev->sdev_target)
  4147. sata_port = sdev->sdev_target->hostdata;
  4148. if (sata_port) {
  4149. rc = ata_sas_port_init(sata_port->ap);
  4150. if (rc == 0)
  4151. rc = ata_sas_sync_probe(sata_port->ap);
  4152. }
  4153. if (rc)
  4154. ipr_slave_destroy(sdev);
  4155. LEAVE;
  4156. return rc;
  4157. }
  4158. /**
  4159. * ipr_slave_alloc - Prepare for commands to a device.
  4160. * @sdev: scsi device struct
  4161. *
  4162. * This function saves a pointer to the resource entry
  4163. * in the scsi device struct if the device exists. We
  4164. * can then use this pointer in ipr_queuecommand when
  4165. * handling new commands.
  4166. *
  4167. * Return value:
  4168. * 0 on success / -ENXIO if device does not exist
  4169. **/
  4170. static int ipr_slave_alloc(struct scsi_device *sdev)
  4171. {
  4172. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4173. struct ipr_resource_entry *res;
  4174. unsigned long lock_flags;
  4175. int rc = -ENXIO;
  4176. sdev->hostdata = NULL;
  4177. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4178. res = ipr_find_sdev(sdev);
  4179. if (res) {
  4180. res->sdev = sdev;
  4181. res->add_to_ml = 0;
  4182. res->in_erp = 0;
  4183. sdev->hostdata = res;
  4184. if (!ipr_is_naca_model(res))
  4185. res->needs_sync_complete = 1;
  4186. rc = 0;
  4187. if (ipr_is_gata(res)) {
  4188. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4189. return ipr_ata_slave_alloc(sdev);
  4190. }
  4191. }
  4192. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4193. return rc;
  4194. }
  4195. static int ipr_eh_host_reset(struct scsi_cmnd *cmd)
  4196. {
  4197. struct ipr_ioa_cfg *ioa_cfg;
  4198. unsigned long lock_flags = 0;
  4199. int rc = SUCCESS;
  4200. ENTER;
  4201. ioa_cfg = (struct ipr_ioa_cfg *) cmd->device->host->hostdata;
  4202. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4203. if (!ioa_cfg->in_reset_reload) {
  4204. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  4205. dev_err(&ioa_cfg->pdev->dev,
  4206. "Adapter being reset as a result of error recovery.\n");
  4207. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4208. ioa_cfg->sdt_state = GET_DUMP;
  4209. }
  4210. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4211. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  4212. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4213. /* If we got hit with a host reset while we were already resetting
  4214. the adapter for some reason, and the reset failed. */
  4215. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  4216. ipr_trace;
  4217. rc = FAILED;
  4218. }
  4219. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4220. LEAVE;
  4221. return rc;
  4222. }
  4223. /**
  4224. * ipr_device_reset - Reset the device
  4225. * @ioa_cfg: ioa config struct
  4226. * @res: resource entry struct
  4227. *
  4228. * This function issues a device reset to the affected device.
  4229. * If the device is a SCSI device, a LUN reset will be sent
  4230. * to the device first. If that does not work, a target reset
  4231. * will be sent. If the device is a SATA device, a PHY reset will
  4232. * be sent.
  4233. *
  4234. * Return value:
  4235. * 0 on success / non-zero on failure
  4236. **/
  4237. static int ipr_device_reset(struct ipr_ioa_cfg *ioa_cfg,
  4238. struct ipr_resource_entry *res)
  4239. {
  4240. struct ipr_cmnd *ipr_cmd;
  4241. struct ipr_ioarcb *ioarcb;
  4242. struct ipr_cmd_pkt *cmd_pkt;
  4243. struct ipr_ioarcb_ata_regs *regs;
  4244. u32 ioasc;
  4245. ENTER;
  4246. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4247. ioarcb = &ipr_cmd->ioarcb;
  4248. cmd_pkt = &ioarcb->cmd_pkt;
  4249. if (ipr_cmd->ioa_cfg->sis64) {
  4250. regs = &ipr_cmd->i.ata_ioadl.regs;
  4251. ioarcb->add_cmd_parms_offset = cpu_to_be16(sizeof(*ioarcb));
  4252. } else
  4253. regs = &ioarcb->u.add_data.u.regs;
  4254. ioarcb->res_handle = res->res_handle;
  4255. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4256. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4257. if (ipr_is_gata(res)) {
  4258. cmd_pkt->cdb[2] = IPR_ATA_PHY_RESET;
  4259. ioarcb->add_cmd_parms_len = cpu_to_be16(sizeof(regs->flags));
  4260. regs->flags |= IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION;
  4261. }
  4262. ipr_send_blocking_cmd(ipr_cmd, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4263. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4264. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4265. if (ipr_is_gata(res) && res->sata_port && ioasc != IPR_IOASC_IOA_WAS_RESET) {
  4266. if (ipr_cmd->ioa_cfg->sis64)
  4267. memcpy(&res->sata_port->ioasa, &ipr_cmd->s.ioasa64.u.gata,
  4268. sizeof(struct ipr_ioasa_gata));
  4269. else
  4270. memcpy(&res->sata_port->ioasa, &ipr_cmd->s.ioasa.u.gata,
  4271. sizeof(struct ipr_ioasa_gata));
  4272. }
  4273. LEAVE;
  4274. return IPR_IOASC_SENSE_KEY(ioasc) ? -EIO : 0;
  4275. }
  4276. /**
  4277. * ipr_sata_reset - Reset the SATA port
  4278. * @link: SATA link to reset
  4279. * @classes: class of the attached device
  4280. *
  4281. * This function issues a SATA phy reset to the affected ATA link.
  4282. *
  4283. * Return value:
  4284. * 0 on success / non-zero on failure
  4285. **/
  4286. static int ipr_sata_reset(struct ata_link *link, unsigned int *classes,
  4287. unsigned long deadline)
  4288. {
  4289. struct ipr_sata_port *sata_port = link->ap->private_data;
  4290. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  4291. struct ipr_resource_entry *res;
  4292. unsigned long lock_flags = 0;
  4293. int rc = -ENXIO;
  4294. ENTER;
  4295. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4296. while (ioa_cfg->in_reset_reload) {
  4297. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4298. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  4299. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4300. }
  4301. res = sata_port->res;
  4302. if (res) {
  4303. rc = ipr_device_reset(ioa_cfg, res);
  4304. *classes = res->ata_class;
  4305. }
  4306. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4307. LEAVE;
  4308. return rc;
  4309. }
  4310. /**
  4311. * ipr_eh_dev_reset - Reset the device
  4312. * @scsi_cmd: scsi command struct
  4313. *
  4314. * This function issues a device reset to the affected device.
  4315. * A LUN reset will be sent to the device first. If that does
  4316. * not work, a target reset will be sent.
  4317. *
  4318. * Return value:
  4319. * SUCCESS / FAILED
  4320. **/
  4321. static int __ipr_eh_dev_reset(struct scsi_cmnd *scsi_cmd)
  4322. {
  4323. struct ipr_cmnd *ipr_cmd;
  4324. struct ipr_ioa_cfg *ioa_cfg;
  4325. struct ipr_resource_entry *res;
  4326. struct ata_port *ap;
  4327. int rc = 0;
  4328. struct ipr_hrr_queue *hrrq;
  4329. ENTER;
  4330. ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata;
  4331. res = scsi_cmd->device->hostdata;
  4332. if (!res)
  4333. return FAILED;
  4334. /*
  4335. * If we are currently going through reset/reload, return failed. This will force the
  4336. * mid-layer to call ipr_eh_host_reset, which will then go to sleep and wait for the
  4337. * reset to complete
  4338. */
  4339. if (ioa_cfg->in_reset_reload)
  4340. return FAILED;
  4341. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  4342. return FAILED;
  4343. for_each_hrrq(hrrq, ioa_cfg) {
  4344. spin_lock(&hrrq->_lock);
  4345. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  4346. if (ipr_cmd->ioarcb.res_handle == res->res_handle) {
  4347. if (ipr_cmd->scsi_cmd)
  4348. ipr_cmd->done = ipr_scsi_eh_done;
  4349. if (ipr_cmd->qc)
  4350. ipr_cmd->done = ipr_sata_eh_done;
  4351. if (ipr_cmd->qc &&
  4352. !(ipr_cmd->qc->flags & ATA_QCFLAG_FAILED)) {
  4353. ipr_cmd->qc->err_mask |= AC_ERR_TIMEOUT;
  4354. ipr_cmd->qc->flags |= ATA_QCFLAG_FAILED;
  4355. }
  4356. }
  4357. }
  4358. spin_unlock(&hrrq->_lock);
  4359. }
  4360. res->resetting_device = 1;
  4361. scmd_printk(KERN_ERR, scsi_cmd, "Resetting device\n");
  4362. if (ipr_is_gata(res) && res->sata_port) {
  4363. ap = res->sata_port->ap;
  4364. spin_unlock_irq(scsi_cmd->device->host->host_lock);
  4365. ata_std_error_handler(ap);
  4366. spin_lock_irq(scsi_cmd->device->host->host_lock);
  4367. for_each_hrrq(hrrq, ioa_cfg) {
  4368. spin_lock(&hrrq->_lock);
  4369. list_for_each_entry(ipr_cmd,
  4370. &hrrq->hrrq_pending_q, queue) {
  4371. if (ipr_cmd->ioarcb.res_handle ==
  4372. res->res_handle) {
  4373. rc = -EIO;
  4374. break;
  4375. }
  4376. }
  4377. spin_unlock(&hrrq->_lock);
  4378. }
  4379. } else
  4380. rc = ipr_device_reset(ioa_cfg, res);
  4381. res->resetting_device = 0;
  4382. LEAVE;
  4383. return rc ? FAILED : SUCCESS;
  4384. }
  4385. static int ipr_eh_dev_reset(struct scsi_cmnd *cmd)
  4386. {
  4387. int rc;
  4388. spin_lock_irq(cmd->device->host->host_lock);
  4389. rc = __ipr_eh_dev_reset(cmd);
  4390. spin_unlock_irq(cmd->device->host->host_lock);
  4391. return rc;
  4392. }
  4393. /**
  4394. * ipr_bus_reset_done - Op done function for bus reset.
  4395. * @ipr_cmd: ipr command struct
  4396. *
  4397. * This function is the op done function for a bus reset
  4398. *
  4399. * Return value:
  4400. * none
  4401. **/
  4402. static void ipr_bus_reset_done(struct ipr_cmnd *ipr_cmd)
  4403. {
  4404. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4405. struct ipr_resource_entry *res;
  4406. ENTER;
  4407. if (!ioa_cfg->sis64)
  4408. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4409. if (res->res_handle == ipr_cmd->ioarcb.res_handle) {
  4410. scsi_report_bus_reset(ioa_cfg->host, res->bus);
  4411. break;
  4412. }
  4413. }
  4414. /*
  4415. * If abort has not completed, indicate the reset has, else call the
  4416. * abort's done function to wake the sleeping eh thread
  4417. */
  4418. if (ipr_cmd->sibling->sibling)
  4419. ipr_cmd->sibling->sibling = NULL;
  4420. else
  4421. ipr_cmd->sibling->done(ipr_cmd->sibling);
  4422. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4423. LEAVE;
  4424. }
  4425. /**
  4426. * ipr_abort_timeout - An abort task has timed out
  4427. * @ipr_cmd: ipr command struct
  4428. *
  4429. * This function handles when an abort task times out. If this
  4430. * happens we issue a bus reset since we have resources tied
  4431. * up that must be freed before returning to the midlayer.
  4432. *
  4433. * Return value:
  4434. * none
  4435. **/
  4436. static void ipr_abort_timeout(struct ipr_cmnd *ipr_cmd)
  4437. {
  4438. struct ipr_cmnd *reset_cmd;
  4439. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4440. struct ipr_cmd_pkt *cmd_pkt;
  4441. unsigned long lock_flags = 0;
  4442. ENTER;
  4443. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4444. if (ipr_cmd->completion.done || ioa_cfg->in_reset_reload) {
  4445. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4446. return;
  4447. }
  4448. sdev_printk(KERN_ERR, ipr_cmd->u.sdev, "Abort timed out. Resetting bus.\n");
  4449. reset_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4450. ipr_cmd->sibling = reset_cmd;
  4451. reset_cmd->sibling = ipr_cmd;
  4452. reset_cmd->ioarcb.res_handle = ipr_cmd->ioarcb.res_handle;
  4453. cmd_pkt = &reset_cmd->ioarcb.cmd_pkt;
  4454. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4455. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4456. cmd_pkt->cdb[2] = IPR_RESET_TYPE_SELECT | IPR_BUS_RESET;
  4457. ipr_do_req(reset_cmd, ipr_bus_reset_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4458. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4459. LEAVE;
  4460. }
  4461. /**
  4462. * ipr_cancel_op - Cancel specified op
  4463. * @scsi_cmd: scsi command struct
  4464. *
  4465. * This function cancels specified op.
  4466. *
  4467. * Return value:
  4468. * SUCCESS / FAILED
  4469. **/
  4470. static int ipr_cancel_op(struct scsi_cmnd *scsi_cmd)
  4471. {
  4472. struct ipr_cmnd *ipr_cmd;
  4473. struct ipr_ioa_cfg *ioa_cfg;
  4474. struct ipr_resource_entry *res;
  4475. struct ipr_cmd_pkt *cmd_pkt;
  4476. u32 ioasc, int_reg;
  4477. int op_found = 0;
  4478. struct ipr_hrr_queue *hrrq;
  4479. ENTER;
  4480. ioa_cfg = (struct ipr_ioa_cfg *)scsi_cmd->device->host->hostdata;
  4481. res = scsi_cmd->device->hostdata;
  4482. /* If we are currently going through reset/reload, return failed.
  4483. * This will force the mid-layer to call ipr_eh_host_reset,
  4484. * which will then go to sleep and wait for the reset to complete
  4485. */
  4486. if (ioa_cfg->in_reset_reload ||
  4487. ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  4488. return FAILED;
  4489. if (!res)
  4490. return FAILED;
  4491. /*
  4492. * If we are aborting a timed out op, chances are that the timeout was caused
  4493. * by a still not detected EEH error. In such cases, reading a register will
  4494. * trigger the EEH recovery infrastructure.
  4495. */
  4496. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  4497. if (!ipr_is_gscsi(res))
  4498. return FAILED;
  4499. for_each_hrrq(hrrq, ioa_cfg) {
  4500. spin_lock(&hrrq->_lock);
  4501. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  4502. if (ipr_cmd->scsi_cmd == scsi_cmd) {
  4503. ipr_cmd->done = ipr_scsi_eh_done;
  4504. op_found = 1;
  4505. break;
  4506. }
  4507. }
  4508. spin_unlock(&hrrq->_lock);
  4509. }
  4510. if (!op_found)
  4511. return SUCCESS;
  4512. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4513. ipr_cmd->ioarcb.res_handle = res->res_handle;
  4514. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  4515. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4516. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  4517. ipr_cmd->u.sdev = scsi_cmd->device;
  4518. scmd_printk(KERN_ERR, scsi_cmd, "Aborting command: %02X\n",
  4519. scsi_cmd->cmnd[0]);
  4520. ipr_send_blocking_cmd(ipr_cmd, ipr_abort_timeout, IPR_CANCEL_ALL_TIMEOUT);
  4521. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4522. /*
  4523. * If the abort task timed out and we sent a bus reset, we will get
  4524. * one the following responses to the abort
  4525. */
  4526. if (ioasc == IPR_IOASC_BUS_WAS_RESET || ioasc == IPR_IOASC_SYNC_REQUIRED) {
  4527. ioasc = 0;
  4528. ipr_trace;
  4529. }
  4530. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  4531. if (!ipr_is_naca_model(res))
  4532. res->needs_sync_complete = 1;
  4533. LEAVE;
  4534. return IPR_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  4535. }
  4536. /**
  4537. * ipr_eh_abort - Abort a single op
  4538. * @scsi_cmd: scsi command struct
  4539. *
  4540. * Return value:
  4541. * SUCCESS / FAILED
  4542. **/
  4543. static int ipr_eh_abort(struct scsi_cmnd *scsi_cmd)
  4544. {
  4545. unsigned long flags;
  4546. int rc;
  4547. ENTER;
  4548. spin_lock_irqsave(scsi_cmd->device->host->host_lock, flags);
  4549. rc = ipr_cancel_op(scsi_cmd);
  4550. spin_unlock_irqrestore(scsi_cmd->device->host->host_lock, flags);
  4551. LEAVE;
  4552. return rc;
  4553. }
  4554. /**
  4555. * ipr_handle_other_interrupt - Handle "other" interrupts
  4556. * @ioa_cfg: ioa config struct
  4557. * @int_reg: interrupt register
  4558. *
  4559. * Return value:
  4560. * IRQ_NONE / IRQ_HANDLED
  4561. **/
  4562. static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg,
  4563. u32 int_reg)
  4564. {
  4565. irqreturn_t rc = IRQ_HANDLED;
  4566. u32 int_mask_reg;
  4567. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  4568. int_reg &= ~int_mask_reg;
  4569. /* If an interrupt on the adapter did not occur, ignore it.
  4570. * Or in the case of SIS 64, check for a stage change interrupt.
  4571. */
  4572. if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) {
  4573. if (ioa_cfg->sis64) {
  4574. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  4575. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4576. if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {
  4577. /* clear stage change */
  4578. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.clr_interrupt_reg);
  4579. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4580. list_del(&ioa_cfg->reset_cmd->queue);
  4581. del_timer(&ioa_cfg->reset_cmd->timer);
  4582. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4583. return IRQ_HANDLED;
  4584. }
  4585. }
  4586. return IRQ_NONE;
  4587. }
  4588. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  4589. /* Mask the interrupt */
  4590. writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.set_interrupt_mask_reg);
  4591. /* Clear the interrupt */
  4592. writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.clr_interrupt_reg);
  4593. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  4594. list_del(&ioa_cfg->reset_cmd->queue);
  4595. del_timer(&ioa_cfg->reset_cmd->timer);
  4596. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4597. } else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) {
  4598. if (ioa_cfg->clear_isr) {
  4599. if (ipr_debug && printk_ratelimit())
  4600. dev_err(&ioa_cfg->pdev->dev,
  4601. "Spurious interrupt detected. 0x%08X\n", int_reg);
  4602. writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);
  4603. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4604. return IRQ_NONE;
  4605. }
  4606. } else {
  4607. if (int_reg & IPR_PCII_IOA_UNIT_CHECKED)
  4608. ioa_cfg->ioa_unit_checked = 1;
  4609. else if (int_reg & IPR_PCII_NO_HOST_RRQ)
  4610. dev_err(&ioa_cfg->pdev->dev,
  4611. "No Host RRQ. 0x%08X\n", int_reg);
  4612. else
  4613. dev_err(&ioa_cfg->pdev->dev,
  4614. "Permanent IOA failure. 0x%08X\n", int_reg);
  4615. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4616. ioa_cfg->sdt_state = GET_DUMP;
  4617. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  4618. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  4619. }
  4620. return rc;
  4621. }
  4622. /**
  4623. * ipr_isr_eh - Interrupt service routine error handler
  4624. * @ioa_cfg: ioa config struct
  4625. * @msg: message to log
  4626. *
  4627. * Return value:
  4628. * none
  4629. **/
  4630. static void ipr_isr_eh(struct ipr_ioa_cfg *ioa_cfg, char *msg, u16 number)
  4631. {
  4632. ioa_cfg->errors_logged++;
  4633. dev_err(&ioa_cfg->pdev->dev, "%s %d\n", msg, number);
  4634. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4635. ioa_cfg->sdt_state = GET_DUMP;
  4636. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  4637. }
  4638. static int ipr_process_hrrq(struct ipr_hrr_queue *hrr_queue, int budget,
  4639. struct list_head *doneq)
  4640. {
  4641. u32 ioasc;
  4642. u16 cmd_index;
  4643. struct ipr_cmnd *ipr_cmd;
  4644. struct ipr_ioa_cfg *ioa_cfg = hrr_queue->ioa_cfg;
  4645. int num_hrrq = 0;
  4646. /* If interrupts are disabled, ignore the interrupt */
  4647. if (!hrr_queue->allow_interrupts)
  4648. return 0;
  4649. while ((be32_to_cpu(*hrr_queue->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  4650. hrr_queue->toggle_bit) {
  4651. cmd_index = (be32_to_cpu(*hrr_queue->hrrq_curr) &
  4652. IPR_HRRQ_REQ_RESP_HANDLE_MASK) >>
  4653. IPR_HRRQ_REQ_RESP_HANDLE_SHIFT;
  4654. if (unlikely(cmd_index > hrr_queue->max_cmd_id ||
  4655. cmd_index < hrr_queue->min_cmd_id)) {
  4656. ipr_isr_eh(ioa_cfg,
  4657. "Invalid response handle from IOA: ",
  4658. cmd_index);
  4659. break;
  4660. }
  4661. ipr_cmd = ioa_cfg->ipr_cmnd_list[cmd_index];
  4662. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4663. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH, ioasc);
  4664. list_move_tail(&ipr_cmd->queue, doneq);
  4665. if (hrr_queue->hrrq_curr < hrr_queue->hrrq_end) {
  4666. hrr_queue->hrrq_curr++;
  4667. } else {
  4668. hrr_queue->hrrq_curr = hrr_queue->hrrq_start;
  4669. hrr_queue->toggle_bit ^= 1u;
  4670. }
  4671. num_hrrq++;
  4672. if (budget > 0 && num_hrrq >= budget)
  4673. break;
  4674. }
  4675. return num_hrrq;
  4676. }
  4677. static int ipr_iopoll(struct blk_iopoll *iop, int budget)
  4678. {
  4679. struct ipr_ioa_cfg *ioa_cfg;
  4680. struct ipr_hrr_queue *hrrq;
  4681. struct ipr_cmnd *ipr_cmd, *temp;
  4682. unsigned long hrrq_flags;
  4683. int completed_ops;
  4684. LIST_HEAD(doneq);
  4685. hrrq = container_of(iop, struct ipr_hrr_queue, iopoll);
  4686. ioa_cfg = hrrq->ioa_cfg;
  4687. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  4688. completed_ops = ipr_process_hrrq(hrrq, budget, &doneq);
  4689. if (completed_ops < budget)
  4690. blk_iopoll_complete(iop);
  4691. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4692. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  4693. list_del(&ipr_cmd->queue);
  4694. del_timer(&ipr_cmd->timer);
  4695. ipr_cmd->fast_done(ipr_cmd);
  4696. }
  4697. return completed_ops;
  4698. }
  4699. /**
  4700. * ipr_isr - Interrupt service routine
  4701. * @irq: irq number
  4702. * @devp: pointer to ioa config struct
  4703. *
  4704. * Return value:
  4705. * IRQ_NONE / IRQ_HANDLED
  4706. **/
  4707. static irqreturn_t ipr_isr(int irq, void *devp)
  4708. {
  4709. struct ipr_hrr_queue *hrrq = (struct ipr_hrr_queue *)devp;
  4710. struct ipr_ioa_cfg *ioa_cfg = hrrq->ioa_cfg;
  4711. unsigned long hrrq_flags = 0;
  4712. u32 int_reg = 0;
  4713. int num_hrrq = 0;
  4714. int irq_none = 0;
  4715. struct ipr_cmnd *ipr_cmd, *temp;
  4716. irqreturn_t rc = IRQ_NONE;
  4717. LIST_HEAD(doneq);
  4718. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  4719. /* If interrupts are disabled, ignore the interrupt */
  4720. if (!hrrq->allow_interrupts) {
  4721. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4722. return IRQ_NONE;
  4723. }
  4724. while (1) {
  4725. if (ipr_process_hrrq(hrrq, -1, &doneq)) {
  4726. rc = IRQ_HANDLED;
  4727. if (!ioa_cfg->clear_isr)
  4728. break;
  4729. /* Clear the PCI interrupt */
  4730. num_hrrq = 0;
  4731. do {
  4732. writel(IPR_PCII_HRRQ_UPDATED,
  4733. ioa_cfg->regs.clr_interrupt_reg32);
  4734. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4735. } while (int_reg & IPR_PCII_HRRQ_UPDATED &&
  4736. num_hrrq++ < IPR_MAX_HRRQ_RETRIES);
  4737. } else if (rc == IRQ_NONE && irq_none == 0) {
  4738. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4739. irq_none++;
  4740. } else if (num_hrrq == IPR_MAX_HRRQ_RETRIES &&
  4741. int_reg & IPR_PCII_HRRQ_UPDATED) {
  4742. ipr_isr_eh(ioa_cfg,
  4743. "Error clearing HRRQ: ", num_hrrq);
  4744. rc = IRQ_HANDLED;
  4745. break;
  4746. } else
  4747. break;
  4748. }
  4749. if (unlikely(rc == IRQ_NONE))
  4750. rc = ipr_handle_other_interrupt(ioa_cfg, int_reg);
  4751. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4752. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  4753. list_del(&ipr_cmd->queue);
  4754. del_timer(&ipr_cmd->timer);
  4755. ipr_cmd->fast_done(ipr_cmd);
  4756. }
  4757. return rc;
  4758. }
  4759. /**
  4760. * ipr_isr_mhrrq - Interrupt service routine
  4761. * @irq: irq number
  4762. * @devp: pointer to ioa config struct
  4763. *
  4764. * Return value:
  4765. * IRQ_NONE / IRQ_HANDLED
  4766. **/
  4767. static irqreturn_t ipr_isr_mhrrq(int irq, void *devp)
  4768. {
  4769. struct ipr_hrr_queue *hrrq = (struct ipr_hrr_queue *)devp;
  4770. struct ipr_ioa_cfg *ioa_cfg = hrrq->ioa_cfg;
  4771. unsigned long hrrq_flags = 0;
  4772. struct ipr_cmnd *ipr_cmd, *temp;
  4773. irqreturn_t rc = IRQ_NONE;
  4774. LIST_HEAD(doneq);
  4775. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  4776. /* If interrupts are disabled, ignore the interrupt */
  4777. if (!hrrq->allow_interrupts) {
  4778. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4779. return IRQ_NONE;
  4780. }
  4781. if (blk_iopoll_enabled && ioa_cfg->iopoll_weight &&
  4782. ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  4783. if ((be32_to_cpu(*hrrq->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  4784. hrrq->toggle_bit) {
  4785. if (!blk_iopoll_sched_prep(&hrrq->iopoll))
  4786. blk_iopoll_sched(&hrrq->iopoll);
  4787. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4788. return IRQ_HANDLED;
  4789. }
  4790. } else {
  4791. if ((be32_to_cpu(*hrrq->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  4792. hrrq->toggle_bit)
  4793. if (ipr_process_hrrq(hrrq, -1, &doneq))
  4794. rc = IRQ_HANDLED;
  4795. }
  4796. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4797. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  4798. list_del(&ipr_cmd->queue);
  4799. del_timer(&ipr_cmd->timer);
  4800. ipr_cmd->fast_done(ipr_cmd);
  4801. }
  4802. return rc;
  4803. }
  4804. /**
  4805. * ipr_build_ioadl64 - Build a scatter/gather list and map the buffer
  4806. * @ioa_cfg: ioa config struct
  4807. * @ipr_cmd: ipr command struct
  4808. *
  4809. * Return value:
  4810. * 0 on success / -1 on failure
  4811. **/
  4812. static int ipr_build_ioadl64(struct ipr_ioa_cfg *ioa_cfg,
  4813. struct ipr_cmnd *ipr_cmd)
  4814. {
  4815. int i, nseg;
  4816. struct scatterlist *sg;
  4817. u32 length;
  4818. u32 ioadl_flags = 0;
  4819. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4820. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  4821. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  4822. length = scsi_bufflen(scsi_cmd);
  4823. if (!length)
  4824. return 0;
  4825. nseg = scsi_dma_map(scsi_cmd);
  4826. if (nseg < 0) {
  4827. if (printk_ratelimit())
  4828. dev_err(&ioa_cfg->pdev->dev, "pci_map_sg failed!\n");
  4829. return -1;
  4830. }
  4831. ipr_cmd->dma_use_sg = nseg;
  4832. ioarcb->data_transfer_length = cpu_to_be32(length);
  4833. ioarcb->ioadl_len =
  4834. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  4835. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  4836. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  4837. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  4838. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE)
  4839. ioadl_flags = IPR_IOADL_FLAGS_READ;
  4840. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  4841. ioadl64[i].flags = cpu_to_be32(ioadl_flags);
  4842. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(sg));
  4843. ioadl64[i].address = cpu_to_be64(sg_dma_address(sg));
  4844. }
  4845. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  4846. return 0;
  4847. }
  4848. /**
  4849. * ipr_build_ioadl - Build a scatter/gather list and map the buffer
  4850. * @ioa_cfg: ioa config struct
  4851. * @ipr_cmd: ipr command struct
  4852. *
  4853. * Return value:
  4854. * 0 on success / -1 on failure
  4855. **/
  4856. static int ipr_build_ioadl(struct ipr_ioa_cfg *ioa_cfg,
  4857. struct ipr_cmnd *ipr_cmd)
  4858. {
  4859. int i, nseg;
  4860. struct scatterlist *sg;
  4861. u32 length;
  4862. u32 ioadl_flags = 0;
  4863. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4864. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  4865. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  4866. length = scsi_bufflen(scsi_cmd);
  4867. if (!length)
  4868. return 0;
  4869. nseg = scsi_dma_map(scsi_cmd);
  4870. if (nseg < 0) {
  4871. dev_err(&ioa_cfg->pdev->dev, "pci_map_sg failed!\n");
  4872. return -1;
  4873. }
  4874. ipr_cmd->dma_use_sg = nseg;
  4875. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  4876. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  4877. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  4878. ioarcb->data_transfer_length = cpu_to_be32(length);
  4879. ioarcb->ioadl_len =
  4880. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  4881. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE) {
  4882. ioadl_flags = IPR_IOADL_FLAGS_READ;
  4883. ioarcb->read_data_transfer_length = cpu_to_be32(length);
  4884. ioarcb->read_ioadl_len =
  4885. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  4886. }
  4887. if (ipr_cmd->dma_use_sg <= ARRAY_SIZE(ioarcb->u.add_data.u.ioadl)) {
  4888. ioadl = ioarcb->u.add_data.u.ioadl;
  4889. ioarcb->write_ioadl_addr = cpu_to_be32((ipr_cmd->dma_addr) +
  4890. offsetof(struct ipr_ioarcb, u.add_data));
  4891. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  4892. }
  4893. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  4894. ioadl[i].flags_and_data_len =
  4895. cpu_to_be32(ioadl_flags | sg_dma_len(sg));
  4896. ioadl[i].address = cpu_to_be32(sg_dma_address(sg));
  4897. }
  4898. ioadl[i-1].flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  4899. return 0;
  4900. }
  4901. /**
  4902. * ipr_get_task_attributes - Translate SPI Q-Tag to task attributes
  4903. * @scsi_cmd: scsi command struct
  4904. *
  4905. * Return value:
  4906. * task attributes
  4907. **/
  4908. static u8 ipr_get_task_attributes(struct scsi_cmnd *scsi_cmd)
  4909. {
  4910. u8 tag[2];
  4911. u8 rc = IPR_FLAGS_LO_UNTAGGED_TASK;
  4912. if (scsi_populate_tag_msg(scsi_cmd, tag)) {
  4913. switch (tag[0]) {
  4914. case MSG_SIMPLE_TAG:
  4915. rc = IPR_FLAGS_LO_SIMPLE_TASK;
  4916. break;
  4917. case MSG_HEAD_TAG:
  4918. rc = IPR_FLAGS_LO_HEAD_OF_Q_TASK;
  4919. break;
  4920. case MSG_ORDERED_TAG:
  4921. rc = IPR_FLAGS_LO_ORDERED_TASK;
  4922. break;
  4923. };
  4924. }
  4925. return rc;
  4926. }
  4927. /**
  4928. * ipr_erp_done - Process completion of ERP for a device
  4929. * @ipr_cmd: ipr command struct
  4930. *
  4931. * This function copies the sense buffer into the scsi_cmd
  4932. * struct and pushes the scsi_done function.
  4933. *
  4934. * Return value:
  4935. * nothing
  4936. **/
  4937. static void ipr_erp_done(struct ipr_cmnd *ipr_cmd)
  4938. {
  4939. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4940. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  4941. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4942. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  4943. scsi_cmd->result |= (DID_ERROR << 16);
  4944. scmd_printk(KERN_ERR, scsi_cmd,
  4945. "Request Sense failed with IOASC: 0x%08X\n", ioasc);
  4946. } else {
  4947. memcpy(scsi_cmd->sense_buffer, ipr_cmd->sense_buffer,
  4948. SCSI_SENSE_BUFFERSIZE);
  4949. }
  4950. if (res) {
  4951. if (!ipr_is_naca_model(res))
  4952. res->needs_sync_complete = 1;
  4953. res->in_erp = 0;
  4954. }
  4955. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  4956. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4957. scsi_cmd->scsi_done(scsi_cmd);
  4958. }
  4959. /**
  4960. * ipr_reinit_ipr_cmnd_for_erp - Re-initialize a cmnd block to be used for ERP
  4961. * @ipr_cmd: ipr command struct
  4962. *
  4963. * Return value:
  4964. * none
  4965. **/
  4966. static void ipr_reinit_ipr_cmnd_for_erp(struct ipr_cmnd *ipr_cmd)
  4967. {
  4968. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  4969. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  4970. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  4971. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  4972. ioarcb->data_transfer_length = 0;
  4973. ioarcb->read_data_transfer_length = 0;
  4974. ioarcb->ioadl_len = 0;
  4975. ioarcb->read_ioadl_len = 0;
  4976. ioasa->hdr.ioasc = 0;
  4977. ioasa->hdr.residual_data_len = 0;
  4978. if (ipr_cmd->ioa_cfg->sis64)
  4979. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  4980. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  4981. else {
  4982. ioarcb->write_ioadl_addr =
  4983. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  4984. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  4985. }
  4986. }
  4987. /**
  4988. * ipr_erp_request_sense - Send request sense to a device
  4989. * @ipr_cmd: ipr command struct
  4990. *
  4991. * This function sends a request sense to a device as a result
  4992. * of a check condition.
  4993. *
  4994. * Return value:
  4995. * nothing
  4996. **/
  4997. static void ipr_erp_request_sense(struct ipr_cmnd *ipr_cmd)
  4998. {
  4999. struct ipr_cmd_pkt *cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  5000. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5001. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  5002. ipr_erp_done(ipr_cmd);
  5003. return;
  5004. }
  5005. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  5006. cmd_pkt->request_type = IPR_RQTYPE_SCSICDB;
  5007. cmd_pkt->cdb[0] = REQUEST_SENSE;
  5008. cmd_pkt->cdb[4] = SCSI_SENSE_BUFFERSIZE;
  5009. cmd_pkt->flags_hi |= IPR_FLAGS_HI_SYNC_OVERRIDE;
  5010. cmd_pkt->flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5011. cmd_pkt->timeout = cpu_to_be16(IPR_REQUEST_SENSE_TIMEOUT / HZ);
  5012. ipr_init_ioadl(ipr_cmd, ipr_cmd->sense_buffer_dma,
  5013. SCSI_SENSE_BUFFERSIZE, IPR_IOADL_FLAGS_READ_LAST);
  5014. ipr_do_req(ipr_cmd, ipr_erp_done, ipr_timeout,
  5015. IPR_REQUEST_SENSE_TIMEOUT * 2);
  5016. }
  5017. /**
  5018. * ipr_erp_cancel_all - Send cancel all to a device
  5019. * @ipr_cmd: ipr command struct
  5020. *
  5021. * This function sends a cancel all to a device to clear the
  5022. * queue. If we are running TCQ on the device, QERR is set to 1,
  5023. * which means all outstanding ops have been dropped on the floor.
  5024. * Cancel all will return them to us.
  5025. *
  5026. * Return value:
  5027. * nothing
  5028. **/
  5029. static void ipr_erp_cancel_all(struct ipr_cmnd *ipr_cmd)
  5030. {
  5031. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5032. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5033. struct ipr_cmd_pkt *cmd_pkt;
  5034. res->in_erp = 1;
  5035. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  5036. if (!scsi_get_tag_type(scsi_cmd->device)) {
  5037. ipr_erp_request_sense(ipr_cmd);
  5038. return;
  5039. }
  5040. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  5041. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  5042. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  5043. ipr_do_req(ipr_cmd, ipr_erp_request_sense, ipr_timeout,
  5044. IPR_CANCEL_ALL_TIMEOUT);
  5045. }
  5046. /**
  5047. * ipr_dump_ioasa - Dump contents of IOASA
  5048. * @ioa_cfg: ioa config struct
  5049. * @ipr_cmd: ipr command struct
  5050. * @res: resource entry struct
  5051. *
  5052. * This function is invoked by the interrupt handler when ops
  5053. * fail. It will log the IOASA if appropriate. Only called
  5054. * for GPDD ops.
  5055. *
  5056. * Return value:
  5057. * none
  5058. **/
  5059. static void ipr_dump_ioasa(struct ipr_ioa_cfg *ioa_cfg,
  5060. struct ipr_cmnd *ipr_cmd, struct ipr_resource_entry *res)
  5061. {
  5062. int i;
  5063. u16 data_len;
  5064. u32 ioasc, fd_ioasc;
  5065. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5066. __be32 *ioasa_data = (__be32 *)ioasa;
  5067. int error_index;
  5068. ioasc = be32_to_cpu(ioasa->hdr.ioasc) & IPR_IOASC_IOASC_MASK;
  5069. fd_ioasc = be32_to_cpu(ioasa->hdr.fd_ioasc) & IPR_IOASC_IOASC_MASK;
  5070. if (0 == ioasc)
  5071. return;
  5072. if (ioa_cfg->log_level < IPR_DEFAULT_LOG_LEVEL)
  5073. return;
  5074. if (ioasc == IPR_IOASC_BUS_WAS_RESET && fd_ioasc)
  5075. error_index = ipr_get_error(fd_ioasc);
  5076. else
  5077. error_index = ipr_get_error(ioasc);
  5078. if (ioa_cfg->log_level < IPR_MAX_LOG_LEVEL) {
  5079. /* Don't log an error if the IOA already logged one */
  5080. if (ioasa->hdr.ilid != 0)
  5081. return;
  5082. if (!ipr_is_gscsi(res))
  5083. return;
  5084. if (ipr_error_table[error_index].log_ioasa == 0)
  5085. return;
  5086. }
  5087. ipr_res_err(ioa_cfg, res, "%s\n", ipr_error_table[error_index].error);
  5088. data_len = be16_to_cpu(ioasa->hdr.ret_stat_len);
  5089. if (ioa_cfg->sis64 && sizeof(struct ipr_ioasa64) < data_len)
  5090. data_len = sizeof(struct ipr_ioasa64);
  5091. else if (!ioa_cfg->sis64 && sizeof(struct ipr_ioasa) < data_len)
  5092. data_len = sizeof(struct ipr_ioasa);
  5093. ipr_err("IOASA Dump:\n");
  5094. for (i = 0; i < data_len / 4; i += 4) {
  5095. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  5096. be32_to_cpu(ioasa_data[i]),
  5097. be32_to_cpu(ioasa_data[i+1]),
  5098. be32_to_cpu(ioasa_data[i+2]),
  5099. be32_to_cpu(ioasa_data[i+3]));
  5100. }
  5101. }
  5102. /**
  5103. * ipr_gen_sense - Generate SCSI sense data from an IOASA
  5104. * @ioasa: IOASA
  5105. * @sense_buf: sense data buffer
  5106. *
  5107. * Return value:
  5108. * none
  5109. **/
  5110. static void ipr_gen_sense(struct ipr_cmnd *ipr_cmd)
  5111. {
  5112. u32 failing_lba;
  5113. u8 *sense_buf = ipr_cmd->scsi_cmd->sense_buffer;
  5114. struct ipr_resource_entry *res = ipr_cmd->scsi_cmd->device->hostdata;
  5115. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5116. u32 ioasc = be32_to_cpu(ioasa->hdr.ioasc);
  5117. memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
  5118. if (ioasc >= IPR_FIRST_DRIVER_IOASC)
  5119. return;
  5120. ipr_cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
  5121. if (ipr_is_vset_device(res) &&
  5122. ioasc == IPR_IOASC_MED_DO_NOT_REALLOC &&
  5123. ioasa->u.vset.failing_lba_hi != 0) {
  5124. sense_buf[0] = 0x72;
  5125. sense_buf[1] = IPR_IOASC_SENSE_KEY(ioasc);
  5126. sense_buf[2] = IPR_IOASC_SENSE_CODE(ioasc);
  5127. sense_buf[3] = IPR_IOASC_SENSE_QUAL(ioasc);
  5128. sense_buf[7] = 12;
  5129. sense_buf[8] = 0;
  5130. sense_buf[9] = 0x0A;
  5131. sense_buf[10] = 0x80;
  5132. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_hi);
  5133. sense_buf[12] = (failing_lba & 0xff000000) >> 24;
  5134. sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
  5135. sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
  5136. sense_buf[15] = failing_lba & 0x000000ff;
  5137. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  5138. sense_buf[16] = (failing_lba & 0xff000000) >> 24;
  5139. sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
  5140. sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
  5141. sense_buf[19] = failing_lba & 0x000000ff;
  5142. } else {
  5143. sense_buf[0] = 0x70;
  5144. sense_buf[2] = IPR_IOASC_SENSE_KEY(ioasc);
  5145. sense_buf[12] = IPR_IOASC_SENSE_CODE(ioasc);
  5146. sense_buf[13] = IPR_IOASC_SENSE_QUAL(ioasc);
  5147. /* Illegal request */
  5148. if ((IPR_IOASC_SENSE_KEY(ioasc) == 0x05) &&
  5149. (be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_FIELD_POINTER_VALID)) {
  5150. sense_buf[7] = 10; /* additional length */
  5151. /* IOARCB was in error */
  5152. if (IPR_IOASC_SENSE_CODE(ioasc) == 0x24)
  5153. sense_buf[15] = 0xC0;
  5154. else /* Parameter data was invalid */
  5155. sense_buf[15] = 0x80;
  5156. sense_buf[16] =
  5157. ((IPR_FIELD_POINTER_MASK &
  5158. be32_to_cpu(ioasa->hdr.ioasc_specific)) >> 8) & 0xff;
  5159. sense_buf[17] =
  5160. (IPR_FIELD_POINTER_MASK &
  5161. be32_to_cpu(ioasa->hdr.ioasc_specific)) & 0xff;
  5162. } else {
  5163. if (ioasc == IPR_IOASC_MED_DO_NOT_REALLOC) {
  5164. if (ipr_is_vset_device(res))
  5165. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  5166. else
  5167. failing_lba = be32_to_cpu(ioasa->u.dasd.failing_lba);
  5168. sense_buf[0] |= 0x80; /* Or in the Valid bit */
  5169. sense_buf[3] = (failing_lba & 0xff000000) >> 24;
  5170. sense_buf[4] = (failing_lba & 0x00ff0000) >> 16;
  5171. sense_buf[5] = (failing_lba & 0x0000ff00) >> 8;
  5172. sense_buf[6] = failing_lba & 0x000000ff;
  5173. }
  5174. sense_buf[7] = 6; /* additional length */
  5175. }
  5176. }
  5177. }
  5178. /**
  5179. * ipr_get_autosense - Copy autosense data to sense buffer
  5180. * @ipr_cmd: ipr command struct
  5181. *
  5182. * This function copies the autosense buffer to the buffer
  5183. * in the scsi_cmd, if there is autosense available.
  5184. *
  5185. * Return value:
  5186. * 1 if autosense was available / 0 if not
  5187. **/
  5188. static int ipr_get_autosense(struct ipr_cmnd *ipr_cmd)
  5189. {
  5190. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5191. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  5192. if ((be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_AUTOSENSE_VALID) == 0)
  5193. return 0;
  5194. if (ipr_cmd->ioa_cfg->sis64)
  5195. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa64->auto_sense.data,
  5196. min_t(u16, be16_to_cpu(ioasa64->auto_sense.auto_sense_len),
  5197. SCSI_SENSE_BUFFERSIZE));
  5198. else
  5199. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa->auto_sense.data,
  5200. min_t(u16, be16_to_cpu(ioasa->auto_sense.auto_sense_len),
  5201. SCSI_SENSE_BUFFERSIZE));
  5202. return 1;
  5203. }
  5204. /**
  5205. * ipr_erp_start - Process an error response for a SCSI op
  5206. * @ioa_cfg: ioa config struct
  5207. * @ipr_cmd: ipr command struct
  5208. *
  5209. * This function determines whether or not to initiate ERP
  5210. * on the affected device.
  5211. *
  5212. * Return value:
  5213. * nothing
  5214. **/
  5215. static void ipr_erp_start(struct ipr_ioa_cfg *ioa_cfg,
  5216. struct ipr_cmnd *ipr_cmd)
  5217. {
  5218. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5219. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5220. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5221. u32 masked_ioasc = ioasc & IPR_IOASC_IOASC_MASK;
  5222. if (!res) {
  5223. ipr_scsi_eh_done(ipr_cmd);
  5224. return;
  5225. }
  5226. if (!ipr_is_gscsi(res) && masked_ioasc != IPR_IOASC_HW_DEV_BUS_STATUS)
  5227. ipr_gen_sense(ipr_cmd);
  5228. ipr_dump_ioasa(ioa_cfg, ipr_cmd, res);
  5229. switch (masked_ioasc) {
  5230. case IPR_IOASC_ABORTED_CMD_TERM_BY_HOST:
  5231. if (ipr_is_naca_model(res))
  5232. scsi_cmd->result |= (DID_ABORT << 16);
  5233. else
  5234. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5235. break;
  5236. case IPR_IOASC_IR_RESOURCE_HANDLE:
  5237. case IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA:
  5238. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  5239. break;
  5240. case IPR_IOASC_HW_SEL_TIMEOUT:
  5241. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  5242. if (!ipr_is_naca_model(res))
  5243. res->needs_sync_complete = 1;
  5244. break;
  5245. case IPR_IOASC_SYNC_REQUIRED:
  5246. if (!res->in_erp)
  5247. res->needs_sync_complete = 1;
  5248. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5249. break;
  5250. case IPR_IOASC_MED_DO_NOT_REALLOC: /* prevent retries */
  5251. case IPR_IOASA_IR_DUAL_IOA_DISABLED:
  5252. scsi_cmd->result |= (DID_PASSTHROUGH << 16);
  5253. break;
  5254. case IPR_IOASC_BUS_WAS_RESET:
  5255. case IPR_IOASC_BUS_WAS_RESET_BY_OTHER:
  5256. /*
  5257. * Report the bus reset and ask for a retry. The device
  5258. * will give CC/UA the next command.
  5259. */
  5260. if (!res->resetting_device)
  5261. scsi_report_bus_reset(ioa_cfg->host, scsi_cmd->device->channel);
  5262. scsi_cmd->result |= (DID_ERROR << 16);
  5263. if (!ipr_is_naca_model(res))
  5264. res->needs_sync_complete = 1;
  5265. break;
  5266. case IPR_IOASC_HW_DEV_BUS_STATUS:
  5267. scsi_cmd->result |= IPR_IOASC_SENSE_STATUS(ioasc);
  5268. if (IPR_IOASC_SENSE_STATUS(ioasc) == SAM_STAT_CHECK_CONDITION) {
  5269. if (!ipr_get_autosense(ipr_cmd)) {
  5270. if (!ipr_is_naca_model(res)) {
  5271. ipr_erp_cancel_all(ipr_cmd);
  5272. return;
  5273. }
  5274. }
  5275. }
  5276. if (!ipr_is_naca_model(res))
  5277. res->needs_sync_complete = 1;
  5278. break;
  5279. case IPR_IOASC_NR_INIT_CMD_REQUIRED:
  5280. break;
  5281. default:
  5282. if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  5283. scsi_cmd->result |= (DID_ERROR << 16);
  5284. if (!ipr_is_vset_device(res) && !ipr_is_naca_model(res))
  5285. res->needs_sync_complete = 1;
  5286. break;
  5287. }
  5288. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  5289. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5290. scsi_cmd->scsi_done(scsi_cmd);
  5291. }
  5292. /**
  5293. * ipr_scsi_done - mid-layer done function
  5294. * @ipr_cmd: ipr command struct
  5295. *
  5296. * This function is invoked by the interrupt handler for
  5297. * ops generated by the SCSI mid-layer
  5298. *
  5299. * Return value:
  5300. * none
  5301. **/
  5302. static void ipr_scsi_done(struct ipr_cmnd *ipr_cmd)
  5303. {
  5304. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5305. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5306. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5307. unsigned long hrrq_flags;
  5308. scsi_set_resid(scsi_cmd, be32_to_cpu(ipr_cmd->s.ioasa.hdr.residual_data_len));
  5309. if (likely(IPR_IOASC_SENSE_KEY(ioasc) == 0)) {
  5310. scsi_dma_unmap(scsi_cmd);
  5311. spin_lock_irqsave(ipr_cmd->hrrq->lock, hrrq_flags);
  5312. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5313. scsi_cmd->scsi_done(scsi_cmd);
  5314. spin_unlock_irqrestore(ipr_cmd->hrrq->lock, hrrq_flags);
  5315. } else {
  5316. spin_lock_irqsave(ipr_cmd->hrrq->lock, hrrq_flags);
  5317. ipr_erp_start(ioa_cfg, ipr_cmd);
  5318. spin_unlock_irqrestore(ipr_cmd->hrrq->lock, hrrq_flags);
  5319. }
  5320. }
  5321. /**
  5322. * ipr_queuecommand - Queue a mid-layer request
  5323. * @shost: scsi host struct
  5324. * @scsi_cmd: scsi command struct
  5325. *
  5326. * This function queues a request generated by the mid-layer.
  5327. *
  5328. * Return value:
  5329. * 0 on success
  5330. * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
  5331. * SCSI_MLQUEUE_HOST_BUSY if host is busy
  5332. **/
  5333. static int ipr_queuecommand(struct Scsi_Host *shost,
  5334. struct scsi_cmnd *scsi_cmd)
  5335. {
  5336. struct ipr_ioa_cfg *ioa_cfg;
  5337. struct ipr_resource_entry *res;
  5338. struct ipr_ioarcb *ioarcb;
  5339. struct ipr_cmnd *ipr_cmd;
  5340. unsigned long hrrq_flags, lock_flags;
  5341. int rc;
  5342. struct ipr_hrr_queue *hrrq;
  5343. int hrrq_id;
  5344. ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  5345. scsi_cmd->result = (DID_OK << 16);
  5346. res = scsi_cmd->device->hostdata;
  5347. if (ipr_is_gata(res) && res->sata_port) {
  5348. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  5349. rc = ata_sas_queuecmd(scsi_cmd, res->sata_port->ap);
  5350. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  5351. return rc;
  5352. }
  5353. hrrq_id = ipr_get_hrrq_index(ioa_cfg);
  5354. hrrq = &ioa_cfg->hrrq[hrrq_id];
  5355. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5356. /*
  5357. * We are currently blocking all devices due to a host reset
  5358. * We have told the host to stop giving us new requests, but
  5359. * ERP ops don't count. FIXME
  5360. */
  5361. if (unlikely(!hrrq->allow_cmds && !hrrq->ioa_is_dead && !hrrq->removing_ioa)) {
  5362. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5363. return SCSI_MLQUEUE_HOST_BUSY;
  5364. }
  5365. /*
  5366. * FIXME - Create scsi_set_host_offline interface
  5367. * and the ioa_is_dead check can be removed
  5368. */
  5369. if (unlikely(hrrq->ioa_is_dead || hrrq->removing_ioa || !res)) {
  5370. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5371. goto err_nodev;
  5372. }
  5373. ipr_cmd = __ipr_get_free_ipr_cmnd(hrrq);
  5374. if (ipr_cmd == NULL) {
  5375. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5376. return SCSI_MLQUEUE_HOST_BUSY;
  5377. }
  5378. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5379. ipr_init_ipr_cmnd(ipr_cmd, ipr_scsi_done);
  5380. ioarcb = &ipr_cmd->ioarcb;
  5381. memcpy(ioarcb->cmd_pkt.cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
  5382. ipr_cmd->scsi_cmd = scsi_cmd;
  5383. ipr_cmd->done = ipr_scsi_eh_done;
  5384. if (ipr_is_gscsi(res) || ipr_is_vset_device(res)) {
  5385. if (scsi_cmd->underflow == 0)
  5386. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5387. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_LINK_DESC;
  5388. if (ipr_is_gscsi(res))
  5389. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_DELAY_AFTER_RST;
  5390. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_ALIGNED_BFR;
  5391. ioarcb->cmd_pkt.flags_lo |= ipr_get_task_attributes(scsi_cmd);
  5392. }
  5393. if (scsi_cmd->cmnd[0] >= 0xC0 &&
  5394. (!ipr_is_gscsi(res) || scsi_cmd->cmnd[0] == IPR_QUERY_RSRC_STATE)) {
  5395. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  5396. }
  5397. if (ioa_cfg->sis64)
  5398. rc = ipr_build_ioadl64(ioa_cfg, ipr_cmd);
  5399. else
  5400. rc = ipr_build_ioadl(ioa_cfg, ipr_cmd);
  5401. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5402. if (unlikely(rc || (!hrrq->allow_cmds && !hrrq->ioa_is_dead))) {
  5403. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  5404. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5405. if (!rc)
  5406. scsi_dma_unmap(scsi_cmd);
  5407. return SCSI_MLQUEUE_HOST_BUSY;
  5408. }
  5409. if (unlikely(hrrq->ioa_is_dead)) {
  5410. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  5411. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5412. scsi_dma_unmap(scsi_cmd);
  5413. goto err_nodev;
  5414. }
  5415. ioarcb->res_handle = res->res_handle;
  5416. if (res->needs_sync_complete) {
  5417. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_SYNC_COMPLETE;
  5418. res->needs_sync_complete = 0;
  5419. }
  5420. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_pending_q);
  5421. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_GET_RES_PHYS_LOC(res));
  5422. ipr_send_command(ipr_cmd);
  5423. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5424. return 0;
  5425. err_nodev:
  5426. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5427. memset(scsi_cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  5428. scsi_cmd->result = (DID_NO_CONNECT << 16);
  5429. scsi_cmd->scsi_done(scsi_cmd);
  5430. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5431. return 0;
  5432. }
  5433. /**
  5434. * ipr_ioctl - IOCTL handler
  5435. * @sdev: scsi device struct
  5436. * @cmd: IOCTL cmd
  5437. * @arg: IOCTL arg
  5438. *
  5439. * Return value:
  5440. * 0 on success / other on failure
  5441. **/
  5442. static int ipr_ioctl(struct scsi_device *sdev, int cmd, void __user *arg)
  5443. {
  5444. struct ipr_resource_entry *res;
  5445. res = (struct ipr_resource_entry *)sdev->hostdata;
  5446. if (res && ipr_is_gata(res)) {
  5447. if (cmd == HDIO_GET_IDENTITY)
  5448. return -ENOTTY;
  5449. return ata_sas_scsi_ioctl(res->sata_port->ap, sdev, cmd, arg);
  5450. }
  5451. return -EINVAL;
  5452. }
  5453. /**
  5454. * ipr_info - Get information about the card/driver
  5455. * @scsi_host: scsi host struct
  5456. *
  5457. * Return value:
  5458. * pointer to buffer with description string
  5459. **/
  5460. static const char *ipr_ioa_info(struct Scsi_Host *host)
  5461. {
  5462. static char buffer[512];
  5463. struct ipr_ioa_cfg *ioa_cfg;
  5464. unsigned long lock_flags = 0;
  5465. ioa_cfg = (struct ipr_ioa_cfg *) host->hostdata;
  5466. spin_lock_irqsave(host->host_lock, lock_flags);
  5467. sprintf(buffer, "IBM %X Storage Adapter", ioa_cfg->type);
  5468. spin_unlock_irqrestore(host->host_lock, lock_flags);
  5469. return buffer;
  5470. }
  5471. static struct scsi_host_template driver_template = {
  5472. .module = THIS_MODULE,
  5473. .name = "IPR",
  5474. .info = ipr_ioa_info,
  5475. .ioctl = ipr_ioctl,
  5476. .queuecommand = ipr_queuecommand,
  5477. .eh_abort_handler = ipr_eh_abort,
  5478. .eh_device_reset_handler = ipr_eh_dev_reset,
  5479. .eh_host_reset_handler = ipr_eh_host_reset,
  5480. .slave_alloc = ipr_slave_alloc,
  5481. .slave_configure = ipr_slave_configure,
  5482. .slave_destroy = ipr_slave_destroy,
  5483. .target_alloc = ipr_target_alloc,
  5484. .target_destroy = ipr_target_destroy,
  5485. .change_queue_depth = ipr_change_queue_depth,
  5486. .change_queue_type = ipr_change_queue_type,
  5487. .bios_param = ipr_biosparam,
  5488. .can_queue = IPR_MAX_COMMANDS,
  5489. .this_id = -1,
  5490. .sg_tablesize = IPR_MAX_SGLIST,
  5491. .max_sectors = IPR_IOA_MAX_SECTORS,
  5492. .cmd_per_lun = IPR_MAX_CMD_PER_LUN,
  5493. .use_clustering = ENABLE_CLUSTERING,
  5494. .shost_attrs = ipr_ioa_attrs,
  5495. .sdev_attrs = ipr_dev_attrs,
  5496. .proc_name = IPR_NAME
  5497. };
  5498. /**
  5499. * ipr_ata_phy_reset - libata phy_reset handler
  5500. * @ap: ata port to reset
  5501. *
  5502. **/
  5503. static void ipr_ata_phy_reset(struct ata_port *ap)
  5504. {
  5505. unsigned long flags;
  5506. struct ipr_sata_port *sata_port = ap->private_data;
  5507. struct ipr_resource_entry *res = sata_port->res;
  5508. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5509. int rc;
  5510. ENTER;
  5511. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5512. while (ioa_cfg->in_reset_reload) {
  5513. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5514. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  5515. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5516. }
  5517. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds)
  5518. goto out_unlock;
  5519. rc = ipr_device_reset(ioa_cfg, res);
  5520. if (rc) {
  5521. ap->link.device[0].class = ATA_DEV_NONE;
  5522. goto out_unlock;
  5523. }
  5524. ap->link.device[0].class = res->ata_class;
  5525. if (ap->link.device[0].class == ATA_DEV_UNKNOWN)
  5526. ap->link.device[0].class = ATA_DEV_NONE;
  5527. out_unlock:
  5528. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5529. LEAVE;
  5530. }
  5531. /**
  5532. * ipr_ata_post_internal - Cleanup after an internal command
  5533. * @qc: ATA queued command
  5534. *
  5535. * Return value:
  5536. * none
  5537. **/
  5538. static void ipr_ata_post_internal(struct ata_queued_cmd *qc)
  5539. {
  5540. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5541. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5542. struct ipr_cmnd *ipr_cmd;
  5543. struct ipr_hrr_queue *hrrq;
  5544. unsigned long flags;
  5545. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5546. while (ioa_cfg->in_reset_reload) {
  5547. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5548. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  5549. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5550. }
  5551. for_each_hrrq(hrrq, ioa_cfg) {
  5552. spin_lock(&hrrq->_lock);
  5553. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  5554. if (ipr_cmd->qc == qc) {
  5555. ipr_device_reset(ioa_cfg, sata_port->res);
  5556. break;
  5557. }
  5558. }
  5559. spin_unlock(&hrrq->_lock);
  5560. }
  5561. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5562. }
  5563. /**
  5564. * ipr_copy_sata_tf - Copy a SATA taskfile to an IOA data structure
  5565. * @regs: destination
  5566. * @tf: source ATA taskfile
  5567. *
  5568. * Return value:
  5569. * none
  5570. **/
  5571. static void ipr_copy_sata_tf(struct ipr_ioarcb_ata_regs *regs,
  5572. struct ata_taskfile *tf)
  5573. {
  5574. regs->feature = tf->feature;
  5575. regs->nsect = tf->nsect;
  5576. regs->lbal = tf->lbal;
  5577. regs->lbam = tf->lbam;
  5578. regs->lbah = tf->lbah;
  5579. regs->device = tf->device;
  5580. regs->command = tf->command;
  5581. regs->hob_feature = tf->hob_feature;
  5582. regs->hob_nsect = tf->hob_nsect;
  5583. regs->hob_lbal = tf->hob_lbal;
  5584. regs->hob_lbam = tf->hob_lbam;
  5585. regs->hob_lbah = tf->hob_lbah;
  5586. regs->ctl = tf->ctl;
  5587. }
  5588. /**
  5589. * ipr_sata_done - done function for SATA commands
  5590. * @ipr_cmd: ipr command struct
  5591. *
  5592. * This function is invoked by the interrupt handler for
  5593. * ops generated by the SCSI mid-layer to SATA devices
  5594. *
  5595. * Return value:
  5596. * none
  5597. **/
  5598. static void ipr_sata_done(struct ipr_cmnd *ipr_cmd)
  5599. {
  5600. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5601. struct ata_queued_cmd *qc = ipr_cmd->qc;
  5602. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5603. struct ipr_resource_entry *res = sata_port->res;
  5604. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5605. spin_lock(&ipr_cmd->hrrq->_lock);
  5606. if (ipr_cmd->ioa_cfg->sis64)
  5607. memcpy(&sata_port->ioasa, &ipr_cmd->s.ioasa64.u.gata,
  5608. sizeof(struct ipr_ioasa_gata));
  5609. else
  5610. memcpy(&sata_port->ioasa, &ipr_cmd->s.ioasa.u.gata,
  5611. sizeof(struct ipr_ioasa_gata));
  5612. ipr_dump_ioasa(ioa_cfg, ipr_cmd, res);
  5613. if (be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc_specific) & IPR_ATA_DEVICE_WAS_RESET)
  5614. scsi_report_device_reset(ioa_cfg->host, res->bus, res->target);
  5615. if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  5616. qc->err_mask |= __ac_err_mask(sata_port->ioasa.status);
  5617. else
  5618. qc->err_mask |= ac_err_mask(sata_port->ioasa.status);
  5619. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5620. spin_unlock(&ipr_cmd->hrrq->_lock);
  5621. ata_qc_complete(qc);
  5622. }
  5623. /**
  5624. * ipr_build_ata_ioadl64 - Build an ATA scatter/gather list
  5625. * @ipr_cmd: ipr command struct
  5626. * @qc: ATA queued command
  5627. *
  5628. **/
  5629. static void ipr_build_ata_ioadl64(struct ipr_cmnd *ipr_cmd,
  5630. struct ata_queued_cmd *qc)
  5631. {
  5632. u32 ioadl_flags = 0;
  5633. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5634. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  5635. struct ipr_ioadl64_desc *last_ioadl64 = NULL;
  5636. int len = qc->nbytes;
  5637. struct scatterlist *sg;
  5638. unsigned int si;
  5639. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  5640. if (len == 0)
  5641. return;
  5642. if (qc->dma_dir == DMA_TO_DEVICE) {
  5643. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5644. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5645. } else if (qc->dma_dir == DMA_FROM_DEVICE)
  5646. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5647. ioarcb->data_transfer_length = cpu_to_be32(len);
  5648. ioarcb->ioadl_len =
  5649. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  5650. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  5651. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ata_ioadl));
  5652. for_each_sg(qc->sg, sg, qc->n_elem, si) {
  5653. ioadl64->flags = cpu_to_be32(ioadl_flags);
  5654. ioadl64->data_len = cpu_to_be32(sg_dma_len(sg));
  5655. ioadl64->address = cpu_to_be64(sg_dma_address(sg));
  5656. last_ioadl64 = ioadl64;
  5657. ioadl64++;
  5658. }
  5659. if (likely(last_ioadl64))
  5660. last_ioadl64->flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5661. }
  5662. /**
  5663. * ipr_build_ata_ioadl - Build an ATA scatter/gather list
  5664. * @ipr_cmd: ipr command struct
  5665. * @qc: ATA queued command
  5666. *
  5667. **/
  5668. static void ipr_build_ata_ioadl(struct ipr_cmnd *ipr_cmd,
  5669. struct ata_queued_cmd *qc)
  5670. {
  5671. u32 ioadl_flags = 0;
  5672. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5673. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  5674. struct ipr_ioadl_desc *last_ioadl = NULL;
  5675. int len = qc->nbytes;
  5676. struct scatterlist *sg;
  5677. unsigned int si;
  5678. if (len == 0)
  5679. return;
  5680. if (qc->dma_dir == DMA_TO_DEVICE) {
  5681. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5682. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5683. ioarcb->data_transfer_length = cpu_to_be32(len);
  5684. ioarcb->ioadl_len =
  5685. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5686. } else if (qc->dma_dir == DMA_FROM_DEVICE) {
  5687. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5688. ioarcb->read_data_transfer_length = cpu_to_be32(len);
  5689. ioarcb->read_ioadl_len =
  5690. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5691. }
  5692. for_each_sg(qc->sg, sg, qc->n_elem, si) {
  5693. ioadl->flags_and_data_len = cpu_to_be32(ioadl_flags | sg_dma_len(sg));
  5694. ioadl->address = cpu_to_be32(sg_dma_address(sg));
  5695. last_ioadl = ioadl;
  5696. ioadl++;
  5697. }
  5698. if (likely(last_ioadl))
  5699. last_ioadl->flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5700. }
  5701. /**
  5702. * ipr_qc_defer - Get a free ipr_cmd
  5703. * @qc: queued command
  5704. *
  5705. * Return value:
  5706. * 0 if success
  5707. **/
  5708. static int ipr_qc_defer(struct ata_queued_cmd *qc)
  5709. {
  5710. struct ata_port *ap = qc->ap;
  5711. struct ipr_sata_port *sata_port = ap->private_data;
  5712. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5713. struct ipr_cmnd *ipr_cmd;
  5714. struct ipr_hrr_queue *hrrq;
  5715. int hrrq_id;
  5716. hrrq_id = ipr_get_hrrq_index(ioa_cfg);
  5717. hrrq = &ioa_cfg->hrrq[hrrq_id];
  5718. qc->lldd_task = NULL;
  5719. spin_lock(&hrrq->_lock);
  5720. if (unlikely(hrrq->ioa_is_dead)) {
  5721. spin_unlock(&hrrq->_lock);
  5722. return 0;
  5723. }
  5724. if (unlikely(!hrrq->allow_cmds)) {
  5725. spin_unlock(&hrrq->_lock);
  5726. return ATA_DEFER_LINK;
  5727. }
  5728. ipr_cmd = __ipr_get_free_ipr_cmnd(hrrq);
  5729. if (ipr_cmd == NULL) {
  5730. spin_unlock(&hrrq->_lock);
  5731. return ATA_DEFER_LINK;
  5732. }
  5733. qc->lldd_task = ipr_cmd;
  5734. spin_unlock(&hrrq->_lock);
  5735. return 0;
  5736. }
  5737. /**
  5738. * ipr_qc_issue - Issue a SATA qc to a device
  5739. * @qc: queued command
  5740. *
  5741. * Return value:
  5742. * 0 if success
  5743. **/
  5744. static unsigned int ipr_qc_issue(struct ata_queued_cmd *qc)
  5745. {
  5746. struct ata_port *ap = qc->ap;
  5747. struct ipr_sata_port *sata_port = ap->private_data;
  5748. struct ipr_resource_entry *res = sata_port->res;
  5749. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5750. struct ipr_cmnd *ipr_cmd;
  5751. struct ipr_ioarcb *ioarcb;
  5752. struct ipr_ioarcb_ata_regs *regs;
  5753. if (qc->lldd_task == NULL)
  5754. ipr_qc_defer(qc);
  5755. ipr_cmd = qc->lldd_task;
  5756. if (ipr_cmd == NULL)
  5757. return AC_ERR_SYSTEM;
  5758. qc->lldd_task = NULL;
  5759. spin_lock(&ipr_cmd->hrrq->_lock);
  5760. if (unlikely(!ipr_cmd->hrrq->allow_cmds ||
  5761. ipr_cmd->hrrq->ioa_is_dead)) {
  5762. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5763. spin_unlock(&ipr_cmd->hrrq->_lock);
  5764. return AC_ERR_SYSTEM;
  5765. }
  5766. ipr_init_ipr_cmnd(ipr_cmd, ipr_lock_and_done);
  5767. ioarcb = &ipr_cmd->ioarcb;
  5768. if (ioa_cfg->sis64) {
  5769. regs = &ipr_cmd->i.ata_ioadl.regs;
  5770. ioarcb->add_cmd_parms_offset = cpu_to_be16(sizeof(*ioarcb));
  5771. } else
  5772. regs = &ioarcb->u.add_data.u.regs;
  5773. memset(regs, 0, sizeof(*regs));
  5774. ioarcb->add_cmd_parms_len = cpu_to_be16(sizeof(*regs));
  5775. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  5776. ipr_cmd->qc = qc;
  5777. ipr_cmd->done = ipr_sata_done;
  5778. ipr_cmd->ioarcb.res_handle = res->res_handle;
  5779. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_ATA_PASSTHRU;
  5780. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_LINK_DESC;
  5781. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5782. ipr_cmd->dma_use_sg = qc->n_elem;
  5783. if (ioa_cfg->sis64)
  5784. ipr_build_ata_ioadl64(ipr_cmd, qc);
  5785. else
  5786. ipr_build_ata_ioadl(ipr_cmd, qc);
  5787. regs->flags |= IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION;
  5788. ipr_copy_sata_tf(regs, &qc->tf);
  5789. memcpy(ioarcb->cmd_pkt.cdb, qc->cdb, IPR_MAX_CDB_LEN);
  5790. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_GET_RES_PHYS_LOC(res));
  5791. switch (qc->tf.protocol) {
  5792. case ATA_PROT_NODATA:
  5793. case ATA_PROT_PIO:
  5794. break;
  5795. case ATA_PROT_DMA:
  5796. regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA;
  5797. break;
  5798. case ATAPI_PROT_PIO:
  5799. case ATAPI_PROT_NODATA:
  5800. regs->flags |= IPR_ATA_FLAG_PACKET_CMD;
  5801. break;
  5802. case ATAPI_PROT_DMA:
  5803. regs->flags |= IPR_ATA_FLAG_PACKET_CMD;
  5804. regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA;
  5805. break;
  5806. default:
  5807. WARN_ON(1);
  5808. spin_unlock(&ipr_cmd->hrrq->_lock);
  5809. return AC_ERR_INVALID;
  5810. }
  5811. ipr_send_command(ipr_cmd);
  5812. spin_unlock(&ipr_cmd->hrrq->_lock);
  5813. return 0;
  5814. }
  5815. /**
  5816. * ipr_qc_fill_rtf - Read result TF
  5817. * @qc: ATA queued command
  5818. *
  5819. * Return value:
  5820. * true
  5821. **/
  5822. static bool ipr_qc_fill_rtf(struct ata_queued_cmd *qc)
  5823. {
  5824. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5825. struct ipr_ioasa_gata *g = &sata_port->ioasa;
  5826. struct ata_taskfile *tf = &qc->result_tf;
  5827. tf->feature = g->error;
  5828. tf->nsect = g->nsect;
  5829. tf->lbal = g->lbal;
  5830. tf->lbam = g->lbam;
  5831. tf->lbah = g->lbah;
  5832. tf->device = g->device;
  5833. tf->command = g->status;
  5834. tf->hob_nsect = g->hob_nsect;
  5835. tf->hob_lbal = g->hob_lbal;
  5836. tf->hob_lbam = g->hob_lbam;
  5837. tf->hob_lbah = g->hob_lbah;
  5838. tf->ctl = g->alt_status;
  5839. return true;
  5840. }
  5841. static struct ata_port_operations ipr_sata_ops = {
  5842. .phy_reset = ipr_ata_phy_reset,
  5843. .hardreset = ipr_sata_reset,
  5844. .post_internal_cmd = ipr_ata_post_internal,
  5845. .qc_prep = ata_noop_qc_prep,
  5846. .qc_defer = ipr_qc_defer,
  5847. .qc_issue = ipr_qc_issue,
  5848. .qc_fill_rtf = ipr_qc_fill_rtf,
  5849. .port_start = ata_sas_port_start,
  5850. .port_stop = ata_sas_port_stop
  5851. };
  5852. static struct ata_port_info sata_port_info = {
  5853. .flags = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA,
  5854. .pio_mask = ATA_PIO4_ONLY,
  5855. .mwdma_mask = ATA_MWDMA2,
  5856. .udma_mask = ATA_UDMA6,
  5857. .port_ops = &ipr_sata_ops
  5858. };
  5859. #ifdef CONFIG_PPC_PSERIES
  5860. static const u16 ipr_blocked_processors[] = {
  5861. PVR_NORTHSTAR,
  5862. PVR_PULSAR,
  5863. PVR_POWER4,
  5864. PVR_ICESTAR,
  5865. PVR_SSTAR,
  5866. PVR_POWER4p,
  5867. PVR_630,
  5868. PVR_630p
  5869. };
  5870. /**
  5871. * ipr_invalid_adapter - Determine if this adapter is supported on this hardware
  5872. * @ioa_cfg: ioa cfg struct
  5873. *
  5874. * Adapters that use Gemstone revision < 3.1 do not work reliably on
  5875. * certain pSeries hardware. This function determines if the given
  5876. * adapter is in one of these confgurations or not.
  5877. *
  5878. * Return value:
  5879. * 1 if adapter is not supported / 0 if adapter is supported
  5880. **/
  5881. static int ipr_invalid_adapter(struct ipr_ioa_cfg *ioa_cfg)
  5882. {
  5883. int i;
  5884. if ((ioa_cfg->type == 0x5702) && (ioa_cfg->pdev->revision < 4)) {
  5885. for (i = 0; i < ARRAY_SIZE(ipr_blocked_processors); i++) {
  5886. if (pvr_version_is(ipr_blocked_processors[i]))
  5887. return 1;
  5888. }
  5889. }
  5890. return 0;
  5891. }
  5892. #else
  5893. #define ipr_invalid_adapter(ioa_cfg) 0
  5894. #endif
  5895. /**
  5896. * ipr_ioa_bringdown_done - IOA bring down completion.
  5897. * @ipr_cmd: ipr command struct
  5898. *
  5899. * This function processes the completion of an adapter bring down.
  5900. * It wakes any reset sleepers.
  5901. *
  5902. * Return value:
  5903. * IPR_RC_JOB_RETURN
  5904. **/
  5905. static int ipr_ioa_bringdown_done(struct ipr_cmnd *ipr_cmd)
  5906. {
  5907. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5908. ENTER;
  5909. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa) {
  5910. ipr_trace;
  5911. spin_unlock_irq(ioa_cfg->host->host_lock);
  5912. scsi_unblock_requests(ioa_cfg->host);
  5913. spin_lock_irq(ioa_cfg->host->host_lock);
  5914. }
  5915. ioa_cfg->in_reset_reload = 0;
  5916. ioa_cfg->reset_retries = 0;
  5917. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5918. wake_up_all(&ioa_cfg->reset_wait_q);
  5919. LEAVE;
  5920. return IPR_RC_JOB_RETURN;
  5921. }
  5922. /**
  5923. * ipr_ioa_reset_done - IOA reset completion.
  5924. * @ipr_cmd: ipr command struct
  5925. *
  5926. * This function processes the completion of an adapter reset.
  5927. * It schedules any necessary mid-layer add/removes and
  5928. * wakes any reset sleepers.
  5929. *
  5930. * Return value:
  5931. * IPR_RC_JOB_RETURN
  5932. **/
  5933. static int ipr_ioa_reset_done(struct ipr_cmnd *ipr_cmd)
  5934. {
  5935. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5936. struct ipr_resource_entry *res;
  5937. struct ipr_hostrcb *hostrcb, *temp;
  5938. int i = 0, j;
  5939. ENTER;
  5940. ioa_cfg->in_reset_reload = 0;
  5941. for (j = 0; j < ioa_cfg->hrrq_num; j++) {
  5942. spin_lock(&ioa_cfg->hrrq[j]._lock);
  5943. ioa_cfg->hrrq[j].allow_cmds = 1;
  5944. spin_unlock(&ioa_cfg->hrrq[j]._lock);
  5945. }
  5946. wmb();
  5947. ioa_cfg->reset_cmd = NULL;
  5948. ioa_cfg->doorbell |= IPR_RUNTIME_RESET;
  5949. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  5950. if (ioa_cfg->allow_ml_add_del && (res->add_to_ml || res->del_from_ml)) {
  5951. ipr_trace;
  5952. break;
  5953. }
  5954. }
  5955. schedule_work(&ioa_cfg->work_q);
  5956. list_for_each_entry_safe(hostrcb, temp, &ioa_cfg->hostrcb_free_q, queue) {
  5957. list_del(&hostrcb->queue);
  5958. if (i++ < IPR_NUM_LOG_HCAMS)
  5959. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_LOG_DATA, hostrcb);
  5960. else
  5961. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  5962. }
  5963. scsi_report_bus_reset(ioa_cfg->host, IPR_VSET_BUS);
  5964. dev_info(&ioa_cfg->pdev->dev, "IOA initialized.\n");
  5965. ioa_cfg->reset_retries = 0;
  5966. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5967. wake_up_all(&ioa_cfg->reset_wait_q);
  5968. spin_unlock(ioa_cfg->host->host_lock);
  5969. scsi_unblock_requests(ioa_cfg->host);
  5970. spin_lock(ioa_cfg->host->host_lock);
  5971. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds)
  5972. scsi_block_requests(ioa_cfg->host);
  5973. LEAVE;
  5974. return IPR_RC_JOB_RETURN;
  5975. }
  5976. /**
  5977. * ipr_set_sup_dev_dflt - Initialize a Set Supported Device buffer
  5978. * @supported_dev: supported device struct
  5979. * @vpids: vendor product id struct
  5980. *
  5981. * Return value:
  5982. * none
  5983. **/
  5984. static void ipr_set_sup_dev_dflt(struct ipr_supported_device *supported_dev,
  5985. struct ipr_std_inq_vpids *vpids)
  5986. {
  5987. memset(supported_dev, 0, sizeof(struct ipr_supported_device));
  5988. memcpy(&supported_dev->vpids, vpids, sizeof(struct ipr_std_inq_vpids));
  5989. supported_dev->num_records = 1;
  5990. supported_dev->data_length =
  5991. cpu_to_be16(sizeof(struct ipr_supported_device));
  5992. supported_dev->reserved = 0;
  5993. }
  5994. /**
  5995. * ipr_set_supported_devs - Send Set Supported Devices for a device
  5996. * @ipr_cmd: ipr command struct
  5997. *
  5998. * This function sends a Set Supported Devices to the adapter
  5999. *
  6000. * Return value:
  6001. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6002. **/
  6003. static int ipr_set_supported_devs(struct ipr_cmnd *ipr_cmd)
  6004. {
  6005. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6006. struct ipr_supported_device *supp_dev = &ioa_cfg->vpd_cbs->supp_dev;
  6007. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6008. struct ipr_resource_entry *res = ipr_cmd->u.res;
  6009. ipr_cmd->job_step = ipr_ioa_reset_done;
  6010. list_for_each_entry_continue(res, &ioa_cfg->used_res_q, queue) {
  6011. if (!ipr_is_scsi_disk(res))
  6012. continue;
  6013. ipr_cmd->u.res = res;
  6014. ipr_set_sup_dev_dflt(supp_dev, &res->std_inq_data.vpids);
  6015. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6016. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  6017. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6018. ioarcb->cmd_pkt.cdb[0] = IPR_SET_SUPPORTED_DEVICES;
  6019. ioarcb->cmd_pkt.cdb[1] = IPR_SET_ALL_SUPPORTED_DEVICES;
  6020. ioarcb->cmd_pkt.cdb[7] = (sizeof(struct ipr_supported_device) >> 8) & 0xff;
  6021. ioarcb->cmd_pkt.cdb[8] = sizeof(struct ipr_supported_device) & 0xff;
  6022. ipr_init_ioadl(ipr_cmd,
  6023. ioa_cfg->vpd_cbs_dma +
  6024. offsetof(struct ipr_misc_cbs, supp_dev),
  6025. sizeof(struct ipr_supported_device),
  6026. IPR_IOADL_FLAGS_WRITE_LAST);
  6027. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  6028. IPR_SET_SUP_DEVICE_TIMEOUT);
  6029. if (!ioa_cfg->sis64)
  6030. ipr_cmd->job_step = ipr_set_supported_devs;
  6031. LEAVE;
  6032. return IPR_RC_JOB_RETURN;
  6033. }
  6034. LEAVE;
  6035. return IPR_RC_JOB_CONTINUE;
  6036. }
  6037. /**
  6038. * ipr_get_mode_page - Locate specified mode page
  6039. * @mode_pages: mode page buffer
  6040. * @page_code: page code to find
  6041. * @len: minimum required length for mode page
  6042. *
  6043. * Return value:
  6044. * pointer to mode page / NULL on failure
  6045. **/
  6046. static void *ipr_get_mode_page(struct ipr_mode_pages *mode_pages,
  6047. u32 page_code, u32 len)
  6048. {
  6049. struct ipr_mode_page_hdr *mode_hdr;
  6050. u32 page_length;
  6051. u32 length;
  6052. if (!mode_pages || (mode_pages->hdr.length == 0))
  6053. return NULL;
  6054. length = (mode_pages->hdr.length + 1) - 4 - mode_pages->hdr.block_desc_len;
  6055. mode_hdr = (struct ipr_mode_page_hdr *)
  6056. (mode_pages->data + mode_pages->hdr.block_desc_len);
  6057. while (length) {
  6058. if (IPR_GET_MODE_PAGE_CODE(mode_hdr) == page_code) {
  6059. if (mode_hdr->page_length >= (len - sizeof(struct ipr_mode_page_hdr)))
  6060. return mode_hdr;
  6061. break;
  6062. } else {
  6063. page_length = (sizeof(struct ipr_mode_page_hdr) +
  6064. mode_hdr->page_length);
  6065. length -= page_length;
  6066. mode_hdr = (struct ipr_mode_page_hdr *)
  6067. ((unsigned long)mode_hdr + page_length);
  6068. }
  6069. }
  6070. return NULL;
  6071. }
  6072. /**
  6073. * ipr_check_term_power - Check for term power errors
  6074. * @ioa_cfg: ioa config struct
  6075. * @mode_pages: IOAFP mode pages buffer
  6076. *
  6077. * Check the IOAFP's mode page 28 for term power errors
  6078. *
  6079. * Return value:
  6080. * nothing
  6081. **/
  6082. static void ipr_check_term_power(struct ipr_ioa_cfg *ioa_cfg,
  6083. struct ipr_mode_pages *mode_pages)
  6084. {
  6085. int i;
  6086. int entry_length;
  6087. struct ipr_dev_bus_entry *bus;
  6088. struct ipr_mode_page28 *mode_page;
  6089. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  6090. sizeof(struct ipr_mode_page28));
  6091. entry_length = mode_page->entry_length;
  6092. bus = mode_page->bus;
  6093. for (i = 0; i < mode_page->num_entries; i++) {
  6094. if (bus->flags & IPR_SCSI_ATTR_NO_TERM_PWR) {
  6095. dev_err(&ioa_cfg->pdev->dev,
  6096. "Term power is absent on scsi bus %d\n",
  6097. bus->res_addr.bus);
  6098. }
  6099. bus = (struct ipr_dev_bus_entry *)((char *)bus + entry_length);
  6100. }
  6101. }
  6102. /**
  6103. * ipr_scsi_bus_speed_limit - Limit the SCSI speed based on SES table
  6104. * @ioa_cfg: ioa config struct
  6105. *
  6106. * Looks through the config table checking for SES devices. If
  6107. * the SES device is in the SES table indicating a maximum SCSI
  6108. * bus speed, the speed is limited for the bus.
  6109. *
  6110. * Return value:
  6111. * none
  6112. **/
  6113. static void ipr_scsi_bus_speed_limit(struct ipr_ioa_cfg *ioa_cfg)
  6114. {
  6115. u32 max_xfer_rate;
  6116. int i;
  6117. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  6118. max_xfer_rate = ipr_get_max_scsi_speed(ioa_cfg, i,
  6119. ioa_cfg->bus_attr[i].bus_width);
  6120. if (max_xfer_rate < ioa_cfg->bus_attr[i].max_xfer_rate)
  6121. ioa_cfg->bus_attr[i].max_xfer_rate = max_xfer_rate;
  6122. }
  6123. }
  6124. /**
  6125. * ipr_modify_ioafp_mode_page_28 - Modify IOAFP Mode Page 28
  6126. * @ioa_cfg: ioa config struct
  6127. * @mode_pages: mode page 28 buffer
  6128. *
  6129. * Updates mode page 28 based on driver configuration
  6130. *
  6131. * Return value:
  6132. * none
  6133. **/
  6134. static void ipr_modify_ioafp_mode_page_28(struct ipr_ioa_cfg *ioa_cfg,
  6135. struct ipr_mode_pages *mode_pages)
  6136. {
  6137. int i, entry_length;
  6138. struct ipr_dev_bus_entry *bus;
  6139. struct ipr_bus_attributes *bus_attr;
  6140. struct ipr_mode_page28 *mode_page;
  6141. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  6142. sizeof(struct ipr_mode_page28));
  6143. entry_length = mode_page->entry_length;
  6144. /* Loop for each device bus entry */
  6145. for (i = 0, bus = mode_page->bus;
  6146. i < mode_page->num_entries;
  6147. i++, bus = (struct ipr_dev_bus_entry *)((u8 *)bus + entry_length)) {
  6148. if (bus->res_addr.bus > IPR_MAX_NUM_BUSES) {
  6149. dev_err(&ioa_cfg->pdev->dev,
  6150. "Invalid resource address reported: 0x%08X\n",
  6151. IPR_GET_PHYS_LOC(bus->res_addr));
  6152. continue;
  6153. }
  6154. bus_attr = &ioa_cfg->bus_attr[i];
  6155. bus->extended_reset_delay = IPR_EXTENDED_RESET_DELAY;
  6156. bus->bus_width = bus_attr->bus_width;
  6157. bus->max_xfer_rate = cpu_to_be32(bus_attr->max_xfer_rate);
  6158. bus->flags &= ~IPR_SCSI_ATTR_QAS_MASK;
  6159. if (bus_attr->qas_enabled)
  6160. bus->flags |= IPR_SCSI_ATTR_ENABLE_QAS;
  6161. else
  6162. bus->flags |= IPR_SCSI_ATTR_DISABLE_QAS;
  6163. }
  6164. }
  6165. /**
  6166. * ipr_build_mode_select - Build a mode select command
  6167. * @ipr_cmd: ipr command struct
  6168. * @res_handle: resource handle to send command to
  6169. * @parm: Byte 2 of Mode Sense command
  6170. * @dma_addr: DMA buffer address
  6171. * @xfer_len: data transfer length
  6172. *
  6173. * Return value:
  6174. * none
  6175. **/
  6176. static void ipr_build_mode_select(struct ipr_cmnd *ipr_cmd,
  6177. __be32 res_handle, u8 parm,
  6178. dma_addr_t dma_addr, u8 xfer_len)
  6179. {
  6180. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6181. ioarcb->res_handle = res_handle;
  6182. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6183. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  6184. ioarcb->cmd_pkt.cdb[0] = MODE_SELECT;
  6185. ioarcb->cmd_pkt.cdb[1] = parm;
  6186. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6187. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_WRITE_LAST);
  6188. }
  6189. /**
  6190. * ipr_ioafp_mode_select_page28 - Issue Mode Select Page 28 to IOA
  6191. * @ipr_cmd: ipr command struct
  6192. *
  6193. * This function sets up the SCSI bus attributes and sends
  6194. * a Mode Select for Page 28 to activate them.
  6195. *
  6196. * Return value:
  6197. * IPR_RC_JOB_RETURN
  6198. **/
  6199. static int ipr_ioafp_mode_select_page28(struct ipr_cmnd *ipr_cmd)
  6200. {
  6201. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6202. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  6203. int length;
  6204. ENTER;
  6205. ipr_scsi_bus_speed_limit(ioa_cfg);
  6206. ipr_check_term_power(ioa_cfg, mode_pages);
  6207. ipr_modify_ioafp_mode_page_28(ioa_cfg, mode_pages);
  6208. length = mode_pages->hdr.length + 1;
  6209. mode_pages->hdr.length = 0;
  6210. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  6211. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  6212. length);
  6213. ipr_cmd->job_step = ipr_set_supported_devs;
  6214. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  6215. struct ipr_resource_entry, queue);
  6216. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6217. LEAVE;
  6218. return IPR_RC_JOB_RETURN;
  6219. }
  6220. /**
  6221. * ipr_build_mode_sense - Builds a mode sense command
  6222. * @ipr_cmd: ipr command struct
  6223. * @res: resource entry struct
  6224. * @parm: Byte 2 of mode sense command
  6225. * @dma_addr: DMA address of mode sense buffer
  6226. * @xfer_len: Size of DMA buffer
  6227. *
  6228. * Return value:
  6229. * none
  6230. **/
  6231. static void ipr_build_mode_sense(struct ipr_cmnd *ipr_cmd,
  6232. __be32 res_handle,
  6233. u8 parm, dma_addr_t dma_addr, u8 xfer_len)
  6234. {
  6235. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6236. ioarcb->res_handle = res_handle;
  6237. ioarcb->cmd_pkt.cdb[0] = MODE_SENSE;
  6238. ioarcb->cmd_pkt.cdb[2] = parm;
  6239. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6240. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6241. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  6242. }
  6243. /**
  6244. * ipr_reset_cmd_failed - Handle failure of IOA reset command
  6245. * @ipr_cmd: ipr command struct
  6246. *
  6247. * This function handles the failure of an IOA bringup command.
  6248. *
  6249. * Return value:
  6250. * IPR_RC_JOB_RETURN
  6251. **/
  6252. static int ipr_reset_cmd_failed(struct ipr_cmnd *ipr_cmd)
  6253. {
  6254. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6255. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6256. dev_err(&ioa_cfg->pdev->dev,
  6257. "0x%02X failed with IOASC: 0x%08X\n",
  6258. ipr_cmd->ioarcb.cmd_pkt.cdb[0], ioasc);
  6259. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  6260. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6261. return IPR_RC_JOB_RETURN;
  6262. }
  6263. /**
  6264. * ipr_reset_mode_sense_failed - Handle failure of IOAFP mode sense
  6265. * @ipr_cmd: ipr command struct
  6266. *
  6267. * This function handles the failure of a Mode Sense to the IOAFP.
  6268. * Some adapters do not handle all mode pages.
  6269. *
  6270. * Return value:
  6271. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6272. **/
  6273. static int ipr_reset_mode_sense_failed(struct ipr_cmnd *ipr_cmd)
  6274. {
  6275. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6276. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6277. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  6278. ipr_cmd->job_step = ipr_set_supported_devs;
  6279. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  6280. struct ipr_resource_entry, queue);
  6281. return IPR_RC_JOB_CONTINUE;
  6282. }
  6283. return ipr_reset_cmd_failed(ipr_cmd);
  6284. }
  6285. /**
  6286. * ipr_ioafp_mode_sense_page28 - Issue Mode Sense Page 28 to IOA
  6287. * @ipr_cmd: ipr command struct
  6288. *
  6289. * This function send a Page 28 mode sense to the IOA to
  6290. * retrieve SCSI bus attributes.
  6291. *
  6292. * Return value:
  6293. * IPR_RC_JOB_RETURN
  6294. **/
  6295. static int ipr_ioafp_mode_sense_page28(struct ipr_cmnd *ipr_cmd)
  6296. {
  6297. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6298. ENTER;
  6299. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  6300. 0x28, ioa_cfg->vpd_cbs_dma +
  6301. offsetof(struct ipr_misc_cbs, mode_pages),
  6302. sizeof(struct ipr_mode_pages));
  6303. ipr_cmd->job_step = ipr_ioafp_mode_select_page28;
  6304. ipr_cmd->job_step_failed = ipr_reset_mode_sense_failed;
  6305. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6306. LEAVE;
  6307. return IPR_RC_JOB_RETURN;
  6308. }
  6309. /**
  6310. * ipr_ioafp_mode_select_page24 - Issue Mode Select to IOA
  6311. * @ipr_cmd: ipr command struct
  6312. *
  6313. * This function enables dual IOA RAID support if possible.
  6314. *
  6315. * Return value:
  6316. * IPR_RC_JOB_RETURN
  6317. **/
  6318. static int ipr_ioafp_mode_select_page24(struct ipr_cmnd *ipr_cmd)
  6319. {
  6320. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6321. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  6322. struct ipr_mode_page24 *mode_page;
  6323. int length;
  6324. ENTER;
  6325. mode_page = ipr_get_mode_page(mode_pages, 0x24,
  6326. sizeof(struct ipr_mode_page24));
  6327. if (mode_page)
  6328. mode_page->flags |= IPR_ENABLE_DUAL_IOA_AF;
  6329. length = mode_pages->hdr.length + 1;
  6330. mode_pages->hdr.length = 0;
  6331. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  6332. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  6333. length);
  6334. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6335. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6336. LEAVE;
  6337. return IPR_RC_JOB_RETURN;
  6338. }
  6339. /**
  6340. * ipr_reset_mode_sense_page24_failed - Handle failure of IOAFP mode sense
  6341. * @ipr_cmd: ipr command struct
  6342. *
  6343. * This function handles the failure of a Mode Sense to the IOAFP.
  6344. * Some adapters do not handle all mode pages.
  6345. *
  6346. * Return value:
  6347. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6348. **/
  6349. static int ipr_reset_mode_sense_page24_failed(struct ipr_cmnd *ipr_cmd)
  6350. {
  6351. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6352. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  6353. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6354. return IPR_RC_JOB_CONTINUE;
  6355. }
  6356. return ipr_reset_cmd_failed(ipr_cmd);
  6357. }
  6358. /**
  6359. * ipr_ioafp_mode_sense_page24 - Issue Page 24 Mode Sense to IOA
  6360. * @ipr_cmd: ipr command struct
  6361. *
  6362. * This function send a mode sense to the IOA to retrieve
  6363. * the IOA Advanced Function Control mode page.
  6364. *
  6365. * Return value:
  6366. * IPR_RC_JOB_RETURN
  6367. **/
  6368. static int ipr_ioafp_mode_sense_page24(struct ipr_cmnd *ipr_cmd)
  6369. {
  6370. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6371. ENTER;
  6372. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  6373. 0x24, ioa_cfg->vpd_cbs_dma +
  6374. offsetof(struct ipr_misc_cbs, mode_pages),
  6375. sizeof(struct ipr_mode_pages));
  6376. ipr_cmd->job_step = ipr_ioafp_mode_select_page24;
  6377. ipr_cmd->job_step_failed = ipr_reset_mode_sense_page24_failed;
  6378. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6379. LEAVE;
  6380. return IPR_RC_JOB_RETURN;
  6381. }
  6382. /**
  6383. * ipr_init_res_table - Initialize the resource table
  6384. * @ipr_cmd: ipr command struct
  6385. *
  6386. * This function looks through the existing resource table, comparing
  6387. * it with the config table. This function will take care of old/new
  6388. * devices and schedule adding/removing them from the mid-layer
  6389. * as appropriate.
  6390. *
  6391. * Return value:
  6392. * IPR_RC_JOB_CONTINUE
  6393. **/
  6394. static int ipr_init_res_table(struct ipr_cmnd *ipr_cmd)
  6395. {
  6396. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6397. struct ipr_resource_entry *res, *temp;
  6398. struct ipr_config_table_entry_wrapper cfgtew;
  6399. int entries, found, flag, i;
  6400. LIST_HEAD(old_res);
  6401. ENTER;
  6402. if (ioa_cfg->sis64)
  6403. flag = ioa_cfg->u.cfg_table64->hdr64.flags;
  6404. else
  6405. flag = ioa_cfg->u.cfg_table->hdr.flags;
  6406. if (flag & IPR_UCODE_DOWNLOAD_REQ)
  6407. dev_err(&ioa_cfg->pdev->dev, "Microcode download required\n");
  6408. list_for_each_entry_safe(res, temp, &ioa_cfg->used_res_q, queue)
  6409. list_move_tail(&res->queue, &old_res);
  6410. if (ioa_cfg->sis64)
  6411. entries = be16_to_cpu(ioa_cfg->u.cfg_table64->hdr64.num_entries);
  6412. else
  6413. entries = ioa_cfg->u.cfg_table->hdr.num_entries;
  6414. for (i = 0; i < entries; i++) {
  6415. if (ioa_cfg->sis64)
  6416. cfgtew.u.cfgte64 = &ioa_cfg->u.cfg_table64->dev[i];
  6417. else
  6418. cfgtew.u.cfgte = &ioa_cfg->u.cfg_table->dev[i];
  6419. found = 0;
  6420. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6421. if (ipr_is_same_device(res, &cfgtew)) {
  6422. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6423. found = 1;
  6424. break;
  6425. }
  6426. }
  6427. if (!found) {
  6428. if (list_empty(&ioa_cfg->free_res_q)) {
  6429. dev_err(&ioa_cfg->pdev->dev, "Too many devices attached\n");
  6430. break;
  6431. }
  6432. found = 1;
  6433. res = list_entry(ioa_cfg->free_res_q.next,
  6434. struct ipr_resource_entry, queue);
  6435. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6436. ipr_init_res_entry(res, &cfgtew);
  6437. res->add_to_ml = 1;
  6438. } else if (res->sdev && (ipr_is_vset_device(res) || ipr_is_scsi_disk(res)))
  6439. res->sdev->allow_restart = 1;
  6440. if (found)
  6441. ipr_update_res_entry(res, &cfgtew);
  6442. }
  6443. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6444. if (res->sdev) {
  6445. res->del_from_ml = 1;
  6446. res->res_handle = IPR_INVALID_RES_HANDLE;
  6447. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6448. }
  6449. }
  6450. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6451. ipr_clear_res_target(res);
  6452. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  6453. }
  6454. if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  6455. ipr_cmd->job_step = ipr_ioafp_mode_sense_page24;
  6456. else
  6457. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6458. LEAVE;
  6459. return IPR_RC_JOB_CONTINUE;
  6460. }
  6461. /**
  6462. * ipr_ioafp_query_ioa_cfg - Send a Query IOA Config to the adapter.
  6463. * @ipr_cmd: ipr command struct
  6464. *
  6465. * This function sends a Query IOA Configuration command
  6466. * to the adapter to retrieve the IOA configuration table.
  6467. *
  6468. * Return value:
  6469. * IPR_RC_JOB_RETURN
  6470. **/
  6471. static int ipr_ioafp_query_ioa_cfg(struct ipr_cmnd *ipr_cmd)
  6472. {
  6473. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6474. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6475. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  6476. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  6477. ENTER;
  6478. if (cap->cap & IPR_CAP_DUAL_IOA_RAID)
  6479. ioa_cfg->dual_raid = 1;
  6480. dev_info(&ioa_cfg->pdev->dev, "Adapter firmware version: %02X%02X%02X%02X\n",
  6481. ucode_vpd->major_release, ucode_vpd->card_type,
  6482. ucode_vpd->minor_release[0], ucode_vpd->minor_release[1]);
  6483. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6484. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6485. ioarcb->cmd_pkt.cdb[0] = IPR_QUERY_IOA_CONFIG;
  6486. ioarcb->cmd_pkt.cdb[6] = (ioa_cfg->cfg_table_size >> 16) & 0xff;
  6487. ioarcb->cmd_pkt.cdb[7] = (ioa_cfg->cfg_table_size >> 8) & 0xff;
  6488. ioarcb->cmd_pkt.cdb[8] = ioa_cfg->cfg_table_size & 0xff;
  6489. ipr_init_ioadl(ipr_cmd, ioa_cfg->cfg_table_dma, ioa_cfg->cfg_table_size,
  6490. IPR_IOADL_FLAGS_READ_LAST);
  6491. ipr_cmd->job_step = ipr_init_res_table;
  6492. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6493. LEAVE;
  6494. return IPR_RC_JOB_RETURN;
  6495. }
  6496. /**
  6497. * ipr_ioafp_inquiry - Send an Inquiry to the adapter.
  6498. * @ipr_cmd: ipr command struct
  6499. *
  6500. * This utility function sends an inquiry to the adapter.
  6501. *
  6502. * Return value:
  6503. * none
  6504. **/
  6505. static void ipr_ioafp_inquiry(struct ipr_cmnd *ipr_cmd, u8 flags, u8 page,
  6506. dma_addr_t dma_addr, u8 xfer_len)
  6507. {
  6508. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6509. ENTER;
  6510. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6511. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6512. ioarcb->cmd_pkt.cdb[0] = INQUIRY;
  6513. ioarcb->cmd_pkt.cdb[1] = flags;
  6514. ioarcb->cmd_pkt.cdb[2] = page;
  6515. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6516. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  6517. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6518. LEAVE;
  6519. }
  6520. /**
  6521. * ipr_inquiry_page_supported - Is the given inquiry page supported
  6522. * @page0: inquiry page 0 buffer
  6523. * @page: page code.
  6524. *
  6525. * This function determines if the specified inquiry page is supported.
  6526. *
  6527. * Return value:
  6528. * 1 if page is supported / 0 if not
  6529. **/
  6530. static int ipr_inquiry_page_supported(struct ipr_inquiry_page0 *page0, u8 page)
  6531. {
  6532. int i;
  6533. for (i = 0; i < min_t(u8, page0->len, IPR_INQUIRY_PAGE0_ENTRIES); i++)
  6534. if (page0->page[i] == page)
  6535. return 1;
  6536. return 0;
  6537. }
  6538. /**
  6539. * ipr_ioafp_cap_inquiry - Send a Page 0xD0 Inquiry to the adapter.
  6540. * @ipr_cmd: ipr command struct
  6541. *
  6542. * This function sends a Page 0xD0 inquiry to the adapter
  6543. * to retrieve adapter capabilities.
  6544. *
  6545. * Return value:
  6546. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6547. **/
  6548. static int ipr_ioafp_cap_inquiry(struct ipr_cmnd *ipr_cmd)
  6549. {
  6550. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6551. struct ipr_inquiry_page0 *page0 = &ioa_cfg->vpd_cbs->page0_data;
  6552. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  6553. ENTER;
  6554. ipr_cmd->job_step = ipr_ioafp_query_ioa_cfg;
  6555. memset(cap, 0, sizeof(*cap));
  6556. if (ipr_inquiry_page_supported(page0, 0xD0)) {
  6557. ipr_ioafp_inquiry(ipr_cmd, 1, 0xD0,
  6558. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, cap),
  6559. sizeof(struct ipr_inquiry_cap));
  6560. return IPR_RC_JOB_RETURN;
  6561. }
  6562. LEAVE;
  6563. return IPR_RC_JOB_CONTINUE;
  6564. }
  6565. /**
  6566. * ipr_ioafp_page3_inquiry - Send a Page 3 Inquiry to the adapter.
  6567. * @ipr_cmd: ipr command struct
  6568. *
  6569. * This function sends a Page 3 inquiry to the adapter
  6570. * to retrieve software VPD information.
  6571. *
  6572. * Return value:
  6573. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6574. **/
  6575. static int ipr_ioafp_page3_inquiry(struct ipr_cmnd *ipr_cmd)
  6576. {
  6577. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6578. ENTER;
  6579. ipr_cmd->job_step = ipr_ioafp_cap_inquiry;
  6580. ipr_ioafp_inquiry(ipr_cmd, 1, 3,
  6581. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page3_data),
  6582. sizeof(struct ipr_inquiry_page3));
  6583. LEAVE;
  6584. return IPR_RC_JOB_RETURN;
  6585. }
  6586. /**
  6587. * ipr_ioafp_page0_inquiry - Send a Page 0 Inquiry to the adapter.
  6588. * @ipr_cmd: ipr command struct
  6589. *
  6590. * This function sends a Page 0 inquiry to the adapter
  6591. * to retrieve supported inquiry pages.
  6592. *
  6593. * Return value:
  6594. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6595. **/
  6596. static int ipr_ioafp_page0_inquiry(struct ipr_cmnd *ipr_cmd)
  6597. {
  6598. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6599. char type[5];
  6600. ENTER;
  6601. /* Grab the type out of the VPD and store it away */
  6602. memcpy(type, ioa_cfg->vpd_cbs->ioa_vpd.std_inq_data.vpids.product_id, 4);
  6603. type[4] = '\0';
  6604. ioa_cfg->type = simple_strtoul((char *)type, NULL, 16);
  6605. ipr_cmd->job_step = ipr_ioafp_page3_inquiry;
  6606. ipr_ioafp_inquiry(ipr_cmd, 1, 0,
  6607. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page0_data),
  6608. sizeof(struct ipr_inquiry_page0));
  6609. LEAVE;
  6610. return IPR_RC_JOB_RETURN;
  6611. }
  6612. /**
  6613. * ipr_ioafp_std_inquiry - Send a Standard Inquiry to the adapter.
  6614. * @ipr_cmd: ipr command struct
  6615. *
  6616. * This function sends a standard inquiry to the adapter.
  6617. *
  6618. * Return value:
  6619. * IPR_RC_JOB_RETURN
  6620. **/
  6621. static int ipr_ioafp_std_inquiry(struct ipr_cmnd *ipr_cmd)
  6622. {
  6623. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6624. ENTER;
  6625. ipr_cmd->job_step = ipr_ioafp_page0_inquiry;
  6626. ipr_ioafp_inquiry(ipr_cmd, 0, 0,
  6627. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, ioa_vpd),
  6628. sizeof(struct ipr_ioa_vpd));
  6629. LEAVE;
  6630. return IPR_RC_JOB_RETURN;
  6631. }
  6632. /**
  6633. * ipr_ioafp_identify_hrrq - Send Identify Host RRQ.
  6634. * @ipr_cmd: ipr command struct
  6635. *
  6636. * This function send an Identify Host Request Response Queue
  6637. * command to establish the HRRQ with the adapter.
  6638. *
  6639. * Return value:
  6640. * IPR_RC_JOB_RETURN
  6641. **/
  6642. static int ipr_ioafp_identify_hrrq(struct ipr_cmnd *ipr_cmd)
  6643. {
  6644. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6645. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6646. struct ipr_hrr_queue *hrrq;
  6647. ENTER;
  6648. ipr_cmd->job_step = ipr_ioafp_std_inquiry;
  6649. dev_info(&ioa_cfg->pdev->dev, "Starting IOA initialization sequence.\n");
  6650. if (ioa_cfg->identify_hrrq_index < ioa_cfg->hrrq_num) {
  6651. hrrq = &ioa_cfg->hrrq[ioa_cfg->identify_hrrq_index];
  6652. ioarcb->cmd_pkt.cdb[0] = IPR_ID_HOST_RR_Q;
  6653. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6654. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6655. if (ioa_cfg->sis64)
  6656. ioarcb->cmd_pkt.cdb[1] = 0x1;
  6657. if (ioa_cfg->nvectors == 1)
  6658. ioarcb->cmd_pkt.cdb[1] &= ~IPR_ID_HRRQ_SELE_ENABLE;
  6659. else
  6660. ioarcb->cmd_pkt.cdb[1] |= IPR_ID_HRRQ_SELE_ENABLE;
  6661. ioarcb->cmd_pkt.cdb[2] =
  6662. ((u64) hrrq->host_rrq_dma >> 24) & 0xff;
  6663. ioarcb->cmd_pkt.cdb[3] =
  6664. ((u64) hrrq->host_rrq_dma >> 16) & 0xff;
  6665. ioarcb->cmd_pkt.cdb[4] =
  6666. ((u64) hrrq->host_rrq_dma >> 8) & 0xff;
  6667. ioarcb->cmd_pkt.cdb[5] =
  6668. ((u64) hrrq->host_rrq_dma) & 0xff;
  6669. ioarcb->cmd_pkt.cdb[7] =
  6670. ((sizeof(u32) * hrrq->size) >> 8) & 0xff;
  6671. ioarcb->cmd_pkt.cdb[8] =
  6672. (sizeof(u32) * hrrq->size) & 0xff;
  6673. if (ioarcb->cmd_pkt.cdb[1] & IPR_ID_HRRQ_SELE_ENABLE)
  6674. ioarcb->cmd_pkt.cdb[9] =
  6675. ioa_cfg->identify_hrrq_index;
  6676. if (ioa_cfg->sis64) {
  6677. ioarcb->cmd_pkt.cdb[10] =
  6678. ((u64) hrrq->host_rrq_dma >> 56) & 0xff;
  6679. ioarcb->cmd_pkt.cdb[11] =
  6680. ((u64) hrrq->host_rrq_dma >> 48) & 0xff;
  6681. ioarcb->cmd_pkt.cdb[12] =
  6682. ((u64) hrrq->host_rrq_dma >> 40) & 0xff;
  6683. ioarcb->cmd_pkt.cdb[13] =
  6684. ((u64) hrrq->host_rrq_dma >> 32) & 0xff;
  6685. }
  6686. if (ioarcb->cmd_pkt.cdb[1] & IPR_ID_HRRQ_SELE_ENABLE)
  6687. ioarcb->cmd_pkt.cdb[14] =
  6688. ioa_cfg->identify_hrrq_index;
  6689. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  6690. IPR_INTERNAL_TIMEOUT);
  6691. if (++ioa_cfg->identify_hrrq_index < ioa_cfg->hrrq_num)
  6692. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6693. LEAVE;
  6694. return IPR_RC_JOB_RETURN;
  6695. }
  6696. LEAVE;
  6697. return IPR_RC_JOB_CONTINUE;
  6698. }
  6699. /**
  6700. * ipr_reset_timer_done - Adapter reset timer function
  6701. * @ipr_cmd: ipr command struct
  6702. *
  6703. * Description: This function is used in adapter reset processing
  6704. * for timing events. If the reset_cmd pointer in the IOA
  6705. * config struct is not this adapter's we are doing nested
  6706. * resets and fail_all_ops will take care of freeing the
  6707. * command block.
  6708. *
  6709. * Return value:
  6710. * none
  6711. **/
  6712. static void ipr_reset_timer_done(struct ipr_cmnd *ipr_cmd)
  6713. {
  6714. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6715. unsigned long lock_flags = 0;
  6716. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  6717. if (ioa_cfg->reset_cmd == ipr_cmd) {
  6718. list_del(&ipr_cmd->queue);
  6719. ipr_cmd->done(ipr_cmd);
  6720. }
  6721. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  6722. }
  6723. /**
  6724. * ipr_reset_start_timer - Start a timer for adapter reset job
  6725. * @ipr_cmd: ipr command struct
  6726. * @timeout: timeout value
  6727. *
  6728. * Description: This function is used in adapter reset processing
  6729. * for timing events. If the reset_cmd pointer in the IOA
  6730. * config struct is not this adapter's we are doing nested
  6731. * resets and fail_all_ops will take care of freeing the
  6732. * command block.
  6733. *
  6734. * Return value:
  6735. * none
  6736. **/
  6737. static void ipr_reset_start_timer(struct ipr_cmnd *ipr_cmd,
  6738. unsigned long timeout)
  6739. {
  6740. ENTER;
  6741. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  6742. ipr_cmd->done = ipr_reset_ioa_job;
  6743. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  6744. ipr_cmd->timer.expires = jiffies + timeout;
  6745. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_reset_timer_done;
  6746. add_timer(&ipr_cmd->timer);
  6747. }
  6748. /**
  6749. * ipr_init_ioa_mem - Initialize ioa_cfg control block
  6750. * @ioa_cfg: ioa cfg struct
  6751. *
  6752. * Return value:
  6753. * nothing
  6754. **/
  6755. static void ipr_init_ioa_mem(struct ipr_ioa_cfg *ioa_cfg)
  6756. {
  6757. struct ipr_hrr_queue *hrrq;
  6758. for_each_hrrq(hrrq, ioa_cfg) {
  6759. spin_lock(&hrrq->_lock);
  6760. memset(hrrq->host_rrq, 0, sizeof(u32) * hrrq->size);
  6761. /* Initialize Host RRQ pointers */
  6762. hrrq->hrrq_start = hrrq->host_rrq;
  6763. hrrq->hrrq_end = &hrrq->host_rrq[hrrq->size - 1];
  6764. hrrq->hrrq_curr = hrrq->hrrq_start;
  6765. hrrq->toggle_bit = 1;
  6766. spin_unlock(&hrrq->_lock);
  6767. }
  6768. wmb();
  6769. ioa_cfg->identify_hrrq_index = 0;
  6770. if (ioa_cfg->hrrq_num == 1)
  6771. atomic_set(&ioa_cfg->hrrq_index, 0);
  6772. else
  6773. atomic_set(&ioa_cfg->hrrq_index, 1);
  6774. /* Zero out config table */
  6775. memset(ioa_cfg->u.cfg_table, 0, ioa_cfg->cfg_table_size);
  6776. }
  6777. /**
  6778. * ipr_reset_next_stage - Process IPL stage change based on feedback register.
  6779. * @ipr_cmd: ipr command struct
  6780. *
  6781. * Return value:
  6782. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6783. **/
  6784. static int ipr_reset_next_stage(struct ipr_cmnd *ipr_cmd)
  6785. {
  6786. unsigned long stage, stage_time;
  6787. u32 feedback;
  6788. volatile u32 int_reg;
  6789. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6790. u64 maskval = 0;
  6791. feedback = readl(ioa_cfg->regs.init_feedback_reg);
  6792. stage = feedback & IPR_IPL_INIT_STAGE_MASK;
  6793. stage_time = feedback & IPR_IPL_INIT_STAGE_TIME_MASK;
  6794. ipr_dbg("IPL stage = 0x%lx, IPL stage time = %ld\n", stage, stage_time);
  6795. /* sanity check the stage_time value */
  6796. if (stage_time == 0)
  6797. stage_time = IPR_IPL_INIT_DEFAULT_STAGE_TIME;
  6798. else if (stage_time < IPR_IPL_INIT_MIN_STAGE_TIME)
  6799. stage_time = IPR_IPL_INIT_MIN_STAGE_TIME;
  6800. else if (stage_time > IPR_LONG_OPERATIONAL_TIMEOUT)
  6801. stage_time = IPR_LONG_OPERATIONAL_TIMEOUT;
  6802. if (stage == IPR_IPL_INIT_STAGE_UNKNOWN) {
  6803. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.set_interrupt_mask_reg);
  6804. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6805. stage_time = ioa_cfg->transop_timeout;
  6806. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6807. } else if (stage == IPR_IPL_INIT_STAGE_TRANSOP) {
  6808. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  6809. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  6810. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6811. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  6812. maskval = (maskval << 32) | IPR_PCII_IOA_TRANS_TO_OPER;
  6813. writeq(maskval, ioa_cfg->regs.set_interrupt_mask_reg);
  6814. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6815. return IPR_RC_JOB_CONTINUE;
  6816. }
  6817. }
  6818. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  6819. ipr_cmd->timer.expires = jiffies + stage_time * HZ;
  6820. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_oper_timeout;
  6821. ipr_cmd->done = ipr_reset_ioa_job;
  6822. add_timer(&ipr_cmd->timer);
  6823. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  6824. return IPR_RC_JOB_RETURN;
  6825. }
  6826. /**
  6827. * ipr_reset_enable_ioa - Enable the IOA following a reset.
  6828. * @ipr_cmd: ipr command struct
  6829. *
  6830. * This function reinitializes some control blocks and
  6831. * enables destructive diagnostics on the adapter.
  6832. *
  6833. * Return value:
  6834. * IPR_RC_JOB_RETURN
  6835. **/
  6836. static int ipr_reset_enable_ioa(struct ipr_cmnd *ipr_cmd)
  6837. {
  6838. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6839. volatile u32 int_reg;
  6840. volatile u64 maskval;
  6841. int i;
  6842. ENTER;
  6843. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6844. ipr_init_ioa_mem(ioa_cfg);
  6845. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  6846. spin_lock(&ioa_cfg->hrrq[i]._lock);
  6847. ioa_cfg->hrrq[i].allow_interrupts = 1;
  6848. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  6849. }
  6850. wmb();
  6851. if (ioa_cfg->sis64) {
  6852. /* Set the adapter to the correct endian mode. */
  6853. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  6854. int_reg = readl(ioa_cfg->regs.endian_swap_reg);
  6855. }
  6856. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  6857. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  6858. writel((IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED),
  6859. ioa_cfg->regs.clr_interrupt_mask_reg32);
  6860. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6861. return IPR_RC_JOB_CONTINUE;
  6862. }
  6863. /* Enable destructive diagnostics on IOA */
  6864. writel(ioa_cfg->doorbell, ioa_cfg->regs.set_uproc_interrupt_reg32);
  6865. if (ioa_cfg->sis64) {
  6866. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  6867. maskval = (maskval << 32) | IPR_PCII_OPER_INTERRUPTS;
  6868. writeq(maskval, ioa_cfg->regs.clr_interrupt_mask_reg);
  6869. } else
  6870. writel(IPR_PCII_OPER_INTERRUPTS, ioa_cfg->regs.clr_interrupt_mask_reg32);
  6871. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6872. dev_info(&ioa_cfg->pdev->dev, "Initializing IOA.\n");
  6873. if (ioa_cfg->sis64) {
  6874. ipr_cmd->job_step = ipr_reset_next_stage;
  6875. return IPR_RC_JOB_CONTINUE;
  6876. }
  6877. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  6878. ipr_cmd->timer.expires = jiffies + (ioa_cfg->transop_timeout * HZ);
  6879. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_oper_timeout;
  6880. ipr_cmd->done = ipr_reset_ioa_job;
  6881. add_timer(&ipr_cmd->timer);
  6882. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  6883. LEAVE;
  6884. return IPR_RC_JOB_RETURN;
  6885. }
  6886. /**
  6887. * ipr_reset_wait_for_dump - Wait for a dump to timeout.
  6888. * @ipr_cmd: ipr command struct
  6889. *
  6890. * This function is invoked when an adapter dump has run out
  6891. * of processing time.
  6892. *
  6893. * Return value:
  6894. * IPR_RC_JOB_CONTINUE
  6895. **/
  6896. static int ipr_reset_wait_for_dump(struct ipr_cmnd *ipr_cmd)
  6897. {
  6898. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6899. if (ioa_cfg->sdt_state == GET_DUMP)
  6900. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  6901. else if (ioa_cfg->sdt_state == READ_DUMP)
  6902. ioa_cfg->sdt_state = ABORT_DUMP;
  6903. ioa_cfg->dump_timeout = 1;
  6904. ipr_cmd->job_step = ipr_reset_alert;
  6905. return IPR_RC_JOB_CONTINUE;
  6906. }
  6907. /**
  6908. * ipr_unit_check_no_data - Log a unit check/no data error log
  6909. * @ioa_cfg: ioa config struct
  6910. *
  6911. * Logs an error indicating the adapter unit checked, but for some
  6912. * reason, we were unable to fetch the unit check buffer.
  6913. *
  6914. * Return value:
  6915. * nothing
  6916. **/
  6917. static void ipr_unit_check_no_data(struct ipr_ioa_cfg *ioa_cfg)
  6918. {
  6919. ioa_cfg->errors_logged++;
  6920. dev_err(&ioa_cfg->pdev->dev, "IOA unit check with no data\n");
  6921. }
  6922. /**
  6923. * ipr_get_unit_check_buffer - Get the unit check buffer from the IOA
  6924. * @ioa_cfg: ioa config struct
  6925. *
  6926. * Fetches the unit check buffer from the adapter by clocking the data
  6927. * through the mailbox register.
  6928. *
  6929. * Return value:
  6930. * nothing
  6931. **/
  6932. static void ipr_get_unit_check_buffer(struct ipr_ioa_cfg *ioa_cfg)
  6933. {
  6934. unsigned long mailbox;
  6935. struct ipr_hostrcb *hostrcb;
  6936. struct ipr_uc_sdt sdt;
  6937. int rc, length;
  6938. u32 ioasc;
  6939. mailbox = readl(ioa_cfg->ioa_mailbox);
  6940. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(mailbox)) {
  6941. ipr_unit_check_no_data(ioa_cfg);
  6942. return;
  6943. }
  6944. memset(&sdt, 0, sizeof(struct ipr_uc_sdt));
  6945. rc = ipr_get_ldump_data_section(ioa_cfg, mailbox, (__be32 *) &sdt,
  6946. (sizeof(struct ipr_uc_sdt)) / sizeof(__be32));
  6947. if (rc || !(sdt.entry[0].flags & IPR_SDT_VALID_ENTRY) ||
  6948. ((be32_to_cpu(sdt.hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  6949. (be32_to_cpu(sdt.hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  6950. ipr_unit_check_no_data(ioa_cfg);
  6951. return;
  6952. }
  6953. /* Find length of the first sdt entry (UC buffer) */
  6954. if (be32_to_cpu(sdt.hdr.state) == IPR_FMT3_SDT_READY_TO_USE)
  6955. length = be32_to_cpu(sdt.entry[0].end_token);
  6956. else
  6957. length = (be32_to_cpu(sdt.entry[0].end_token) -
  6958. be32_to_cpu(sdt.entry[0].start_token)) &
  6959. IPR_FMT2_MBX_ADDR_MASK;
  6960. hostrcb = list_entry(ioa_cfg->hostrcb_free_q.next,
  6961. struct ipr_hostrcb, queue);
  6962. list_del(&hostrcb->queue);
  6963. memset(&hostrcb->hcam, 0, sizeof(hostrcb->hcam));
  6964. rc = ipr_get_ldump_data_section(ioa_cfg,
  6965. be32_to_cpu(sdt.entry[0].start_token),
  6966. (__be32 *)&hostrcb->hcam,
  6967. min(length, (int)sizeof(hostrcb->hcam)) / sizeof(__be32));
  6968. if (!rc) {
  6969. ipr_handle_log_data(ioa_cfg, hostrcb);
  6970. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  6971. if (ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED &&
  6972. ioa_cfg->sdt_state == GET_DUMP)
  6973. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  6974. } else
  6975. ipr_unit_check_no_data(ioa_cfg);
  6976. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  6977. }
  6978. /**
  6979. * ipr_reset_get_unit_check_job - Call to get the unit check buffer.
  6980. * @ipr_cmd: ipr command struct
  6981. *
  6982. * Description: This function will call to get the unit check buffer.
  6983. *
  6984. * Return value:
  6985. * IPR_RC_JOB_RETURN
  6986. **/
  6987. static int ipr_reset_get_unit_check_job(struct ipr_cmnd *ipr_cmd)
  6988. {
  6989. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6990. ENTER;
  6991. ioa_cfg->ioa_unit_checked = 0;
  6992. ipr_get_unit_check_buffer(ioa_cfg);
  6993. ipr_cmd->job_step = ipr_reset_alert;
  6994. ipr_reset_start_timer(ipr_cmd, 0);
  6995. LEAVE;
  6996. return IPR_RC_JOB_RETURN;
  6997. }
  6998. /**
  6999. * ipr_reset_restore_cfg_space - Restore PCI config space.
  7000. * @ipr_cmd: ipr command struct
  7001. *
  7002. * Description: This function restores the saved PCI config space of
  7003. * the adapter, fails all outstanding ops back to the callers, and
  7004. * fetches the dump/unit check if applicable to this reset.
  7005. *
  7006. * Return value:
  7007. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7008. **/
  7009. static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
  7010. {
  7011. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7012. u32 int_reg;
  7013. ENTER;
  7014. ioa_cfg->pdev->state_saved = true;
  7015. pci_restore_state(ioa_cfg->pdev);
  7016. if (ipr_set_pcix_cmd_reg(ioa_cfg)) {
  7017. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  7018. return IPR_RC_JOB_CONTINUE;
  7019. }
  7020. ipr_fail_all_ops(ioa_cfg);
  7021. if (ioa_cfg->sis64) {
  7022. /* Set the adapter to the correct endian mode. */
  7023. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  7024. int_reg = readl(ioa_cfg->regs.endian_swap_reg);
  7025. }
  7026. if (ioa_cfg->ioa_unit_checked) {
  7027. if (ioa_cfg->sis64) {
  7028. ipr_cmd->job_step = ipr_reset_get_unit_check_job;
  7029. ipr_reset_start_timer(ipr_cmd, IPR_DUMP_DELAY_TIMEOUT);
  7030. return IPR_RC_JOB_RETURN;
  7031. } else {
  7032. ioa_cfg->ioa_unit_checked = 0;
  7033. ipr_get_unit_check_buffer(ioa_cfg);
  7034. ipr_cmd->job_step = ipr_reset_alert;
  7035. ipr_reset_start_timer(ipr_cmd, 0);
  7036. return IPR_RC_JOB_RETURN;
  7037. }
  7038. }
  7039. if (ioa_cfg->in_ioa_bringdown) {
  7040. ipr_cmd->job_step = ipr_ioa_bringdown_done;
  7041. } else {
  7042. ipr_cmd->job_step = ipr_reset_enable_ioa;
  7043. if (GET_DUMP == ioa_cfg->sdt_state) {
  7044. ioa_cfg->sdt_state = READ_DUMP;
  7045. ioa_cfg->dump_timeout = 0;
  7046. if (ioa_cfg->sis64)
  7047. ipr_reset_start_timer(ipr_cmd, IPR_SIS64_DUMP_TIMEOUT);
  7048. else
  7049. ipr_reset_start_timer(ipr_cmd, IPR_SIS32_DUMP_TIMEOUT);
  7050. ipr_cmd->job_step = ipr_reset_wait_for_dump;
  7051. schedule_work(&ioa_cfg->work_q);
  7052. return IPR_RC_JOB_RETURN;
  7053. }
  7054. }
  7055. LEAVE;
  7056. return IPR_RC_JOB_CONTINUE;
  7057. }
  7058. /**
  7059. * ipr_reset_bist_done - BIST has completed on the adapter.
  7060. * @ipr_cmd: ipr command struct
  7061. *
  7062. * Description: Unblock config space and resume the reset process.
  7063. *
  7064. * Return value:
  7065. * IPR_RC_JOB_CONTINUE
  7066. **/
  7067. static int ipr_reset_bist_done(struct ipr_cmnd *ipr_cmd)
  7068. {
  7069. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7070. ENTER;
  7071. if (ioa_cfg->cfg_locked)
  7072. pci_cfg_access_unlock(ioa_cfg->pdev);
  7073. ioa_cfg->cfg_locked = 0;
  7074. ipr_cmd->job_step = ipr_reset_restore_cfg_space;
  7075. LEAVE;
  7076. return IPR_RC_JOB_CONTINUE;
  7077. }
  7078. /**
  7079. * ipr_reset_start_bist - Run BIST on the adapter.
  7080. * @ipr_cmd: ipr command struct
  7081. *
  7082. * Description: This function runs BIST on the adapter, then delays 2 seconds.
  7083. *
  7084. * Return value:
  7085. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7086. **/
  7087. static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
  7088. {
  7089. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7090. int rc = PCIBIOS_SUCCESSFUL;
  7091. ENTER;
  7092. if (ioa_cfg->ipr_chip->bist_method == IPR_MMIO)
  7093. writel(IPR_UPROCI_SIS64_START_BIST,
  7094. ioa_cfg->regs.set_uproc_interrupt_reg32);
  7095. else
  7096. rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, PCI_BIST_START);
  7097. if (rc == PCIBIOS_SUCCESSFUL) {
  7098. ipr_cmd->job_step = ipr_reset_bist_done;
  7099. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  7100. rc = IPR_RC_JOB_RETURN;
  7101. } else {
  7102. if (ioa_cfg->cfg_locked)
  7103. pci_cfg_access_unlock(ipr_cmd->ioa_cfg->pdev);
  7104. ioa_cfg->cfg_locked = 0;
  7105. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  7106. rc = IPR_RC_JOB_CONTINUE;
  7107. }
  7108. LEAVE;
  7109. return rc;
  7110. }
  7111. /**
  7112. * ipr_reset_slot_reset_done - Clear PCI reset to the adapter
  7113. * @ipr_cmd: ipr command struct
  7114. *
  7115. * Description: This clears PCI reset to the adapter and delays two seconds.
  7116. *
  7117. * Return value:
  7118. * IPR_RC_JOB_RETURN
  7119. **/
  7120. static int ipr_reset_slot_reset_done(struct ipr_cmnd *ipr_cmd)
  7121. {
  7122. ENTER;
  7123. pci_set_pcie_reset_state(ipr_cmd->ioa_cfg->pdev, pcie_deassert_reset);
  7124. ipr_cmd->job_step = ipr_reset_bist_done;
  7125. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  7126. LEAVE;
  7127. return IPR_RC_JOB_RETURN;
  7128. }
  7129. /**
  7130. * ipr_reset_slot_reset - Reset the PCI slot of the adapter.
  7131. * @ipr_cmd: ipr command struct
  7132. *
  7133. * Description: This asserts PCI reset to the adapter.
  7134. *
  7135. * Return value:
  7136. * IPR_RC_JOB_RETURN
  7137. **/
  7138. static int ipr_reset_slot_reset(struct ipr_cmnd *ipr_cmd)
  7139. {
  7140. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7141. struct pci_dev *pdev = ioa_cfg->pdev;
  7142. ENTER;
  7143. pci_set_pcie_reset_state(pdev, pcie_warm_reset);
  7144. ipr_cmd->job_step = ipr_reset_slot_reset_done;
  7145. ipr_reset_start_timer(ipr_cmd, IPR_PCI_RESET_TIMEOUT);
  7146. LEAVE;
  7147. return IPR_RC_JOB_RETURN;
  7148. }
  7149. /**
  7150. * ipr_reset_block_config_access_wait - Wait for permission to block config access
  7151. * @ipr_cmd: ipr command struct
  7152. *
  7153. * Description: This attempts to block config access to the IOA.
  7154. *
  7155. * Return value:
  7156. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7157. **/
  7158. static int ipr_reset_block_config_access_wait(struct ipr_cmnd *ipr_cmd)
  7159. {
  7160. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7161. int rc = IPR_RC_JOB_CONTINUE;
  7162. if (pci_cfg_access_trylock(ioa_cfg->pdev)) {
  7163. ioa_cfg->cfg_locked = 1;
  7164. ipr_cmd->job_step = ioa_cfg->reset;
  7165. } else {
  7166. if (ipr_cmd->u.time_left) {
  7167. rc = IPR_RC_JOB_RETURN;
  7168. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7169. ipr_reset_start_timer(ipr_cmd,
  7170. IPR_CHECK_FOR_RESET_TIMEOUT);
  7171. } else {
  7172. ipr_cmd->job_step = ioa_cfg->reset;
  7173. dev_err(&ioa_cfg->pdev->dev,
  7174. "Timed out waiting to lock config access. Resetting anyway.\n");
  7175. }
  7176. }
  7177. return rc;
  7178. }
  7179. /**
  7180. * ipr_reset_block_config_access - Block config access to the IOA
  7181. * @ipr_cmd: ipr command struct
  7182. *
  7183. * Description: This attempts to block config access to the IOA
  7184. *
  7185. * Return value:
  7186. * IPR_RC_JOB_CONTINUE
  7187. **/
  7188. static int ipr_reset_block_config_access(struct ipr_cmnd *ipr_cmd)
  7189. {
  7190. ipr_cmd->ioa_cfg->cfg_locked = 0;
  7191. ipr_cmd->job_step = ipr_reset_block_config_access_wait;
  7192. ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
  7193. return IPR_RC_JOB_CONTINUE;
  7194. }
  7195. /**
  7196. * ipr_reset_allowed - Query whether or not IOA can be reset
  7197. * @ioa_cfg: ioa config struct
  7198. *
  7199. * Return value:
  7200. * 0 if reset not allowed / non-zero if reset is allowed
  7201. **/
  7202. static int ipr_reset_allowed(struct ipr_ioa_cfg *ioa_cfg)
  7203. {
  7204. volatile u32 temp_reg;
  7205. temp_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  7206. return ((temp_reg & IPR_PCII_CRITICAL_OPERATION) == 0);
  7207. }
  7208. /**
  7209. * ipr_reset_wait_to_start_bist - Wait for permission to reset IOA.
  7210. * @ipr_cmd: ipr command struct
  7211. *
  7212. * Description: This function waits for adapter permission to run BIST,
  7213. * then runs BIST. If the adapter does not give permission after a
  7214. * reasonable time, we will reset the adapter anyway. The impact of
  7215. * resetting the adapter without warning the adapter is the risk of
  7216. * losing the persistent error log on the adapter. If the adapter is
  7217. * reset while it is writing to the flash on the adapter, the flash
  7218. * segment will have bad ECC and be zeroed.
  7219. *
  7220. * Return value:
  7221. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7222. **/
  7223. static int ipr_reset_wait_to_start_bist(struct ipr_cmnd *ipr_cmd)
  7224. {
  7225. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7226. int rc = IPR_RC_JOB_RETURN;
  7227. if (!ipr_reset_allowed(ioa_cfg) && ipr_cmd->u.time_left) {
  7228. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7229. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  7230. } else {
  7231. ipr_cmd->job_step = ipr_reset_block_config_access;
  7232. rc = IPR_RC_JOB_CONTINUE;
  7233. }
  7234. return rc;
  7235. }
  7236. /**
  7237. * ipr_reset_alert - Alert the adapter of a pending reset
  7238. * @ipr_cmd: ipr command struct
  7239. *
  7240. * Description: This function alerts the adapter that it will be reset.
  7241. * If memory space is not currently enabled, proceed directly
  7242. * to running BIST on the adapter. The timer must always be started
  7243. * so we guarantee we do not run BIST from ipr_isr.
  7244. *
  7245. * Return value:
  7246. * IPR_RC_JOB_RETURN
  7247. **/
  7248. static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
  7249. {
  7250. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7251. u16 cmd_reg;
  7252. int rc;
  7253. ENTER;
  7254. rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg);
  7255. if ((rc == PCIBIOS_SUCCESSFUL) && (cmd_reg & PCI_COMMAND_MEMORY)) {
  7256. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  7257. writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg32);
  7258. ipr_cmd->job_step = ipr_reset_wait_to_start_bist;
  7259. } else {
  7260. ipr_cmd->job_step = ipr_reset_block_config_access;
  7261. }
  7262. ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
  7263. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  7264. LEAVE;
  7265. return IPR_RC_JOB_RETURN;
  7266. }
  7267. /**
  7268. * ipr_reset_ucode_download_done - Microcode download completion
  7269. * @ipr_cmd: ipr command struct
  7270. *
  7271. * Description: This function unmaps the microcode download buffer.
  7272. *
  7273. * Return value:
  7274. * IPR_RC_JOB_CONTINUE
  7275. **/
  7276. static int ipr_reset_ucode_download_done(struct ipr_cmnd *ipr_cmd)
  7277. {
  7278. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7279. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  7280. pci_unmap_sg(ioa_cfg->pdev, sglist->scatterlist,
  7281. sglist->num_sg, DMA_TO_DEVICE);
  7282. ipr_cmd->job_step = ipr_reset_alert;
  7283. return IPR_RC_JOB_CONTINUE;
  7284. }
  7285. /**
  7286. * ipr_reset_ucode_download - Download microcode to the adapter
  7287. * @ipr_cmd: ipr command struct
  7288. *
  7289. * Description: This function checks to see if it there is microcode
  7290. * to download to the adapter. If there is, a download is performed.
  7291. *
  7292. * Return value:
  7293. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7294. **/
  7295. static int ipr_reset_ucode_download(struct ipr_cmnd *ipr_cmd)
  7296. {
  7297. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7298. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  7299. ENTER;
  7300. ipr_cmd->job_step = ipr_reset_alert;
  7301. if (!sglist)
  7302. return IPR_RC_JOB_CONTINUE;
  7303. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7304. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  7305. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = WRITE_BUFFER;
  7306. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_WR_BUF_DOWNLOAD_AND_SAVE;
  7307. ipr_cmd->ioarcb.cmd_pkt.cdb[6] = (sglist->buffer_len & 0xff0000) >> 16;
  7308. ipr_cmd->ioarcb.cmd_pkt.cdb[7] = (sglist->buffer_len & 0x00ff00) >> 8;
  7309. ipr_cmd->ioarcb.cmd_pkt.cdb[8] = sglist->buffer_len & 0x0000ff;
  7310. if (ioa_cfg->sis64)
  7311. ipr_build_ucode_ioadl64(ipr_cmd, sglist);
  7312. else
  7313. ipr_build_ucode_ioadl(ipr_cmd, sglist);
  7314. ipr_cmd->job_step = ipr_reset_ucode_download_done;
  7315. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  7316. IPR_WRITE_BUFFER_TIMEOUT);
  7317. LEAVE;
  7318. return IPR_RC_JOB_RETURN;
  7319. }
  7320. /**
  7321. * ipr_reset_shutdown_ioa - Shutdown the adapter
  7322. * @ipr_cmd: ipr command struct
  7323. *
  7324. * Description: This function issues an adapter shutdown of the
  7325. * specified type to the specified adapter as part of the
  7326. * adapter reset job.
  7327. *
  7328. * Return value:
  7329. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7330. **/
  7331. static int ipr_reset_shutdown_ioa(struct ipr_cmnd *ipr_cmd)
  7332. {
  7333. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7334. enum ipr_shutdown_type shutdown_type = ipr_cmd->u.shutdown_type;
  7335. unsigned long timeout;
  7336. int rc = IPR_RC_JOB_CONTINUE;
  7337. ENTER;
  7338. if (shutdown_type != IPR_SHUTDOWN_NONE &&
  7339. !ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  7340. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7341. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  7342. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  7343. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = shutdown_type;
  7344. if (shutdown_type == IPR_SHUTDOWN_NORMAL)
  7345. timeout = IPR_SHUTDOWN_TIMEOUT;
  7346. else if (shutdown_type == IPR_SHUTDOWN_PREPARE_FOR_NORMAL)
  7347. timeout = IPR_INTERNAL_TIMEOUT;
  7348. else if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  7349. timeout = IPR_DUAL_IOA_ABBR_SHUTDOWN_TO;
  7350. else
  7351. timeout = IPR_ABBREV_SHUTDOWN_TIMEOUT;
  7352. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, timeout);
  7353. rc = IPR_RC_JOB_RETURN;
  7354. ipr_cmd->job_step = ipr_reset_ucode_download;
  7355. } else
  7356. ipr_cmd->job_step = ipr_reset_alert;
  7357. LEAVE;
  7358. return rc;
  7359. }
  7360. /**
  7361. * ipr_reset_ioa_job - Adapter reset job
  7362. * @ipr_cmd: ipr command struct
  7363. *
  7364. * Description: This function is the job router for the adapter reset job.
  7365. *
  7366. * Return value:
  7367. * none
  7368. **/
  7369. static void ipr_reset_ioa_job(struct ipr_cmnd *ipr_cmd)
  7370. {
  7371. u32 rc, ioasc;
  7372. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7373. do {
  7374. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  7375. if (ioa_cfg->reset_cmd != ipr_cmd) {
  7376. /*
  7377. * We are doing nested adapter resets and this is
  7378. * not the current reset job.
  7379. */
  7380. list_add_tail(&ipr_cmd->queue,
  7381. &ipr_cmd->hrrq->hrrq_free_q);
  7382. return;
  7383. }
  7384. if (IPR_IOASC_SENSE_KEY(ioasc)) {
  7385. rc = ipr_cmd->job_step_failed(ipr_cmd);
  7386. if (rc == IPR_RC_JOB_RETURN)
  7387. return;
  7388. }
  7389. ipr_reinit_ipr_cmnd(ipr_cmd);
  7390. ipr_cmd->job_step_failed = ipr_reset_cmd_failed;
  7391. rc = ipr_cmd->job_step(ipr_cmd);
  7392. } while (rc == IPR_RC_JOB_CONTINUE);
  7393. }
  7394. /**
  7395. * _ipr_initiate_ioa_reset - Initiate an adapter reset
  7396. * @ioa_cfg: ioa config struct
  7397. * @job_step: first job step of reset job
  7398. * @shutdown_type: shutdown type
  7399. *
  7400. * Description: This function will initiate the reset of the given adapter
  7401. * starting at the selected job step.
  7402. * If the caller needs to wait on the completion of the reset,
  7403. * the caller must sleep on the reset_wait_q.
  7404. *
  7405. * Return value:
  7406. * none
  7407. **/
  7408. static void _ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  7409. int (*job_step) (struct ipr_cmnd *),
  7410. enum ipr_shutdown_type shutdown_type)
  7411. {
  7412. struct ipr_cmnd *ipr_cmd;
  7413. int i;
  7414. ioa_cfg->in_reset_reload = 1;
  7415. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7416. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7417. ioa_cfg->hrrq[i].allow_cmds = 0;
  7418. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7419. }
  7420. wmb();
  7421. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa)
  7422. scsi_block_requests(ioa_cfg->host);
  7423. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  7424. ioa_cfg->reset_cmd = ipr_cmd;
  7425. ipr_cmd->job_step = job_step;
  7426. ipr_cmd->u.shutdown_type = shutdown_type;
  7427. ipr_reset_ioa_job(ipr_cmd);
  7428. }
  7429. /**
  7430. * ipr_initiate_ioa_reset - Initiate an adapter reset
  7431. * @ioa_cfg: ioa config struct
  7432. * @shutdown_type: shutdown type
  7433. *
  7434. * Description: This function will initiate the reset of the given adapter.
  7435. * If the caller needs to wait on the completion of the reset,
  7436. * the caller must sleep on the reset_wait_q.
  7437. *
  7438. * Return value:
  7439. * none
  7440. **/
  7441. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  7442. enum ipr_shutdown_type shutdown_type)
  7443. {
  7444. int i;
  7445. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  7446. return;
  7447. if (ioa_cfg->in_reset_reload) {
  7448. if (ioa_cfg->sdt_state == GET_DUMP)
  7449. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  7450. else if (ioa_cfg->sdt_state == READ_DUMP)
  7451. ioa_cfg->sdt_state = ABORT_DUMP;
  7452. }
  7453. if (ioa_cfg->reset_retries++ >= IPR_NUM_RESET_RELOAD_RETRIES) {
  7454. dev_err(&ioa_cfg->pdev->dev,
  7455. "IOA taken offline - error recovery failed\n");
  7456. ioa_cfg->reset_retries = 0;
  7457. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7458. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7459. ioa_cfg->hrrq[i].ioa_is_dead = 1;
  7460. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7461. }
  7462. wmb();
  7463. if (ioa_cfg->in_ioa_bringdown) {
  7464. ioa_cfg->reset_cmd = NULL;
  7465. ioa_cfg->in_reset_reload = 0;
  7466. ipr_fail_all_ops(ioa_cfg);
  7467. wake_up_all(&ioa_cfg->reset_wait_q);
  7468. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa) {
  7469. spin_unlock_irq(ioa_cfg->host->host_lock);
  7470. scsi_unblock_requests(ioa_cfg->host);
  7471. spin_lock_irq(ioa_cfg->host->host_lock);
  7472. }
  7473. return;
  7474. } else {
  7475. ioa_cfg->in_ioa_bringdown = 1;
  7476. shutdown_type = IPR_SHUTDOWN_NONE;
  7477. }
  7478. }
  7479. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_shutdown_ioa,
  7480. shutdown_type);
  7481. }
  7482. /**
  7483. * ipr_reset_freeze - Hold off all I/O activity
  7484. * @ipr_cmd: ipr command struct
  7485. *
  7486. * Description: If the PCI slot is frozen, hold off all I/O
  7487. * activity; then, as soon as the slot is available again,
  7488. * initiate an adapter reset.
  7489. */
  7490. static int ipr_reset_freeze(struct ipr_cmnd *ipr_cmd)
  7491. {
  7492. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7493. int i;
  7494. /* Disallow new interrupts, avoid loop */
  7495. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7496. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7497. ioa_cfg->hrrq[i].allow_interrupts = 0;
  7498. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7499. }
  7500. wmb();
  7501. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  7502. ipr_cmd->done = ipr_reset_ioa_job;
  7503. return IPR_RC_JOB_RETURN;
  7504. }
  7505. /**
  7506. * ipr_pci_frozen - Called when slot has experienced a PCI bus error.
  7507. * @pdev: PCI device struct
  7508. *
  7509. * Description: This routine is called to tell us that the PCI bus
  7510. * is down. Can't do anything here, except put the device driver
  7511. * into a holding pattern, waiting for the PCI bus to come back.
  7512. */
  7513. static void ipr_pci_frozen(struct pci_dev *pdev)
  7514. {
  7515. unsigned long flags = 0;
  7516. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7517. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7518. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_freeze, IPR_SHUTDOWN_NONE);
  7519. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7520. }
  7521. /**
  7522. * ipr_pci_slot_reset - Called when PCI slot has been reset.
  7523. * @pdev: PCI device struct
  7524. *
  7525. * Description: This routine is called by the pci error recovery
  7526. * code after the PCI slot has been reset, just before we
  7527. * should resume normal operations.
  7528. */
  7529. static pci_ers_result_t ipr_pci_slot_reset(struct pci_dev *pdev)
  7530. {
  7531. unsigned long flags = 0;
  7532. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7533. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7534. if (ioa_cfg->needs_warm_reset)
  7535. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7536. else
  7537. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_restore_cfg_space,
  7538. IPR_SHUTDOWN_NONE);
  7539. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7540. return PCI_ERS_RESULT_RECOVERED;
  7541. }
  7542. /**
  7543. * ipr_pci_perm_failure - Called when PCI slot is dead for good.
  7544. * @pdev: PCI device struct
  7545. *
  7546. * Description: This routine is called when the PCI bus has
  7547. * permanently failed.
  7548. */
  7549. static void ipr_pci_perm_failure(struct pci_dev *pdev)
  7550. {
  7551. unsigned long flags = 0;
  7552. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7553. int i;
  7554. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7555. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  7556. ioa_cfg->sdt_state = ABORT_DUMP;
  7557. ioa_cfg->reset_retries = IPR_NUM_RESET_RELOAD_RETRIES;
  7558. ioa_cfg->in_ioa_bringdown = 1;
  7559. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7560. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7561. ioa_cfg->hrrq[i].allow_cmds = 0;
  7562. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7563. }
  7564. wmb();
  7565. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7566. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7567. }
  7568. /**
  7569. * ipr_pci_error_detected - Called when a PCI error is detected.
  7570. * @pdev: PCI device struct
  7571. * @state: PCI channel state
  7572. *
  7573. * Description: Called when a PCI error is detected.
  7574. *
  7575. * Return value:
  7576. * PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT
  7577. */
  7578. static pci_ers_result_t ipr_pci_error_detected(struct pci_dev *pdev,
  7579. pci_channel_state_t state)
  7580. {
  7581. switch (state) {
  7582. case pci_channel_io_frozen:
  7583. ipr_pci_frozen(pdev);
  7584. return PCI_ERS_RESULT_NEED_RESET;
  7585. case pci_channel_io_perm_failure:
  7586. ipr_pci_perm_failure(pdev);
  7587. return PCI_ERS_RESULT_DISCONNECT;
  7588. break;
  7589. default:
  7590. break;
  7591. }
  7592. return PCI_ERS_RESULT_NEED_RESET;
  7593. }
  7594. /**
  7595. * ipr_probe_ioa_part2 - Initializes IOAs found in ipr_probe_ioa(..)
  7596. * @ioa_cfg: ioa cfg struct
  7597. *
  7598. * Description: This is the second phase of adapter intialization
  7599. * This function takes care of initilizing the adapter to the point
  7600. * where it can accept new commands.
  7601. * Return value:
  7602. * 0 on success / -EIO on failure
  7603. **/
  7604. static int ipr_probe_ioa_part2(struct ipr_ioa_cfg *ioa_cfg)
  7605. {
  7606. int rc = 0;
  7607. unsigned long host_lock_flags = 0;
  7608. ENTER;
  7609. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  7610. dev_dbg(&ioa_cfg->pdev->dev, "ioa_cfg adx: 0x%p\n", ioa_cfg);
  7611. if (ioa_cfg->needs_hard_reset) {
  7612. ioa_cfg->needs_hard_reset = 0;
  7613. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7614. } else
  7615. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_enable_ioa,
  7616. IPR_SHUTDOWN_NONE);
  7617. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  7618. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  7619. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  7620. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  7621. rc = -EIO;
  7622. } else if (ipr_invalid_adapter(ioa_cfg)) {
  7623. if (!ipr_testmode)
  7624. rc = -EIO;
  7625. dev_err(&ioa_cfg->pdev->dev,
  7626. "Adapter not supported in this hardware configuration.\n");
  7627. }
  7628. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  7629. LEAVE;
  7630. return rc;
  7631. }
  7632. /**
  7633. * ipr_free_cmd_blks - Frees command blocks allocated for an adapter
  7634. * @ioa_cfg: ioa config struct
  7635. *
  7636. * Return value:
  7637. * none
  7638. **/
  7639. static void ipr_free_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  7640. {
  7641. int i;
  7642. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  7643. if (ioa_cfg->ipr_cmnd_list[i])
  7644. pci_pool_free(ioa_cfg->ipr_cmd_pool,
  7645. ioa_cfg->ipr_cmnd_list[i],
  7646. ioa_cfg->ipr_cmnd_list_dma[i]);
  7647. ioa_cfg->ipr_cmnd_list[i] = NULL;
  7648. }
  7649. if (ioa_cfg->ipr_cmd_pool)
  7650. pci_pool_destroy(ioa_cfg->ipr_cmd_pool);
  7651. kfree(ioa_cfg->ipr_cmnd_list);
  7652. kfree(ioa_cfg->ipr_cmnd_list_dma);
  7653. ioa_cfg->ipr_cmnd_list = NULL;
  7654. ioa_cfg->ipr_cmnd_list_dma = NULL;
  7655. ioa_cfg->ipr_cmd_pool = NULL;
  7656. }
  7657. /**
  7658. * ipr_free_mem - Frees memory allocated for an adapter
  7659. * @ioa_cfg: ioa cfg struct
  7660. *
  7661. * Return value:
  7662. * nothing
  7663. **/
  7664. static void ipr_free_mem(struct ipr_ioa_cfg *ioa_cfg)
  7665. {
  7666. int i;
  7667. kfree(ioa_cfg->res_entries);
  7668. pci_free_consistent(ioa_cfg->pdev, sizeof(struct ipr_misc_cbs),
  7669. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  7670. ipr_free_cmd_blks(ioa_cfg);
  7671. for (i = 0; i < ioa_cfg->hrrq_num; i++)
  7672. pci_free_consistent(ioa_cfg->pdev,
  7673. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7674. ioa_cfg->hrrq[i].host_rrq,
  7675. ioa_cfg->hrrq[i].host_rrq_dma);
  7676. pci_free_consistent(ioa_cfg->pdev, ioa_cfg->cfg_table_size,
  7677. ioa_cfg->u.cfg_table,
  7678. ioa_cfg->cfg_table_dma);
  7679. for (i = 0; i < IPR_NUM_HCAMS; i++) {
  7680. pci_free_consistent(ioa_cfg->pdev,
  7681. sizeof(struct ipr_hostrcb),
  7682. ioa_cfg->hostrcb[i],
  7683. ioa_cfg->hostrcb_dma[i]);
  7684. }
  7685. ipr_free_dump(ioa_cfg);
  7686. kfree(ioa_cfg->trace);
  7687. }
  7688. /**
  7689. * ipr_free_all_resources - Free all allocated resources for an adapter.
  7690. * @ipr_cmd: ipr command struct
  7691. *
  7692. * This function frees all allocated resources for the
  7693. * specified adapter.
  7694. *
  7695. * Return value:
  7696. * none
  7697. **/
  7698. static void ipr_free_all_resources(struct ipr_ioa_cfg *ioa_cfg)
  7699. {
  7700. struct pci_dev *pdev = ioa_cfg->pdev;
  7701. ENTER;
  7702. if (ioa_cfg->intr_flag == IPR_USE_MSI ||
  7703. ioa_cfg->intr_flag == IPR_USE_MSIX) {
  7704. int i;
  7705. for (i = 0; i < ioa_cfg->nvectors; i++)
  7706. free_irq(ioa_cfg->vectors_info[i].vec,
  7707. &ioa_cfg->hrrq[i]);
  7708. } else
  7709. free_irq(pdev->irq, &ioa_cfg->hrrq[0]);
  7710. if (ioa_cfg->intr_flag == IPR_USE_MSI) {
  7711. pci_disable_msi(pdev);
  7712. ioa_cfg->intr_flag &= ~IPR_USE_MSI;
  7713. } else if (ioa_cfg->intr_flag == IPR_USE_MSIX) {
  7714. pci_disable_msix(pdev);
  7715. ioa_cfg->intr_flag &= ~IPR_USE_MSIX;
  7716. }
  7717. iounmap(ioa_cfg->hdw_dma_regs);
  7718. pci_release_regions(pdev);
  7719. ipr_free_mem(ioa_cfg);
  7720. scsi_host_put(ioa_cfg->host);
  7721. pci_disable_device(pdev);
  7722. LEAVE;
  7723. }
  7724. /**
  7725. * ipr_alloc_cmd_blks - Allocate command blocks for an adapter
  7726. * @ioa_cfg: ioa config struct
  7727. *
  7728. * Return value:
  7729. * 0 on success / -ENOMEM on allocation failure
  7730. **/
  7731. static int ipr_alloc_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  7732. {
  7733. struct ipr_cmnd *ipr_cmd;
  7734. struct ipr_ioarcb *ioarcb;
  7735. dma_addr_t dma_addr;
  7736. int i, entries_each_hrrq, hrrq_id = 0;
  7737. ioa_cfg->ipr_cmd_pool = pci_pool_create(IPR_NAME, ioa_cfg->pdev,
  7738. sizeof(struct ipr_cmnd), 512, 0);
  7739. if (!ioa_cfg->ipr_cmd_pool)
  7740. return -ENOMEM;
  7741. ioa_cfg->ipr_cmnd_list = kcalloc(IPR_NUM_CMD_BLKS, sizeof(struct ipr_cmnd *), GFP_KERNEL);
  7742. ioa_cfg->ipr_cmnd_list_dma = kcalloc(IPR_NUM_CMD_BLKS, sizeof(dma_addr_t), GFP_KERNEL);
  7743. if (!ioa_cfg->ipr_cmnd_list || !ioa_cfg->ipr_cmnd_list_dma) {
  7744. ipr_free_cmd_blks(ioa_cfg);
  7745. return -ENOMEM;
  7746. }
  7747. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7748. if (ioa_cfg->hrrq_num > 1) {
  7749. if (i == 0) {
  7750. entries_each_hrrq = IPR_NUM_INTERNAL_CMD_BLKS;
  7751. ioa_cfg->hrrq[i].min_cmd_id = 0;
  7752. ioa_cfg->hrrq[i].max_cmd_id =
  7753. (entries_each_hrrq - 1);
  7754. } else {
  7755. entries_each_hrrq =
  7756. IPR_NUM_BASE_CMD_BLKS/
  7757. (ioa_cfg->hrrq_num - 1);
  7758. ioa_cfg->hrrq[i].min_cmd_id =
  7759. IPR_NUM_INTERNAL_CMD_BLKS +
  7760. (i - 1) * entries_each_hrrq;
  7761. ioa_cfg->hrrq[i].max_cmd_id =
  7762. (IPR_NUM_INTERNAL_CMD_BLKS +
  7763. i * entries_each_hrrq - 1);
  7764. }
  7765. } else {
  7766. entries_each_hrrq = IPR_NUM_CMD_BLKS;
  7767. ioa_cfg->hrrq[i].min_cmd_id = 0;
  7768. ioa_cfg->hrrq[i].max_cmd_id = (entries_each_hrrq - 1);
  7769. }
  7770. ioa_cfg->hrrq[i].size = entries_each_hrrq;
  7771. }
  7772. BUG_ON(ioa_cfg->hrrq_num == 0);
  7773. i = IPR_NUM_CMD_BLKS -
  7774. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].max_cmd_id - 1;
  7775. if (i > 0) {
  7776. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].size += i;
  7777. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].max_cmd_id += i;
  7778. }
  7779. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  7780. ipr_cmd = pci_pool_alloc(ioa_cfg->ipr_cmd_pool, GFP_KERNEL, &dma_addr);
  7781. if (!ipr_cmd) {
  7782. ipr_free_cmd_blks(ioa_cfg);
  7783. return -ENOMEM;
  7784. }
  7785. memset(ipr_cmd, 0, sizeof(*ipr_cmd));
  7786. ioa_cfg->ipr_cmnd_list[i] = ipr_cmd;
  7787. ioa_cfg->ipr_cmnd_list_dma[i] = dma_addr;
  7788. ioarcb = &ipr_cmd->ioarcb;
  7789. ipr_cmd->dma_addr = dma_addr;
  7790. if (ioa_cfg->sis64)
  7791. ioarcb->a.ioarcb_host_pci_addr64 = cpu_to_be64(dma_addr);
  7792. else
  7793. ioarcb->a.ioarcb_host_pci_addr = cpu_to_be32(dma_addr);
  7794. ioarcb->host_response_handle = cpu_to_be32(i << 2);
  7795. if (ioa_cfg->sis64) {
  7796. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  7797. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  7798. ioarcb->u.sis64_addr_data.ioasa_host_pci_addr =
  7799. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, s.ioasa64));
  7800. } else {
  7801. ioarcb->write_ioadl_addr =
  7802. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  7803. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  7804. ioarcb->ioasa_host_pci_addr =
  7805. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, s.ioasa));
  7806. }
  7807. ioarcb->ioasa_len = cpu_to_be16(sizeof(struct ipr_ioasa));
  7808. ipr_cmd->cmd_index = i;
  7809. ipr_cmd->ioa_cfg = ioa_cfg;
  7810. ipr_cmd->sense_buffer_dma = dma_addr +
  7811. offsetof(struct ipr_cmnd, sense_buffer);
  7812. ipr_cmd->ioarcb.cmd_pkt.hrrq_id = hrrq_id;
  7813. ipr_cmd->hrrq = &ioa_cfg->hrrq[hrrq_id];
  7814. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  7815. if (i >= ioa_cfg->hrrq[hrrq_id].max_cmd_id)
  7816. hrrq_id++;
  7817. }
  7818. return 0;
  7819. }
  7820. /**
  7821. * ipr_alloc_mem - Allocate memory for an adapter
  7822. * @ioa_cfg: ioa config struct
  7823. *
  7824. * Return value:
  7825. * 0 on success / non-zero for error
  7826. **/
  7827. static int ipr_alloc_mem(struct ipr_ioa_cfg *ioa_cfg)
  7828. {
  7829. struct pci_dev *pdev = ioa_cfg->pdev;
  7830. int i, rc = -ENOMEM;
  7831. ENTER;
  7832. ioa_cfg->res_entries = kzalloc(sizeof(struct ipr_resource_entry) *
  7833. ioa_cfg->max_devs_supported, GFP_KERNEL);
  7834. if (!ioa_cfg->res_entries)
  7835. goto out;
  7836. if (ioa_cfg->sis64) {
  7837. ioa_cfg->target_ids = kzalloc(sizeof(unsigned long) *
  7838. BITS_TO_LONGS(ioa_cfg->max_devs_supported), GFP_KERNEL);
  7839. ioa_cfg->array_ids = kzalloc(sizeof(unsigned long) *
  7840. BITS_TO_LONGS(ioa_cfg->max_devs_supported), GFP_KERNEL);
  7841. ioa_cfg->vset_ids = kzalloc(sizeof(unsigned long) *
  7842. BITS_TO_LONGS(ioa_cfg->max_devs_supported), GFP_KERNEL);
  7843. if (!ioa_cfg->target_ids || !ioa_cfg->array_ids
  7844. || !ioa_cfg->vset_ids)
  7845. goto out_free_res_entries;
  7846. }
  7847. for (i = 0; i < ioa_cfg->max_devs_supported; i++) {
  7848. list_add_tail(&ioa_cfg->res_entries[i].queue, &ioa_cfg->free_res_q);
  7849. ioa_cfg->res_entries[i].ioa_cfg = ioa_cfg;
  7850. }
  7851. ioa_cfg->vpd_cbs = pci_alloc_consistent(ioa_cfg->pdev,
  7852. sizeof(struct ipr_misc_cbs),
  7853. &ioa_cfg->vpd_cbs_dma);
  7854. if (!ioa_cfg->vpd_cbs)
  7855. goto out_free_res_entries;
  7856. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7857. INIT_LIST_HEAD(&ioa_cfg->hrrq[i].hrrq_free_q);
  7858. INIT_LIST_HEAD(&ioa_cfg->hrrq[i].hrrq_pending_q);
  7859. spin_lock_init(&ioa_cfg->hrrq[i]._lock);
  7860. if (i == 0)
  7861. ioa_cfg->hrrq[i].lock = ioa_cfg->host->host_lock;
  7862. else
  7863. ioa_cfg->hrrq[i].lock = &ioa_cfg->hrrq[i]._lock;
  7864. }
  7865. if (ipr_alloc_cmd_blks(ioa_cfg))
  7866. goto out_free_vpd_cbs;
  7867. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7868. ioa_cfg->hrrq[i].host_rrq = pci_alloc_consistent(ioa_cfg->pdev,
  7869. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7870. &ioa_cfg->hrrq[i].host_rrq_dma);
  7871. if (!ioa_cfg->hrrq[i].host_rrq) {
  7872. while (--i > 0)
  7873. pci_free_consistent(pdev,
  7874. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7875. ioa_cfg->hrrq[i].host_rrq,
  7876. ioa_cfg->hrrq[i].host_rrq_dma);
  7877. goto out_ipr_free_cmd_blocks;
  7878. }
  7879. ioa_cfg->hrrq[i].ioa_cfg = ioa_cfg;
  7880. }
  7881. ioa_cfg->u.cfg_table = pci_alloc_consistent(ioa_cfg->pdev,
  7882. ioa_cfg->cfg_table_size,
  7883. &ioa_cfg->cfg_table_dma);
  7884. if (!ioa_cfg->u.cfg_table)
  7885. goto out_free_host_rrq;
  7886. for (i = 0; i < IPR_NUM_HCAMS; i++) {
  7887. ioa_cfg->hostrcb[i] = pci_alloc_consistent(ioa_cfg->pdev,
  7888. sizeof(struct ipr_hostrcb),
  7889. &ioa_cfg->hostrcb_dma[i]);
  7890. if (!ioa_cfg->hostrcb[i])
  7891. goto out_free_hostrcb_dma;
  7892. ioa_cfg->hostrcb[i]->hostrcb_dma =
  7893. ioa_cfg->hostrcb_dma[i] + offsetof(struct ipr_hostrcb, hcam);
  7894. ioa_cfg->hostrcb[i]->ioa_cfg = ioa_cfg;
  7895. list_add_tail(&ioa_cfg->hostrcb[i]->queue, &ioa_cfg->hostrcb_free_q);
  7896. }
  7897. ioa_cfg->trace = kzalloc(sizeof(struct ipr_trace_entry) *
  7898. IPR_NUM_TRACE_ENTRIES, GFP_KERNEL);
  7899. if (!ioa_cfg->trace)
  7900. goto out_free_hostrcb_dma;
  7901. rc = 0;
  7902. out:
  7903. LEAVE;
  7904. return rc;
  7905. out_free_hostrcb_dma:
  7906. while (i-- > 0) {
  7907. pci_free_consistent(pdev, sizeof(struct ipr_hostrcb),
  7908. ioa_cfg->hostrcb[i],
  7909. ioa_cfg->hostrcb_dma[i]);
  7910. }
  7911. pci_free_consistent(pdev, ioa_cfg->cfg_table_size,
  7912. ioa_cfg->u.cfg_table,
  7913. ioa_cfg->cfg_table_dma);
  7914. out_free_host_rrq:
  7915. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7916. pci_free_consistent(pdev,
  7917. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7918. ioa_cfg->hrrq[i].host_rrq,
  7919. ioa_cfg->hrrq[i].host_rrq_dma);
  7920. }
  7921. out_ipr_free_cmd_blocks:
  7922. ipr_free_cmd_blks(ioa_cfg);
  7923. out_free_vpd_cbs:
  7924. pci_free_consistent(pdev, sizeof(struct ipr_misc_cbs),
  7925. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  7926. out_free_res_entries:
  7927. kfree(ioa_cfg->res_entries);
  7928. kfree(ioa_cfg->target_ids);
  7929. kfree(ioa_cfg->array_ids);
  7930. kfree(ioa_cfg->vset_ids);
  7931. goto out;
  7932. }
  7933. /**
  7934. * ipr_initialize_bus_attr - Initialize SCSI bus attributes to default values
  7935. * @ioa_cfg: ioa config struct
  7936. *
  7937. * Return value:
  7938. * none
  7939. **/
  7940. static void ipr_initialize_bus_attr(struct ipr_ioa_cfg *ioa_cfg)
  7941. {
  7942. int i;
  7943. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  7944. ioa_cfg->bus_attr[i].bus = i;
  7945. ioa_cfg->bus_attr[i].qas_enabled = 0;
  7946. ioa_cfg->bus_attr[i].bus_width = IPR_DEFAULT_BUS_WIDTH;
  7947. if (ipr_max_speed < ARRAY_SIZE(ipr_max_bus_speeds))
  7948. ioa_cfg->bus_attr[i].max_xfer_rate = ipr_max_bus_speeds[ipr_max_speed];
  7949. else
  7950. ioa_cfg->bus_attr[i].max_xfer_rate = IPR_U160_SCSI_RATE;
  7951. }
  7952. }
  7953. /**
  7954. * ipr_init_ioa_cfg - Initialize IOA config struct
  7955. * @ioa_cfg: ioa config struct
  7956. * @host: scsi host struct
  7957. * @pdev: PCI dev struct
  7958. *
  7959. * Return value:
  7960. * none
  7961. **/
  7962. static void ipr_init_ioa_cfg(struct ipr_ioa_cfg *ioa_cfg,
  7963. struct Scsi_Host *host, struct pci_dev *pdev)
  7964. {
  7965. const struct ipr_interrupt_offsets *p;
  7966. struct ipr_interrupts *t;
  7967. void __iomem *base;
  7968. ioa_cfg->host = host;
  7969. ioa_cfg->pdev = pdev;
  7970. ioa_cfg->log_level = ipr_log_level;
  7971. ioa_cfg->doorbell = IPR_DOORBELL;
  7972. sprintf(ioa_cfg->eye_catcher, IPR_EYECATCHER);
  7973. sprintf(ioa_cfg->trace_start, IPR_TRACE_START_LABEL);
  7974. sprintf(ioa_cfg->cfg_table_start, IPR_CFG_TBL_START);
  7975. sprintf(ioa_cfg->resource_table_label, IPR_RES_TABLE_LABEL);
  7976. sprintf(ioa_cfg->ipr_hcam_label, IPR_HCAM_LABEL);
  7977. sprintf(ioa_cfg->ipr_cmd_label, IPR_CMD_LABEL);
  7978. INIT_LIST_HEAD(&ioa_cfg->hostrcb_free_q);
  7979. INIT_LIST_HEAD(&ioa_cfg->hostrcb_pending_q);
  7980. INIT_LIST_HEAD(&ioa_cfg->free_res_q);
  7981. INIT_LIST_HEAD(&ioa_cfg->used_res_q);
  7982. INIT_WORK(&ioa_cfg->work_q, ipr_worker_thread);
  7983. init_waitqueue_head(&ioa_cfg->reset_wait_q);
  7984. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  7985. ioa_cfg->sdt_state = INACTIVE;
  7986. ipr_initialize_bus_attr(ioa_cfg);
  7987. ioa_cfg->max_devs_supported = ipr_max_devs;
  7988. if (ioa_cfg->sis64) {
  7989. host->max_id = IPR_MAX_SIS64_TARGETS_PER_BUS;
  7990. host->max_lun = IPR_MAX_SIS64_LUNS_PER_TARGET;
  7991. if (ipr_max_devs > IPR_MAX_SIS64_DEVS)
  7992. ioa_cfg->max_devs_supported = IPR_MAX_SIS64_DEVS;
  7993. } else {
  7994. host->max_id = IPR_MAX_NUM_TARGETS_PER_BUS;
  7995. host->max_lun = IPR_MAX_NUM_LUNS_PER_TARGET;
  7996. if (ipr_max_devs > IPR_MAX_PHYSICAL_DEVS)
  7997. ioa_cfg->max_devs_supported = IPR_MAX_PHYSICAL_DEVS;
  7998. }
  7999. host->max_channel = IPR_MAX_BUS_TO_SCAN;
  8000. host->unique_id = host->host_no;
  8001. host->max_cmd_len = IPR_MAX_CDB_LEN;
  8002. host->can_queue = ioa_cfg->max_cmds;
  8003. pci_set_drvdata(pdev, ioa_cfg);
  8004. p = &ioa_cfg->chip_cfg->regs;
  8005. t = &ioa_cfg->regs;
  8006. base = ioa_cfg->hdw_dma_regs;
  8007. t->set_interrupt_mask_reg = base + p->set_interrupt_mask_reg;
  8008. t->clr_interrupt_mask_reg = base + p->clr_interrupt_mask_reg;
  8009. t->clr_interrupt_mask_reg32 = base + p->clr_interrupt_mask_reg32;
  8010. t->sense_interrupt_mask_reg = base + p->sense_interrupt_mask_reg;
  8011. t->sense_interrupt_mask_reg32 = base + p->sense_interrupt_mask_reg32;
  8012. t->clr_interrupt_reg = base + p->clr_interrupt_reg;
  8013. t->clr_interrupt_reg32 = base + p->clr_interrupt_reg32;
  8014. t->sense_interrupt_reg = base + p->sense_interrupt_reg;
  8015. t->sense_interrupt_reg32 = base + p->sense_interrupt_reg32;
  8016. t->ioarrin_reg = base + p->ioarrin_reg;
  8017. t->sense_uproc_interrupt_reg = base + p->sense_uproc_interrupt_reg;
  8018. t->sense_uproc_interrupt_reg32 = base + p->sense_uproc_interrupt_reg32;
  8019. t->set_uproc_interrupt_reg = base + p->set_uproc_interrupt_reg;
  8020. t->set_uproc_interrupt_reg32 = base + p->set_uproc_interrupt_reg32;
  8021. t->clr_uproc_interrupt_reg = base + p->clr_uproc_interrupt_reg;
  8022. t->clr_uproc_interrupt_reg32 = base + p->clr_uproc_interrupt_reg32;
  8023. if (ioa_cfg->sis64) {
  8024. t->init_feedback_reg = base + p->init_feedback_reg;
  8025. t->dump_addr_reg = base + p->dump_addr_reg;
  8026. t->dump_data_reg = base + p->dump_data_reg;
  8027. t->endian_swap_reg = base + p->endian_swap_reg;
  8028. }
  8029. }
  8030. /**
  8031. * ipr_get_chip_info - Find adapter chip information
  8032. * @dev_id: PCI device id struct
  8033. *
  8034. * Return value:
  8035. * ptr to chip information on success / NULL on failure
  8036. **/
  8037. static const struct ipr_chip_t *
  8038. ipr_get_chip_info(const struct pci_device_id *dev_id)
  8039. {
  8040. int i;
  8041. for (i = 0; i < ARRAY_SIZE(ipr_chip); i++)
  8042. if (ipr_chip[i].vendor == dev_id->vendor &&
  8043. ipr_chip[i].device == dev_id->device)
  8044. return &ipr_chip[i];
  8045. return NULL;
  8046. }
  8047. static int ipr_enable_msix(struct ipr_ioa_cfg *ioa_cfg)
  8048. {
  8049. struct msix_entry entries[IPR_MAX_MSIX_VECTORS];
  8050. int i, err, vectors;
  8051. for (i = 0; i < ARRAY_SIZE(entries); ++i)
  8052. entries[i].entry = i;
  8053. vectors = ipr_number_of_msix;
  8054. while ((err = pci_enable_msix(ioa_cfg->pdev, entries, vectors)) > 0)
  8055. vectors = err;
  8056. if (err < 0) {
  8057. pci_disable_msix(ioa_cfg->pdev);
  8058. return err;
  8059. }
  8060. if (!err) {
  8061. for (i = 0; i < vectors; i++)
  8062. ioa_cfg->vectors_info[i].vec = entries[i].vector;
  8063. ioa_cfg->nvectors = vectors;
  8064. }
  8065. return err;
  8066. }
  8067. static int ipr_enable_msi(struct ipr_ioa_cfg *ioa_cfg)
  8068. {
  8069. int i, err, vectors;
  8070. vectors = ipr_number_of_msix;
  8071. while ((err = pci_enable_msi_block(ioa_cfg->pdev, vectors)) > 0)
  8072. vectors = err;
  8073. if (err < 0) {
  8074. pci_disable_msi(ioa_cfg->pdev);
  8075. return err;
  8076. }
  8077. if (!err) {
  8078. for (i = 0; i < vectors; i++)
  8079. ioa_cfg->vectors_info[i].vec = ioa_cfg->pdev->irq + i;
  8080. ioa_cfg->nvectors = vectors;
  8081. }
  8082. return err;
  8083. }
  8084. static void name_msi_vectors(struct ipr_ioa_cfg *ioa_cfg)
  8085. {
  8086. int vec_idx, n = sizeof(ioa_cfg->vectors_info[0].desc) - 1;
  8087. for (vec_idx = 0; vec_idx < ioa_cfg->nvectors; vec_idx++) {
  8088. snprintf(ioa_cfg->vectors_info[vec_idx].desc, n,
  8089. "host%d-%d", ioa_cfg->host->host_no, vec_idx);
  8090. ioa_cfg->vectors_info[vec_idx].
  8091. desc[strlen(ioa_cfg->vectors_info[vec_idx].desc)] = 0;
  8092. }
  8093. }
  8094. static int ipr_request_other_msi_irqs(struct ipr_ioa_cfg *ioa_cfg)
  8095. {
  8096. int i, rc;
  8097. for (i = 1; i < ioa_cfg->nvectors; i++) {
  8098. rc = request_irq(ioa_cfg->vectors_info[i].vec,
  8099. ipr_isr_mhrrq,
  8100. 0,
  8101. ioa_cfg->vectors_info[i].desc,
  8102. &ioa_cfg->hrrq[i]);
  8103. if (rc) {
  8104. while (--i >= 0)
  8105. free_irq(ioa_cfg->vectors_info[i].vec,
  8106. &ioa_cfg->hrrq[i]);
  8107. return rc;
  8108. }
  8109. }
  8110. return 0;
  8111. }
  8112. /**
  8113. * ipr_test_intr - Handle the interrupt generated in ipr_test_msi().
  8114. * @pdev: PCI device struct
  8115. *
  8116. * Description: Simply set the msi_received flag to 1 indicating that
  8117. * Message Signaled Interrupts are supported.
  8118. *
  8119. * Return value:
  8120. * 0 on success / non-zero on failure
  8121. **/
  8122. static irqreturn_t ipr_test_intr(int irq, void *devp)
  8123. {
  8124. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)devp;
  8125. unsigned long lock_flags = 0;
  8126. irqreturn_t rc = IRQ_HANDLED;
  8127. dev_info(&ioa_cfg->pdev->dev, "Received IRQ : %d\n", irq);
  8128. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8129. ioa_cfg->msi_received = 1;
  8130. wake_up(&ioa_cfg->msi_wait_q);
  8131. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8132. return rc;
  8133. }
  8134. /**
  8135. * ipr_test_msi - Test for Message Signaled Interrupt (MSI) support.
  8136. * @pdev: PCI device struct
  8137. *
  8138. * Description: The return value from pci_enable_msi() can not always be
  8139. * trusted. This routine sets up and initiates a test interrupt to determine
  8140. * if the interrupt is received via the ipr_test_intr() service routine.
  8141. * If the tests fails, the driver will fall back to LSI.
  8142. *
  8143. * Return value:
  8144. * 0 on success / non-zero on failure
  8145. **/
  8146. static int ipr_test_msi(struct ipr_ioa_cfg *ioa_cfg, struct pci_dev *pdev)
  8147. {
  8148. int rc;
  8149. volatile u32 int_reg;
  8150. unsigned long lock_flags = 0;
  8151. ENTER;
  8152. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8153. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  8154. ioa_cfg->msi_received = 0;
  8155. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8156. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.clr_interrupt_mask_reg32);
  8157. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  8158. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8159. rc = request_irq(pdev->irq, ipr_test_intr, 0, IPR_NAME, ioa_cfg);
  8160. if (rc) {
  8161. dev_err(&pdev->dev, "Can not assign irq %d\n", pdev->irq);
  8162. return rc;
  8163. } else if (ipr_debug)
  8164. dev_info(&pdev->dev, "IRQ assigned: %d\n", pdev->irq);
  8165. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.sense_interrupt_reg32);
  8166. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  8167. wait_event_timeout(ioa_cfg->msi_wait_q, ioa_cfg->msi_received, HZ);
  8168. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8169. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8170. if (!ioa_cfg->msi_received) {
  8171. /* MSI test failed */
  8172. dev_info(&pdev->dev, "MSI test failed. Falling back to LSI.\n");
  8173. rc = -EOPNOTSUPP;
  8174. } else if (ipr_debug)
  8175. dev_info(&pdev->dev, "MSI test succeeded.\n");
  8176. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8177. free_irq(pdev->irq, ioa_cfg);
  8178. LEAVE;
  8179. return rc;
  8180. }
  8181. /* ipr_probe_ioa - Allocates memory and does first stage of initialization
  8182. * @pdev: PCI device struct
  8183. * @dev_id: PCI device id struct
  8184. *
  8185. * Return value:
  8186. * 0 on success / non-zero on failure
  8187. **/
  8188. static int ipr_probe_ioa(struct pci_dev *pdev,
  8189. const struct pci_device_id *dev_id)
  8190. {
  8191. struct ipr_ioa_cfg *ioa_cfg;
  8192. struct Scsi_Host *host;
  8193. unsigned long ipr_regs_pci;
  8194. void __iomem *ipr_regs;
  8195. int rc = PCIBIOS_SUCCESSFUL;
  8196. volatile u32 mask, uproc, interrupts;
  8197. unsigned long lock_flags;
  8198. ENTER;
  8199. if ((rc = pci_enable_device(pdev))) {
  8200. dev_err(&pdev->dev, "Cannot enable adapter\n");
  8201. goto out;
  8202. }
  8203. dev_info(&pdev->dev, "Found IOA with IRQ: %d\n", pdev->irq);
  8204. host = scsi_host_alloc(&driver_template, sizeof(*ioa_cfg));
  8205. if (!host) {
  8206. dev_err(&pdev->dev, "call to scsi_host_alloc failed!\n");
  8207. rc = -ENOMEM;
  8208. goto out_disable;
  8209. }
  8210. ioa_cfg = (struct ipr_ioa_cfg *)host->hostdata;
  8211. memset(ioa_cfg, 0, sizeof(struct ipr_ioa_cfg));
  8212. ata_host_init(&ioa_cfg->ata_host, &pdev->dev, &ipr_sata_ops);
  8213. ioa_cfg->ipr_chip = ipr_get_chip_info(dev_id);
  8214. if (!ioa_cfg->ipr_chip) {
  8215. dev_err(&pdev->dev, "Unknown adapter chipset 0x%04X 0x%04X\n",
  8216. dev_id->vendor, dev_id->device);
  8217. goto out_scsi_host_put;
  8218. }
  8219. /* set SIS 32 or SIS 64 */
  8220. ioa_cfg->sis64 = ioa_cfg->ipr_chip->sis_type == IPR_SIS64 ? 1 : 0;
  8221. ioa_cfg->chip_cfg = ioa_cfg->ipr_chip->cfg;
  8222. ioa_cfg->clear_isr = ioa_cfg->chip_cfg->clear_isr;
  8223. ioa_cfg->max_cmds = ioa_cfg->chip_cfg->max_cmds;
  8224. if (ipr_transop_timeout)
  8225. ioa_cfg->transop_timeout = ipr_transop_timeout;
  8226. else if (dev_id->driver_data & IPR_USE_LONG_TRANSOP_TIMEOUT)
  8227. ioa_cfg->transop_timeout = IPR_LONG_OPERATIONAL_TIMEOUT;
  8228. else
  8229. ioa_cfg->transop_timeout = IPR_OPERATIONAL_TIMEOUT;
  8230. ioa_cfg->revid = pdev->revision;
  8231. ipr_regs_pci = pci_resource_start(pdev, 0);
  8232. rc = pci_request_regions(pdev, IPR_NAME);
  8233. if (rc < 0) {
  8234. dev_err(&pdev->dev,
  8235. "Couldn't register memory range of registers\n");
  8236. goto out_scsi_host_put;
  8237. }
  8238. ipr_regs = pci_ioremap_bar(pdev, 0);
  8239. if (!ipr_regs) {
  8240. dev_err(&pdev->dev,
  8241. "Couldn't map memory range of registers\n");
  8242. rc = -ENOMEM;
  8243. goto out_release_regions;
  8244. }
  8245. ioa_cfg->hdw_dma_regs = ipr_regs;
  8246. ioa_cfg->hdw_dma_regs_pci = ipr_regs_pci;
  8247. ioa_cfg->ioa_mailbox = ioa_cfg->chip_cfg->mailbox + ipr_regs;
  8248. ipr_init_ioa_cfg(ioa_cfg, host, pdev);
  8249. pci_set_master(pdev);
  8250. if (ioa_cfg->sis64) {
  8251. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  8252. if (rc < 0) {
  8253. dev_dbg(&pdev->dev, "Failed to set 64 bit PCI DMA mask\n");
  8254. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  8255. }
  8256. } else
  8257. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  8258. if (rc < 0) {
  8259. dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
  8260. goto cleanup_nomem;
  8261. }
  8262. rc = pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
  8263. ioa_cfg->chip_cfg->cache_line_size);
  8264. if (rc != PCIBIOS_SUCCESSFUL) {
  8265. dev_err(&pdev->dev, "Write of cache line size failed\n");
  8266. rc = -EIO;
  8267. goto cleanup_nomem;
  8268. }
  8269. if (ipr_number_of_msix > IPR_MAX_MSIX_VECTORS) {
  8270. dev_err(&pdev->dev, "The max number of MSIX is %d\n",
  8271. IPR_MAX_MSIX_VECTORS);
  8272. ipr_number_of_msix = IPR_MAX_MSIX_VECTORS;
  8273. }
  8274. if (ioa_cfg->ipr_chip->intr_type == IPR_USE_MSI &&
  8275. ipr_enable_msix(ioa_cfg) == 0)
  8276. ioa_cfg->intr_flag = IPR_USE_MSIX;
  8277. else if (ioa_cfg->ipr_chip->intr_type == IPR_USE_MSI &&
  8278. ipr_enable_msi(ioa_cfg) == 0)
  8279. ioa_cfg->intr_flag = IPR_USE_MSI;
  8280. else {
  8281. ioa_cfg->intr_flag = IPR_USE_LSI;
  8282. ioa_cfg->nvectors = 1;
  8283. dev_info(&pdev->dev, "Cannot enable MSI.\n");
  8284. }
  8285. if (ioa_cfg->intr_flag == IPR_USE_MSI ||
  8286. ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8287. rc = ipr_test_msi(ioa_cfg, pdev);
  8288. if (rc == -EOPNOTSUPP) {
  8289. if (ioa_cfg->intr_flag == IPR_USE_MSI) {
  8290. ioa_cfg->intr_flag &= ~IPR_USE_MSI;
  8291. pci_disable_msi(pdev);
  8292. } else if (ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8293. ioa_cfg->intr_flag &= ~IPR_USE_MSIX;
  8294. pci_disable_msix(pdev);
  8295. }
  8296. ioa_cfg->intr_flag = IPR_USE_LSI;
  8297. ioa_cfg->nvectors = 1;
  8298. }
  8299. else if (rc)
  8300. goto out_msi_disable;
  8301. else {
  8302. if (ioa_cfg->intr_flag == IPR_USE_MSI)
  8303. dev_info(&pdev->dev,
  8304. "Request for %d MSIs succeeded with starting IRQ: %d\n",
  8305. ioa_cfg->nvectors, pdev->irq);
  8306. else if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  8307. dev_info(&pdev->dev,
  8308. "Request for %d MSIXs succeeded.",
  8309. ioa_cfg->nvectors);
  8310. }
  8311. }
  8312. ioa_cfg->hrrq_num = min3(ioa_cfg->nvectors,
  8313. (unsigned int)num_online_cpus(),
  8314. (unsigned int)IPR_MAX_HRRQ_NUM);
  8315. /* Save away PCI config space for use following IOA reset */
  8316. rc = pci_save_state(pdev);
  8317. if (rc != PCIBIOS_SUCCESSFUL) {
  8318. dev_err(&pdev->dev, "Failed to save PCI config space\n");
  8319. rc = -EIO;
  8320. goto out_msi_disable;
  8321. }
  8322. if ((rc = ipr_save_pcix_cmd_reg(ioa_cfg)))
  8323. goto out_msi_disable;
  8324. if ((rc = ipr_set_pcix_cmd_reg(ioa_cfg)))
  8325. goto out_msi_disable;
  8326. if (ioa_cfg->sis64)
  8327. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr64)
  8328. + ((sizeof(struct ipr_config_table_entry64)
  8329. * ioa_cfg->max_devs_supported)));
  8330. else
  8331. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr)
  8332. + ((sizeof(struct ipr_config_table_entry)
  8333. * ioa_cfg->max_devs_supported)));
  8334. rc = ipr_alloc_mem(ioa_cfg);
  8335. if (rc < 0) {
  8336. dev_err(&pdev->dev,
  8337. "Couldn't allocate enough memory for device driver!\n");
  8338. goto out_msi_disable;
  8339. }
  8340. /*
  8341. * If HRRQ updated interrupt is not masked, or reset alert is set,
  8342. * the card is in an unknown state and needs a hard reset
  8343. */
  8344. mask = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  8345. interrupts = readl(ioa_cfg->regs.sense_interrupt_reg32);
  8346. uproc = readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  8347. if ((mask & IPR_PCII_HRRQ_UPDATED) == 0 || (uproc & IPR_UPROCI_RESET_ALERT))
  8348. ioa_cfg->needs_hard_reset = 1;
  8349. if ((interrupts & IPR_PCII_ERROR_INTERRUPTS) || reset_devices)
  8350. ioa_cfg->needs_hard_reset = 1;
  8351. if (interrupts & IPR_PCII_IOA_UNIT_CHECKED)
  8352. ioa_cfg->ioa_unit_checked = 1;
  8353. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8354. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8355. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8356. if (ioa_cfg->intr_flag == IPR_USE_MSI
  8357. || ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8358. name_msi_vectors(ioa_cfg);
  8359. rc = request_irq(ioa_cfg->vectors_info[0].vec, ipr_isr,
  8360. 0,
  8361. ioa_cfg->vectors_info[0].desc,
  8362. &ioa_cfg->hrrq[0]);
  8363. if (!rc)
  8364. rc = ipr_request_other_msi_irqs(ioa_cfg);
  8365. } else {
  8366. rc = request_irq(pdev->irq, ipr_isr,
  8367. IRQF_SHARED,
  8368. IPR_NAME, &ioa_cfg->hrrq[0]);
  8369. }
  8370. if (rc) {
  8371. dev_err(&pdev->dev, "Couldn't register IRQ %d! rc=%d\n",
  8372. pdev->irq, rc);
  8373. goto cleanup_nolog;
  8374. }
  8375. if ((dev_id->driver_data & IPR_USE_PCI_WARM_RESET) ||
  8376. (dev_id->device == PCI_DEVICE_ID_IBM_OBSIDIAN_E && !ioa_cfg->revid)) {
  8377. ioa_cfg->needs_warm_reset = 1;
  8378. ioa_cfg->reset = ipr_reset_slot_reset;
  8379. } else
  8380. ioa_cfg->reset = ipr_reset_start_bist;
  8381. spin_lock(&ipr_driver_lock);
  8382. list_add_tail(&ioa_cfg->queue, &ipr_ioa_head);
  8383. spin_unlock(&ipr_driver_lock);
  8384. LEAVE;
  8385. out:
  8386. return rc;
  8387. cleanup_nolog:
  8388. ipr_free_mem(ioa_cfg);
  8389. out_msi_disable:
  8390. if (ioa_cfg->intr_flag == IPR_USE_MSI)
  8391. pci_disable_msi(pdev);
  8392. else if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  8393. pci_disable_msix(pdev);
  8394. cleanup_nomem:
  8395. iounmap(ipr_regs);
  8396. out_release_regions:
  8397. pci_release_regions(pdev);
  8398. out_scsi_host_put:
  8399. scsi_host_put(host);
  8400. out_disable:
  8401. pci_disable_device(pdev);
  8402. goto out;
  8403. }
  8404. /**
  8405. * ipr_scan_vsets - Scans for VSET devices
  8406. * @ioa_cfg: ioa config struct
  8407. *
  8408. * Description: Since the VSET resources do not follow SAM in that we can have
  8409. * sparse LUNs with no LUN 0, we have to scan for these ourselves.
  8410. *
  8411. * Return value:
  8412. * none
  8413. **/
  8414. static void ipr_scan_vsets(struct ipr_ioa_cfg *ioa_cfg)
  8415. {
  8416. int target, lun;
  8417. for (target = 0; target < IPR_MAX_NUM_TARGETS_PER_BUS; target++)
  8418. for (lun = 0; lun < IPR_MAX_NUM_VSET_LUNS_PER_TARGET; lun++)
  8419. scsi_add_device(ioa_cfg->host, IPR_VSET_BUS, target, lun);
  8420. }
  8421. /**
  8422. * ipr_initiate_ioa_bringdown - Bring down an adapter
  8423. * @ioa_cfg: ioa config struct
  8424. * @shutdown_type: shutdown type
  8425. *
  8426. * Description: This function will initiate bringing down the adapter.
  8427. * This consists of issuing an IOA shutdown to the adapter
  8428. * to flush the cache, and running BIST.
  8429. * If the caller needs to wait on the completion of the reset,
  8430. * the caller must sleep on the reset_wait_q.
  8431. *
  8432. * Return value:
  8433. * none
  8434. **/
  8435. static void ipr_initiate_ioa_bringdown(struct ipr_ioa_cfg *ioa_cfg,
  8436. enum ipr_shutdown_type shutdown_type)
  8437. {
  8438. ENTER;
  8439. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  8440. ioa_cfg->sdt_state = ABORT_DUMP;
  8441. ioa_cfg->reset_retries = 0;
  8442. ioa_cfg->in_ioa_bringdown = 1;
  8443. ipr_initiate_ioa_reset(ioa_cfg, shutdown_type);
  8444. LEAVE;
  8445. }
  8446. /**
  8447. * __ipr_remove - Remove a single adapter
  8448. * @pdev: pci device struct
  8449. *
  8450. * Adapter hot plug remove entry point.
  8451. *
  8452. * Return value:
  8453. * none
  8454. **/
  8455. static void __ipr_remove(struct pci_dev *pdev)
  8456. {
  8457. unsigned long host_lock_flags = 0;
  8458. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8459. int i;
  8460. ENTER;
  8461. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8462. while (ioa_cfg->in_reset_reload) {
  8463. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8464. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8465. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8466. }
  8467. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8468. spin_lock(&ioa_cfg->hrrq[i]._lock);
  8469. ioa_cfg->hrrq[i].removing_ioa = 1;
  8470. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  8471. }
  8472. wmb();
  8473. ipr_initiate_ioa_bringdown(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  8474. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8475. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8476. flush_work(&ioa_cfg->work_q);
  8477. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8478. spin_lock(&ipr_driver_lock);
  8479. list_del(&ioa_cfg->queue);
  8480. spin_unlock(&ipr_driver_lock);
  8481. if (ioa_cfg->sdt_state == ABORT_DUMP)
  8482. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  8483. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8484. ipr_free_all_resources(ioa_cfg);
  8485. LEAVE;
  8486. }
  8487. /**
  8488. * ipr_remove - IOA hot plug remove entry point
  8489. * @pdev: pci device struct
  8490. *
  8491. * Adapter hot plug remove entry point.
  8492. *
  8493. * Return value:
  8494. * none
  8495. **/
  8496. static void ipr_remove(struct pci_dev *pdev)
  8497. {
  8498. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8499. ENTER;
  8500. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  8501. &ipr_trace_attr);
  8502. ipr_remove_dump_file(&ioa_cfg->host->shost_dev.kobj,
  8503. &ipr_dump_attr);
  8504. scsi_remove_host(ioa_cfg->host);
  8505. __ipr_remove(pdev);
  8506. LEAVE;
  8507. }
  8508. /**
  8509. * ipr_probe - Adapter hot plug add entry point
  8510. *
  8511. * Return value:
  8512. * 0 on success / non-zero on failure
  8513. **/
  8514. static int ipr_probe(struct pci_dev *pdev, const struct pci_device_id *dev_id)
  8515. {
  8516. struct ipr_ioa_cfg *ioa_cfg;
  8517. int rc, i;
  8518. rc = ipr_probe_ioa(pdev, dev_id);
  8519. if (rc)
  8520. return rc;
  8521. ioa_cfg = pci_get_drvdata(pdev);
  8522. rc = ipr_probe_ioa_part2(ioa_cfg);
  8523. if (rc) {
  8524. __ipr_remove(pdev);
  8525. return rc;
  8526. }
  8527. rc = scsi_add_host(ioa_cfg->host, &pdev->dev);
  8528. if (rc) {
  8529. __ipr_remove(pdev);
  8530. return rc;
  8531. }
  8532. rc = ipr_create_trace_file(&ioa_cfg->host->shost_dev.kobj,
  8533. &ipr_trace_attr);
  8534. if (rc) {
  8535. scsi_remove_host(ioa_cfg->host);
  8536. __ipr_remove(pdev);
  8537. return rc;
  8538. }
  8539. rc = ipr_create_dump_file(&ioa_cfg->host->shost_dev.kobj,
  8540. &ipr_dump_attr);
  8541. if (rc) {
  8542. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  8543. &ipr_trace_attr);
  8544. scsi_remove_host(ioa_cfg->host);
  8545. __ipr_remove(pdev);
  8546. return rc;
  8547. }
  8548. scsi_scan_host(ioa_cfg->host);
  8549. ipr_scan_vsets(ioa_cfg);
  8550. scsi_add_device(ioa_cfg->host, IPR_IOA_BUS, IPR_IOA_TARGET, IPR_IOA_LUN);
  8551. ioa_cfg->allow_ml_add_del = 1;
  8552. ioa_cfg->host->max_channel = IPR_VSET_BUS;
  8553. ioa_cfg->iopoll_weight = ioa_cfg->chip_cfg->iopoll_weight;
  8554. if (blk_iopoll_enabled && ioa_cfg->iopoll_weight &&
  8555. ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  8556. for (i = 1; i < ioa_cfg->hrrq_num; i++) {
  8557. blk_iopoll_init(&ioa_cfg->hrrq[i].iopoll,
  8558. ioa_cfg->iopoll_weight, ipr_iopoll);
  8559. blk_iopoll_enable(&ioa_cfg->hrrq[i].iopoll);
  8560. }
  8561. }
  8562. schedule_work(&ioa_cfg->work_q);
  8563. return 0;
  8564. }
  8565. /**
  8566. * ipr_shutdown - Shutdown handler.
  8567. * @pdev: pci device struct
  8568. *
  8569. * This function is invoked upon system shutdown/reboot. It will issue
  8570. * an adapter shutdown to the adapter to flush the write cache.
  8571. *
  8572. * Return value:
  8573. * none
  8574. **/
  8575. static void ipr_shutdown(struct pci_dev *pdev)
  8576. {
  8577. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8578. unsigned long lock_flags = 0;
  8579. int i;
  8580. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8581. if (blk_iopoll_enabled && ioa_cfg->iopoll_weight &&
  8582. ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  8583. ioa_cfg->iopoll_weight = 0;
  8584. for (i = 1; i < ioa_cfg->hrrq_num; i++)
  8585. blk_iopoll_disable(&ioa_cfg->hrrq[i].iopoll);
  8586. }
  8587. while (ioa_cfg->in_reset_reload) {
  8588. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8589. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8590. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8591. }
  8592. ipr_initiate_ioa_bringdown(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  8593. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8594. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8595. }
  8596. static struct pci_device_id ipr_pci_table[] = {
  8597. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8598. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5702, 0, 0, 0 },
  8599. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8600. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5703, 0, 0, 0 },
  8601. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8602. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573D, 0, 0, 0 },
  8603. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8604. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573E, 0, 0, 0 },
  8605. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8606. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571B, 0, 0, 0 },
  8607. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8608. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572E, 0, 0, 0 },
  8609. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8610. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571A, 0, 0, 0 },
  8611. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8612. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575B, 0, 0,
  8613. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8614. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  8615. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  8616. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  8617. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  8618. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8619. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  8620. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  8621. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8622. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  8623. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  8624. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  8625. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  8626. IPR_USE_LONG_TRANSOP_TIMEOUT},
  8627. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  8628. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  8629. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8630. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8631. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574E, 0, 0,
  8632. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8633. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8634. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B3, 0, 0, 0 },
  8635. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8636. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CC, 0, 0, 0 },
  8637. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8638. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B7, 0, 0,
  8639. IPR_USE_LONG_TRANSOP_TIMEOUT | IPR_USE_PCI_WARM_RESET },
  8640. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE,
  8641. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2780, 0, 0, 0 },
  8642. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  8643. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571E, 0, 0, 0 },
  8644. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  8645. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571F, 0, 0,
  8646. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8647. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  8648. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572F, 0, 0,
  8649. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8650. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8651. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B5, 0, 0, 0 },
  8652. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8653. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574D, 0, 0, 0 },
  8654. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8655. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B2, 0, 0, 0 },
  8656. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8657. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C0, 0, 0, 0 },
  8658. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8659. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C3, 0, 0, 0 },
  8660. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8661. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C4, 0, 0, 0 },
  8662. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8663. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B4, 0, 0, 0 },
  8664. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8665. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B1, 0, 0, 0 },
  8666. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8667. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C6, 0, 0, 0 },
  8668. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8669. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C8, 0, 0, 0 },
  8670. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8671. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CE, 0, 0, 0 },
  8672. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8673. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D5, 0, 0, 0 },
  8674. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8675. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D6, 0, 0, 0 },
  8676. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8677. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D7, 0, 0, 0 },
  8678. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8679. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D8, 0, 0, 0 },
  8680. { }
  8681. };
  8682. MODULE_DEVICE_TABLE(pci, ipr_pci_table);
  8683. static const struct pci_error_handlers ipr_err_handler = {
  8684. .error_detected = ipr_pci_error_detected,
  8685. .slot_reset = ipr_pci_slot_reset,
  8686. };
  8687. static struct pci_driver ipr_driver = {
  8688. .name = IPR_NAME,
  8689. .id_table = ipr_pci_table,
  8690. .probe = ipr_probe,
  8691. .remove = ipr_remove,
  8692. .shutdown = ipr_shutdown,
  8693. .err_handler = &ipr_err_handler,
  8694. };
  8695. /**
  8696. * ipr_halt_done - Shutdown prepare completion
  8697. *
  8698. * Return value:
  8699. * none
  8700. **/
  8701. static void ipr_halt_done(struct ipr_cmnd *ipr_cmd)
  8702. {
  8703. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  8704. }
  8705. /**
  8706. * ipr_halt - Issue shutdown prepare to all adapters
  8707. *
  8708. * Return value:
  8709. * NOTIFY_OK on success / NOTIFY_DONE on failure
  8710. **/
  8711. static int ipr_halt(struct notifier_block *nb, ulong event, void *buf)
  8712. {
  8713. struct ipr_cmnd *ipr_cmd;
  8714. struct ipr_ioa_cfg *ioa_cfg;
  8715. unsigned long flags = 0;
  8716. if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
  8717. return NOTIFY_DONE;
  8718. spin_lock(&ipr_driver_lock);
  8719. list_for_each_entry(ioa_cfg, &ipr_ioa_head, queue) {
  8720. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8721. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
  8722. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8723. continue;
  8724. }
  8725. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  8726. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  8727. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  8728. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  8729. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_SHUTDOWN_PREPARE_FOR_NORMAL;
  8730. ipr_do_req(ipr_cmd, ipr_halt_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  8731. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8732. }
  8733. spin_unlock(&ipr_driver_lock);
  8734. return NOTIFY_OK;
  8735. }
  8736. static struct notifier_block ipr_notifier = {
  8737. ipr_halt, NULL, 0
  8738. };
  8739. /**
  8740. * ipr_init - Module entry point
  8741. *
  8742. * Return value:
  8743. * 0 on success / negative value on failure
  8744. **/
  8745. static int __init ipr_init(void)
  8746. {
  8747. ipr_info("IBM Power RAID SCSI Device Driver version: %s %s\n",
  8748. IPR_DRIVER_VERSION, IPR_DRIVER_DATE);
  8749. register_reboot_notifier(&ipr_notifier);
  8750. return pci_register_driver(&ipr_driver);
  8751. }
  8752. /**
  8753. * ipr_exit - Module unload
  8754. *
  8755. * Module unload entry point.
  8756. *
  8757. * Return value:
  8758. * none
  8759. **/
  8760. static void __exit ipr_exit(void)
  8761. {
  8762. unregister_reboot_notifier(&ipr_notifier);
  8763. pci_unregister_driver(&ipr_driver);
  8764. }
  8765. module_init(ipr_init);
  8766. module_exit(ipr_exit);