ctcm_fsms.c 74 KB

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  1. /*
  2. * Copyright IBM Corp. 2001, 2007
  3. * Authors: Fritz Elfert (felfert@millenux.com)
  4. * Peter Tiedemann (ptiedem@de.ibm.com)
  5. * MPC additions :
  6. * Belinda Thompson (belindat@us.ibm.com)
  7. * Andy Richter (richtera@us.ibm.com)
  8. */
  9. #undef DEBUG
  10. #undef DEBUGDATA
  11. #undef DEBUGCCW
  12. #define KMSG_COMPONENT "ctcm"
  13. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  14. #include <linux/module.h>
  15. #include <linux/init.h>
  16. #include <linux/kernel.h>
  17. #include <linux/slab.h>
  18. #include <linux/errno.h>
  19. #include <linux/types.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/timer.h>
  22. #include <linux/bitops.h>
  23. #include <linux/signal.h>
  24. #include <linux/string.h>
  25. #include <linux/ip.h>
  26. #include <linux/if_arp.h>
  27. #include <linux/tcp.h>
  28. #include <linux/skbuff.h>
  29. #include <linux/ctype.h>
  30. #include <net/dst.h>
  31. #include <linux/io.h>
  32. #include <asm/ccwdev.h>
  33. #include <asm/ccwgroup.h>
  34. #include <linux/uaccess.h>
  35. #include <asm/idals.h>
  36. #include "fsm.h"
  37. #include "ctcm_dbug.h"
  38. #include "ctcm_main.h"
  39. #include "ctcm_fsms.h"
  40. const char *dev_state_names[] = {
  41. [DEV_STATE_STOPPED] = "Stopped",
  42. [DEV_STATE_STARTWAIT_RXTX] = "StartWait RXTX",
  43. [DEV_STATE_STARTWAIT_RX] = "StartWait RX",
  44. [DEV_STATE_STARTWAIT_TX] = "StartWait TX",
  45. [DEV_STATE_STOPWAIT_RXTX] = "StopWait RXTX",
  46. [DEV_STATE_STOPWAIT_RX] = "StopWait RX",
  47. [DEV_STATE_STOPWAIT_TX] = "StopWait TX",
  48. [DEV_STATE_RUNNING] = "Running",
  49. };
  50. const char *dev_event_names[] = {
  51. [DEV_EVENT_START] = "Start",
  52. [DEV_EVENT_STOP] = "Stop",
  53. [DEV_EVENT_RXUP] = "RX up",
  54. [DEV_EVENT_TXUP] = "TX up",
  55. [DEV_EVENT_RXDOWN] = "RX down",
  56. [DEV_EVENT_TXDOWN] = "TX down",
  57. [DEV_EVENT_RESTART] = "Restart",
  58. };
  59. const char *ctc_ch_event_names[] = {
  60. [CTC_EVENT_IO_SUCCESS] = "ccw_device success",
  61. [CTC_EVENT_IO_EBUSY] = "ccw_device busy",
  62. [CTC_EVENT_IO_ENODEV] = "ccw_device enodev",
  63. [CTC_EVENT_IO_UNKNOWN] = "ccw_device unknown",
  64. [CTC_EVENT_ATTNBUSY] = "Status ATTN & BUSY",
  65. [CTC_EVENT_ATTN] = "Status ATTN",
  66. [CTC_EVENT_BUSY] = "Status BUSY",
  67. [CTC_EVENT_UC_RCRESET] = "Unit check remote reset",
  68. [CTC_EVENT_UC_RSRESET] = "Unit check remote system reset",
  69. [CTC_EVENT_UC_TXTIMEOUT] = "Unit check TX timeout",
  70. [CTC_EVENT_UC_TXPARITY] = "Unit check TX parity",
  71. [CTC_EVENT_UC_HWFAIL] = "Unit check Hardware failure",
  72. [CTC_EVENT_UC_RXPARITY] = "Unit check RX parity",
  73. [CTC_EVENT_UC_ZERO] = "Unit check ZERO",
  74. [CTC_EVENT_UC_UNKNOWN] = "Unit check Unknown",
  75. [CTC_EVENT_SC_UNKNOWN] = "SubChannel check Unknown",
  76. [CTC_EVENT_MC_FAIL] = "Machine check failure",
  77. [CTC_EVENT_MC_GOOD] = "Machine check operational",
  78. [CTC_EVENT_IRQ] = "IRQ normal",
  79. [CTC_EVENT_FINSTAT] = "IRQ final",
  80. [CTC_EVENT_TIMER] = "Timer",
  81. [CTC_EVENT_START] = "Start",
  82. [CTC_EVENT_STOP] = "Stop",
  83. /*
  84. * additional MPC events
  85. */
  86. [CTC_EVENT_SEND_XID] = "XID Exchange",
  87. [CTC_EVENT_RSWEEP_TIMER] = "MPC Group Sweep Timer",
  88. };
  89. const char *ctc_ch_state_names[] = {
  90. [CTC_STATE_IDLE] = "Idle",
  91. [CTC_STATE_STOPPED] = "Stopped",
  92. [CTC_STATE_STARTWAIT] = "StartWait",
  93. [CTC_STATE_STARTRETRY] = "StartRetry",
  94. [CTC_STATE_SETUPWAIT] = "SetupWait",
  95. [CTC_STATE_RXINIT] = "RX init",
  96. [CTC_STATE_TXINIT] = "TX init",
  97. [CTC_STATE_RX] = "RX",
  98. [CTC_STATE_TX] = "TX",
  99. [CTC_STATE_RXIDLE] = "RX idle",
  100. [CTC_STATE_TXIDLE] = "TX idle",
  101. [CTC_STATE_RXERR] = "RX error",
  102. [CTC_STATE_TXERR] = "TX error",
  103. [CTC_STATE_TERM] = "Terminating",
  104. [CTC_STATE_DTERM] = "Restarting",
  105. [CTC_STATE_NOTOP] = "Not operational",
  106. /*
  107. * additional MPC states
  108. */
  109. [CH_XID0_PENDING] = "Pending XID0 Start",
  110. [CH_XID0_INPROGRESS] = "In XID0 Negotiations ",
  111. [CH_XID7_PENDING] = "Pending XID7 P1 Start",
  112. [CH_XID7_PENDING1] = "Active XID7 P1 Exchange ",
  113. [CH_XID7_PENDING2] = "Pending XID7 P2 Start ",
  114. [CH_XID7_PENDING3] = "Active XID7 P2 Exchange ",
  115. [CH_XID7_PENDING4] = "XID7 Complete - Pending READY ",
  116. };
  117. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg);
  118. /*
  119. * ----- static ctcm actions for channel statemachine -----
  120. *
  121. */
  122. static void chx_txdone(fsm_instance *fi, int event, void *arg);
  123. static void chx_rx(fsm_instance *fi, int event, void *arg);
  124. static void chx_rxidle(fsm_instance *fi, int event, void *arg);
  125. static void chx_firstio(fsm_instance *fi, int event, void *arg);
  126. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  127. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  128. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  129. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  130. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  131. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  132. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  133. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  134. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  135. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  136. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  137. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  138. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  139. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  140. /*
  141. * ----- static ctcmpc actions for ctcmpc channel statemachine -----
  142. *
  143. */
  144. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg);
  145. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg);
  146. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg);
  147. /* shared :
  148. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  149. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  150. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  151. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  152. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  153. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  154. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  155. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  156. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  157. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  158. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  159. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  160. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  161. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  162. */
  163. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg);
  164. static void ctcmpc_chx_attnbusy(fsm_instance *, int, void *);
  165. static void ctcmpc_chx_resend(fsm_instance *, int, void *);
  166. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg);
  167. /**
  168. * Check return code of a preceding ccw_device call, halt_IO etc...
  169. *
  170. * ch : The channel, the error belongs to.
  171. * Returns the error code (!= 0) to inspect.
  172. */
  173. void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg)
  174. {
  175. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  176. "%s(%s): %s: %04x\n",
  177. CTCM_FUNTAIL, ch->id, msg, rc);
  178. switch (rc) {
  179. case -EBUSY:
  180. pr_info("%s: The communication peer is busy\n",
  181. ch->id);
  182. fsm_event(ch->fsm, CTC_EVENT_IO_EBUSY, ch);
  183. break;
  184. case -ENODEV:
  185. pr_err("%s: The specified target device is not valid\n",
  186. ch->id);
  187. fsm_event(ch->fsm, CTC_EVENT_IO_ENODEV, ch);
  188. break;
  189. default:
  190. pr_err("An I/O operation resulted in error %04x\n",
  191. rc);
  192. fsm_event(ch->fsm, CTC_EVENT_IO_UNKNOWN, ch);
  193. }
  194. }
  195. void ctcm_purge_skb_queue(struct sk_buff_head *q)
  196. {
  197. struct sk_buff *skb;
  198. CTCM_DBF_TEXT(TRACE, CTC_DBF_DEBUG, __func__);
  199. while ((skb = skb_dequeue(q))) {
  200. atomic_dec(&skb->users);
  201. dev_kfree_skb_any(skb);
  202. }
  203. }
  204. /**
  205. * NOP action for statemachines
  206. */
  207. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg)
  208. {
  209. }
  210. /*
  211. * Actions for channel - statemachines.
  212. */
  213. /**
  214. * Normal data has been send. Free the corresponding
  215. * skb (it's in io_queue), reset dev->tbusy and
  216. * revert to idle state.
  217. *
  218. * fi An instance of a channel statemachine.
  219. * event The event, just happened.
  220. * arg Generic pointer, casted from channel * upon call.
  221. */
  222. static void chx_txdone(fsm_instance *fi, int event, void *arg)
  223. {
  224. struct channel *ch = arg;
  225. struct net_device *dev = ch->netdev;
  226. struct ctcm_priv *priv = dev->ml_priv;
  227. struct sk_buff *skb;
  228. int first = 1;
  229. int i;
  230. unsigned long duration;
  231. struct timespec done_stamp = current_kernel_time(); /* xtime */
  232. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  233. duration =
  234. (done_stamp.tv_sec - ch->prof.send_stamp.tv_sec) * 1000000 +
  235. (done_stamp.tv_nsec - ch->prof.send_stamp.tv_nsec) / 1000;
  236. if (duration > ch->prof.tx_time)
  237. ch->prof.tx_time = duration;
  238. if (ch->irb->scsw.cmd.count != 0)
  239. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  240. "%s(%s): TX not complete, remaining %d bytes",
  241. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  242. fsm_deltimer(&ch->timer);
  243. while ((skb = skb_dequeue(&ch->io_queue))) {
  244. priv->stats.tx_packets++;
  245. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  246. if (first) {
  247. priv->stats.tx_bytes += 2;
  248. first = 0;
  249. }
  250. atomic_dec(&skb->users);
  251. dev_kfree_skb_irq(skb);
  252. }
  253. spin_lock(&ch->collect_lock);
  254. clear_normalized_cda(&ch->ccw[4]);
  255. if (ch->collect_len > 0) {
  256. int rc;
  257. if (ctcm_checkalloc_buffer(ch)) {
  258. spin_unlock(&ch->collect_lock);
  259. return;
  260. }
  261. ch->trans_skb->data = ch->trans_skb_data;
  262. skb_reset_tail_pointer(ch->trans_skb);
  263. ch->trans_skb->len = 0;
  264. if (ch->prof.maxmulti < (ch->collect_len + 2))
  265. ch->prof.maxmulti = ch->collect_len + 2;
  266. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  267. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  268. *((__u16 *)skb_put(ch->trans_skb, 2)) = ch->collect_len + 2;
  269. i = 0;
  270. while ((skb = skb_dequeue(&ch->collect_queue))) {
  271. skb_copy_from_linear_data(skb,
  272. skb_put(ch->trans_skb, skb->len), skb->len);
  273. priv->stats.tx_packets++;
  274. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  275. atomic_dec(&skb->users);
  276. dev_kfree_skb_irq(skb);
  277. i++;
  278. }
  279. ch->collect_len = 0;
  280. spin_unlock(&ch->collect_lock);
  281. ch->ccw[1].count = ch->trans_skb->len;
  282. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  283. ch->prof.send_stamp = current_kernel_time(); /* xtime */
  284. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  285. (unsigned long)ch, 0xff, 0);
  286. ch->prof.doios_multi++;
  287. if (rc != 0) {
  288. priv->stats.tx_dropped += i;
  289. priv->stats.tx_errors += i;
  290. fsm_deltimer(&ch->timer);
  291. ctcm_ccw_check_rc(ch, rc, "chained TX");
  292. }
  293. } else {
  294. spin_unlock(&ch->collect_lock);
  295. fsm_newstate(fi, CTC_STATE_TXIDLE);
  296. }
  297. ctcm_clear_busy_do(dev);
  298. }
  299. /**
  300. * Initial data is sent.
  301. * Notify device statemachine that we are up and
  302. * running.
  303. *
  304. * fi An instance of a channel statemachine.
  305. * event The event, just happened.
  306. * arg Generic pointer, casted from channel * upon call.
  307. */
  308. void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg)
  309. {
  310. struct channel *ch = arg;
  311. struct net_device *dev = ch->netdev;
  312. struct ctcm_priv *priv = dev->ml_priv;
  313. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  314. fsm_deltimer(&ch->timer);
  315. fsm_newstate(fi, CTC_STATE_TXIDLE);
  316. fsm_event(priv->fsm, DEV_EVENT_TXUP, ch->netdev);
  317. }
  318. /**
  319. * Got normal data, check for sanity, queue it up, allocate new buffer
  320. * trigger bottom half, and initiate next read.
  321. *
  322. * fi An instance of a channel statemachine.
  323. * event The event, just happened.
  324. * arg Generic pointer, casted from channel * upon call.
  325. */
  326. static void chx_rx(fsm_instance *fi, int event, void *arg)
  327. {
  328. struct channel *ch = arg;
  329. struct net_device *dev = ch->netdev;
  330. struct ctcm_priv *priv = dev->ml_priv;
  331. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  332. struct sk_buff *skb = ch->trans_skb;
  333. __u16 block_len = *((__u16 *)skb->data);
  334. int check_len;
  335. int rc;
  336. fsm_deltimer(&ch->timer);
  337. if (len < 8) {
  338. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  339. "%s(%s): got packet with length %d < 8\n",
  340. CTCM_FUNTAIL, dev->name, len);
  341. priv->stats.rx_dropped++;
  342. priv->stats.rx_length_errors++;
  343. goto again;
  344. }
  345. if (len > ch->max_bufsize) {
  346. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  347. "%s(%s): got packet with length %d > %d\n",
  348. CTCM_FUNTAIL, dev->name, len, ch->max_bufsize);
  349. priv->stats.rx_dropped++;
  350. priv->stats.rx_length_errors++;
  351. goto again;
  352. }
  353. /*
  354. * VM TCP seems to have a bug sending 2 trailing bytes of garbage.
  355. */
  356. switch (ch->protocol) {
  357. case CTCM_PROTO_S390:
  358. case CTCM_PROTO_OS390:
  359. check_len = block_len + 2;
  360. break;
  361. default:
  362. check_len = block_len;
  363. break;
  364. }
  365. if ((len < block_len) || (len > check_len)) {
  366. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  367. "%s(%s): got block length %d != rx length %d\n",
  368. CTCM_FUNTAIL, dev->name, block_len, len);
  369. if (do_debug)
  370. ctcmpc_dump_skb(skb, 0);
  371. *((__u16 *)skb->data) = len;
  372. priv->stats.rx_dropped++;
  373. priv->stats.rx_length_errors++;
  374. goto again;
  375. }
  376. if (block_len > 2) {
  377. *((__u16 *)skb->data) = block_len - 2;
  378. ctcm_unpack_skb(ch, skb);
  379. }
  380. again:
  381. skb->data = ch->trans_skb_data;
  382. skb_reset_tail_pointer(skb);
  383. skb->len = 0;
  384. if (ctcm_checkalloc_buffer(ch))
  385. return;
  386. ch->ccw[1].count = ch->max_bufsize;
  387. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  388. (unsigned long)ch, 0xff, 0);
  389. if (rc != 0)
  390. ctcm_ccw_check_rc(ch, rc, "normal RX");
  391. }
  392. /**
  393. * Initialize connection by sending a __u16 of value 0.
  394. *
  395. * fi An instance of a channel statemachine.
  396. * event The event, just happened.
  397. * arg Generic pointer, casted from channel * upon call.
  398. */
  399. static void chx_firstio(fsm_instance *fi, int event, void *arg)
  400. {
  401. int rc;
  402. struct channel *ch = arg;
  403. int fsmstate = fsm_getstate(fi);
  404. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  405. "%s(%s) : %02x",
  406. CTCM_FUNTAIL, ch->id, fsmstate);
  407. ch->sense_rc = 0; /* reset unit check report control */
  408. if (fsmstate == CTC_STATE_TXIDLE)
  409. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  410. "%s(%s): remote side issued READ?, init.\n",
  411. CTCM_FUNTAIL, ch->id);
  412. fsm_deltimer(&ch->timer);
  413. if (ctcm_checkalloc_buffer(ch))
  414. return;
  415. if ((fsmstate == CTC_STATE_SETUPWAIT) &&
  416. (ch->protocol == CTCM_PROTO_OS390)) {
  417. /* OS/390 resp. z/OS */
  418. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  419. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  420. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC,
  421. CTC_EVENT_TIMER, ch);
  422. chx_rxidle(fi, event, arg);
  423. } else {
  424. struct net_device *dev = ch->netdev;
  425. struct ctcm_priv *priv = dev->ml_priv;
  426. fsm_newstate(fi, CTC_STATE_TXIDLE);
  427. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  428. }
  429. return;
  430. }
  431. /*
  432. * Don't setup a timer for receiving the initial RX frame
  433. * if in compatibility mode, since VM TCP delays the initial
  434. * frame until it has some data to send.
  435. */
  436. if ((CHANNEL_DIRECTION(ch->flags) == CTCM_WRITE) ||
  437. (ch->protocol != CTCM_PROTO_S390))
  438. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  439. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  440. ch->ccw[1].count = 2; /* Transfer only length */
  441. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)
  442. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  443. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  444. (unsigned long)ch, 0xff, 0);
  445. if (rc != 0) {
  446. fsm_deltimer(&ch->timer);
  447. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  448. ctcm_ccw_check_rc(ch, rc, "init IO");
  449. }
  450. /*
  451. * If in compatibility mode since we don't setup a timer, we
  452. * also signal RX channel up immediately. This enables us
  453. * to send packets early which in turn usually triggers some
  454. * reply from VM TCP which brings up the RX channel to it's
  455. * final state.
  456. */
  457. if ((CHANNEL_DIRECTION(ch->flags) == CTCM_READ) &&
  458. (ch->protocol == CTCM_PROTO_S390)) {
  459. struct net_device *dev = ch->netdev;
  460. struct ctcm_priv *priv = dev->ml_priv;
  461. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  462. }
  463. }
  464. /**
  465. * Got initial data, check it. If OK,
  466. * notify device statemachine that we are up and
  467. * running.
  468. *
  469. * fi An instance of a channel statemachine.
  470. * event The event, just happened.
  471. * arg Generic pointer, casted from channel * upon call.
  472. */
  473. static void chx_rxidle(fsm_instance *fi, int event, void *arg)
  474. {
  475. struct channel *ch = arg;
  476. struct net_device *dev = ch->netdev;
  477. struct ctcm_priv *priv = dev->ml_priv;
  478. __u16 buflen;
  479. int rc;
  480. fsm_deltimer(&ch->timer);
  481. buflen = *((__u16 *)ch->trans_skb->data);
  482. CTCM_PR_DEBUG("%s: %s: Initial RX count = %d\n",
  483. __func__, dev->name, buflen);
  484. if (buflen >= CTCM_INITIAL_BLOCKLEN) {
  485. if (ctcm_checkalloc_buffer(ch))
  486. return;
  487. ch->ccw[1].count = ch->max_bufsize;
  488. fsm_newstate(fi, CTC_STATE_RXIDLE);
  489. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  490. (unsigned long)ch, 0xff, 0);
  491. if (rc != 0) {
  492. fsm_newstate(fi, CTC_STATE_RXINIT);
  493. ctcm_ccw_check_rc(ch, rc, "initial RX");
  494. } else
  495. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  496. } else {
  497. CTCM_PR_DEBUG("%s: %s: Initial RX count %d not %d\n",
  498. __func__, dev->name,
  499. buflen, CTCM_INITIAL_BLOCKLEN);
  500. chx_firstio(fi, event, arg);
  501. }
  502. }
  503. /**
  504. * Set channel into extended mode.
  505. *
  506. * fi An instance of a channel statemachine.
  507. * event The event, just happened.
  508. * arg Generic pointer, casted from channel * upon call.
  509. */
  510. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg)
  511. {
  512. struct channel *ch = arg;
  513. int rc;
  514. unsigned long saveflags = 0;
  515. int timeout = CTCM_TIME_5_SEC;
  516. fsm_deltimer(&ch->timer);
  517. if (IS_MPC(ch)) {
  518. timeout = 1500;
  519. CTCM_PR_DEBUG("enter %s: cp=%i ch=0x%p id=%s\n",
  520. __func__, smp_processor_id(), ch, ch->id);
  521. }
  522. fsm_addtimer(&ch->timer, timeout, CTC_EVENT_TIMER, ch);
  523. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  524. CTCM_CCW_DUMP((char *)&ch->ccw[6], sizeof(struct ccw1) * 2);
  525. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  526. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  527. /* Such conditional locking is undeterministic in
  528. * static view. => ignore sparse warnings here. */
  529. rc = ccw_device_start(ch->cdev, &ch->ccw[6],
  530. (unsigned long)ch, 0xff, 0);
  531. if (event == CTC_EVENT_TIMER) /* see above comments */
  532. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  533. if (rc != 0) {
  534. fsm_deltimer(&ch->timer);
  535. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  536. ctcm_ccw_check_rc(ch, rc, "set Mode");
  537. } else
  538. ch->retry = 0;
  539. }
  540. /**
  541. * Setup channel.
  542. *
  543. * fi An instance of a channel statemachine.
  544. * event The event, just happened.
  545. * arg Generic pointer, casted from channel * upon call.
  546. */
  547. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg)
  548. {
  549. struct channel *ch = arg;
  550. unsigned long saveflags;
  551. int rc;
  552. CTCM_DBF_TEXT_(SETUP, CTC_DBF_INFO, "%s(%s): %s",
  553. CTCM_FUNTAIL, ch->id,
  554. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ? "RX" : "TX");
  555. if (ch->trans_skb != NULL) {
  556. clear_normalized_cda(&ch->ccw[1]);
  557. dev_kfree_skb(ch->trans_skb);
  558. ch->trans_skb = NULL;
  559. }
  560. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  561. ch->ccw[1].cmd_code = CCW_CMD_READ;
  562. ch->ccw[1].flags = CCW_FLAG_SLI;
  563. ch->ccw[1].count = 0;
  564. } else {
  565. ch->ccw[1].cmd_code = CCW_CMD_WRITE;
  566. ch->ccw[1].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  567. ch->ccw[1].count = 0;
  568. }
  569. if (ctcm_checkalloc_buffer(ch)) {
  570. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  571. "%s(%s): %s trans_skb alloc delayed "
  572. "until first transfer",
  573. CTCM_FUNTAIL, ch->id,
  574. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ?
  575. "RX" : "TX");
  576. }
  577. ch->ccw[0].cmd_code = CCW_CMD_PREPARE;
  578. ch->ccw[0].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  579. ch->ccw[0].count = 0;
  580. ch->ccw[0].cda = 0;
  581. ch->ccw[2].cmd_code = CCW_CMD_NOOP; /* jointed CE + DE */
  582. ch->ccw[2].flags = CCW_FLAG_SLI;
  583. ch->ccw[2].count = 0;
  584. ch->ccw[2].cda = 0;
  585. memcpy(&ch->ccw[3], &ch->ccw[0], sizeof(struct ccw1) * 3);
  586. ch->ccw[4].cda = 0;
  587. ch->ccw[4].flags &= ~CCW_FLAG_IDA;
  588. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  589. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  590. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  591. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  592. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  593. if (rc != 0) {
  594. if (rc != -EBUSY)
  595. fsm_deltimer(&ch->timer);
  596. ctcm_ccw_check_rc(ch, rc, "initial HaltIO");
  597. }
  598. }
  599. /**
  600. * Shutdown a channel.
  601. *
  602. * fi An instance of a channel statemachine.
  603. * event The event, just happened.
  604. * arg Generic pointer, casted from channel * upon call.
  605. */
  606. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg)
  607. {
  608. struct channel *ch = arg;
  609. unsigned long saveflags = 0;
  610. int rc;
  611. int oldstate;
  612. fsm_deltimer(&ch->timer);
  613. if (IS_MPC(ch))
  614. fsm_deltimer(&ch->sweep_timer);
  615. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  616. if (event == CTC_EVENT_STOP) /* only for STOP not yet locked */
  617. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  618. /* Such conditional locking is undeterministic in
  619. * static view. => ignore sparse warnings here. */
  620. oldstate = fsm_getstate(fi);
  621. fsm_newstate(fi, CTC_STATE_TERM);
  622. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  623. if (event == CTC_EVENT_STOP)
  624. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  625. /* see remark above about conditional locking */
  626. if (rc != 0 && rc != -EBUSY) {
  627. fsm_deltimer(&ch->timer);
  628. if (event != CTC_EVENT_STOP) {
  629. fsm_newstate(fi, oldstate);
  630. ctcm_ccw_check_rc(ch, rc, (char *)__func__);
  631. }
  632. }
  633. }
  634. /**
  635. * Cleanup helper for chx_fail and chx_stopped
  636. * cleanup channels queue and notify interface statemachine.
  637. *
  638. * fi An instance of a channel statemachine.
  639. * state The next state (depending on caller).
  640. * ch The channel to operate on.
  641. */
  642. static void ctcm_chx_cleanup(fsm_instance *fi, int state,
  643. struct channel *ch)
  644. {
  645. struct net_device *dev = ch->netdev;
  646. struct ctcm_priv *priv = dev->ml_priv;
  647. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  648. "%s(%s): %s[%d]\n",
  649. CTCM_FUNTAIL, dev->name, ch->id, state);
  650. fsm_deltimer(&ch->timer);
  651. if (IS_MPC(ch))
  652. fsm_deltimer(&ch->sweep_timer);
  653. fsm_newstate(fi, state);
  654. if (state == CTC_STATE_STOPPED && ch->trans_skb != NULL) {
  655. clear_normalized_cda(&ch->ccw[1]);
  656. dev_kfree_skb_any(ch->trans_skb);
  657. ch->trans_skb = NULL;
  658. }
  659. ch->th_seg = 0x00;
  660. ch->th_seq_num = 0x00;
  661. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  662. skb_queue_purge(&ch->io_queue);
  663. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  664. } else {
  665. ctcm_purge_skb_queue(&ch->io_queue);
  666. if (IS_MPC(ch))
  667. ctcm_purge_skb_queue(&ch->sweep_queue);
  668. spin_lock(&ch->collect_lock);
  669. ctcm_purge_skb_queue(&ch->collect_queue);
  670. ch->collect_len = 0;
  671. spin_unlock(&ch->collect_lock);
  672. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  673. }
  674. }
  675. /**
  676. * A channel has successfully been halted.
  677. * Cleanup it's queue and notify interface statemachine.
  678. *
  679. * fi An instance of a channel statemachine.
  680. * event The event, just happened.
  681. * arg Generic pointer, casted from channel * upon call.
  682. */
  683. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg)
  684. {
  685. ctcm_chx_cleanup(fi, CTC_STATE_STOPPED, arg);
  686. }
  687. /**
  688. * A stop command from device statemachine arrived and we are in
  689. * not operational mode. Set state to stopped.
  690. *
  691. * fi An instance of a channel statemachine.
  692. * event The event, just happened.
  693. * arg Generic pointer, casted from channel * upon call.
  694. */
  695. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg)
  696. {
  697. fsm_newstate(fi, CTC_STATE_STOPPED);
  698. }
  699. /**
  700. * A machine check for no path, not operational status or gone device has
  701. * happened.
  702. * Cleanup queue and notify interface statemachine.
  703. *
  704. * fi An instance of a channel statemachine.
  705. * event The event, just happened.
  706. * arg Generic pointer, casted from channel * upon call.
  707. */
  708. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg)
  709. {
  710. ctcm_chx_cleanup(fi, CTC_STATE_NOTOP, arg);
  711. }
  712. /**
  713. * Handle error during setup of channel.
  714. *
  715. * fi An instance of a channel statemachine.
  716. * event The event, just happened.
  717. * arg Generic pointer, casted from channel * upon call.
  718. */
  719. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg)
  720. {
  721. struct channel *ch = arg;
  722. struct net_device *dev = ch->netdev;
  723. struct ctcm_priv *priv = dev->ml_priv;
  724. /*
  725. * Special case: Got UC_RCRESET on setmode.
  726. * This means that remote side isn't setup. In this case
  727. * simply retry after some 10 secs...
  728. */
  729. if ((fsm_getstate(fi) == CTC_STATE_SETUPWAIT) &&
  730. ((event == CTC_EVENT_UC_RCRESET) ||
  731. (event == CTC_EVENT_UC_RSRESET))) {
  732. fsm_newstate(fi, CTC_STATE_STARTRETRY);
  733. fsm_deltimer(&ch->timer);
  734. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  735. if (!IS_MPC(ch) &&
  736. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)) {
  737. int rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  738. if (rc != 0)
  739. ctcm_ccw_check_rc(ch, rc,
  740. "HaltIO in chx_setuperr");
  741. }
  742. return;
  743. }
  744. CTCM_DBF_TEXT_(ERROR, CTC_DBF_CRIT,
  745. "%s(%s) : %s error during %s channel setup state=%s\n",
  746. CTCM_FUNTAIL, dev->name, ctc_ch_event_names[event],
  747. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ? "RX" : "TX",
  748. fsm_getstate_str(fi));
  749. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  750. fsm_newstate(fi, CTC_STATE_RXERR);
  751. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  752. } else {
  753. fsm_newstate(fi, CTC_STATE_TXERR);
  754. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  755. }
  756. }
  757. /**
  758. * Restart a channel after an error.
  759. *
  760. * fi An instance of a channel statemachine.
  761. * event The event, just happened.
  762. * arg Generic pointer, casted from channel * upon call.
  763. */
  764. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg)
  765. {
  766. struct channel *ch = arg;
  767. struct net_device *dev = ch->netdev;
  768. unsigned long saveflags = 0;
  769. int oldstate;
  770. int rc;
  771. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  772. "%s: %s[%d] of %s\n",
  773. CTCM_FUNTAIL, ch->id, event, dev->name);
  774. fsm_deltimer(&ch->timer);
  775. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  776. oldstate = fsm_getstate(fi);
  777. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  778. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  779. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  780. /* Such conditional locking is a known problem for
  781. * sparse because its undeterministic in static view.
  782. * Warnings should be ignored here. */
  783. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  784. if (event == CTC_EVENT_TIMER)
  785. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  786. if (rc != 0) {
  787. if (rc != -EBUSY) {
  788. fsm_deltimer(&ch->timer);
  789. fsm_newstate(fi, oldstate);
  790. }
  791. ctcm_ccw_check_rc(ch, rc, "HaltIO in ctcm_chx_restart");
  792. }
  793. }
  794. /**
  795. * Handle error during RX initial handshake (exchange of
  796. * 0-length block header)
  797. *
  798. * fi An instance of a channel statemachine.
  799. * event The event, just happened.
  800. * arg Generic pointer, casted from channel * upon call.
  801. */
  802. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg)
  803. {
  804. struct channel *ch = arg;
  805. struct net_device *dev = ch->netdev;
  806. struct ctcm_priv *priv = dev->ml_priv;
  807. if (event == CTC_EVENT_TIMER) {
  808. if (!IS_MPCDEV(dev))
  809. /* TODO : check if MPC deletes timer somewhere */
  810. fsm_deltimer(&ch->timer);
  811. if (ch->retry++ < 3)
  812. ctcm_chx_restart(fi, event, arg);
  813. else {
  814. fsm_newstate(fi, CTC_STATE_RXERR);
  815. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  816. }
  817. } else {
  818. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  819. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  820. ctc_ch_event_names[event], fsm_getstate_str(fi));
  821. dev_warn(&dev->dev,
  822. "Initialization failed with RX/TX init handshake "
  823. "error %s\n", ctc_ch_event_names[event]);
  824. }
  825. }
  826. /**
  827. * Notify device statemachine if we gave up initialization
  828. * of RX channel.
  829. *
  830. * fi An instance of a channel statemachine.
  831. * event The event, just happened.
  832. * arg Generic pointer, casted from channel * upon call.
  833. */
  834. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg)
  835. {
  836. struct channel *ch = arg;
  837. struct net_device *dev = ch->netdev;
  838. struct ctcm_priv *priv = dev->ml_priv;
  839. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  840. "%s(%s): RX %s busy, init. fail",
  841. CTCM_FUNTAIL, dev->name, ch->id);
  842. fsm_newstate(fi, CTC_STATE_RXERR);
  843. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  844. }
  845. /**
  846. * Handle RX Unit check remote reset (remote disconnected)
  847. *
  848. * fi An instance of a channel statemachine.
  849. * event The event, just happened.
  850. * arg Generic pointer, casted from channel * upon call.
  851. */
  852. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg)
  853. {
  854. struct channel *ch = arg;
  855. struct channel *ch2;
  856. struct net_device *dev = ch->netdev;
  857. struct ctcm_priv *priv = dev->ml_priv;
  858. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  859. "%s: %s: remote disconnect - re-init ...",
  860. CTCM_FUNTAIL, dev->name);
  861. fsm_deltimer(&ch->timer);
  862. /*
  863. * Notify device statemachine
  864. */
  865. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  866. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  867. fsm_newstate(fi, CTC_STATE_DTERM);
  868. ch2 = priv->channel[CTCM_WRITE];
  869. fsm_newstate(ch2->fsm, CTC_STATE_DTERM);
  870. ccw_device_halt(ch->cdev, (unsigned long)ch);
  871. ccw_device_halt(ch2->cdev, (unsigned long)ch2);
  872. }
  873. /**
  874. * Handle error during TX channel initialization.
  875. *
  876. * fi An instance of a channel statemachine.
  877. * event The event, just happened.
  878. * arg Generic pointer, casted from channel * upon call.
  879. */
  880. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg)
  881. {
  882. struct channel *ch = arg;
  883. struct net_device *dev = ch->netdev;
  884. struct ctcm_priv *priv = dev->ml_priv;
  885. if (event == CTC_EVENT_TIMER) {
  886. fsm_deltimer(&ch->timer);
  887. if (ch->retry++ < 3)
  888. ctcm_chx_restart(fi, event, arg);
  889. else {
  890. fsm_newstate(fi, CTC_STATE_TXERR);
  891. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  892. }
  893. } else {
  894. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  895. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  896. ctc_ch_event_names[event], fsm_getstate_str(fi));
  897. dev_warn(&dev->dev,
  898. "Initialization failed with RX/TX init handshake "
  899. "error %s\n", ctc_ch_event_names[event]);
  900. }
  901. }
  902. /**
  903. * Handle TX timeout by retrying operation.
  904. *
  905. * fi An instance of a channel statemachine.
  906. * event The event, just happened.
  907. * arg Generic pointer, casted from channel * upon call.
  908. */
  909. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg)
  910. {
  911. struct channel *ch = arg;
  912. struct net_device *dev = ch->netdev;
  913. struct ctcm_priv *priv = dev->ml_priv;
  914. struct sk_buff *skb;
  915. CTCM_PR_DEBUG("Enter: %s: cp=%i ch=0x%p id=%s\n",
  916. __func__, smp_processor_id(), ch, ch->id);
  917. fsm_deltimer(&ch->timer);
  918. if (ch->retry++ > 3) {
  919. struct mpc_group *gptr = priv->mpcg;
  920. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  921. "%s: %s: retries exceeded",
  922. CTCM_FUNTAIL, ch->id);
  923. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  924. /* call restart if not MPC or if MPC and mpcg fsm is ready.
  925. use gptr as mpc indicator */
  926. if (!(gptr && (fsm_getstate(gptr->fsm) != MPCG_STATE_READY)))
  927. ctcm_chx_restart(fi, event, arg);
  928. goto done;
  929. }
  930. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  931. "%s : %s: retry %d",
  932. CTCM_FUNTAIL, ch->id, ch->retry);
  933. skb = skb_peek(&ch->io_queue);
  934. if (skb) {
  935. int rc = 0;
  936. unsigned long saveflags = 0;
  937. clear_normalized_cda(&ch->ccw[4]);
  938. ch->ccw[4].count = skb->len;
  939. if (set_normalized_cda(&ch->ccw[4], skb->data)) {
  940. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  941. "%s: %s: IDAL alloc failed",
  942. CTCM_FUNTAIL, ch->id);
  943. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  944. ctcm_chx_restart(fi, event, arg);
  945. goto done;
  946. }
  947. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  948. if (event == CTC_EVENT_TIMER) /* for TIMER not yet locked */
  949. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  950. /* Such conditional locking is a known problem for
  951. * sparse because its undeterministic in static view.
  952. * Warnings should be ignored here. */
  953. if (do_debug_ccw)
  954. ctcmpc_dumpit((char *)&ch->ccw[3],
  955. sizeof(struct ccw1) * 3);
  956. rc = ccw_device_start(ch->cdev, &ch->ccw[3],
  957. (unsigned long)ch, 0xff, 0);
  958. if (event == CTC_EVENT_TIMER)
  959. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev),
  960. saveflags);
  961. if (rc != 0) {
  962. fsm_deltimer(&ch->timer);
  963. ctcm_ccw_check_rc(ch, rc, "TX in chx_txretry");
  964. ctcm_purge_skb_queue(&ch->io_queue);
  965. }
  966. }
  967. done:
  968. return;
  969. }
  970. /**
  971. * Handle fatal errors during an I/O command.
  972. *
  973. * fi An instance of a channel statemachine.
  974. * event The event, just happened.
  975. * arg Generic pointer, casted from channel * upon call.
  976. */
  977. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg)
  978. {
  979. struct channel *ch = arg;
  980. struct net_device *dev = ch->netdev;
  981. struct ctcm_priv *priv = dev->ml_priv;
  982. int rd = CHANNEL_DIRECTION(ch->flags);
  983. fsm_deltimer(&ch->timer);
  984. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  985. "%s: %s: %s unrecoverable channel error",
  986. CTCM_FUNTAIL, ch->id, rd == CTCM_READ ? "RX" : "TX");
  987. if (IS_MPC(ch)) {
  988. priv->stats.tx_dropped++;
  989. priv->stats.tx_errors++;
  990. }
  991. if (rd == CTCM_READ) {
  992. fsm_newstate(fi, CTC_STATE_RXERR);
  993. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  994. } else {
  995. fsm_newstate(fi, CTC_STATE_TXERR);
  996. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  997. }
  998. }
  999. /*
  1000. * The ctcm statemachine for a channel.
  1001. */
  1002. const fsm_node ch_fsm[] = {
  1003. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  1004. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  1005. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1006. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1007. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  1008. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1009. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1010. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1011. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1012. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1013. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1014. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1015. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1016. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1017. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1018. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1019. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1020. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1021. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1022. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1023. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1024. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, chx_firstio },
  1025. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1026. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1027. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1028. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1029. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1030. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1031. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1032. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, chx_rxidle },
  1033. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1034. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1035. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1036. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1037. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1038. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, chx_firstio },
  1039. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1040. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1041. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1042. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, chx_rx },
  1043. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1044. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1045. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1046. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, chx_rx },
  1047. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1048. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1049. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1050. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1051. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1052. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1053. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1054. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1055. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1056. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1057. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, chx_firstio },
  1058. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1059. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1060. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1061. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1062. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1063. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1064. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1065. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1066. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1067. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1068. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1069. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1070. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1071. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1072. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1073. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1074. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1075. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1076. { CTC_STATE_TX, CTC_EVENT_FINSTAT, chx_txdone },
  1077. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_txretry },
  1078. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_txretry },
  1079. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1080. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1081. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1082. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1083. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1084. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1085. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1086. };
  1087. int ch_fsm_len = ARRAY_SIZE(ch_fsm);
  1088. /*
  1089. * MPC actions for mpc channel statemachine
  1090. * handling of MPC protocol requires extra
  1091. * statemachine and actions which are prefixed ctcmpc_ .
  1092. * The ctc_ch_states and ctc_ch_state_names,
  1093. * ctc_ch_events and ctc_ch_event_names share the ctcm definitions
  1094. * which are expanded by some elements.
  1095. */
  1096. /*
  1097. * Actions for mpc channel statemachine.
  1098. */
  1099. /**
  1100. * Normal data has been send. Free the corresponding
  1101. * skb (it's in io_queue), reset dev->tbusy and
  1102. * revert to idle state.
  1103. *
  1104. * fi An instance of a channel statemachine.
  1105. * event The event, just happened.
  1106. * arg Generic pointer, casted from channel * upon call.
  1107. */
  1108. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg)
  1109. {
  1110. struct channel *ch = arg;
  1111. struct net_device *dev = ch->netdev;
  1112. struct ctcm_priv *priv = dev->ml_priv;
  1113. struct mpc_group *grp = priv->mpcg;
  1114. struct sk_buff *skb;
  1115. int first = 1;
  1116. int i;
  1117. __u32 data_space;
  1118. unsigned long duration;
  1119. struct sk_buff *peekskb;
  1120. int rc;
  1121. struct th_header *header;
  1122. struct pdu *p_header;
  1123. struct timespec done_stamp = current_kernel_time(); /* xtime */
  1124. CTCM_PR_DEBUG("Enter %s: %s cp:%i\n",
  1125. __func__, dev->name, smp_processor_id());
  1126. duration =
  1127. (done_stamp.tv_sec - ch->prof.send_stamp.tv_sec) * 1000000 +
  1128. (done_stamp.tv_nsec - ch->prof.send_stamp.tv_nsec) / 1000;
  1129. if (duration > ch->prof.tx_time)
  1130. ch->prof.tx_time = duration;
  1131. if (ch->irb->scsw.cmd.count != 0)
  1132. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_DEBUG,
  1133. "%s(%s): TX not complete, remaining %d bytes",
  1134. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  1135. fsm_deltimer(&ch->timer);
  1136. while ((skb = skb_dequeue(&ch->io_queue))) {
  1137. priv->stats.tx_packets++;
  1138. priv->stats.tx_bytes += skb->len - TH_HEADER_LENGTH;
  1139. if (first) {
  1140. priv->stats.tx_bytes += 2;
  1141. first = 0;
  1142. }
  1143. atomic_dec(&skb->users);
  1144. dev_kfree_skb_irq(skb);
  1145. }
  1146. spin_lock(&ch->collect_lock);
  1147. clear_normalized_cda(&ch->ccw[4]);
  1148. if ((ch->collect_len <= 0) || (grp->in_sweep != 0)) {
  1149. spin_unlock(&ch->collect_lock);
  1150. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1151. goto done;
  1152. }
  1153. if (ctcm_checkalloc_buffer(ch)) {
  1154. spin_unlock(&ch->collect_lock);
  1155. goto done;
  1156. }
  1157. ch->trans_skb->data = ch->trans_skb_data;
  1158. skb_reset_tail_pointer(ch->trans_skb);
  1159. ch->trans_skb->len = 0;
  1160. if (ch->prof.maxmulti < (ch->collect_len + TH_HEADER_LENGTH))
  1161. ch->prof.maxmulti = ch->collect_len + TH_HEADER_LENGTH;
  1162. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  1163. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  1164. i = 0;
  1165. p_header = NULL;
  1166. data_space = grp->group_max_buflen - TH_HEADER_LENGTH;
  1167. CTCM_PR_DBGDATA("%s: building trans_skb from collect_q"
  1168. " data_space:%04x\n",
  1169. __func__, data_space);
  1170. while ((skb = skb_dequeue(&ch->collect_queue))) {
  1171. memcpy(skb_put(ch->trans_skb, skb->len), skb->data, skb->len);
  1172. p_header = (struct pdu *)
  1173. (skb_tail_pointer(ch->trans_skb) - skb->len);
  1174. p_header->pdu_flag = 0x00;
  1175. if (skb->protocol == ntohs(ETH_P_SNAP))
  1176. p_header->pdu_flag |= 0x60;
  1177. else
  1178. p_header->pdu_flag |= 0x20;
  1179. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1180. __func__, ch->trans_skb->len);
  1181. CTCM_PR_DBGDATA("%s: pdu header and data for up"
  1182. " to 32 bytes sent to vtam\n", __func__);
  1183. CTCM_D3_DUMP((char *)p_header, min_t(int, skb->len, 32));
  1184. ch->collect_len -= skb->len;
  1185. data_space -= skb->len;
  1186. priv->stats.tx_packets++;
  1187. priv->stats.tx_bytes += skb->len;
  1188. atomic_dec(&skb->users);
  1189. dev_kfree_skb_any(skb);
  1190. peekskb = skb_peek(&ch->collect_queue);
  1191. if (peekskb->len > data_space)
  1192. break;
  1193. i++;
  1194. }
  1195. /* p_header points to the last one we handled */
  1196. if (p_header)
  1197. p_header->pdu_flag |= PDU_LAST; /*Say it's the last one*/
  1198. header = kzalloc(TH_HEADER_LENGTH, gfp_type());
  1199. if (!header) {
  1200. spin_unlock(&ch->collect_lock);
  1201. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1202. goto done;
  1203. }
  1204. header->th_ch_flag = TH_HAS_PDU; /* Normal data */
  1205. ch->th_seq_num++;
  1206. header->th_seq_num = ch->th_seq_num;
  1207. CTCM_PR_DBGDATA("%s: ToVTAM_th_seq= %08x\n" ,
  1208. __func__, ch->th_seq_num);
  1209. memcpy(skb_push(ch->trans_skb, TH_HEADER_LENGTH), header,
  1210. TH_HEADER_LENGTH); /* put the TH on the packet */
  1211. kfree(header);
  1212. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1213. __func__, ch->trans_skb->len);
  1214. CTCM_PR_DBGDATA("%s: up-to-50 bytes of trans_skb "
  1215. "data to vtam from collect_q\n", __func__);
  1216. CTCM_D3_DUMP((char *)ch->trans_skb->data,
  1217. min_t(int, ch->trans_skb->len, 50));
  1218. spin_unlock(&ch->collect_lock);
  1219. clear_normalized_cda(&ch->ccw[1]);
  1220. CTCM_PR_DBGDATA("ccwcda=0x%p data=0x%p\n",
  1221. (void *)(unsigned long)ch->ccw[1].cda,
  1222. ch->trans_skb->data);
  1223. ch->ccw[1].count = ch->max_bufsize;
  1224. if (set_normalized_cda(&ch->ccw[1], ch->trans_skb->data)) {
  1225. dev_kfree_skb_any(ch->trans_skb);
  1226. ch->trans_skb = NULL;
  1227. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_ERROR,
  1228. "%s: %s: IDAL alloc failed",
  1229. CTCM_FUNTAIL, ch->id);
  1230. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1231. return;
  1232. }
  1233. CTCM_PR_DBGDATA("ccwcda=0x%p data=0x%p\n",
  1234. (void *)(unsigned long)ch->ccw[1].cda,
  1235. ch->trans_skb->data);
  1236. ch->ccw[1].count = ch->trans_skb->len;
  1237. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  1238. ch->prof.send_stamp = current_kernel_time(); /* xtime */
  1239. if (do_debug_ccw)
  1240. ctcmpc_dumpit((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1241. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1242. (unsigned long)ch, 0xff, 0);
  1243. ch->prof.doios_multi++;
  1244. if (rc != 0) {
  1245. priv->stats.tx_dropped += i;
  1246. priv->stats.tx_errors += i;
  1247. fsm_deltimer(&ch->timer);
  1248. ctcm_ccw_check_rc(ch, rc, "chained TX");
  1249. }
  1250. done:
  1251. ctcm_clear_busy(dev);
  1252. return;
  1253. }
  1254. /**
  1255. * Got normal data, check for sanity, queue it up, allocate new buffer
  1256. * trigger bottom half, and initiate next read.
  1257. *
  1258. * fi An instance of a channel statemachine.
  1259. * event The event, just happened.
  1260. * arg Generic pointer, casted from channel * upon call.
  1261. */
  1262. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg)
  1263. {
  1264. struct channel *ch = arg;
  1265. struct net_device *dev = ch->netdev;
  1266. struct ctcm_priv *priv = dev->ml_priv;
  1267. struct mpc_group *grp = priv->mpcg;
  1268. struct sk_buff *skb = ch->trans_skb;
  1269. struct sk_buff *new_skb;
  1270. unsigned long saveflags = 0; /* avoids compiler warning */
  1271. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  1272. CTCM_PR_DEBUG("%s: %s: cp:%i %s maxbuf : %04x, len: %04x\n",
  1273. CTCM_FUNTAIL, dev->name, smp_processor_id(),
  1274. ch->id, ch->max_bufsize, len);
  1275. fsm_deltimer(&ch->timer);
  1276. if (skb == NULL) {
  1277. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1278. "%s(%s): TRANS_SKB = NULL",
  1279. CTCM_FUNTAIL, dev->name);
  1280. goto again;
  1281. }
  1282. if (len < TH_HEADER_LENGTH) {
  1283. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1284. "%s(%s): packet length %d to short",
  1285. CTCM_FUNTAIL, dev->name, len);
  1286. priv->stats.rx_dropped++;
  1287. priv->stats.rx_length_errors++;
  1288. } else {
  1289. /* must have valid th header or game over */
  1290. __u32 block_len = len;
  1291. len = TH_HEADER_LENGTH + XID2_LENGTH + 4;
  1292. new_skb = __dev_alloc_skb(ch->max_bufsize, GFP_ATOMIC);
  1293. if (new_skb == NULL) {
  1294. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1295. "%s(%d): skb allocation failed",
  1296. CTCM_FUNTAIL, dev->name);
  1297. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1298. goto again;
  1299. }
  1300. switch (fsm_getstate(grp->fsm)) {
  1301. case MPCG_STATE_RESET:
  1302. case MPCG_STATE_INOP:
  1303. dev_kfree_skb_any(new_skb);
  1304. break;
  1305. case MPCG_STATE_FLOWC:
  1306. case MPCG_STATE_READY:
  1307. memcpy(skb_put(new_skb, block_len),
  1308. skb->data, block_len);
  1309. skb_queue_tail(&ch->io_queue, new_skb);
  1310. tasklet_schedule(&ch->ch_tasklet);
  1311. break;
  1312. default:
  1313. memcpy(skb_put(new_skb, len), skb->data, len);
  1314. skb_queue_tail(&ch->io_queue, new_skb);
  1315. tasklet_hi_schedule(&ch->ch_tasklet);
  1316. break;
  1317. }
  1318. }
  1319. again:
  1320. switch (fsm_getstate(grp->fsm)) {
  1321. int rc, dolock;
  1322. case MPCG_STATE_FLOWC:
  1323. case MPCG_STATE_READY:
  1324. if (ctcm_checkalloc_buffer(ch))
  1325. break;
  1326. ch->trans_skb->data = ch->trans_skb_data;
  1327. skb_reset_tail_pointer(ch->trans_skb);
  1328. ch->trans_skb->len = 0;
  1329. ch->ccw[1].count = ch->max_bufsize;
  1330. if (do_debug_ccw)
  1331. ctcmpc_dumpit((char *)&ch->ccw[0],
  1332. sizeof(struct ccw1) * 3);
  1333. dolock = !in_irq();
  1334. if (dolock)
  1335. spin_lock_irqsave(
  1336. get_ccwdev_lock(ch->cdev), saveflags);
  1337. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1338. (unsigned long)ch, 0xff, 0);
  1339. if (dolock) /* see remark about conditional locking */
  1340. spin_unlock_irqrestore(
  1341. get_ccwdev_lock(ch->cdev), saveflags);
  1342. if (rc != 0)
  1343. ctcm_ccw_check_rc(ch, rc, "normal RX");
  1344. default:
  1345. break;
  1346. }
  1347. CTCM_PR_DEBUG("Exit %s: %s, ch=0x%p, id=%s\n",
  1348. __func__, dev->name, ch, ch->id);
  1349. }
  1350. /**
  1351. * Initialize connection by sending a __u16 of value 0.
  1352. *
  1353. * fi An instance of a channel statemachine.
  1354. * event The event, just happened.
  1355. * arg Generic pointer, casted from channel * upon call.
  1356. */
  1357. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg)
  1358. {
  1359. struct channel *ch = arg;
  1360. struct net_device *dev = ch->netdev;
  1361. struct ctcm_priv *priv = dev->ml_priv;
  1362. struct mpc_group *gptr = priv->mpcg;
  1363. CTCM_PR_DEBUG("Enter %s: id=%s, ch=0x%p\n",
  1364. __func__, ch->id, ch);
  1365. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_INFO,
  1366. "%s: %s: chstate:%i, grpstate:%i, prot:%i\n",
  1367. CTCM_FUNTAIL, ch->id, fsm_getstate(fi),
  1368. fsm_getstate(gptr->fsm), ch->protocol);
  1369. if (fsm_getstate(fi) == CTC_STATE_TXIDLE)
  1370. MPC_DBF_DEV_NAME(TRACE, dev, "remote side issued READ? ");
  1371. fsm_deltimer(&ch->timer);
  1372. if (ctcm_checkalloc_buffer(ch))
  1373. goto done;
  1374. switch (fsm_getstate(fi)) {
  1375. case CTC_STATE_STARTRETRY:
  1376. case CTC_STATE_SETUPWAIT:
  1377. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  1378. ctcmpc_chx_rxidle(fi, event, arg);
  1379. } else {
  1380. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1381. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  1382. }
  1383. goto done;
  1384. default:
  1385. break;
  1386. }
  1387. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)
  1388. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  1389. done:
  1390. CTCM_PR_DEBUG("Exit %s: id=%s, ch=0x%p\n",
  1391. __func__, ch->id, ch);
  1392. return;
  1393. }
  1394. /**
  1395. * Got initial data, check it. If OK,
  1396. * notify device statemachine that we are up and
  1397. * running.
  1398. *
  1399. * fi An instance of a channel statemachine.
  1400. * event The event, just happened.
  1401. * arg Generic pointer, casted from channel * upon call.
  1402. */
  1403. void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg)
  1404. {
  1405. struct channel *ch = arg;
  1406. struct net_device *dev = ch->netdev;
  1407. struct ctcm_priv *priv = dev->ml_priv;
  1408. struct mpc_group *grp = priv->mpcg;
  1409. int rc;
  1410. unsigned long saveflags = 0; /* avoids compiler warning */
  1411. fsm_deltimer(&ch->timer);
  1412. CTCM_PR_DEBUG("%s: %s: %s: cp:%i, chstate:%i grpstate:%i\n",
  1413. __func__, ch->id, dev->name, smp_processor_id(),
  1414. fsm_getstate(fi), fsm_getstate(grp->fsm));
  1415. fsm_newstate(fi, CTC_STATE_RXIDLE);
  1416. /* XID processing complete */
  1417. switch (fsm_getstate(grp->fsm)) {
  1418. case MPCG_STATE_FLOWC:
  1419. case MPCG_STATE_READY:
  1420. if (ctcm_checkalloc_buffer(ch))
  1421. goto done;
  1422. ch->trans_skb->data = ch->trans_skb_data;
  1423. skb_reset_tail_pointer(ch->trans_skb);
  1424. ch->trans_skb->len = 0;
  1425. ch->ccw[1].count = ch->max_bufsize;
  1426. CTCM_CCW_DUMP((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1427. if (event == CTC_EVENT_START)
  1428. /* see remark about conditional locking */
  1429. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  1430. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1431. (unsigned long)ch, 0xff, 0);
  1432. if (event == CTC_EVENT_START)
  1433. spin_unlock_irqrestore(
  1434. get_ccwdev_lock(ch->cdev), saveflags);
  1435. if (rc != 0) {
  1436. fsm_newstate(fi, CTC_STATE_RXINIT);
  1437. ctcm_ccw_check_rc(ch, rc, "initial RX");
  1438. goto done;
  1439. }
  1440. break;
  1441. default:
  1442. break;
  1443. }
  1444. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  1445. done:
  1446. return;
  1447. }
  1448. /*
  1449. * ctcmpc channel FSM action
  1450. * called from several points in ctcmpc_ch_fsm
  1451. * ctcmpc only
  1452. */
  1453. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg)
  1454. {
  1455. struct channel *ch = arg;
  1456. struct net_device *dev = ch->netdev;
  1457. struct ctcm_priv *priv = dev->ml_priv;
  1458. struct mpc_group *grp = priv->mpcg;
  1459. CTCM_PR_DEBUG("%s(%s): %s(ch=0x%p), cp=%i, ChStat:%s, GrpStat:%s\n",
  1460. __func__, dev->name, ch->id, ch, smp_processor_id(),
  1461. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1462. switch (fsm_getstate(grp->fsm)) {
  1463. case MPCG_STATE_XID2INITW:
  1464. /* ok..start yside xid exchanges */
  1465. if (!ch->in_mpcgroup)
  1466. break;
  1467. if (fsm_getstate(ch->fsm) == CH_XID0_PENDING) {
  1468. fsm_deltimer(&grp->timer);
  1469. fsm_addtimer(&grp->timer,
  1470. MPC_XID_TIMEOUT_VALUE,
  1471. MPCG_EVENT_TIMER, dev);
  1472. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1473. } else if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1474. /* attn rcvd before xid0 processed via bh */
  1475. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1476. break;
  1477. case MPCG_STATE_XID2INITX:
  1478. case MPCG_STATE_XID0IOWAIT:
  1479. case MPCG_STATE_XID0IOWAIX:
  1480. /* attn rcvd before xid0 processed on ch
  1481. but mid-xid0 processing for group */
  1482. if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1483. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1484. break;
  1485. case MPCG_STATE_XID7INITW:
  1486. case MPCG_STATE_XID7INITX:
  1487. case MPCG_STATE_XID7INITI:
  1488. case MPCG_STATE_XID7INITZ:
  1489. switch (fsm_getstate(ch->fsm)) {
  1490. case CH_XID7_PENDING:
  1491. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1492. break;
  1493. case CH_XID7_PENDING2:
  1494. fsm_newstate(ch->fsm, CH_XID7_PENDING3);
  1495. break;
  1496. }
  1497. fsm_event(grp->fsm, MPCG_EVENT_XID7DONE, dev);
  1498. break;
  1499. }
  1500. return;
  1501. }
  1502. /*
  1503. * ctcmpc channel FSM action
  1504. * called from one point in ctcmpc_ch_fsm
  1505. * ctcmpc only
  1506. */
  1507. static void ctcmpc_chx_attnbusy(fsm_instance *fsm, int event, void *arg)
  1508. {
  1509. struct channel *ch = arg;
  1510. struct net_device *dev = ch->netdev;
  1511. struct ctcm_priv *priv = dev->ml_priv;
  1512. struct mpc_group *grp = priv->mpcg;
  1513. CTCM_PR_DEBUG("%s(%s): %s\n ChState:%s GrpState:%s\n",
  1514. __func__, dev->name, ch->id,
  1515. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1516. fsm_deltimer(&ch->timer);
  1517. switch (fsm_getstate(grp->fsm)) {
  1518. case MPCG_STATE_XID0IOWAIT:
  1519. /* vtam wants to be primary.start yside xid exchanges*/
  1520. /* only receive one attn-busy at a time so must not */
  1521. /* change state each time */
  1522. grp->changed_side = 1;
  1523. fsm_newstate(grp->fsm, MPCG_STATE_XID2INITW);
  1524. break;
  1525. case MPCG_STATE_XID2INITW:
  1526. if (grp->changed_side == 1) {
  1527. grp->changed_side = 2;
  1528. break;
  1529. }
  1530. /* process began via call to establish_conn */
  1531. /* so must report failure instead of reverting */
  1532. /* back to ready-for-xid passive state */
  1533. if (grp->estconnfunc)
  1534. goto done;
  1535. /* this attnbusy is NOT the result of xside xid */
  1536. /* collisions so yside must have been triggered */
  1537. /* by an ATTN that was not intended to start XID */
  1538. /* processing. Revert back to ready-for-xid and */
  1539. /* wait for ATTN interrupt to signal xid start */
  1540. if (fsm_getstate(ch->fsm) == CH_XID0_INPROGRESS) {
  1541. fsm_newstate(ch->fsm, CH_XID0_PENDING) ;
  1542. fsm_deltimer(&grp->timer);
  1543. goto done;
  1544. }
  1545. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1546. goto done;
  1547. case MPCG_STATE_XID2INITX:
  1548. /* XID2 was received before ATTN Busy for second
  1549. channel.Send yside xid for second channel.
  1550. */
  1551. if (grp->changed_side == 1) {
  1552. grp->changed_side = 2;
  1553. break;
  1554. }
  1555. case MPCG_STATE_XID0IOWAIX:
  1556. case MPCG_STATE_XID7INITW:
  1557. case MPCG_STATE_XID7INITX:
  1558. case MPCG_STATE_XID7INITI:
  1559. case MPCG_STATE_XID7INITZ:
  1560. default:
  1561. /* multiple attn-busy indicates too out-of-sync */
  1562. /* and they are certainly not being received as part */
  1563. /* of valid mpc group negotiations.. */
  1564. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1565. goto done;
  1566. }
  1567. if (grp->changed_side == 1) {
  1568. fsm_deltimer(&grp->timer);
  1569. fsm_addtimer(&grp->timer, MPC_XID_TIMEOUT_VALUE,
  1570. MPCG_EVENT_TIMER, dev);
  1571. }
  1572. if (ch->in_mpcgroup)
  1573. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1574. else
  1575. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1576. "%s(%s): channel %s not added to group",
  1577. CTCM_FUNTAIL, dev->name, ch->id);
  1578. done:
  1579. return;
  1580. }
  1581. /*
  1582. * ctcmpc channel FSM action
  1583. * called from several points in ctcmpc_ch_fsm
  1584. * ctcmpc only
  1585. */
  1586. static void ctcmpc_chx_resend(fsm_instance *fsm, int event, void *arg)
  1587. {
  1588. struct channel *ch = arg;
  1589. struct net_device *dev = ch->netdev;
  1590. struct ctcm_priv *priv = dev->ml_priv;
  1591. struct mpc_group *grp = priv->mpcg;
  1592. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1593. return;
  1594. }
  1595. /*
  1596. * ctcmpc channel FSM action
  1597. * called from several points in ctcmpc_ch_fsm
  1598. * ctcmpc only
  1599. */
  1600. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg)
  1601. {
  1602. struct channel *ach = arg;
  1603. struct net_device *dev = ach->netdev;
  1604. struct ctcm_priv *priv = dev->ml_priv;
  1605. struct mpc_group *grp = priv->mpcg;
  1606. struct channel *wch = priv->channel[CTCM_WRITE];
  1607. struct channel *rch = priv->channel[CTCM_READ];
  1608. struct sk_buff *skb;
  1609. struct th_sweep *header;
  1610. int rc = 0;
  1611. unsigned long saveflags = 0;
  1612. CTCM_PR_DEBUG("ctcmpc enter: %s(): cp=%i ch=0x%p id=%s\n",
  1613. __func__, smp_processor_id(), ach, ach->id);
  1614. if (grp->in_sweep == 0)
  1615. goto done;
  1616. CTCM_PR_DBGDATA("%s: 1: ToVTAM_th_seq= %08x\n" ,
  1617. __func__, wch->th_seq_num);
  1618. CTCM_PR_DBGDATA("%s: 1: FromVTAM_th_seq= %08x\n" ,
  1619. __func__, rch->th_seq_num);
  1620. if (fsm_getstate(wch->fsm) != CTC_STATE_TXIDLE) {
  1621. /* give the previous IO time to complete */
  1622. fsm_addtimer(&wch->sweep_timer,
  1623. 200, CTC_EVENT_RSWEEP_TIMER, wch);
  1624. goto done;
  1625. }
  1626. skb = skb_dequeue(&wch->sweep_queue);
  1627. if (!skb)
  1628. goto done;
  1629. if (set_normalized_cda(&wch->ccw[4], skb->data)) {
  1630. grp->in_sweep = 0;
  1631. ctcm_clear_busy_do(dev);
  1632. dev_kfree_skb_any(skb);
  1633. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1634. goto done;
  1635. } else {
  1636. atomic_inc(&skb->users);
  1637. skb_queue_tail(&wch->io_queue, skb);
  1638. }
  1639. /* send out the sweep */
  1640. wch->ccw[4].count = skb->len;
  1641. header = (struct th_sweep *)skb->data;
  1642. switch (header->th.th_ch_flag) {
  1643. case TH_SWEEP_REQ:
  1644. grp->sweep_req_pend_num--;
  1645. break;
  1646. case TH_SWEEP_RESP:
  1647. grp->sweep_rsp_pend_num--;
  1648. break;
  1649. }
  1650. header->sw.th_last_seq = wch->th_seq_num;
  1651. CTCM_CCW_DUMP((char *)&wch->ccw[3], sizeof(struct ccw1) * 3);
  1652. CTCM_PR_DBGDATA("%s: sweep packet\n", __func__);
  1653. CTCM_D3_DUMP((char *)header, TH_SWEEP_LENGTH);
  1654. fsm_addtimer(&wch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, wch);
  1655. fsm_newstate(wch->fsm, CTC_STATE_TX);
  1656. spin_lock_irqsave(get_ccwdev_lock(wch->cdev), saveflags);
  1657. wch->prof.send_stamp = current_kernel_time(); /* xtime */
  1658. rc = ccw_device_start(wch->cdev, &wch->ccw[3],
  1659. (unsigned long) wch, 0xff, 0);
  1660. spin_unlock_irqrestore(get_ccwdev_lock(wch->cdev), saveflags);
  1661. if ((grp->sweep_req_pend_num == 0) &&
  1662. (grp->sweep_rsp_pend_num == 0)) {
  1663. grp->in_sweep = 0;
  1664. rch->th_seq_num = 0x00;
  1665. wch->th_seq_num = 0x00;
  1666. ctcm_clear_busy_do(dev);
  1667. }
  1668. CTCM_PR_DBGDATA("%s: To-/From-VTAM_th_seq = %08x/%08x\n" ,
  1669. __func__, wch->th_seq_num, rch->th_seq_num);
  1670. if (rc != 0)
  1671. ctcm_ccw_check_rc(wch, rc, "send sweep");
  1672. done:
  1673. return;
  1674. }
  1675. /*
  1676. * The ctcmpc statemachine for a channel.
  1677. */
  1678. const fsm_node ctcmpc_ch_fsm[] = {
  1679. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  1680. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  1681. { CTC_STATE_STOPPED, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1682. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1683. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1684. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  1685. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1686. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1687. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1688. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1689. { CTC_STATE_NOTOP, CTC_EVENT_UC_RCRESET, ctcm_chx_stop },
  1690. { CTC_STATE_NOTOP, CTC_EVENT_UC_RSRESET, ctcm_chx_stop },
  1691. { CTC_STATE_NOTOP, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1692. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1693. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1694. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1695. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1696. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1697. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1698. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1699. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1700. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1701. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1702. { CTC_STATE_STARTRETRY, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1703. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1704. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1705. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1706. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1707. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1708. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1709. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1710. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1711. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1712. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1713. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, ctcmpc_chx_rxidle },
  1714. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1715. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1716. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1717. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1718. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1719. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, ctcmpc_chx_firstio },
  1720. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1721. { CH_XID0_PENDING, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1722. { CH_XID0_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1723. { CH_XID0_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1724. { CH_XID0_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1725. { CH_XID0_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1726. { CH_XID0_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1727. { CH_XID0_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1728. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1729. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1730. { CH_XID0_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1731. { CH_XID0_INPROGRESS, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1732. { CH_XID0_INPROGRESS, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1733. { CH_XID0_INPROGRESS, CTC_EVENT_STOP, ctcm_chx_haltio },
  1734. { CH_XID0_INPROGRESS, CTC_EVENT_START, ctcm_action_nop },
  1735. { CH_XID0_INPROGRESS, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1736. { CH_XID0_INPROGRESS, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1737. { CH_XID0_INPROGRESS, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1738. { CH_XID0_INPROGRESS, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1739. { CH_XID0_INPROGRESS, CTC_EVENT_ATTNBUSY, ctcmpc_chx_attnbusy },
  1740. { CH_XID0_INPROGRESS, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1741. { CH_XID0_INPROGRESS, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1742. { CH_XID7_PENDING, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1743. { CH_XID7_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1744. { CH_XID7_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1745. { CH_XID7_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1746. { CH_XID7_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1747. { CH_XID7_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1748. { CH_XID7_PENDING, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1749. { CH_XID7_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1750. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1751. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1752. { CH_XID7_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1753. { CH_XID7_PENDING, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1754. { CH_XID7_PENDING, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1755. { CH_XID7_PENDING1, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1756. { CH_XID7_PENDING1, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1757. { CH_XID7_PENDING1, CTC_EVENT_STOP, ctcm_chx_haltio },
  1758. { CH_XID7_PENDING1, CTC_EVENT_START, ctcm_action_nop },
  1759. { CH_XID7_PENDING1, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1760. { CH_XID7_PENDING1, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1761. { CH_XID7_PENDING1, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1762. { CH_XID7_PENDING1, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1763. { CH_XID7_PENDING1, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1764. { CH_XID7_PENDING1, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1765. { CH_XID7_PENDING1, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1766. { CH_XID7_PENDING1, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1767. { CH_XID7_PENDING2, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1768. { CH_XID7_PENDING2, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1769. { CH_XID7_PENDING2, CTC_EVENT_STOP, ctcm_chx_haltio },
  1770. { CH_XID7_PENDING2, CTC_EVENT_START, ctcm_action_nop },
  1771. { CH_XID7_PENDING2, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1772. { CH_XID7_PENDING2, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1773. { CH_XID7_PENDING2, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1774. { CH_XID7_PENDING2, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1775. { CH_XID7_PENDING2, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1776. { CH_XID7_PENDING2, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1777. { CH_XID7_PENDING2, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1778. { CH_XID7_PENDING2, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1779. { CH_XID7_PENDING3, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1780. { CH_XID7_PENDING3, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1781. { CH_XID7_PENDING3, CTC_EVENT_STOP, ctcm_chx_haltio },
  1782. { CH_XID7_PENDING3, CTC_EVENT_START, ctcm_action_nop },
  1783. { CH_XID7_PENDING3, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1784. { CH_XID7_PENDING3, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1785. { CH_XID7_PENDING3, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1786. { CH_XID7_PENDING3, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1787. { CH_XID7_PENDING3, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1788. { CH_XID7_PENDING3, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1789. { CH_XID7_PENDING3, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1790. { CH_XID7_PENDING3, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1791. { CH_XID7_PENDING4, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1792. { CH_XID7_PENDING4, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1793. { CH_XID7_PENDING4, CTC_EVENT_STOP, ctcm_chx_haltio },
  1794. { CH_XID7_PENDING4, CTC_EVENT_START, ctcm_action_nop },
  1795. { CH_XID7_PENDING4, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1796. { CH_XID7_PENDING4, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1797. { CH_XID7_PENDING4, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1798. { CH_XID7_PENDING4, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1799. { CH_XID7_PENDING4, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1800. { CH_XID7_PENDING4, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1801. { CH_XID7_PENDING4, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1802. { CH_XID7_PENDING4, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1803. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1804. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1805. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1806. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1807. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1808. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1809. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1810. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1811. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1812. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1813. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1814. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1815. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1816. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1817. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1818. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1819. { CTC_STATE_TXINIT, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1820. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1821. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1822. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1823. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1824. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1825. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1826. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1827. { CTC_STATE_TXIDLE, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1828. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1829. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1830. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1831. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1832. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1833. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1834. { CTC_STATE_TERM, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1835. { CTC_STATE_TERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1836. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1837. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1838. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1839. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1840. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1841. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1842. { CTC_STATE_DTERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1843. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1844. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1845. { CTC_STATE_TX, CTC_EVENT_FINSTAT, ctcmpc_chx_txdone },
  1846. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1847. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1848. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1849. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1850. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1851. { CTC_STATE_TX, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1852. { CTC_STATE_TX, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1853. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1854. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1855. { CTC_STATE_TXERR, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1856. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1857. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1858. };
  1859. int mpc_ch_fsm_len = ARRAY_SIZE(ctcmpc_ch_fsm);
  1860. /*
  1861. * Actions for interface - statemachine.
  1862. */
  1863. /**
  1864. * Startup channels by sending CTC_EVENT_START to each channel.
  1865. *
  1866. * fi An instance of an interface statemachine.
  1867. * event The event, just happened.
  1868. * arg Generic pointer, casted from struct net_device * upon call.
  1869. */
  1870. static void dev_action_start(fsm_instance *fi, int event, void *arg)
  1871. {
  1872. struct net_device *dev = arg;
  1873. struct ctcm_priv *priv = dev->ml_priv;
  1874. int direction;
  1875. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1876. fsm_deltimer(&priv->restart_timer);
  1877. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  1878. if (IS_MPC(priv))
  1879. priv->mpcg->channels_terminating = 0;
  1880. for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
  1881. struct channel *ch = priv->channel[direction];
  1882. fsm_event(ch->fsm, CTC_EVENT_START, ch);
  1883. }
  1884. }
  1885. /**
  1886. * Shutdown channels by sending CTC_EVENT_STOP to each channel.
  1887. *
  1888. * fi An instance of an interface statemachine.
  1889. * event The event, just happened.
  1890. * arg Generic pointer, casted from struct net_device * upon call.
  1891. */
  1892. static void dev_action_stop(fsm_instance *fi, int event, void *arg)
  1893. {
  1894. int direction;
  1895. struct net_device *dev = arg;
  1896. struct ctcm_priv *priv = dev->ml_priv;
  1897. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1898. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1899. for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
  1900. struct channel *ch = priv->channel[direction];
  1901. fsm_event(ch->fsm, CTC_EVENT_STOP, ch);
  1902. ch->th_seq_num = 0x00;
  1903. CTCM_PR_DEBUG("%s: CH_th_seq= %08x\n",
  1904. __func__, ch->th_seq_num);
  1905. }
  1906. if (IS_MPC(priv))
  1907. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1908. }
  1909. static void dev_action_restart(fsm_instance *fi, int event, void *arg)
  1910. {
  1911. int restart_timer;
  1912. struct net_device *dev = arg;
  1913. struct ctcm_priv *priv = dev->ml_priv;
  1914. CTCMY_DBF_DEV_NAME(TRACE, dev, "");
  1915. if (IS_MPC(priv)) {
  1916. restart_timer = CTCM_TIME_1_SEC;
  1917. } else {
  1918. restart_timer = CTCM_TIME_5_SEC;
  1919. }
  1920. dev_info(&dev->dev, "Restarting device\n");
  1921. dev_action_stop(fi, event, arg);
  1922. fsm_event(priv->fsm, DEV_EVENT_STOP, dev);
  1923. if (IS_MPC(priv))
  1924. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1925. /* going back into start sequence too quickly can */
  1926. /* result in the other side becoming unreachable due */
  1927. /* to sense reported when IO is aborted */
  1928. fsm_addtimer(&priv->restart_timer, restart_timer,
  1929. DEV_EVENT_START, dev);
  1930. }
  1931. /**
  1932. * Called from channel statemachine
  1933. * when a channel is up and running.
  1934. *
  1935. * fi An instance of an interface statemachine.
  1936. * event The event, just happened.
  1937. * arg Generic pointer, casted from struct net_device * upon call.
  1938. */
  1939. static void dev_action_chup(fsm_instance *fi, int event, void *arg)
  1940. {
  1941. struct net_device *dev = arg;
  1942. struct ctcm_priv *priv = dev->ml_priv;
  1943. int dev_stat = fsm_getstate(fi);
  1944. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  1945. "%s(%s): priv = %p [%d,%d]\n ", CTCM_FUNTAIL,
  1946. dev->name, dev->ml_priv, dev_stat, event);
  1947. switch (fsm_getstate(fi)) {
  1948. case DEV_STATE_STARTWAIT_RXTX:
  1949. if (event == DEV_EVENT_RXUP)
  1950. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  1951. else
  1952. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  1953. break;
  1954. case DEV_STATE_STARTWAIT_RX:
  1955. if (event == DEV_EVENT_RXUP) {
  1956. fsm_newstate(fi, DEV_STATE_RUNNING);
  1957. dev_info(&dev->dev,
  1958. "Connected with remote side\n");
  1959. ctcm_clear_busy(dev);
  1960. }
  1961. break;
  1962. case DEV_STATE_STARTWAIT_TX:
  1963. if (event == DEV_EVENT_TXUP) {
  1964. fsm_newstate(fi, DEV_STATE_RUNNING);
  1965. dev_info(&dev->dev,
  1966. "Connected with remote side\n");
  1967. ctcm_clear_busy(dev);
  1968. }
  1969. break;
  1970. case DEV_STATE_STOPWAIT_TX:
  1971. if (event == DEV_EVENT_RXUP)
  1972. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1973. break;
  1974. case DEV_STATE_STOPWAIT_RX:
  1975. if (event == DEV_EVENT_TXUP)
  1976. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1977. break;
  1978. }
  1979. if (IS_MPC(priv)) {
  1980. if (event == DEV_EVENT_RXUP)
  1981. mpc_channel_action(priv->channel[CTCM_READ],
  1982. CTCM_READ, MPC_CHANNEL_ADD);
  1983. else
  1984. mpc_channel_action(priv->channel[CTCM_WRITE],
  1985. CTCM_WRITE, MPC_CHANNEL_ADD);
  1986. }
  1987. }
  1988. /**
  1989. * Called from device statemachine
  1990. * when a channel has been shutdown.
  1991. *
  1992. * fi An instance of an interface statemachine.
  1993. * event The event, just happened.
  1994. * arg Generic pointer, casted from struct net_device * upon call.
  1995. */
  1996. static void dev_action_chdown(fsm_instance *fi, int event, void *arg)
  1997. {
  1998. struct net_device *dev = arg;
  1999. struct ctcm_priv *priv = dev->ml_priv;
  2000. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  2001. switch (fsm_getstate(fi)) {
  2002. case DEV_STATE_RUNNING:
  2003. if (event == DEV_EVENT_TXDOWN)
  2004. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  2005. else
  2006. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  2007. break;
  2008. case DEV_STATE_STARTWAIT_RX:
  2009. if (event == DEV_EVENT_TXDOWN)
  2010. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  2011. break;
  2012. case DEV_STATE_STARTWAIT_TX:
  2013. if (event == DEV_EVENT_RXDOWN)
  2014. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  2015. break;
  2016. case DEV_STATE_STOPWAIT_RXTX:
  2017. if (event == DEV_EVENT_TXDOWN)
  2018. fsm_newstate(fi, DEV_STATE_STOPWAIT_RX);
  2019. else
  2020. fsm_newstate(fi, DEV_STATE_STOPWAIT_TX);
  2021. break;
  2022. case DEV_STATE_STOPWAIT_RX:
  2023. if (event == DEV_EVENT_RXDOWN)
  2024. fsm_newstate(fi, DEV_STATE_STOPPED);
  2025. break;
  2026. case DEV_STATE_STOPWAIT_TX:
  2027. if (event == DEV_EVENT_TXDOWN)
  2028. fsm_newstate(fi, DEV_STATE_STOPPED);
  2029. break;
  2030. }
  2031. if (IS_MPC(priv)) {
  2032. if (event == DEV_EVENT_RXDOWN)
  2033. mpc_channel_action(priv->channel[CTCM_READ],
  2034. CTCM_READ, MPC_CHANNEL_REMOVE);
  2035. else
  2036. mpc_channel_action(priv->channel[CTCM_WRITE],
  2037. CTCM_WRITE, MPC_CHANNEL_REMOVE);
  2038. }
  2039. }
  2040. const fsm_node dev_fsm[] = {
  2041. { DEV_STATE_STOPPED, DEV_EVENT_START, dev_action_start },
  2042. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_START, dev_action_start },
  2043. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2044. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2045. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2046. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_START, dev_action_start },
  2047. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2048. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2049. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2050. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2051. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_START, dev_action_start },
  2052. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2053. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2054. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2055. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2056. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_STOP, dev_action_stop },
  2057. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXUP, dev_action_chup },
  2058. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXUP, dev_action_chup },
  2059. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2060. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2061. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2062. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_STOP, dev_action_stop },
  2063. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2064. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2065. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2066. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2067. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_STOP, dev_action_stop },
  2068. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2069. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2070. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2071. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2072. { DEV_STATE_RUNNING, DEV_EVENT_STOP, dev_action_stop },
  2073. { DEV_STATE_RUNNING, DEV_EVENT_RXDOWN, dev_action_chdown },
  2074. { DEV_STATE_RUNNING, DEV_EVENT_TXDOWN, dev_action_chdown },
  2075. { DEV_STATE_RUNNING, DEV_EVENT_TXUP, ctcm_action_nop },
  2076. { DEV_STATE_RUNNING, DEV_EVENT_RXUP, ctcm_action_nop },
  2077. { DEV_STATE_RUNNING, DEV_EVENT_RESTART, dev_action_restart },
  2078. };
  2079. int dev_fsm_len = ARRAY_SIZE(dev_fsm);
  2080. /* --- This is the END my friend --- */