wm831x-dcdc.c 25 KB

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  1. /*
  2. * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/bitops.h>
  17. #include <linux/err.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/gpio.h>
  23. #include <linux/slab.h>
  24. #include <linux/mfd/wm831x/core.h>
  25. #include <linux/mfd/wm831x/regulator.h>
  26. #include <linux/mfd/wm831x/pdata.h>
  27. #define WM831X_BUCKV_MAX_SELECTOR 0x68
  28. #define WM831X_BUCKP_MAX_SELECTOR 0x66
  29. #define WM831X_DCDC_MODE_FAST 0
  30. #define WM831X_DCDC_MODE_NORMAL 1
  31. #define WM831X_DCDC_MODE_IDLE 2
  32. #define WM831X_DCDC_MODE_STANDBY 3
  33. #define WM831X_DCDC_MAX_NAME 9
  34. /* Register offsets in control block */
  35. #define WM831X_DCDC_CONTROL_1 0
  36. #define WM831X_DCDC_CONTROL_2 1
  37. #define WM831X_DCDC_ON_CONFIG 2
  38. #define WM831X_DCDC_SLEEP_CONTROL 3
  39. #define WM831X_DCDC_DVS_CONTROL 4
  40. /*
  41. * Shared
  42. */
  43. struct wm831x_dcdc {
  44. char name[WM831X_DCDC_MAX_NAME];
  45. char supply_name[WM831X_DCDC_MAX_NAME];
  46. struct regulator_desc desc;
  47. int base;
  48. struct wm831x *wm831x;
  49. struct regulator_dev *regulator;
  50. int dvs_gpio;
  51. int dvs_gpio_state;
  52. int on_vsel;
  53. int dvs_vsel;
  54. };
  55. static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
  56. {
  57. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  58. struct wm831x *wm831x = dcdc->wm831x;
  59. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  60. int val;
  61. val = wm831x_reg_read(wm831x, reg);
  62. if (val < 0)
  63. return val;
  64. val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
  65. switch (val) {
  66. case WM831X_DCDC_MODE_FAST:
  67. return REGULATOR_MODE_FAST;
  68. case WM831X_DCDC_MODE_NORMAL:
  69. return REGULATOR_MODE_NORMAL;
  70. case WM831X_DCDC_MODE_STANDBY:
  71. return REGULATOR_MODE_STANDBY;
  72. case WM831X_DCDC_MODE_IDLE:
  73. return REGULATOR_MODE_IDLE;
  74. default:
  75. BUG();
  76. return -EINVAL;
  77. }
  78. }
  79. static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
  80. unsigned int mode)
  81. {
  82. int val;
  83. switch (mode) {
  84. case REGULATOR_MODE_FAST:
  85. val = WM831X_DCDC_MODE_FAST;
  86. break;
  87. case REGULATOR_MODE_NORMAL:
  88. val = WM831X_DCDC_MODE_NORMAL;
  89. break;
  90. case REGULATOR_MODE_STANDBY:
  91. val = WM831X_DCDC_MODE_STANDBY;
  92. break;
  93. case REGULATOR_MODE_IDLE:
  94. val = WM831X_DCDC_MODE_IDLE;
  95. break;
  96. default:
  97. return -EINVAL;
  98. }
  99. return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
  100. val << WM831X_DC1_ON_MODE_SHIFT);
  101. }
  102. static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
  103. {
  104. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  105. struct wm831x *wm831x = dcdc->wm831x;
  106. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  107. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  108. }
  109. static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
  110. unsigned int mode)
  111. {
  112. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  113. struct wm831x *wm831x = dcdc->wm831x;
  114. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  115. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  116. }
  117. static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
  118. {
  119. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  120. struct wm831x *wm831x = dcdc->wm831x;
  121. int ret;
  122. /* First, check for errors */
  123. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  124. if (ret < 0)
  125. return ret;
  126. if (ret & (1 << rdev_get_id(rdev))) {
  127. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  128. rdev_get_id(rdev) + 1);
  129. return REGULATOR_STATUS_ERROR;
  130. }
  131. /* DCDC1 and DCDC2 can additionally detect high voltage/current */
  132. if (rdev_get_id(rdev) < 2) {
  133. if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
  134. dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
  135. rdev_get_id(rdev) + 1);
  136. return REGULATOR_STATUS_ERROR;
  137. }
  138. if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
  139. dev_dbg(wm831x->dev, "DCDC%d over current\n",
  140. rdev_get_id(rdev) + 1);
  141. return REGULATOR_STATUS_ERROR;
  142. }
  143. }
  144. /* Is the regulator on? */
  145. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  146. if (ret < 0)
  147. return ret;
  148. if (!(ret & (1 << rdev_get_id(rdev))))
  149. return REGULATOR_STATUS_OFF;
  150. /* TODO: When we handle hardware control modes so we can report the
  151. * current mode. */
  152. return REGULATOR_STATUS_ON;
  153. }
  154. static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
  155. {
  156. struct wm831x_dcdc *dcdc = data;
  157. regulator_notifier_call_chain(dcdc->regulator,
  158. REGULATOR_EVENT_UNDER_VOLTAGE,
  159. NULL);
  160. return IRQ_HANDLED;
  161. }
  162. static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
  163. {
  164. struct wm831x_dcdc *dcdc = data;
  165. regulator_notifier_call_chain(dcdc->regulator,
  166. REGULATOR_EVENT_OVER_CURRENT,
  167. NULL);
  168. return IRQ_HANDLED;
  169. }
  170. /*
  171. * BUCKV specifics
  172. */
  173. static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
  174. unsigned selector)
  175. {
  176. if (selector <= 0x8)
  177. return 600000;
  178. if (selector <= WM831X_BUCKV_MAX_SELECTOR)
  179. return 600000 + ((selector - 0x8) * 12500);
  180. return -EINVAL;
  181. }
  182. static int wm831x_buckv_map_voltage(struct regulator_dev *rdev,
  183. int min_uV, int max_uV)
  184. {
  185. u16 vsel;
  186. if (min_uV < 600000)
  187. vsel = 0;
  188. else if (min_uV <= 1800000)
  189. vsel = DIV_ROUND_UP(min_uV - 600000, 12500) + 8;
  190. else
  191. return -EINVAL;
  192. if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
  193. return -EINVAL;
  194. return vsel;
  195. }
  196. static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
  197. {
  198. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  199. if (state == dcdc->dvs_gpio_state)
  200. return 0;
  201. dcdc->dvs_gpio_state = state;
  202. gpio_set_value(dcdc->dvs_gpio, state);
  203. /* Should wait for DVS state change to be asserted if we have
  204. * a GPIO for it, for now assume the device is configured
  205. * for the fastest possible transition.
  206. */
  207. return 0;
  208. }
  209. static int wm831x_buckv_set_voltage_sel(struct regulator_dev *rdev,
  210. unsigned vsel)
  211. {
  212. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  213. struct wm831x *wm831x = dcdc->wm831x;
  214. int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  215. int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
  216. int ret;
  217. /* If this value is already set then do a GPIO update if we can */
  218. if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
  219. return wm831x_buckv_set_dvs(rdev, 0);
  220. if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
  221. return wm831x_buckv_set_dvs(rdev, 1);
  222. /* Always set the ON status to the minimum voltage */
  223. ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
  224. if (ret < 0)
  225. return ret;
  226. dcdc->on_vsel = vsel;
  227. if (!dcdc->dvs_gpio)
  228. return ret;
  229. /* Kick the voltage transition now */
  230. ret = wm831x_buckv_set_dvs(rdev, 0);
  231. if (ret < 0)
  232. return ret;
  233. /*
  234. * If this VSEL is higher than the last one we've seen then
  235. * remember it as the DVS VSEL. This is optimised for CPUfreq
  236. * usage where we want to get to the highest voltage very
  237. * quickly.
  238. */
  239. if (vsel > dcdc->dvs_vsel) {
  240. ret = wm831x_set_bits(wm831x, dvs_reg,
  241. WM831X_DC1_DVS_VSEL_MASK,
  242. vsel);
  243. if (ret == 0)
  244. dcdc->dvs_vsel = vsel;
  245. else
  246. dev_warn(wm831x->dev,
  247. "Failed to set DCDC DVS VSEL: %d\n", ret);
  248. }
  249. return 0;
  250. }
  251. static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
  252. int uV)
  253. {
  254. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  255. struct wm831x *wm831x = dcdc->wm831x;
  256. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  257. int vsel;
  258. vsel = wm831x_buckv_map_voltage(rdev, uV, uV);
  259. if (vsel < 0)
  260. return vsel;
  261. return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
  262. }
  263. static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
  264. {
  265. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  266. if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
  267. return dcdc->dvs_vsel;
  268. else
  269. return dcdc->on_vsel;
  270. }
  271. /* Current limit options */
  272. static u16 wm831x_dcdc_ilim[] = {
  273. 125, 250, 375, 500, 625, 750, 875, 1000
  274. };
  275. static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
  276. int min_uA, int max_uA)
  277. {
  278. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  279. struct wm831x *wm831x = dcdc->wm831x;
  280. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  281. int i;
  282. for (i = ARRAY_SIZE(wm831x_dcdc_ilim) - 1; i >= 0; i--) {
  283. if ((min_uA <= wm831x_dcdc_ilim[i]) &&
  284. (wm831x_dcdc_ilim[i] <= max_uA))
  285. return wm831x_set_bits(wm831x, reg,
  286. WM831X_DC1_HC_THR_MASK,
  287. i << WM831X_DC1_HC_THR_SHIFT);
  288. }
  289. return -EINVAL;
  290. }
  291. static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
  292. {
  293. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  294. struct wm831x *wm831x = dcdc->wm831x;
  295. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  296. int val;
  297. val = wm831x_reg_read(wm831x, reg);
  298. if (val < 0)
  299. return val;
  300. val = (val & WM831X_DC1_HC_THR_MASK) >> WM831X_DC1_HC_THR_SHIFT;
  301. return wm831x_dcdc_ilim[val];
  302. }
  303. static struct regulator_ops wm831x_buckv_ops = {
  304. .set_voltage_sel = wm831x_buckv_set_voltage_sel,
  305. .get_voltage_sel = wm831x_buckv_get_voltage_sel,
  306. .list_voltage = wm831x_buckv_list_voltage,
  307. .map_voltage = wm831x_buckv_map_voltage,
  308. .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
  309. .set_current_limit = wm831x_buckv_set_current_limit,
  310. .get_current_limit = wm831x_buckv_get_current_limit,
  311. .is_enabled = regulator_is_enabled_regmap,
  312. .enable = regulator_enable_regmap,
  313. .disable = regulator_disable_regmap,
  314. .get_status = wm831x_dcdc_get_status,
  315. .get_mode = wm831x_dcdc_get_mode,
  316. .set_mode = wm831x_dcdc_set_mode,
  317. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  318. };
  319. /*
  320. * Set up DVS control. We just log errors since we can still run
  321. * (with reduced performance) if we fail.
  322. */
  323. static void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc,
  324. struct wm831x_buckv_pdata *pdata)
  325. {
  326. struct wm831x *wm831x = dcdc->wm831x;
  327. int ret;
  328. u16 ctrl;
  329. if (!pdata || !pdata->dvs_gpio)
  330. return;
  331. /* gpiolib won't let us read the GPIO status so pick the higher
  332. * of the two existing voltages so we take it as platform data.
  333. */
  334. dcdc->dvs_gpio_state = pdata->dvs_init_state;
  335. ret = gpio_request_one(pdata->dvs_gpio,
  336. dcdc->dvs_gpio_state ? GPIOF_INIT_HIGH : 0,
  337. "DCDC DVS");
  338. if (ret < 0) {
  339. dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
  340. dcdc->name, ret);
  341. return;
  342. }
  343. dcdc->dvs_gpio = pdata->dvs_gpio;
  344. switch (pdata->dvs_control_src) {
  345. case 1:
  346. ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
  347. break;
  348. case 2:
  349. ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
  350. break;
  351. default:
  352. dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
  353. pdata->dvs_control_src, dcdc->name);
  354. return;
  355. }
  356. /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL
  357. * to make bootstrapping a bit smoother.
  358. */
  359. if (!dcdc->dvs_vsel) {
  360. ret = wm831x_set_bits(wm831x,
  361. dcdc->base + WM831X_DCDC_DVS_CONTROL,
  362. WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel);
  363. if (ret == 0)
  364. dcdc->dvs_vsel = dcdc->on_vsel;
  365. else
  366. dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n",
  367. ret);
  368. }
  369. ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
  370. WM831X_DC1_DVS_SRC_MASK, ctrl);
  371. if (ret < 0) {
  372. dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
  373. dcdc->name, ret);
  374. }
  375. }
  376. static int wm831x_buckv_probe(struct platform_device *pdev)
  377. {
  378. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  379. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  380. struct regulator_config config = { };
  381. int id;
  382. struct wm831x_dcdc *dcdc;
  383. struct resource *res;
  384. int ret, irq;
  385. if (pdata && pdata->wm831x_num)
  386. id = (pdata->wm831x_num * 10) + 1;
  387. else
  388. id = 0;
  389. id = pdev->id - id;
  390. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  391. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
  392. GFP_KERNEL);
  393. if (dcdc == NULL) {
  394. dev_err(&pdev->dev, "Unable to allocate private data\n");
  395. return -ENOMEM;
  396. }
  397. dcdc->wm831x = wm831x;
  398. res = platform_get_resource(pdev, IORESOURCE_REG, 0);
  399. if (res == NULL) {
  400. dev_err(&pdev->dev, "No REG resource\n");
  401. ret = -EINVAL;
  402. goto err;
  403. }
  404. dcdc->base = res->start;
  405. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  406. dcdc->desc.name = dcdc->name;
  407. snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
  408. "DC%dVDD", id + 1);
  409. dcdc->desc.supply_name = dcdc->supply_name;
  410. dcdc->desc.id = id;
  411. dcdc->desc.type = REGULATOR_VOLTAGE;
  412. dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
  413. dcdc->desc.ops = &wm831x_buckv_ops;
  414. dcdc->desc.owner = THIS_MODULE;
  415. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  416. dcdc->desc.enable_mask = 1 << id;
  417. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
  418. if (ret < 0) {
  419. dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
  420. goto err;
  421. }
  422. dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
  423. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL);
  424. if (ret < 0) {
  425. dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
  426. goto err;
  427. }
  428. dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
  429. if (pdata && pdata->dcdc[id])
  430. wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data);
  431. config.dev = pdev->dev.parent;
  432. if (pdata)
  433. config.init_data = pdata->dcdc[id];
  434. config.driver_data = dcdc;
  435. config.regmap = wm831x->regmap;
  436. dcdc->regulator = regulator_register(&dcdc->desc, &config);
  437. if (IS_ERR(dcdc->regulator)) {
  438. ret = PTR_ERR(dcdc->regulator);
  439. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  440. id + 1, ret);
  441. goto err;
  442. }
  443. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
  444. ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
  445. IRQF_TRIGGER_RISING, dcdc->name, dcdc);
  446. if (ret != 0) {
  447. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  448. irq, ret);
  449. goto err_regulator;
  450. }
  451. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC"));
  452. ret = request_threaded_irq(irq, NULL, wm831x_dcdc_oc_irq,
  453. IRQF_TRIGGER_RISING, dcdc->name, dcdc);
  454. if (ret != 0) {
  455. dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
  456. irq, ret);
  457. goto err_uv;
  458. }
  459. platform_set_drvdata(pdev, dcdc);
  460. return 0;
  461. err_uv:
  462. free_irq(wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")),
  463. dcdc);
  464. err_regulator:
  465. regulator_unregister(dcdc->regulator);
  466. err:
  467. if (dcdc->dvs_gpio)
  468. gpio_free(dcdc->dvs_gpio);
  469. return ret;
  470. }
  471. static int wm831x_buckv_remove(struct platform_device *pdev)
  472. {
  473. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  474. struct wm831x *wm831x = dcdc->wm831x;
  475. platform_set_drvdata(pdev, NULL);
  476. free_irq(wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC")),
  477. dcdc);
  478. free_irq(wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")),
  479. dcdc);
  480. regulator_unregister(dcdc->regulator);
  481. if (dcdc->dvs_gpio)
  482. gpio_free(dcdc->dvs_gpio);
  483. return 0;
  484. }
  485. static struct platform_driver wm831x_buckv_driver = {
  486. .probe = wm831x_buckv_probe,
  487. .remove = wm831x_buckv_remove,
  488. .driver = {
  489. .name = "wm831x-buckv",
  490. .owner = THIS_MODULE,
  491. },
  492. };
  493. /*
  494. * BUCKP specifics
  495. */
  496. static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, int uV)
  497. {
  498. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  499. struct wm831x *wm831x = dcdc->wm831x;
  500. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  501. int sel;
  502. sel = regulator_map_voltage_linear(rdev, uV, uV);
  503. if (sel < 0)
  504. return sel;
  505. return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, sel);
  506. }
  507. static struct regulator_ops wm831x_buckp_ops = {
  508. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  509. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  510. .list_voltage = regulator_list_voltage_linear,
  511. .map_voltage = regulator_map_voltage_linear,
  512. .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
  513. .is_enabled = regulator_is_enabled_regmap,
  514. .enable = regulator_enable_regmap,
  515. .disable = regulator_disable_regmap,
  516. .get_status = wm831x_dcdc_get_status,
  517. .get_mode = wm831x_dcdc_get_mode,
  518. .set_mode = wm831x_dcdc_set_mode,
  519. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  520. };
  521. static int wm831x_buckp_probe(struct platform_device *pdev)
  522. {
  523. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  524. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  525. struct regulator_config config = { };
  526. int id;
  527. struct wm831x_dcdc *dcdc;
  528. struct resource *res;
  529. int ret, irq;
  530. if (pdata && pdata->wm831x_num)
  531. id = (pdata->wm831x_num * 10) + 1;
  532. else
  533. id = 0;
  534. id = pdev->id - id;
  535. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  536. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
  537. GFP_KERNEL);
  538. if (dcdc == NULL) {
  539. dev_err(&pdev->dev, "Unable to allocate private data\n");
  540. return -ENOMEM;
  541. }
  542. dcdc->wm831x = wm831x;
  543. res = platform_get_resource(pdev, IORESOURCE_REG, 0);
  544. if (res == NULL) {
  545. dev_err(&pdev->dev, "No REG resource\n");
  546. ret = -EINVAL;
  547. goto err;
  548. }
  549. dcdc->base = res->start;
  550. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  551. dcdc->desc.name = dcdc->name;
  552. snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
  553. "DC%dVDD", id + 1);
  554. dcdc->desc.supply_name = dcdc->supply_name;
  555. dcdc->desc.id = id;
  556. dcdc->desc.type = REGULATOR_VOLTAGE;
  557. dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
  558. dcdc->desc.ops = &wm831x_buckp_ops;
  559. dcdc->desc.owner = THIS_MODULE;
  560. dcdc->desc.vsel_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  561. dcdc->desc.vsel_mask = WM831X_DC3_ON_VSEL_MASK;
  562. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  563. dcdc->desc.enable_mask = 1 << id;
  564. dcdc->desc.min_uV = 850000;
  565. dcdc->desc.uV_step = 25000;
  566. config.dev = pdev->dev.parent;
  567. if (pdata)
  568. config.init_data = pdata->dcdc[id];
  569. config.driver_data = dcdc;
  570. config.regmap = wm831x->regmap;
  571. dcdc->regulator = regulator_register(&dcdc->desc, &config);
  572. if (IS_ERR(dcdc->regulator)) {
  573. ret = PTR_ERR(dcdc->regulator);
  574. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  575. id + 1, ret);
  576. goto err;
  577. }
  578. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
  579. ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
  580. IRQF_TRIGGER_RISING, dcdc->name, dcdc);
  581. if (ret != 0) {
  582. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  583. irq, ret);
  584. goto err_regulator;
  585. }
  586. platform_set_drvdata(pdev, dcdc);
  587. return 0;
  588. err_regulator:
  589. regulator_unregister(dcdc->regulator);
  590. err:
  591. return ret;
  592. }
  593. static int wm831x_buckp_remove(struct platform_device *pdev)
  594. {
  595. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  596. platform_set_drvdata(pdev, NULL);
  597. free_irq(wm831x_irq(dcdc->wm831x, platform_get_irq_byname(pdev, "UV")),
  598. dcdc);
  599. regulator_unregister(dcdc->regulator);
  600. return 0;
  601. }
  602. static struct platform_driver wm831x_buckp_driver = {
  603. .probe = wm831x_buckp_probe,
  604. .remove = wm831x_buckp_remove,
  605. .driver = {
  606. .name = "wm831x-buckp",
  607. .owner = THIS_MODULE,
  608. },
  609. };
  610. /*
  611. * DCDC boost convertors
  612. */
  613. static int wm831x_boostp_get_status(struct regulator_dev *rdev)
  614. {
  615. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  616. struct wm831x *wm831x = dcdc->wm831x;
  617. int ret;
  618. /* First, check for errors */
  619. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  620. if (ret < 0)
  621. return ret;
  622. if (ret & (1 << rdev_get_id(rdev))) {
  623. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  624. rdev_get_id(rdev) + 1);
  625. return REGULATOR_STATUS_ERROR;
  626. }
  627. /* Is the regulator on? */
  628. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  629. if (ret < 0)
  630. return ret;
  631. if (ret & (1 << rdev_get_id(rdev)))
  632. return REGULATOR_STATUS_ON;
  633. else
  634. return REGULATOR_STATUS_OFF;
  635. }
  636. static struct regulator_ops wm831x_boostp_ops = {
  637. .get_status = wm831x_boostp_get_status,
  638. .is_enabled = regulator_is_enabled_regmap,
  639. .enable = regulator_enable_regmap,
  640. .disable = regulator_disable_regmap,
  641. };
  642. static int wm831x_boostp_probe(struct platform_device *pdev)
  643. {
  644. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  645. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  646. struct regulator_config config = { };
  647. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  648. struct wm831x_dcdc *dcdc;
  649. struct resource *res;
  650. int ret, irq;
  651. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  652. if (pdata == NULL || pdata->dcdc[id] == NULL)
  653. return -ENODEV;
  654. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
  655. if (dcdc == NULL) {
  656. dev_err(&pdev->dev, "Unable to allocate private data\n");
  657. return -ENOMEM;
  658. }
  659. dcdc->wm831x = wm831x;
  660. res = platform_get_resource(pdev, IORESOURCE_REG, 0);
  661. if (res == NULL) {
  662. dev_err(&pdev->dev, "No REG resource\n");
  663. ret = -EINVAL;
  664. goto err;
  665. }
  666. dcdc->base = res->start;
  667. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  668. dcdc->desc.name = dcdc->name;
  669. dcdc->desc.id = id;
  670. dcdc->desc.type = REGULATOR_VOLTAGE;
  671. dcdc->desc.ops = &wm831x_boostp_ops;
  672. dcdc->desc.owner = THIS_MODULE;
  673. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  674. dcdc->desc.enable_mask = 1 << id;
  675. config.dev = pdev->dev.parent;
  676. if (pdata)
  677. config.init_data = pdata->dcdc[id];
  678. config.driver_data = dcdc;
  679. config.regmap = wm831x->regmap;
  680. dcdc->regulator = regulator_register(&dcdc->desc, &config);
  681. if (IS_ERR(dcdc->regulator)) {
  682. ret = PTR_ERR(dcdc->regulator);
  683. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  684. id + 1, ret);
  685. goto err;
  686. }
  687. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
  688. ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
  689. IRQF_TRIGGER_RISING, dcdc->name,
  690. dcdc);
  691. if (ret != 0) {
  692. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  693. irq, ret);
  694. goto err_regulator;
  695. }
  696. platform_set_drvdata(pdev, dcdc);
  697. return 0;
  698. err_regulator:
  699. regulator_unregister(dcdc->regulator);
  700. err:
  701. return ret;
  702. }
  703. static int wm831x_boostp_remove(struct platform_device *pdev)
  704. {
  705. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  706. platform_set_drvdata(pdev, NULL);
  707. free_irq(wm831x_irq(dcdc->wm831x, platform_get_irq_byname(pdev, "UV")),
  708. dcdc);
  709. regulator_unregister(dcdc->regulator);
  710. return 0;
  711. }
  712. static struct platform_driver wm831x_boostp_driver = {
  713. .probe = wm831x_boostp_probe,
  714. .remove = wm831x_boostp_remove,
  715. .driver = {
  716. .name = "wm831x-boostp",
  717. .owner = THIS_MODULE,
  718. },
  719. };
  720. /*
  721. * External Power Enable
  722. *
  723. * These aren't actually DCDCs but look like them in hardware so share
  724. * code.
  725. */
  726. #define WM831X_EPE_BASE 6
  727. static struct regulator_ops wm831x_epe_ops = {
  728. .is_enabled = regulator_is_enabled_regmap,
  729. .enable = regulator_enable_regmap,
  730. .disable = regulator_disable_regmap,
  731. .get_status = wm831x_dcdc_get_status,
  732. };
  733. static int wm831x_epe_probe(struct platform_device *pdev)
  734. {
  735. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  736. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  737. struct regulator_config config = { };
  738. int id = pdev->id % ARRAY_SIZE(pdata->epe);
  739. struct wm831x_dcdc *dcdc;
  740. int ret;
  741. dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
  742. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
  743. if (dcdc == NULL) {
  744. dev_err(&pdev->dev, "Unable to allocate private data\n");
  745. return -ENOMEM;
  746. }
  747. dcdc->wm831x = wm831x;
  748. /* For current parts this is correct; probably need to revisit
  749. * in future.
  750. */
  751. snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
  752. dcdc->desc.name = dcdc->name;
  753. dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
  754. dcdc->desc.ops = &wm831x_epe_ops;
  755. dcdc->desc.type = REGULATOR_VOLTAGE;
  756. dcdc->desc.owner = THIS_MODULE;
  757. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  758. dcdc->desc.enable_mask = 1 << dcdc->desc.id;
  759. config.dev = pdev->dev.parent;
  760. if (pdata)
  761. config.init_data = pdata->epe[id];
  762. config.driver_data = dcdc;
  763. config.regmap = wm831x->regmap;
  764. dcdc->regulator = regulator_register(&dcdc->desc, &config);
  765. if (IS_ERR(dcdc->regulator)) {
  766. ret = PTR_ERR(dcdc->regulator);
  767. dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
  768. id + 1, ret);
  769. goto err;
  770. }
  771. platform_set_drvdata(pdev, dcdc);
  772. return 0;
  773. err:
  774. return ret;
  775. }
  776. static int wm831x_epe_remove(struct platform_device *pdev)
  777. {
  778. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  779. platform_set_drvdata(pdev, NULL);
  780. regulator_unregister(dcdc->regulator);
  781. return 0;
  782. }
  783. static struct platform_driver wm831x_epe_driver = {
  784. .probe = wm831x_epe_probe,
  785. .remove = wm831x_epe_remove,
  786. .driver = {
  787. .name = "wm831x-epe",
  788. .owner = THIS_MODULE,
  789. },
  790. };
  791. static int __init wm831x_dcdc_init(void)
  792. {
  793. int ret;
  794. ret = platform_driver_register(&wm831x_buckv_driver);
  795. if (ret != 0)
  796. pr_err("Failed to register WM831x BUCKV driver: %d\n", ret);
  797. ret = platform_driver_register(&wm831x_buckp_driver);
  798. if (ret != 0)
  799. pr_err("Failed to register WM831x BUCKP driver: %d\n", ret);
  800. ret = platform_driver_register(&wm831x_boostp_driver);
  801. if (ret != 0)
  802. pr_err("Failed to register WM831x BOOST driver: %d\n", ret);
  803. ret = platform_driver_register(&wm831x_epe_driver);
  804. if (ret != 0)
  805. pr_err("Failed to register WM831x EPE driver: %d\n", ret);
  806. return 0;
  807. }
  808. subsys_initcall(wm831x_dcdc_init);
  809. static void __exit wm831x_dcdc_exit(void)
  810. {
  811. platform_driver_unregister(&wm831x_epe_driver);
  812. platform_driver_unregister(&wm831x_boostp_driver);
  813. platform_driver_unregister(&wm831x_buckp_driver);
  814. platform_driver_unregister(&wm831x_buckv_driver);
  815. }
  816. module_exit(wm831x_dcdc_exit);
  817. /* Module information */
  818. MODULE_AUTHOR("Mark Brown");
  819. MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
  820. MODULE_LICENSE("GPL");
  821. MODULE_ALIAS("platform:wm831x-buckv");
  822. MODULE_ALIAS("platform:wm831x-buckp");
  823. MODULE_ALIAS("platform:wm831x-boostp");
  824. MODULE_ALIAS("platform:wm831x-epe");