anatop-regulator.c 7.3 KB

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  1. /*
  2. * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
  3. */
  4. /*
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. * You should have received a copy of the GNU General Public License along
  14. * with this program; if not, write to the Free Software Foundation, Inc.,
  15. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  16. */
  17. #include <linux/slab.h>
  18. #include <linux/device.h>
  19. #include <linux/module.h>
  20. #include <linux/mfd/syscon.h>
  21. #include <linux/err.h>
  22. #include <linux/io.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/of.h>
  25. #include <linux/of_address.h>
  26. #include <linux/regmap.h>
  27. #include <linux/regulator/driver.h>
  28. #include <linux/regulator/of_regulator.h>
  29. #define LDO_RAMP_UP_UNIT_IN_CYCLES 64 /* 64 cycles per step */
  30. #define LDO_RAMP_UP_FREQ_IN_MHZ 24 /* cycle based on 24M OSC */
  31. struct anatop_regulator {
  32. const char *name;
  33. u32 control_reg;
  34. struct regmap *anatop;
  35. int vol_bit_shift;
  36. int vol_bit_width;
  37. u32 delay_reg;
  38. int delay_bit_shift;
  39. int delay_bit_width;
  40. int min_bit_val;
  41. int min_voltage;
  42. int max_voltage;
  43. struct regulator_desc rdesc;
  44. struct regulator_init_data *initdata;
  45. };
  46. static int anatop_regmap_set_voltage_sel(struct regulator_dev *reg,
  47. unsigned selector)
  48. {
  49. struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
  50. if (!anatop_reg->control_reg)
  51. return -ENOTSUPP;
  52. return regulator_set_voltage_sel_regmap(reg, selector);
  53. }
  54. static int anatop_regmap_set_voltage_time_sel(struct regulator_dev *reg,
  55. unsigned int old_sel,
  56. unsigned int new_sel)
  57. {
  58. struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
  59. u32 val;
  60. int ret = 0;
  61. /* check whether need to care about LDO ramp up speed */
  62. if (anatop_reg->delay_bit_width && new_sel > old_sel) {
  63. /*
  64. * the delay for LDO ramp up time is
  65. * based on the register setting, we need
  66. * to calculate how many steps LDO need to
  67. * ramp up, and how much delay needed. (us)
  68. */
  69. regmap_read(anatop_reg->anatop, anatop_reg->delay_reg, &val);
  70. val = (val >> anatop_reg->delay_bit_shift) &
  71. ((1 << anatop_reg->delay_bit_width) - 1);
  72. ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES <<
  73. val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1;
  74. }
  75. return ret;
  76. }
  77. static int anatop_regmap_get_voltage_sel(struct regulator_dev *reg)
  78. {
  79. struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
  80. if (!anatop_reg->control_reg)
  81. return -ENOTSUPP;
  82. return regulator_get_voltage_sel_regmap(reg);
  83. }
  84. static struct regulator_ops anatop_rops = {
  85. .set_voltage_sel = anatop_regmap_set_voltage_sel,
  86. .set_voltage_time_sel = anatop_regmap_set_voltage_time_sel,
  87. .get_voltage_sel = anatop_regmap_get_voltage_sel,
  88. .list_voltage = regulator_list_voltage_linear,
  89. .map_voltage = regulator_map_voltage_linear,
  90. };
  91. static int anatop_regulator_probe(struct platform_device *pdev)
  92. {
  93. struct device *dev = &pdev->dev;
  94. struct device_node *np = dev->of_node;
  95. struct device_node *anatop_np;
  96. struct regulator_desc *rdesc;
  97. struct regulator_dev *rdev;
  98. struct anatop_regulator *sreg;
  99. struct regulator_init_data *initdata;
  100. struct regulator_config config = { };
  101. int ret = 0;
  102. initdata = of_get_regulator_init_data(dev, np);
  103. sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
  104. if (!sreg)
  105. return -ENOMEM;
  106. sreg->initdata = initdata;
  107. sreg->name = kstrdup(of_get_property(np, "regulator-name", NULL),
  108. GFP_KERNEL);
  109. rdesc = &sreg->rdesc;
  110. memset(rdesc, 0, sizeof(*rdesc));
  111. rdesc->name = sreg->name;
  112. rdesc->ops = &anatop_rops;
  113. rdesc->type = REGULATOR_VOLTAGE;
  114. rdesc->owner = THIS_MODULE;
  115. anatop_np = of_get_parent(np);
  116. if (!anatop_np)
  117. return -ENODEV;
  118. sreg->anatop = syscon_node_to_regmap(anatop_np);
  119. of_node_put(anatop_np);
  120. if (IS_ERR(sreg->anatop))
  121. return PTR_ERR(sreg->anatop);
  122. ret = of_property_read_u32(np, "anatop-reg-offset",
  123. &sreg->control_reg);
  124. if (ret) {
  125. dev_err(dev, "no anatop-reg-offset property set\n");
  126. goto anatop_probe_end;
  127. }
  128. ret = of_property_read_u32(np, "anatop-vol-bit-width",
  129. &sreg->vol_bit_width);
  130. if (ret) {
  131. dev_err(dev, "no anatop-vol-bit-width property set\n");
  132. goto anatop_probe_end;
  133. }
  134. ret = of_property_read_u32(np, "anatop-vol-bit-shift",
  135. &sreg->vol_bit_shift);
  136. if (ret) {
  137. dev_err(dev, "no anatop-vol-bit-shift property set\n");
  138. goto anatop_probe_end;
  139. }
  140. ret = of_property_read_u32(np, "anatop-min-bit-val",
  141. &sreg->min_bit_val);
  142. if (ret) {
  143. dev_err(dev, "no anatop-min-bit-val property set\n");
  144. goto anatop_probe_end;
  145. }
  146. ret = of_property_read_u32(np, "anatop-min-voltage",
  147. &sreg->min_voltage);
  148. if (ret) {
  149. dev_err(dev, "no anatop-min-voltage property set\n");
  150. goto anatop_probe_end;
  151. }
  152. ret = of_property_read_u32(np, "anatop-max-voltage",
  153. &sreg->max_voltage);
  154. if (ret) {
  155. dev_err(dev, "no anatop-max-voltage property set\n");
  156. goto anatop_probe_end;
  157. }
  158. /* read LDO ramp up setting, only for core reg */
  159. of_property_read_u32(np, "anatop-delay-reg-offset",
  160. &sreg->delay_reg);
  161. of_property_read_u32(np, "anatop-delay-bit-width",
  162. &sreg->delay_bit_width);
  163. of_property_read_u32(np, "anatop-delay-bit-shift",
  164. &sreg->delay_bit_shift);
  165. rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage) / 25000 + 1
  166. + sreg->min_bit_val;
  167. rdesc->min_uV = sreg->min_voltage;
  168. rdesc->uV_step = 25000;
  169. rdesc->linear_min_sel = sreg->min_bit_val;
  170. rdesc->vsel_reg = sreg->control_reg;
  171. rdesc->vsel_mask = ((1 << sreg->vol_bit_width) - 1) <<
  172. sreg->vol_bit_shift;
  173. config.dev = &pdev->dev;
  174. config.init_data = initdata;
  175. config.driver_data = sreg;
  176. config.of_node = pdev->dev.of_node;
  177. config.regmap = sreg->anatop;
  178. /* register regulator */
  179. rdev = regulator_register(rdesc, &config);
  180. if (IS_ERR(rdev)) {
  181. dev_err(dev, "failed to register %s\n",
  182. rdesc->name);
  183. ret = PTR_ERR(rdev);
  184. goto anatop_probe_end;
  185. }
  186. platform_set_drvdata(pdev, rdev);
  187. anatop_probe_end:
  188. if (ret)
  189. kfree(sreg->name);
  190. return ret;
  191. }
  192. static int anatop_regulator_remove(struct platform_device *pdev)
  193. {
  194. struct regulator_dev *rdev = platform_get_drvdata(pdev);
  195. struct anatop_regulator *sreg = rdev_get_drvdata(rdev);
  196. const char *name = sreg->name;
  197. regulator_unregister(rdev);
  198. kfree(name);
  199. return 0;
  200. }
  201. static struct of_device_id of_anatop_regulator_match_tbl[] = {
  202. { .compatible = "fsl,anatop-regulator", },
  203. { /* end */ }
  204. };
  205. static struct platform_driver anatop_regulator_driver = {
  206. .driver = {
  207. .name = "anatop_regulator",
  208. .owner = THIS_MODULE,
  209. .of_match_table = of_anatop_regulator_match_tbl,
  210. },
  211. .probe = anatop_regulator_probe,
  212. .remove = anatop_regulator_remove,
  213. };
  214. static int __init anatop_regulator_init(void)
  215. {
  216. return platform_driver_register(&anatop_regulator_driver);
  217. }
  218. postcore_initcall(anatop_regulator_init);
  219. static void __exit anatop_regulator_exit(void)
  220. {
  221. platform_driver_unregister(&anatop_regulator_driver);
  222. }
  223. module_exit(anatop_regulator_exit);
  224. MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>, "
  225. "Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
  226. MODULE_DESCRIPTION("ANATOP Regulator driver");
  227. MODULE_LICENSE("GPL v2");