pwm-samsung.c 7.9 KB

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  1. /* drivers/pwm/pwm-samsung.c
  2. *
  3. * Copyright (c) 2007 Ben Dooks
  4. * Copyright (c) 2008 Simtec Electronics
  5. * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
  6. *
  7. * S3C series PWM device core
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License.
  12. */
  13. #define pr_fmt(fmt) "pwm-samsung: " fmt
  14. #include <linux/export.h>
  15. #include <linux/kernel.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/slab.h>
  18. #include <linux/err.h>
  19. #include <linux/clk.h>
  20. #include <linux/io.h>
  21. #include <linux/pwm.h>
  22. #include <mach/map.h>
  23. #include <plat/regs-timer.h>
  24. struct s3c_chip {
  25. struct platform_device *pdev;
  26. struct clk *clk_div;
  27. struct clk *clk;
  28. const char *label;
  29. unsigned int period_ns;
  30. unsigned int duty_ns;
  31. unsigned char tcon_base;
  32. unsigned char pwm_id;
  33. struct pwm_chip chip;
  34. };
  35. #define to_s3c_chip(chip) container_of(chip, struct s3c_chip, chip)
  36. #define pwm_dbg(_pwm, msg...) dev_dbg(&(_pwm)->pdev->dev, msg)
  37. static struct clk *clk_scaler[2];
  38. static inline int pwm_is_tdiv(struct s3c_chip *chip)
  39. {
  40. return clk_get_parent(chip->clk) == chip->clk_div;
  41. }
  42. #define pwm_tcon_start(pwm) (1 << (pwm->tcon_base + 0))
  43. #define pwm_tcon_invert(pwm) (1 << (pwm->tcon_base + 2))
  44. #define pwm_tcon_autoreload(pwm) (1 << (pwm->tcon_base + 3))
  45. #define pwm_tcon_manulupdate(pwm) (1 << (pwm->tcon_base + 1))
  46. static int s3c_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  47. {
  48. struct s3c_chip *s3c = to_s3c_chip(chip);
  49. unsigned long flags;
  50. unsigned long tcon;
  51. local_irq_save(flags);
  52. tcon = __raw_readl(S3C2410_TCON);
  53. tcon |= pwm_tcon_start(s3c);
  54. __raw_writel(tcon, S3C2410_TCON);
  55. local_irq_restore(flags);
  56. return 0;
  57. }
  58. static void s3c_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  59. {
  60. struct s3c_chip *s3c = to_s3c_chip(chip);
  61. unsigned long flags;
  62. unsigned long tcon;
  63. local_irq_save(flags);
  64. tcon = __raw_readl(S3C2410_TCON);
  65. tcon &= ~pwm_tcon_start(s3c);
  66. __raw_writel(tcon, S3C2410_TCON);
  67. local_irq_restore(flags);
  68. }
  69. static unsigned long pwm_calc_tin(struct s3c_chip *s3c, unsigned long freq)
  70. {
  71. unsigned long tin_parent_rate;
  72. unsigned int div;
  73. tin_parent_rate = clk_get_rate(clk_get_parent(s3c->clk_div));
  74. pwm_dbg(s3c, "tin parent at %lu\n", tin_parent_rate);
  75. for (div = 2; div <= 16; div *= 2) {
  76. if ((tin_parent_rate / (div << 16)) < freq)
  77. return tin_parent_rate / div;
  78. }
  79. return tin_parent_rate / 16;
  80. }
  81. #define NS_IN_HZ (1000000000UL)
  82. static int s3c_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  83. int duty_ns, int period_ns)
  84. {
  85. struct s3c_chip *s3c = to_s3c_chip(chip);
  86. unsigned long tin_rate;
  87. unsigned long tin_ns;
  88. unsigned long period;
  89. unsigned long flags;
  90. unsigned long tcon;
  91. unsigned long tcnt;
  92. long tcmp;
  93. /* We currently avoid using 64bit arithmetic by using the
  94. * fact that anything faster than 1Hz is easily representable
  95. * by 32bits. */
  96. if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
  97. return -ERANGE;
  98. if (period_ns == s3c->period_ns &&
  99. duty_ns == s3c->duty_ns)
  100. return 0;
  101. /* The TCMP and TCNT can be read without a lock, they're not
  102. * shared between the timers. */
  103. tcmp = __raw_readl(S3C2410_TCMPB(s3c->pwm_id));
  104. tcnt = __raw_readl(S3C2410_TCNTB(s3c->pwm_id));
  105. period = NS_IN_HZ / period_ns;
  106. pwm_dbg(s3c, "duty_ns=%d, period_ns=%d (%lu)\n",
  107. duty_ns, period_ns, period);
  108. /* Check to see if we are changing the clock rate of the PWM */
  109. if (s3c->period_ns != period_ns) {
  110. if (pwm_is_tdiv(s3c)) {
  111. tin_rate = pwm_calc_tin(s3c, period);
  112. clk_set_rate(s3c->clk_div, tin_rate);
  113. } else
  114. tin_rate = clk_get_rate(s3c->clk);
  115. s3c->period_ns = period_ns;
  116. pwm_dbg(s3c, "tin_rate=%lu\n", tin_rate);
  117. tin_ns = NS_IN_HZ / tin_rate;
  118. tcnt = period_ns / tin_ns;
  119. } else
  120. tin_ns = NS_IN_HZ / clk_get_rate(s3c->clk);
  121. /* Note, counters count down */
  122. tcmp = duty_ns / tin_ns;
  123. tcmp = tcnt - tcmp;
  124. /* the pwm hw only checks the compare register after a decrement,
  125. so the pin never toggles if tcmp = tcnt */
  126. if (tcmp == tcnt)
  127. tcmp--;
  128. pwm_dbg(s3c, "tin_ns=%lu, tcmp=%ld/%lu\n", tin_ns, tcmp, tcnt);
  129. if (tcmp < 0)
  130. tcmp = 0;
  131. /* Update the PWM register block. */
  132. local_irq_save(flags);
  133. __raw_writel(tcmp, S3C2410_TCMPB(s3c->pwm_id));
  134. __raw_writel(tcnt, S3C2410_TCNTB(s3c->pwm_id));
  135. tcon = __raw_readl(S3C2410_TCON);
  136. tcon |= pwm_tcon_manulupdate(s3c);
  137. tcon |= pwm_tcon_autoreload(s3c);
  138. __raw_writel(tcon, S3C2410_TCON);
  139. tcon &= ~pwm_tcon_manulupdate(s3c);
  140. __raw_writel(tcon, S3C2410_TCON);
  141. local_irq_restore(flags);
  142. return 0;
  143. }
  144. static struct pwm_ops s3c_pwm_ops = {
  145. .enable = s3c_pwm_enable,
  146. .disable = s3c_pwm_disable,
  147. .config = s3c_pwm_config,
  148. .owner = THIS_MODULE,
  149. };
  150. static int s3c_pwm_probe(struct platform_device *pdev)
  151. {
  152. struct device *dev = &pdev->dev;
  153. struct s3c_chip *s3c;
  154. unsigned long flags;
  155. unsigned long tcon;
  156. unsigned int id = pdev->id;
  157. int ret;
  158. if (id == 4) {
  159. dev_err(dev, "TIMER4 is currently not supported\n");
  160. return -ENXIO;
  161. }
  162. s3c = devm_kzalloc(&pdev->dev, sizeof(*s3c), GFP_KERNEL);
  163. if (s3c == NULL) {
  164. dev_err(dev, "failed to allocate pwm_device\n");
  165. return -ENOMEM;
  166. }
  167. /* calculate base of control bits in TCON */
  168. s3c->tcon_base = id == 0 ? 0 : (id * 4) + 4;
  169. s3c->pwm_id = id;
  170. s3c->chip.dev = &pdev->dev;
  171. s3c->chip.ops = &s3c_pwm_ops;
  172. s3c->chip.base = -1;
  173. s3c->chip.npwm = 1;
  174. s3c->clk = devm_clk_get(dev, "pwm-tin");
  175. if (IS_ERR(s3c->clk)) {
  176. dev_err(dev, "failed to get pwm tin clk\n");
  177. return PTR_ERR(s3c->clk);
  178. }
  179. s3c->clk_div = devm_clk_get(dev, "pwm-tdiv");
  180. if (IS_ERR(s3c->clk_div)) {
  181. dev_err(dev, "failed to get pwm tdiv clk\n");
  182. return PTR_ERR(s3c->clk_div);
  183. }
  184. clk_enable(s3c->clk);
  185. clk_enable(s3c->clk_div);
  186. local_irq_save(flags);
  187. tcon = __raw_readl(S3C2410_TCON);
  188. tcon |= pwm_tcon_invert(s3c);
  189. __raw_writel(tcon, S3C2410_TCON);
  190. local_irq_restore(flags);
  191. ret = pwmchip_add(&s3c->chip);
  192. if (ret < 0) {
  193. dev_err(dev, "failed to register pwm\n");
  194. goto err_clk_tdiv;
  195. }
  196. pwm_dbg(s3c, "config bits %02x\n",
  197. (__raw_readl(S3C2410_TCON) >> s3c->tcon_base) & 0x0f);
  198. dev_info(dev, "tin at %lu, tdiv at %lu, tin=%sclk, base %d\n",
  199. clk_get_rate(s3c->clk),
  200. clk_get_rate(s3c->clk_div),
  201. pwm_is_tdiv(s3c) ? "div" : "ext", s3c->tcon_base);
  202. platform_set_drvdata(pdev, s3c);
  203. return 0;
  204. err_clk_tdiv:
  205. clk_disable(s3c->clk_div);
  206. clk_disable(s3c->clk);
  207. return ret;
  208. }
  209. static int s3c_pwm_remove(struct platform_device *pdev)
  210. {
  211. struct s3c_chip *s3c = platform_get_drvdata(pdev);
  212. int err;
  213. err = pwmchip_remove(&s3c->chip);
  214. if (err < 0)
  215. return err;
  216. clk_disable(s3c->clk_div);
  217. clk_disable(s3c->clk);
  218. return 0;
  219. }
  220. #ifdef CONFIG_PM
  221. static int s3c_pwm_suspend(struct platform_device *pdev, pm_message_t state)
  222. {
  223. struct s3c_chip *s3c = platform_get_drvdata(pdev);
  224. /* No one preserve these values during suspend so reset them
  225. * Otherwise driver leaves PWM unconfigured if same values
  226. * passed to pwm_config
  227. */
  228. s3c->period_ns = 0;
  229. s3c->duty_ns = 0;
  230. return 0;
  231. }
  232. static int s3c_pwm_resume(struct platform_device *pdev)
  233. {
  234. struct s3c_chip *s3c = platform_get_drvdata(pdev);
  235. unsigned long tcon;
  236. /* Restore invertion */
  237. tcon = __raw_readl(S3C2410_TCON);
  238. tcon |= pwm_tcon_invert(s3c);
  239. __raw_writel(tcon, S3C2410_TCON);
  240. return 0;
  241. }
  242. #else
  243. #define s3c_pwm_suspend NULL
  244. #define s3c_pwm_resume NULL
  245. #endif
  246. static struct platform_driver s3c_pwm_driver = {
  247. .driver = {
  248. .name = "s3c24xx-pwm",
  249. .owner = THIS_MODULE,
  250. },
  251. .probe = s3c_pwm_probe,
  252. .remove = s3c_pwm_remove,
  253. .suspend = s3c_pwm_suspend,
  254. .resume = s3c_pwm_resume,
  255. };
  256. static int __init pwm_init(void)
  257. {
  258. int ret;
  259. clk_scaler[0] = clk_get(NULL, "pwm-scaler0");
  260. clk_scaler[1] = clk_get(NULL, "pwm-scaler1");
  261. if (IS_ERR(clk_scaler[0]) || IS_ERR(clk_scaler[1])) {
  262. pr_err("failed to get scaler clocks\n");
  263. return -EINVAL;
  264. }
  265. ret = platform_driver_register(&s3c_pwm_driver);
  266. if (ret)
  267. pr_err("failed to add pwm driver\n");
  268. return ret;
  269. }
  270. arch_initcall(pwm_init);