pwm-pxa.c 4.6 KB

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  1. /*
  2. * drivers/pwm/pwm-pxa.c
  3. *
  4. * simple driver for PWM (Pulse Width Modulator) controller
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * 2008-02-13 initial version
  11. * eric miao <eric.miao@marvell.com>
  12. */
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/slab.h>
  17. #include <linux/err.h>
  18. #include <linux/clk.h>
  19. #include <linux/io.h>
  20. #include <linux/pwm.h>
  21. #include <asm/div64.h>
  22. #define HAS_SECONDARY_PWM 0x10
  23. #define PWM_ID_BASE(d) ((d) & 0xf)
  24. static const struct platform_device_id pwm_id_table[] = {
  25. /* PWM has_secondary_pwm? */
  26. { "pxa25x-pwm", 0 },
  27. { "pxa27x-pwm", 0 | HAS_SECONDARY_PWM },
  28. { "pxa168-pwm", 1 },
  29. { "pxa910-pwm", 1 },
  30. { },
  31. };
  32. MODULE_DEVICE_TABLE(platform, pwm_id_table);
  33. /* PWM registers and bits definitions */
  34. #define PWMCR (0x00)
  35. #define PWMDCR (0x04)
  36. #define PWMPCR (0x08)
  37. #define PWMCR_SD (1 << 6)
  38. #define PWMDCR_FD (1 << 10)
  39. struct pxa_pwm_chip {
  40. struct pwm_chip chip;
  41. struct device *dev;
  42. struct clk *clk;
  43. int clk_enabled;
  44. void __iomem *mmio_base;
  45. };
  46. static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
  47. {
  48. return container_of(chip, struct pxa_pwm_chip, chip);
  49. }
  50. /*
  51. * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
  52. * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
  53. */
  54. static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  55. int duty_ns, int period_ns)
  56. {
  57. struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
  58. unsigned long long c;
  59. unsigned long period_cycles, prescale, pv, dc;
  60. unsigned long offset;
  61. int rc;
  62. offset = pwm->hwpwm ? 0x10 : 0;
  63. c = clk_get_rate(pc->clk);
  64. c = c * period_ns;
  65. do_div(c, 1000000000);
  66. period_cycles = c;
  67. if (period_cycles < 1)
  68. period_cycles = 1;
  69. prescale = (period_cycles - 1) / 1024;
  70. pv = period_cycles / (prescale + 1) - 1;
  71. if (prescale > 63)
  72. return -EINVAL;
  73. if (duty_ns == period_ns)
  74. dc = PWMDCR_FD;
  75. else
  76. dc = (pv + 1) * duty_ns / period_ns;
  77. /* NOTE: the clock to PWM has to be enabled first
  78. * before writing to the registers
  79. */
  80. rc = clk_prepare_enable(pc->clk);
  81. if (rc < 0)
  82. return rc;
  83. writel(prescale, pc->mmio_base + offset + PWMCR);
  84. writel(dc, pc->mmio_base + offset + PWMDCR);
  85. writel(pv, pc->mmio_base + offset + PWMPCR);
  86. clk_disable_unprepare(pc->clk);
  87. return 0;
  88. }
  89. static int pxa_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  90. {
  91. struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
  92. int rc = 0;
  93. if (!pc->clk_enabled) {
  94. rc = clk_prepare_enable(pc->clk);
  95. if (!rc)
  96. pc->clk_enabled++;
  97. }
  98. return rc;
  99. }
  100. static void pxa_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  101. {
  102. struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
  103. if (pc->clk_enabled) {
  104. clk_disable_unprepare(pc->clk);
  105. pc->clk_enabled--;
  106. }
  107. }
  108. static struct pwm_ops pxa_pwm_ops = {
  109. .config = pxa_pwm_config,
  110. .enable = pxa_pwm_enable,
  111. .disable = pxa_pwm_disable,
  112. .owner = THIS_MODULE,
  113. };
  114. static int pwm_probe(struct platform_device *pdev)
  115. {
  116. const struct platform_device_id *id = platform_get_device_id(pdev);
  117. struct pxa_pwm_chip *pwm;
  118. struct resource *r;
  119. int ret = 0;
  120. pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
  121. if (pwm == NULL) {
  122. dev_err(&pdev->dev, "failed to allocate memory\n");
  123. return -ENOMEM;
  124. }
  125. pwm->clk = devm_clk_get(&pdev->dev, NULL);
  126. if (IS_ERR(pwm->clk))
  127. return PTR_ERR(pwm->clk);
  128. pwm->clk_enabled = 0;
  129. pwm->chip.dev = &pdev->dev;
  130. pwm->chip.ops = &pxa_pwm_ops;
  131. pwm->chip.base = -1;
  132. pwm->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1;
  133. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  134. if (r == NULL) {
  135. dev_err(&pdev->dev, "no memory resource defined\n");
  136. return -ENODEV;
  137. }
  138. pwm->mmio_base = devm_ioremap_resource(&pdev->dev, r);
  139. if (IS_ERR(pwm->mmio_base))
  140. return PTR_ERR(pwm->mmio_base);
  141. ret = pwmchip_add(&pwm->chip);
  142. if (ret < 0) {
  143. dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
  144. return ret;
  145. }
  146. platform_set_drvdata(pdev, pwm);
  147. return 0;
  148. }
  149. static int pwm_remove(struct platform_device *pdev)
  150. {
  151. struct pxa_pwm_chip *chip;
  152. chip = platform_get_drvdata(pdev);
  153. if (chip == NULL)
  154. return -ENODEV;
  155. return pwmchip_remove(&chip->chip);
  156. }
  157. static struct platform_driver pwm_driver = {
  158. .driver = {
  159. .name = "pxa25x-pwm",
  160. .owner = THIS_MODULE,
  161. },
  162. .probe = pwm_probe,
  163. .remove = pwm_remove,
  164. .id_table = pwm_id_table,
  165. };
  166. static int __init pwm_init(void)
  167. {
  168. return platform_driver_register(&pwm_driver);
  169. }
  170. arch_initcall(pwm_init);
  171. static void __exit pwm_exit(void)
  172. {
  173. platform_driver_unregister(&pwm_driver);
  174. }
  175. module_exit(pwm_exit);
  176. MODULE_LICENSE("GPL v2");