pinctrl-imx.h 2.8 KB

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  1. /*
  2. * IMX pinmux core definitions
  3. *
  4. * Copyright (C) 2012 Freescale Semiconductor, Inc.
  5. * Copyright (C) 2012 Linaro Ltd.
  6. *
  7. * Author: Dong Aisheng <dong.aisheng@linaro.org>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. */
  14. #ifndef __DRIVERS_PINCTRL_IMX_H
  15. #define __DRIVERS_PINCTRL_IMX_H
  16. struct platform_device;
  17. /**
  18. * struct imx_pin_group - describes an IMX pin group
  19. * @name: the name of this specific pin group
  20. * @pins: an array of discrete physical pins used in this group, taken
  21. * from the driver-local pin enumeration space
  22. * @npins: the number of pins in this group array, i.e. the number of
  23. * elements in .pins so we can iterate over that array
  24. * @mux_mode: the mux mode for each pin in this group. The size of this
  25. * array is the same as pins.
  26. * @configs: the config for each pin in this group. The size of this
  27. * array is the same as pins.
  28. */
  29. struct imx_pin_group {
  30. const char *name;
  31. unsigned int *pins;
  32. unsigned npins;
  33. unsigned int *mux_mode;
  34. unsigned long *configs;
  35. };
  36. /**
  37. * struct imx_pmx_func - describes IMX pinmux functions
  38. * @name: the name of this specific function
  39. * @groups: corresponding pin groups
  40. * @num_groups: the number of groups
  41. */
  42. struct imx_pmx_func {
  43. const char *name;
  44. const char **groups;
  45. unsigned num_groups;
  46. };
  47. /**
  48. * struct imx_pin_reg - describe a pin reg map
  49. * The last 3 members are used for select input setting
  50. * @pid: pin id
  51. * @mux_reg: mux register offset
  52. * @conf_reg: config register offset
  53. * @mux_mode: mux mode
  54. * @input_reg: select input register offset for this mux if any
  55. * 0 if no select input setting needed.
  56. * @input_val: the value set to select input register
  57. */
  58. struct imx_pin_reg {
  59. u16 pid;
  60. u16 mux_reg;
  61. u16 conf_reg;
  62. u8 mux_mode;
  63. u16 input_reg;
  64. u8 input_val;
  65. };
  66. struct imx_pinctrl_soc_info {
  67. struct device *dev;
  68. const struct pinctrl_pin_desc *pins;
  69. unsigned int npins;
  70. const struct imx_pin_reg *pin_regs;
  71. unsigned int npin_regs;
  72. struct imx_pin_group *groups;
  73. unsigned int ngroups;
  74. struct imx_pmx_func *functions;
  75. unsigned int nfunctions;
  76. };
  77. #define NO_MUX 0x0
  78. #define NO_PAD 0x0
  79. #define IMX_PIN_REG(id, conf, mux, mode, input, val) \
  80. { \
  81. .pid = id, \
  82. .conf_reg = conf, \
  83. .mux_reg = mux, \
  84. .mux_mode = mode, \
  85. .input_reg = input, \
  86. .input_val = val, \
  87. }
  88. #define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
  89. #define PAD_CTL_MASK(len) ((1 << len) - 1)
  90. #define IMX_MUX_MASK 0x7
  91. #define IOMUXC_CONFIG_SION (0x1 << 4)
  92. int imx_pinctrl_probe(struct platform_device *pdev,
  93. struct imx_pinctrl_soc_info *info);
  94. int imx_pinctrl_remove(struct platform_device *pdev);
  95. #endif /* __DRIVERS_PINCTRL_IMX_H */