proc.c 9.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479
  1. /*
  2. * Procfs interface for the PCI bus.
  3. *
  4. * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
  5. */
  6. #include <linux/init.h>
  7. #include <linux/pci.h>
  8. #include <linux/slab.h>
  9. #include <linux/module.h>
  10. #include <linux/proc_fs.h>
  11. #include <linux/seq_file.h>
  12. #include <linux/capability.h>
  13. #include <asm/uaccess.h>
  14. #include <asm/byteorder.h>
  15. #include "pci.h"
  16. static int proc_initialized; /* = 0 */
  17. static loff_t
  18. proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
  19. {
  20. loff_t new = -1;
  21. struct inode *inode = file_inode(file);
  22. mutex_lock(&inode->i_mutex);
  23. switch (whence) {
  24. case 0:
  25. new = off;
  26. break;
  27. case 1:
  28. new = file->f_pos + off;
  29. break;
  30. case 2:
  31. new = inode->i_size + off;
  32. break;
  33. }
  34. if (new < 0 || new > inode->i_size)
  35. new = -EINVAL;
  36. else
  37. file->f_pos = new;
  38. mutex_unlock(&inode->i_mutex);
  39. return new;
  40. }
  41. static ssize_t
  42. proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *ppos)
  43. {
  44. const struct inode *ino = file_inode(file);
  45. const struct proc_dir_entry *dp = PDE(ino);
  46. struct pci_dev *dev = dp->data;
  47. unsigned int pos = *ppos;
  48. unsigned int cnt, size;
  49. /*
  50. * Normal users can read only the standardized portion of the
  51. * configuration space as several chips lock up when trying to read
  52. * undefined locations (think of Intel PIIX4 as a typical example).
  53. */
  54. if (capable(CAP_SYS_ADMIN))
  55. size = dp->size;
  56. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  57. size = 128;
  58. else
  59. size = 64;
  60. if (pos >= size)
  61. return 0;
  62. if (nbytes >= size)
  63. nbytes = size;
  64. if (pos + nbytes > size)
  65. nbytes = size - pos;
  66. cnt = nbytes;
  67. if (!access_ok(VERIFY_WRITE, buf, cnt))
  68. return -EINVAL;
  69. pci_config_pm_runtime_get(dev);
  70. if ((pos & 1) && cnt) {
  71. unsigned char val;
  72. pci_user_read_config_byte(dev, pos, &val);
  73. __put_user(val, buf);
  74. buf++;
  75. pos++;
  76. cnt--;
  77. }
  78. if ((pos & 3) && cnt > 2) {
  79. unsigned short val;
  80. pci_user_read_config_word(dev, pos, &val);
  81. __put_user(cpu_to_le16(val), (__le16 __user *) buf);
  82. buf += 2;
  83. pos += 2;
  84. cnt -= 2;
  85. }
  86. while (cnt >= 4) {
  87. unsigned int val;
  88. pci_user_read_config_dword(dev, pos, &val);
  89. __put_user(cpu_to_le32(val), (__le32 __user *) buf);
  90. buf += 4;
  91. pos += 4;
  92. cnt -= 4;
  93. }
  94. if (cnt >= 2) {
  95. unsigned short val;
  96. pci_user_read_config_word(dev, pos, &val);
  97. __put_user(cpu_to_le16(val), (__le16 __user *) buf);
  98. buf += 2;
  99. pos += 2;
  100. cnt -= 2;
  101. }
  102. if (cnt) {
  103. unsigned char val;
  104. pci_user_read_config_byte(dev, pos, &val);
  105. __put_user(val, buf);
  106. buf++;
  107. pos++;
  108. cnt--;
  109. }
  110. pci_config_pm_runtime_put(dev);
  111. *ppos = pos;
  112. return nbytes;
  113. }
  114. static ssize_t
  115. proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos)
  116. {
  117. struct inode *ino = file_inode(file);
  118. const struct proc_dir_entry *dp = PDE(ino);
  119. struct pci_dev *dev = dp->data;
  120. int pos = *ppos;
  121. int size = dp->size;
  122. int cnt;
  123. if (pos >= size)
  124. return 0;
  125. if (nbytes >= size)
  126. nbytes = size;
  127. if (pos + nbytes > size)
  128. nbytes = size - pos;
  129. cnt = nbytes;
  130. if (!access_ok(VERIFY_READ, buf, cnt))
  131. return -EINVAL;
  132. pci_config_pm_runtime_get(dev);
  133. if ((pos & 1) && cnt) {
  134. unsigned char val;
  135. __get_user(val, buf);
  136. pci_user_write_config_byte(dev, pos, val);
  137. buf++;
  138. pos++;
  139. cnt--;
  140. }
  141. if ((pos & 3) && cnt > 2) {
  142. __le16 val;
  143. __get_user(val, (__le16 __user *) buf);
  144. pci_user_write_config_word(dev, pos, le16_to_cpu(val));
  145. buf += 2;
  146. pos += 2;
  147. cnt -= 2;
  148. }
  149. while (cnt >= 4) {
  150. __le32 val;
  151. __get_user(val, (__le32 __user *) buf);
  152. pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
  153. buf += 4;
  154. pos += 4;
  155. cnt -= 4;
  156. }
  157. if (cnt >= 2) {
  158. __le16 val;
  159. __get_user(val, (__le16 __user *) buf);
  160. pci_user_write_config_word(dev, pos, le16_to_cpu(val));
  161. buf += 2;
  162. pos += 2;
  163. cnt -= 2;
  164. }
  165. if (cnt) {
  166. unsigned char val;
  167. __get_user(val, buf);
  168. pci_user_write_config_byte(dev, pos, val);
  169. buf++;
  170. pos++;
  171. cnt--;
  172. }
  173. pci_config_pm_runtime_put(dev);
  174. *ppos = pos;
  175. i_size_write(ino, dp->size);
  176. return nbytes;
  177. }
  178. struct pci_filp_private {
  179. enum pci_mmap_state mmap_state;
  180. int write_combine;
  181. };
  182. static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
  183. unsigned long arg)
  184. {
  185. const struct proc_dir_entry *dp = PDE(file_inode(file));
  186. struct pci_dev *dev = dp->data;
  187. #ifdef HAVE_PCI_MMAP
  188. struct pci_filp_private *fpriv = file->private_data;
  189. #endif /* HAVE_PCI_MMAP */
  190. int ret = 0;
  191. switch (cmd) {
  192. case PCIIOC_CONTROLLER:
  193. ret = pci_domain_nr(dev->bus);
  194. break;
  195. #ifdef HAVE_PCI_MMAP
  196. case PCIIOC_MMAP_IS_IO:
  197. fpriv->mmap_state = pci_mmap_io;
  198. break;
  199. case PCIIOC_MMAP_IS_MEM:
  200. fpriv->mmap_state = pci_mmap_mem;
  201. break;
  202. case PCIIOC_WRITE_COMBINE:
  203. if (arg)
  204. fpriv->write_combine = 1;
  205. else
  206. fpriv->write_combine = 0;
  207. break;
  208. #endif /* HAVE_PCI_MMAP */
  209. default:
  210. ret = -EINVAL;
  211. break;
  212. };
  213. return ret;
  214. }
  215. #ifdef HAVE_PCI_MMAP
  216. static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
  217. {
  218. struct inode *inode = file_inode(file);
  219. const struct proc_dir_entry *dp = PDE(inode);
  220. struct pci_dev *dev = dp->data;
  221. struct pci_filp_private *fpriv = file->private_data;
  222. int i, ret;
  223. if (!capable(CAP_SYS_RAWIO))
  224. return -EPERM;
  225. /* Make sure the caller is mapping a real resource for this device */
  226. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  227. if (pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS))
  228. break;
  229. }
  230. if (i >= PCI_ROM_RESOURCE)
  231. return -ENODEV;
  232. ret = pci_mmap_page_range(dev, vma,
  233. fpriv->mmap_state,
  234. fpriv->write_combine);
  235. if (ret < 0)
  236. return ret;
  237. return 0;
  238. }
  239. static int proc_bus_pci_open(struct inode *inode, struct file *file)
  240. {
  241. struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
  242. if (!fpriv)
  243. return -ENOMEM;
  244. fpriv->mmap_state = pci_mmap_io;
  245. fpriv->write_combine = 0;
  246. file->private_data = fpriv;
  247. return 0;
  248. }
  249. static int proc_bus_pci_release(struct inode *inode, struct file *file)
  250. {
  251. kfree(file->private_data);
  252. file->private_data = NULL;
  253. return 0;
  254. }
  255. #endif /* HAVE_PCI_MMAP */
  256. static const struct file_operations proc_bus_pci_operations = {
  257. .owner = THIS_MODULE,
  258. .llseek = proc_bus_pci_lseek,
  259. .read = proc_bus_pci_read,
  260. .write = proc_bus_pci_write,
  261. .unlocked_ioctl = proc_bus_pci_ioctl,
  262. .compat_ioctl = proc_bus_pci_ioctl,
  263. #ifdef HAVE_PCI_MMAP
  264. .open = proc_bus_pci_open,
  265. .release = proc_bus_pci_release,
  266. .mmap = proc_bus_pci_mmap,
  267. #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
  268. .get_unmapped_area = get_pci_unmapped_area,
  269. #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
  270. #endif /* HAVE_PCI_MMAP */
  271. };
  272. /* iterator */
  273. static void *pci_seq_start(struct seq_file *m, loff_t *pos)
  274. {
  275. struct pci_dev *dev = NULL;
  276. loff_t n = *pos;
  277. for_each_pci_dev(dev) {
  278. if (!n--)
  279. break;
  280. }
  281. return dev;
  282. }
  283. static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
  284. {
  285. struct pci_dev *dev = v;
  286. (*pos)++;
  287. dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
  288. return dev;
  289. }
  290. static void pci_seq_stop(struct seq_file *m, void *v)
  291. {
  292. if (v) {
  293. struct pci_dev *dev = v;
  294. pci_dev_put(dev);
  295. }
  296. }
  297. static int show_device(struct seq_file *m, void *v)
  298. {
  299. const struct pci_dev *dev = v;
  300. const struct pci_driver *drv;
  301. int i;
  302. if (dev == NULL)
  303. return 0;
  304. drv = pci_dev_driver(dev);
  305. seq_printf(m, "%02x%02x\t%04x%04x\t%x",
  306. dev->bus->number,
  307. dev->devfn,
  308. dev->vendor,
  309. dev->device,
  310. dev->irq);
  311. /* only print standard and ROM resources to preserve compatibility */
  312. for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
  313. resource_size_t start, end;
  314. pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
  315. seq_printf(m, "\t%16llx",
  316. (unsigned long long)(start |
  317. (dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
  318. }
  319. for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
  320. resource_size_t start, end;
  321. pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
  322. seq_printf(m, "\t%16llx",
  323. dev->resource[i].start < dev->resource[i].end ?
  324. (unsigned long long)(end - start) + 1 : 0);
  325. }
  326. seq_putc(m, '\t');
  327. if (drv)
  328. seq_printf(m, "%s", drv->name);
  329. seq_putc(m, '\n');
  330. return 0;
  331. }
  332. static const struct seq_operations proc_bus_pci_devices_op = {
  333. .start = pci_seq_start,
  334. .next = pci_seq_next,
  335. .stop = pci_seq_stop,
  336. .show = show_device
  337. };
  338. static struct proc_dir_entry *proc_bus_pci_dir;
  339. int pci_proc_attach_device(struct pci_dev *dev)
  340. {
  341. struct pci_bus *bus = dev->bus;
  342. struct proc_dir_entry *e;
  343. char name[16];
  344. if (!proc_initialized)
  345. return -EACCES;
  346. if (!bus->procdir) {
  347. if (pci_proc_domain(bus)) {
  348. sprintf(name, "%04x:%02x", pci_domain_nr(bus),
  349. bus->number);
  350. } else {
  351. sprintf(name, "%02x", bus->number);
  352. }
  353. bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
  354. if (!bus->procdir)
  355. return -ENOMEM;
  356. }
  357. sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  358. e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir,
  359. &proc_bus_pci_operations, dev);
  360. if (!e)
  361. return -ENOMEM;
  362. e->size = dev->cfg_size;
  363. dev->procent = e;
  364. return 0;
  365. }
  366. int pci_proc_detach_device(struct pci_dev *dev)
  367. {
  368. struct proc_dir_entry *e;
  369. if ((e = dev->procent)) {
  370. remove_proc_entry(e->name, dev->bus->procdir);
  371. dev->procent = NULL;
  372. }
  373. return 0;
  374. }
  375. int pci_proc_detach_bus(struct pci_bus* bus)
  376. {
  377. struct proc_dir_entry *de = bus->procdir;
  378. if (de)
  379. remove_proc_entry(de->name, proc_bus_pci_dir);
  380. return 0;
  381. }
  382. static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
  383. {
  384. return seq_open(file, &proc_bus_pci_devices_op);
  385. }
  386. static const struct file_operations proc_bus_pci_dev_operations = {
  387. .owner = THIS_MODULE,
  388. .open = proc_bus_pci_dev_open,
  389. .read = seq_read,
  390. .llseek = seq_lseek,
  391. .release = seq_release,
  392. };
  393. static int __init pci_proc_init(void)
  394. {
  395. struct pci_dev *dev = NULL;
  396. proc_bus_pci_dir = proc_mkdir("bus/pci", NULL);
  397. proc_create("devices", 0, proc_bus_pci_dir,
  398. &proc_bus_pci_dev_operations);
  399. proc_initialized = 1;
  400. for_each_pci_dev(dev)
  401. pci_proc_attach_device(dev);
  402. return 0;
  403. }
  404. device_initcall(pci_proc_init);