portdrv_core.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574
  1. /*
  2. * File: portdrv_core.c
  3. * Purpose: PCI Express Port Bus Driver's Core Functions
  4. *
  5. * Copyright (C) 2004 Intel
  6. * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
  7. */
  8. #include <linux/module.h>
  9. #include <linux/pci.h>
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/pm.h>
  13. #include <linux/string.h>
  14. #include <linux/slab.h>
  15. #include <linux/pcieport_if.h>
  16. #include <linux/aer.h>
  17. #include "../pci.h"
  18. #include "portdrv.h"
  19. bool pciehp_msi_disabled;
  20. static int __init pciehp_setup(char *str)
  21. {
  22. if (!strncmp(str, "nomsi", 5))
  23. pciehp_msi_disabled = true;
  24. return 1;
  25. }
  26. __setup("pcie_hp=", pciehp_setup);
  27. /**
  28. * release_pcie_device - free PCI Express port service device structure
  29. * @dev: Port service device to release
  30. *
  31. * Invoked automatically when device is being removed in response to
  32. * device_unregister(dev). Release all resources being claimed.
  33. */
  34. static void release_pcie_device(struct device *dev)
  35. {
  36. kfree(to_pcie_device(dev));
  37. }
  38. /**
  39. * pcie_port_msix_add_entry - add entry to given array of MSI-X entries
  40. * @entries: Array of MSI-X entries
  41. * @new_entry: Index of the entry to add to the array
  42. * @nr_entries: Number of entries aleady in the array
  43. *
  44. * Return value: Position of the added entry in the array
  45. */
  46. static int pcie_port_msix_add_entry(
  47. struct msix_entry *entries, int new_entry, int nr_entries)
  48. {
  49. int j;
  50. for (j = 0; j < nr_entries; j++)
  51. if (entries[j].entry == new_entry)
  52. return j;
  53. entries[j].entry = new_entry;
  54. return j;
  55. }
  56. /**
  57. * pcie_port_enable_msix - try to set up MSI-X as interrupt mode for given port
  58. * @dev: PCI Express port to handle
  59. * @vectors: Array of interrupt vectors to populate
  60. * @mask: Bitmask of port capabilities returned by get_port_device_capability()
  61. *
  62. * Return value: 0 on success, error code on failure
  63. */
  64. static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask)
  65. {
  66. struct msix_entry *msix_entries;
  67. int idx[PCIE_PORT_DEVICE_MAXSERVICES];
  68. int nr_entries, status, pos, i, nvec;
  69. u16 reg16;
  70. u32 reg32;
  71. nr_entries = pci_msix_table_size(dev);
  72. if (!nr_entries)
  73. return -EINVAL;
  74. if (nr_entries > PCIE_PORT_MAX_MSIX_ENTRIES)
  75. nr_entries = PCIE_PORT_MAX_MSIX_ENTRIES;
  76. msix_entries = kzalloc(sizeof(*msix_entries) * nr_entries, GFP_KERNEL);
  77. if (!msix_entries)
  78. return -ENOMEM;
  79. /*
  80. * Allocate as many entries as the port wants, so that we can check
  81. * which of them will be useful. Moreover, if nr_entries is correctly
  82. * equal to the number of entries this port actually uses, we'll happily
  83. * go through without any tricks.
  84. */
  85. for (i = 0; i < nr_entries; i++)
  86. msix_entries[i].entry = i;
  87. status = pci_enable_msix(dev, msix_entries, nr_entries);
  88. if (status)
  89. goto Exit;
  90. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
  91. idx[i] = -1;
  92. status = -EIO;
  93. nvec = 0;
  94. if (mask & (PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP)) {
  95. int entry;
  96. /*
  97. * The code below follows the PCI Express Base Specification 2.0
  98. * stating in Section 6.1.6 that "PME and Hot-Plug Event
  99. * interrupts (when both are implemented) always share the same
  100. * MSI or MSI-X vector, as indicated by the Interrupt Message
  101. * Number field in the PCI Express Capabilities register", where
  102. * according to Section 7.8.2 of the specification "For MSI-X,
  103. * the value in this field indicates which MSI-X Table entry is
  104. * used to generate the interrupt message."
  105. */
  106. pcie_capability_read_word(dev, PCI_EXP_FLAGS, &reg16);
  107. entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9;
  108. if (entry >= nr_entries)
  109. goto Error;
  110. i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
  111. if (i == nvec)
  112. nvec++;
  113. idx[PCIE_PORT_SERVICE_PME_SHIFT] = i;
  114. idx[PCIE_PORT_SERVICE_HP_SHIFT] = i;
  115. }
  116. if (mask & PCIE_PORT_SERVICE_AER) {
  117. int entry;
  118. /*
  119. * The code below follows Section 7.10.10 of the PCI Express
  120. * Base Specification 2.0 stating that bits 31-27 of the Root
  121. * Error Status Register contain a value indicating which of the
  122. * MSI/MSI-X vectors assigned to the port is going to be used
  123. * for AER, where "For MSI-X, the value in this register
  124. * indicates which MSI-X Table entry is used to generate the
  125. * interrupt message."
  126. */
  127. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  128. pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &reg32);
  129. entry = reg32 >> 27;
  130. if (entry >= nr_entries)
  131. goto Error;
  132. i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
  133. if (i == nvec)
  134. nvec++;
  135. idx[PCIE_PORT_SERVICE_AER_SHIFT] = i;
  136. }
  137. /*
  138. * If nvec is equal to the allocated number of entries, we can just use
  139. * what we have. Otherwise, the port has some extra entries not for the
  140. * services we know and we need to work around that.
  141. */
  142. if (nvec == nr_entries) {
  143. status = 0;
  144. } else {
  145. /* Drop the temporary MSI-X setup */
  146. pci_disable_msix(dev);
  147. /* Now allocate the MSI-X vectors for real */
  148. status = pci_enable_msix(dev, msix_entries, nvec);
  149. if (status)
  150. goto Exit;
  151. }
  152. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
  153. vectors[i] = idx[i] >= 0 ? msix_entries[idx[i]].vector : -1;
  154. Exit:
  155. kfree(msix_entries);
  156. return status;
  157. Error:
  158. pci_disable_msix(dev);
  159. goto Exit;
  160. }
  161. /**
  162. * init_service_irqs - initialize irqs for PCI Express port services
  163. * @dev: PCI Express port to handle
  164. * @irqs: Array of irqs to populate
  165. * @mask: Bitmask of port capabilities returned by get_port_device_capability()
  166. *
  167. * Return value: Interrupt mode associated with the port
  168. */
  169. static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
  170. {
  171. int i, irq = -1;
  172. /*
  173. * If MSI cannot be used for PCIe PME or hotplug, we have to use
  174. * INTx or other interrupts, e.g. system shared interrupt.
  175. */
  176. if (((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) ||
  177. ((mask & PCIE_PORT_SERVICE_HP) && pciehp_no_msi())) {
  178. if (dev->irq)
  179. irq = dev->irq;
  180. goto no_msi;
  181. }
  182. /* Try to use MSI-X if supported */
  183. if (!pcie_port_enable_msix(dev, irqs, mask))
  184. return 0;
  185. /*
  186. * We're not going to use MSI-X, so try MSI and fall back to INTx.
  187. * If neither MSI/MSI-X nor INTx available, try other interrupt. On
  188. * some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
  189. */
  190. if (!pci_enable_msi(dev) || dev->irq)
  191. irq = dev->irq;
  192. no_msi:
  193. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
  194. irqs[i] = irq;
  195. irqs[PCIE_PORT_SERVICE_VC_SHIFT] = -1;
  196. if (irq < 0)
  197. return -ENODEV;
  198. return 0;
  199. }
  200. static void cleanup_service_irqs(struct pci_dev *dev)
  201. {
  202. if (dev->msix_enabled)
  203. pci_disable_msix(dev);
  204. else if (dev->msi_enabled)
  205. pci_disable_msi(dev);
  206. }
  207. /**
  208. * get_port_device_capability - discover capabilities of a PCI Express port
  209. * @dev: PCI Express port to examine
  210. *
  211. * The capabilities are read from the port's PCI Express configuration registers
  212. * as described in PCI Express Base Specification 1.0a sections 7.8.2, 7.8.9 and
  213. * 7.9 - 7.11.
  214. *
  215. * Return value: Bitmask of discovered port capabilities
  216. */
  217. static int get_port_device_capability(struct pci_dev *dev)
  218. {
  219. int services = 0;
  220. u32 reg32;
  221. int cap_mask = 0;
  222. int err;
  223. if (pcie_ports_disabled)
  224. return 0;
  225. err = pcie_port_platform_notify(dev, &cap_mask);
  226. if (!pcie_ports_auto) {
  227. cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
  228. | PCIE_PORT_SERVICE_VC;
  229. if (pci_aer_available())
  230. cap_mask |= PCIE_PORT_SERVICE_AER;
  231. } else if (err) {
  232. return 0;
  233. }
  234. /* Hot-Plug Capable */
  235. if ((cap_mask & PCIE_PORT_SERVICE_HP) &&
  236. pcie_caps_reg(dev) & PCI_EXP_FLAGS_SLOT) {
  237. pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, &reg32);
  238. if (reg32 & PCI_EXP_SLTCAP_HPC) {
  239. services |= PCIE_PORT_SERVICE_HP;
  240. /*
  241. * Disable hot-plug interrupts in case they have been
  242. * enabled by the BIOS and the hot-plug service driver
  243. * is not loaded.
  244. */
  245. pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
  246. PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
  247. }
  248. }
  249. /* AER capable */
  250. if ((cap_mask & PCIE_PORT_SERVICE_AER)
  251. && pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) {
  252. services |= PCIE_PORT_SERVICE_AER;
  253. /*
  254. * Disable AER on this port in case it's been enabled by the
  255. * BIOS (the AER service driver will enable it when necessary).
  256. */
  257. pci_disable_pcie_error_reporting(dev);
  258. }
  259. /* VC support */
  260. if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_VC))
  261. services |= PCIE_PORT_SERVICE_VC;
  262. /* Root ports are capable of generating PME too */
  263. if ((cap_mask & PCIE_PORT_SERVICE_PME)
  264. && pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
  265. services |= PCIE_PORT_SERVICE_PME;
  266. /*
  267. * Disable PME interrupt on this port in case it's been enabled
  268. * by the BIOS (the PME service driver will enable it when
  269. * necessary).
  270. */
  271. pcie_pme_interrupt_enable(dev, false);
  272. }
  273. return services;
  274. }
  275. /**
  276. * pcie_device_init - allocate and initialize PCI Express port service device
  277. * @pdev: PCI Express port to associate the service device with
  278. * @service: Type of service to associate with the service device
  279. * @irq: Interrupt vector to associate with the service device
  280. */
  281. static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
  282. {
  283. int retval;
  284. struct pcie_device *pcie;
  285. struct device *device;
  286. pcie = kzalloc(sizeof(*pcie), GFP_KERNEL);
  287. if (!pcie)
  288. return -ENOMEM;
  289. pcie->port = pdev;
  290. pcie->irq = irq;
  291. pcie->service = service;
  292. /* Initialize generic device interface */
  293. device = &pcie->device;
  294. device->bus = &pcie_port_bus_type;
  295. device->release = release_pcie_device; /* callback to free pcie dev */
  296. dev_set_name(device, "%s:pcie%02x",
  297. pci_name(pdev),
  298. get_descriptor_id(pci_pcie_type(pdev), service));
  299. device->parent = &pdev->dev;
  300. device_enable_async_suspend(device);
  301. retval = device_register(device);
  302. if (retval)
  303. kfree(pcie);
  304. else
  305. get_device(device);
  306. return retval;
  307. }
  308. /**
  309. * pcie_port_device_register - register PCI Express port
  310. * @dev: PCI Express port to register
  311. *
  312. * Allocate the port extension structure and register services associated with
  313. * the port.
  314. */
  315. int pcie_port_device_register(struct pci_dev *dev)
  316. {
  317. int status, capabilities, i, nr_service;
  318. int irqs[PCIE_PORT_DEVICE_MAXSERVICES];
  319. /* Enable PCI Express port device */
  320. status = pci_enable_device(dev);
  321. if (status)
  322. return status;
  323. /* Get and check PCI Express port services */
  324. capabilities = get_port_device_capability(dev);
  325. if (!capabilities)
  326. return 0;
  327. pci_set_master(dev);
  328. /*
  329. * Initialize service irqs. Don't use service devices that
  330. * require interrupts if there is no way to generate them.
  331. */
  332. status = init_service_irqs(dev, irqs, capabilities);
  333. if (status) {
  334. capabilities &= PCIE_PORT_SERVICE_VC;
  335. if (!capabilities)
  336. goto error_disable;
  337. }
  338. /* Allocate child services if any */
  339. status = -ENODEV;
  340. nr_service = 0;
  341. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
  342. int service = 1 << i;
  343. if (!(capabilities & service))
  344. continue;
  345. if (!pcie_device_init(dev, service, irqs[i]))
  346. nr_service++;
  347. }
  348. if (!nr_service)
  349. goto error_cleanup_irqs;
  350. return 0;
  351. error_cleanup_irqs:
  352. cleanup_service_irqs(dev);
  353. error_disable:
  354. pci_disable_device(dev);
  355. return status;
  356. }
  357. #ifdef CONFIG_PM
  358. static int suspend_iter(struct device *dev, void *data)
  359. {
  360. struct pcie_port_service_driver *service_driver;
  361. if ((dev->bus == &pcie_port_bus_type) && dev->driver) {
  362. service_driver = to_service_driver(dev->driver);
  363. if (service_driver->suspend)
  364. service_driver->suspend(to_pcie_device(dev));
  365. }
  366. return 0;
  367. }
  368. /**
  369. * pcie_port_device_suspend - suspend port services associated with a PCIe port
  370. * @dev: PCI Express port to handle
  371. */
  372. int pcie_port_device_suspend(struct device *dev)
  373. {
  374. return device_for_each_child(dev, NULL, suspend_iter);
  375. }
  376. static int resume_iter(struct device *dev, void *data)
  377. {
  378. struct pcie_port_service_driver *service_driver;
  379. if ((dev->bus == &pcie_port_bus_type) &&
  380. (dev->driver)) {
  381. service_driver = to_service_driver(dev->driver);
  382. if (service_driver->resume)
  383. service_driver->resume(to_pcie_device(dev));
  384. }
  385. return 0;
  386. }
  387. /**
  388. * pcie_port_device_suspend - resume port services associated with a PCIe port
  389. * @dev: PCI Express port to handle
  390. */
  391. int pcie_port_device_resume(struct device *dev)
  392. {
  393. return device_for_each_child(dev, NULL, resume_iter);
  394. }
  395. #endif /* PM */
  396. static int remove_iter(struct device *dev, void *data)
  397. {
  398. if (dev->bus == &pcie_port_bus_type) {
  399. put_device(dev);
  400. device_unregister(dev);
  401. }
  402. return 0;
  403. }
  404. /**
  405. * pcie_port_device_remove - unregister PCI Express port service devices
  406. * @dev: PCI Express port the service devices to unregister are associated with
  407. *
  408. * Remove PCI Express port service devices associated with given port and
  409. * disable MSI-X or MSI for the port.
  410. */
  411. void pcie_port_device_remove(struct pci_dev *dev)
  412. {
  413. device_for_each_child(&dev->dev, NULL, remove_iter);
  414. cleanup_service_irqs(dev);
  415. pci_disable_device(dev);
  416. }
  417. /**
  418. * pcie_port_probe_service - probe driver for given PCI Express port service
  419. * @dev: PCI Express port service device to probe against
  420. *
  421. * If PCI Express port service driver is registered with
  422. * pcie_port_service_register(), this function will be called by the driver core
  423. * whenever match is found between the driver and a port service device.
  424. */
  425. static int pcie_port_probe_service(struct device *dev)
  426. {
  427. struct pcie_device *pciedev;
  428. struct pcie_port_service_driver *driver;
  429. int status;
  430. if (!dev || !dev->driver)
  431. return -ENODEV;
  432. driver = to_service_driver(dev->driver);
  433. if (!driver || !driver->probe)
  434. return -ENODEV;
  435. pciedev = to_pcie_device(dev);
  436. status = driver->probe(pciedev);
  437. if (!status) {
  438. dev_printk(KERN_DEBUG, dev, "service driver %s loaded\n",
  439. driver->name);
  440. get_device(dev);
  441. }
  442. return status;
  443. }
  444. /**
  445. * pcie_port_remove_service - detach driver from given PCI Express port service
  446. * @dev: PCI Express port service device to handle
  447. *
  448. * If PCI Express port service driver is registered with
  449. * pcie_port_service_register(), this function will be called by the driver core
  450. * when device_unregister() is called for the port service device associated
  451. * with the driver.
  452. */
  453. static int pcie_port_remove_service(struct device *dev)
  454. {
  455. struct pcie_device *pciedev;
  456. struct pcie_port_service_driver *driver;
  457. if (!dev || !dev->driver)
  458. return 0;
  459. pciedev = to_pcie_device(dev);
  460. driver = to_service_driver(dev->driver);
  461. if (driver && driver->remove) {
  462. dev_printk(KERN_DEBUG, dev, "unloading service driver %s\n",
  463. driver->name);
  464. driver->remove(pciedev);
  465. put_device(dev);
  466. }
  467. return 0;
  468. }
  469. /**
  470. * pcie_port_shutdown_service - shut down given PCI Express port service
  471. * @dev: PCI Express port service device to handle
  472. *
  473. * If PCI Express port service driver is registered with
  474. * pcie_port_service_register(), this function will be called by the driver core
  475. * when device_shutdown() is called for the port service device associated
  476. * with the driver.
  477. */
  478. static void pcie_port_shutdown_service(struct device *dev) {}
  479. /**
  480. * pcie_port_service_register - register PCI Express port service driver
  481. * @new: PCI Express port service driver to register
  482. */
  483. int pcie_port_service_register(struct pcie_port_service_driver *new)
  484. {
  485. if (pcie_ports_disabled)
  486. return -ENODEV;
  487. new->driver.name = (char *)new->name;
  488. new->driver.bus = &pcie_port_bus_type;
  489. new->driver.probe = pcie_port_probe_service;
  490. new->driver.remove = pcie_port_remove_service;
  491. new->driver.shutdown = pcie_port_shutdown_service;
  492. return driver_register(&new->driver);
  493. }
  494. EXPORT_SYMBOL(pcie_port_service_register);
  495. /**
  496. * pcie_port_service_unregister - unregister PCI Express port service driver
  497. * @drv: PCI Express port service driver to unregister
  498. */
  499. void pcie_port_service_unregister(struct pcie_port_service_driver *drv)
  500. {
  501. driver_unregister(&drv->driver);
  502. }
  503. EXPORT_SYMBOL(pcie_port_service_unregister);