pci-sysfs.c 37 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include "pci.h"
  31. static int sysfs_initialized; /* = 0 */
  32. /* show configuration fields */
  33. #define pci_config_attr(field, format_string) \
  34. static ssize_t \
  35. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  36. { \
  37. struct pci_dev *pdev; \
  38. \
  39. pdev = to_pci_dev (dev); \
  40. return sprintf (buf, format_string, pdev->field); \
  41. }
  42. pci_config_attr(vendor, "0x%04x\n");
  43. pci_config_attr(device, "0x%04x\n");
  44. pci_config_attr(subsystem_vendor, "0x%04x\n");
  45. pci_config_attr(subsystem_device, "0x%04x\n");
  46. pci_config_attr(class, "0x%06x\n");
  47. pci_config_attr(irq, "%u\n");
  48. static ssize_t broken_parity_status_show(struct device *dev,
  49. struct device_attribute *attr,
  50. char *buf)
  51. {
  52. struct pci_dev *pdev = to_pci_dev(dev);
  53. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  54. }
  55. static ssize_t broken_parity_status_store(struct device *dev,
  56. struct device_attribute *attr,
  57. const char *buf, size_t count)
  58. {
  59. struct pci_dev *pdev = to_pci_dev(dev);
  60. unsigned long val;
  61. if (strict_strtoul(buf, 0, &val) < 0)
  62. return -EINVAL;
  63. pdev->broken_parity_status = !!val;
  64. return count;
  65. }
  66. static ssize_t local_cpus_show(struct device *dev,
  67. struct device_attribute *attr, char *buf)
  68. {
  69. const struct cpumask *mask;
  70. int len;
  71. #ifdef CONFIG_NUMA
  72. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  73. cpumask_of_node(dev_to_node(dev));
  74. #else
  75. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  76. #endif
  77. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  78. buf[len++] = '\n';
  79. buf[len] = '\0';
  80. return len;
  81. }
  82. static ssize_t local_cpulist_show(struct device *dev,
  83. struct device_attribute *attr, char *buf)
  84. {
  85. const struct cpumask *mask;
  86. int len;
  87. #ifdef CONFIG_NUMA
  88. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  89. cpumask_of_node(dev_to_node(dev));
  90. #else
  91. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  92. #endif
  93. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  94. buf[len++] = '\n';
  95. buf[len] = '\0';
  96. return len;
  97. }
  98. /*
  99. * PCI Bus Class Devices
  100. */
  101. static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
  102. int type,
  103. struct device_attribute *attr,
  104. char *buf)
  105. {
  106. int ret;
  107. const struct cpumask *cpumask;
  108. cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  109. ret = type ?
  110. cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
  111. cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
  112. buf[ret++] = '\n';
  113. buf[ret] = '\0';
  114. return ret;
  115. }
  116. static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
  117. struct device_attribute *attr,
  118. char *buf)
  119. {
  120. return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
  121. }
  122. static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
  123. struct device_attribute *attr,
  124. char *buf)
  125. {
  126. return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
  127. }
  128. /* show resources */
  129. static ssize_t
  130. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  131. {
  132. struct pci_dev * pci_dev = to_pci_dev(dev);
  133. char * str = buf;
  134. int i;
  135. int max;
  136. resource_size_t start, end;
  137. if (pci_dev->subordinate)
  138. max = DEVICE_COUNT_RESOURCE;
  139. else
  140. max = PCI_BRIDGE_RESOURCES;
  141. for (i = 0; i < max; i++) {
  142. struct resource *res = &pci_dev->resource[i];
  143. pci_resource_to_user(pci_dev, i, res, &start, &end);
  144. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  145. (unsigned long long)start,
  146. (unsigned long long)end,
  147. (unsigned long long)res->flags);
  148. }
  149. return (str - buf);
  150. }
  151. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  152. {
  153. struct pci_dev *pci_dev = to_pci_dev(dev);
  154. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  155. pci_dev->vendor, pci_dev->device,
  156. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  157. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  158. (u8)(pci_dev->class));
  159. }
  160. static ssize_t is_enabled_store(struct device *dev,
  161. struct device_attribute *attr, const char *buf,
  162. size_t count)
  163. {
  164. struct pci_dev *pdev = to_pci_dev(dev);
  165. unsigned long val;
  166. ssize_t result = strict_strtoul(buf, 0, &val);
  167. if (result < 0)
  168. return result;
  169. /* this can crash the machine when done on the "wrong" device */
  170. if (!capable(CAP_SYS_ADMIN))
  171. return -EPERM;
  172. if (!val) {
  173. if (pci_is_enabled(pdev))
  174. pci_disable_device(pdev);
  175. else
  176. result = -EIO;
  177. } else
  178. result = pci_enable_device(pdev);
  179. return result < 0 ? result : count;
  180. }
  181. static ssize_t is_enabled_show(struct device *dev,
  182. struct device_attribute *attr, char *buf)
  183. {
  184. struct pci_dev *pdev;
  185. pdev = to_pci_dev (dev);
  186. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  187. }
  188. #ifdef CONFIG_NUMA
  189. static ssize_t
  190. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  191. {
  192. return sprintf (buf, "%d\n", dev->numa_node);
  193. }
  194. #endif
  195. static ssize_t
  196. dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
  197. {
  198. struct pci_dev *pdev = to_pci_dev(dev);
  199. return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
  200. }
  201. static ssize_t
  202. consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
  203. char *buf)
  204. {
  205. return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
  206. }
  207. static ssize_t
  208. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  209. {
  210. struct pci_dev *pdev = to_pci_dev(dev);
  211. if (!pdev->subordinate)
  212. return 0;
  213. return sprintf (buf, "%u\n",
  214. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  215. }
  216. static ssize_t
  217. msi_bus_store(struct device *dev, struct device_attribute *attr,
  218. const char *buf, size_t count)
  219. {
  220. struct pci_dev *pdev = to_pci_dev(dev);
  221. unsigned long val;
  222. if (strict_strtoul(buf, 0, &val) < 0)
  223. return -EINVAL;
  224. /* bad things may happen if the no_msi flag is changed
  225. * while some drivers are loaded */
  226. if (!capable(CAP_SYS_ADMIN))
  227. return -EPERM;
  228. /* Maybe pci devices without subordinate busses shouldn't even have this
  229. * attribute in the first place? */
  230. if (!pdev->subordinate)
  231. return count;
  232. /* Is the flag going to change, or keep the value it already had? */
  233. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  234. !!val) {
  235. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  236. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  237. " bad things could happen\n", val ? "" : " not");
  238. }
  239. return count;
  240. }
  241. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  242. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  243. size_t count)
  244. {
  245. unsigned long val;
  246. struct pci_bus *b = NULL;
  247. if (strict_strtoul(buf, 0, &val) < 0)
  248. return -EINVAL;
  249. if (val) {
  250. mutex_lock(&pci_remove_rescan_mutex);
  251. while ((b = pci_find_next_bus(b)) != NULL)
  252. pci_rescan_bus(b);
  253. mutex_unlock(&pci_remove_rescan_mutex);
  254. }
  255. return count;
  256. }
  257. struct bus_attribute pci_bus_attrs[] = {
  258. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  259. __ATTR_NULL
  260. };
  261. static ssize_t
  262. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  263. const char *buf, size_t count)
  264. {
  265. unsigned long val;
  266. struct pci_dev *pdev = to_pci_dev(dev);
  267. if (strict_strtoul(buf, 0, &val) < 0)
  268. return -EINVAL;
  269. if (val) {
  270. mutex_lock(&pci_remove_rescan_mutex);
  271. pci_rescan_bus(pdev->bus);
  272. mutex_unlock(&pci_remove_rescan_mutex);
  273. }
  274. return count;
  275. }
  276. static void remove_callback(struct device *dev)
  277. {
  278. struct pci_dev *pdev = to_pci_dev(dev);
  279. mutex_lock(&pci_remove_rescan_mutex);
  280. pci_stop_and_remove_bus_device(pdev);
  281. mutex_unlock(&pci_remove_rescan_mutex);
  282. }
  283. static ssize_t
  284. remove_store(struct device *dev, struct device_attribute *dummy,
  285. const char *buf, size_t count)
  286. {
  287. int ret = 0;
  288. unsigned long val;
  289. if (strict_strtoul(buf, 0, &val) < 0)
  290. return -EINVAL;
  291. /* An attribute cannot be unregistered by one of its own methods,
  292. * so we have to use this roundabout approach.
  293. */
  294. if (val)
  295. ret = device_schedule_callback(dev, remove_callback);
  296. if (ret)
  297. count = ret;
  298. return count;
  299. }
  300. static ssize_t
  301. dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
  302. const char *buf, size_t count)
  303. {
  304. unsigned long val;
  305. struct pci_bus *bus = to_pci_bus(dev);
  306. if (strict_strtoul(buf, 0, &val) < 0)
  307. return -EINVAL;
  308. if (val) {
  309. mutex_lock(&pci_remove_rescan_mutex);
  310. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  311. pci_rescan_bus_bridge_resize(bus->self);
  312. else
  313. pci_rescan_bus(bus);
  314. mutex_unlock(&pci_remove_rescan_mutex);
  315. }
  316. return count;
  317. }
  318. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  319. static ssize_t d3cold_allowed_store(struct device *dev,
  320. struct device_attribute *attr,
  321. const char *buf, size_t count)
  322. {
  323. struct pci_dev *pdev = to_pci_dev(dev);
  324. unsigned long val;
  325. if (strict_strtoul(buf, 0, &val) < 0)
  326. return -EINVAL;
  327. pdev->d3cold_allowed = !!val;
  328. pm_runtime_resume(dev);
  329. return count;
  330. }
  331. static ssize_t d3cold_allowed_show(struct device *dev,
  332. struct device_attribute *attr, char *buf)
  333. {
  334. struct pci_dev *pdev = to_pci_dev(dev);
  335. return sprintf (buf, "%u\n", pdev->d3cold_allowed);
  336. }
  337. #endif
  338. #ifdef CONFIG_PCI_IOV
  339. static ssize_t sriov_totalvfs_show(struct device *dev,
  340. struct device_attribute *attr,
  341. char *buf)
  342. {
  343. struct pci_dev *pdev = to_pci_dev(dev);
  344. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  345. }
  346. static ssize_t sriov_numvfs_show(struct device *dev,
  347. struct device_attribute *attr,
  348. char *buf)
  349. {
  350. struct pci_dev *pdev = to_pci_dev(dev);
  351. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  352. }
  353. /*
  354. * num_vfs > 0; number of VFs to enable
  355. * num_vfs = 0; disable all VFs
  356. *
  357. * Note: SRIOV spec doesn't allow partial VF
  358. * disable, so it's all or none.
  359. */
  360. static ssize_t sriov_numvfs_store(struct device *dev,
  361. struct device_attribute *attr,
  362. const char *buf, size_t count)
  363. {
  364. struct pci_dev *pdev = to_pci_dev(dev);
  365. int ret;
  366. u16 num_vfs;
  367. ret = kstrtou16(buf, 0, &num_vfs);
  368. if (ret < 0)
  369. return ret;
  370. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  371. return -ERANGE;
  372. if (num_vfs == pdev->sriov->num_VFs)
  373. return count; /* no change */
  374. /* is PF driver loaded w/callback */
  375. if (!pdev->driver || !pdev->driver->sriov_configure) {
  376. dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
  377. return -ENOSYS;
  378. }
  379. if (num_vfs == 0) {
  380. /* disable VFs */
  381. ret = pdev->driver->sriov_configure(pdev, 0);
  382. if (ret < 0)
  383. return ret;
  384. return count;
  385. }
  386. /* enable VFs */
  387. if (pdev->sriov->num_VFs) {
  388. dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  389. pdev->sriov->num_VFs, num_vfs);
  390. return -EBUSY;
  391. }
  392. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  393. if (ret < 0)
  394. return ret;
  395. if (ret != num_vfs)
  396. dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
  397. num_vfs, ret);
  398. return count;
  399. }
  400. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  401. static struct device_attribute sriov_numvfs_attr =
  402. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  403. sriov_numvfs_show, sriov_numvfs_store);
  404. #endif /* CONFIG_PCI_IOV */
  405. struct device_attribute pci_dev_attrs[] = {
  406. __ATTR_RO(resource),
  407. __ATTR_RO(vendor),
  408. __ATTR_RO(device),
  409. __ATTR_RO(subsystem_vendor),
  410. __ATTR_RO(subsystem_device),
  411. __ATTR_RO(class),
  412. __ATTR_RO(irq),
  413. __ATTR_RO(local_cpus),
  414. __ATTR_RO(local_cpulist),
  415. __ATTR_RO(modalias),
  416. #ifdef CONFIG_NUMA
  417. __ATTR_RO(numa_node),
  418. #endif
  419. __ATTR_RO(dma_mask_bits),
  420. __ATTR_RO(consistent_dma_mask_bits),
  421. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  422. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  423. broken_parity_status_show,broken_parity_status_store),
  424. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  425. __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
  426. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
  427. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  428. __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store),
  429. #endif
  430. __ATTR_NULL,
  431. };
  432. struct device_attribute pcibus_dev_attrs[] = {
  433. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
  434. __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
  435. __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
  436. __ATTR_NULL,
  437. };
  438. static ssize_t
  439. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  440. {
  441. struct pci_dev *pdev = to_pci_dev(dev);
  442. struct pci_dev *vga_dev = vga_default_device();
  443. if (vga_dev)
  444. return sprintf(buf, "%u\n", (pdev == vga_dev));
  445. return sprintf(buf, "%u\n",
  446. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  447. IORESOURCE_ROM_SHADOW));
  448. }
  449. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  450. static ssize_t
  451. pci_read_config(struct file *filp, struct kobject *kobj,
  452. struct bin_attribute *bin_attr,
  453. char *buf, loff_t off, size_t count)
  454. {
  455. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  456. unsigned int size = 64;
  457. loff_t init_off = off;
  458. u8 *data = (u8*) buf;
  459. /* Several chips lock up trying to read undefined config space */
  460. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
  461. size = dev->cfg_size;
  462. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  463. size = 128;
  464. }
  465. if (off > size)
  466. return 0;
  467. if (off + count > size) {
  468. size -= off;
  469. count = size;
  470. } else {
  471. size = count;
  472. }
  473. pci_config_pm_runtime_get(dev);
  474. if ((off & 1) && size) {
  475. u8 val;
  476. pci_user_read_config_byte(dev, off, &val);
  477. data[off - init_off] = val;
  478. off++;
  479. size--;
  480. }
  481. if ((off & 3) && size > 2) {
  482. u16 val;
  483. pci_user_read_config_word(dev, off, &val);
  484. data[off - init_off] = val & 0xff;
  485. data[off - init_off + 1] = (val >> 8) & 0xff;
  486. off += 2;
  487. size -= 2;
  488. }
  489. while (size > 3) {
  490. u32 val;
  491. pci_user_read_config_dword(dev, off, &val);
  492. data[off - init_off] = val & 0xff;
  493. data[off - init_off + 1] = (val >> 8) & 0xff;
  494. data[off - init_off + 2] = (val >> 16) & 0xff;
  495. data[off - init_off + 3] = (val >> 24) & 0xff;
  496. off += 4;
  497. size -= 4;
  498. }
  499. if (size >= 2) {
  500. u16 val;
  501. pci_user_read_config_word(dev, off, &val);
  502. data[off - init_off] = val & 0xff;
  503. data[off - init_off + 1] = (val >> 8) & 0xff;
  504. off += 2;
  505. size -= 2;
  506. }
  507. if (size > 0) {
  508. u8 val;
  509. pci_user_read_config_byte(dev, off, &val);
  510. data[off - init_off] = val;
  511. off++;
  512. --size;
  513. }
  514. pci_config_pm_runtime_put(dev);
  515. return count;
  516. }
  517. static ssize_t
  518. pci_write_config(struct file* filp, struct kobject *kobj,
  519. struct bin_attribute *bin_attr,
  520. char *buf, loff_t off, size_t count)
  521. {
  522. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  523. unsigned int size = count;
  524. loff_t init_off = off;
  525. u8 *data = (u8*) buf;
  526. if (off > dev->cfg_size)
  527. return 0;
  528. if (off + count > dev->cfg_size) {
  529. size = dev->cfg_size - off;
  530. count = size;
  531. }
  532. pci_config_pm_runtime_get(dev);
  533. if ((off & 1) && size) {
  534. pci_user_write_config_byte(dev, off, data[off - init_off]);
  535. off++;
  536. size--;
  537. }
  538. if ((off & 3) && size > 2) {
  539. u16 val = data[off - init_off];
  540. val |= (u16) data[off - init_off + 1] << 8;
  541. pci_user_write_config_word(dev, off, val);
  542. off += 2;
  543. size -= 2;
  544. }
  545. while (size > 3) {
  546. u32 val = data[off - init_off];
  547. val |= (u32) data[off - init_off + 1] << 8;
  548. val |= (u32) data[off - init_off + 2] << 16;
  549. val |= (u32) data[off - init_off + 3] << 24;
  550. pci_user_write_config_dword(dev, off, val);
  551. off += 4;
  552. size -= 4;
  553. }
  554. if (size >= 2) {
  555. u16 val = data[off - init_off];
  556. val |= (u16) data[off - init_off + 1] << 8;
  557. pci_user_write_config_word(dev, off, val);
  558. off += 2;
  559. size -= 2;
  560. }
  561. if (size) {
  562. pci_user_write_config_byte(dev, off, data[off - init_off]);
  563. off++;
  564. --size;
  565. }
  566. pci_config_pm_runtime_put(dev);
  567. return count;
  568. }
  569. static ssize_t
  570. read_vpd_attr(struct file *filp, struct kobject *kobj,
  571. struct bin_attribute *bin_attr,
  572. char *buf, loff_t off, size_t count)
  573. {
  574. struct pci_dev *dev =
  575. to_pci_dev(container_of(kobj, struct device, kobj));
  576. if (off > bin_attr->size)
  577. count = 0;
  578. else if (count > bin_attr->size - off)
  579. count = bin_attr->size - off;
  580. return pci_read_vpd(dev, off, count, buf);
  581. }
  582. static ssize_t
  583. write_vpd_attr(struct file *filp, struct kobject *kobj,
  584. struct bin_attribute *bin_attr,
  585. char *buf, loff_t off, size_t count)
  586. {
  587. struct pci_dev *dev =
  588. to_pci_dev(container_of(kobj, struct device, kobj));
  589. if (off > bin_attr->size)
  590. count = 0;
  591. else if (count > bin_attr->size - off)
  592. count = bin_attr->size - off;
  593. return pci_write_vpd(dev, off, count, buf);
  594. }
  595. #ifdef HAVE_PCI_LEGACY
  596. /**
  597. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  598. * @filp: open sysfs file
  599. * @kobj: kobject corresponding to file to read from
  600. * @bin_attr: struct bin_attribute for this file
  601. * @buf: buffer to store results
  602. * @off: offset into legacy I/O port space
  603. * @count: number of bytes to read
  604. *
  605. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  606. * callback routine (pci_legacy_read).
  607. */
  608. static ssize_t
  609. pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  610. struct bin_attribute *bin_attr,
  611. char *buf, loff_t off, size_t count)
  612. {
  613. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  614. struct device,
  615. kobj));
  616. /* Only support 1, 2 or 4 byte accesses */
  617. if (count != 1 && count != 2 && count != 4)
  618. return -EINVAL;
  619. return pci_legacy_read(bus, off, (u32 *)buf, count);
  620. }
  621. /**
  622. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  623. * @filp: open sysfs file
  624. * @kobj: kobject corresponding to file to read from
  625. * @bin_attr: struct bin_attribute for this file
  626. * @buf: buffer containing value to be written
  627. * @off: offset into legacy I/O port space
  628. * @count: number of bytes to write
  629. *
  630. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  631. * callback routine (pci_legacy_write).
  632. */
  633. static ssize_t
  634. pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  635. struct bin_attribute *bin_attr,
  636. char *buf, loff_t off, size_t count)
  637. {
  638. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  639. struct device,
  640. kobj));
  641. /* Only support 1, 2 or 4 byte accesses */
  642. if (count != 1 && count != 2 && count != 4)
  643. return -EINVAL;
  644. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  645. }
  646. /**
  647. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  648. * @filp: open sysfs file
  649. * @kobj: kobject corresponding to device to be mapped
  650. * @attr: struct bin_attribute for this file
  651. * @vma: struct vm_area_struct passed to mmap
  652. *
  653. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  654. * legacy memory space (first meg of bus space) into application virtual
  655. * memory space.
  656. */
  657. static int
  658. pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  659. struct bin_attribute *attr,
  660. struct vm_area_struct *vma)
  661. {
  662. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  663. struct device,
  664. kobj));
  665. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  666. }
  667. /**
  668. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  669. * @filp: open sysfs file
  670. * @kobj: kobject corresponding to device to be mapped
  671. * @attr: struct bin_attribute for this file
  672. * @vma: struct vm_area_struct passed to mmap
  673. *
  674. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  675. * legacy IO space (first meg of bus space) into application virtual
  676. * memory space. Returns -ENOSYS if the operation isn't supported
  677. */
  678. static int
  679. pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  680. struct bin_attribute *attr,
  681. struct vm_area_struct *vma)
  682. {
  683. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  684. struct device,
  685. kobj));
  686. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  687. }
  688. /**
  689. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  690. * @b: bus to create files under
  691. * @mmap_type: I/O port or memory
  692. *
  693. * Stub implementation. Can be overridden by arch if necessary.
  694. */
  695. void __weak
  696. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  697. {
  698. return;
  699. }
  700. /**
  701. * pci_create_legacy_files - create legacy I/O port and memory files
  702. * @b: bus to create files under
  703. *
  704. * Some platforms allow access to legacy I/O port and ISA memory space on
  705. * a per-bus basis. This routine creates the files and ties them into
  706. * their associated read, write and mmap files from pci-sysfs.c
  707. *
  708. * On error unwind, but don't propagate the error to the caller
  709. * as it is ok to set up the PCI bus without these files.
  710. */
  711. void pci_create_legacy_files(struct pci_bus *b)
  712. {
  713. int error;
  714. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  715. GFP_ATOMIC);
  716. if (!b->legacy_io)
  717. goto kzalloc_err;
  718. sysfs_bin_attr_init(b->legacy_io);
  719. b->legacy_io->attr.name = "legacy_io";
  720. b->legacy_io->size = 0xffff;
  721. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  722. b->legacy_io->read = pci_read_legacy_io;
  723. b->legacy_io->write = pci_write_legacy_io;
  724. b->legacy_io->mmap = pci_mmap_legacy_io;
  725. pci_adjust_legacy_attr(b, pci_mmap_io);
  726. error = device_create_bin_file(&b->dev, b->legacy_io);
  727. if (error)
  728. goto legacy_io_err;
  729. /* Allocated above after the legacy_io struct */
  730. b->legacy_mem = b->legacy_io + 1;
  731. sysfs_bin_attr_init(b->legacy_mem);
  732. b->legacy_mem->attr.name = "legacy_mem";
  733. b->legacy_mem->size = 1024*1024;
  734. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  735. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  736. pci_adjust_legacy_attr(b, pci_mmap_mem);
  737. error = device_create_bin_file(&b->dev, b->legacy_mem);
  738. if (error)
  739. goto legacy_mem_err;
  740. return;
  741. legacy_mem_err:
  742. device_remove_bin_file(&b->dev, b->legacy_io);
  743. legacy_io_err:
  744. kfree(b->legacy_io);
  745. b->legacy_io = NULL;
  746. kzalloc_err:
  747. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  748. "and ISA memory resources to sysfs\n");
  749. return;
  750. }
  751. void pci_remove_legacy_files(struct pci_bus *b)
  752. {
  753. if (b->legacy_io) {
  754. device_remove_bin_file(&b->dev, b->legacy_io);
  755. device_remove_bin_file(&b->dev, b->legacy_mem);
  756. kfree(b->legacy_io); /* both are allocated here */
  757. }
  758. }
  759. #endif /* HAVE_PCI_LEGACY */
  760. #ifdef HAVE_PCI_MMAP
  761. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  762. enum pci_mmap_api mmap_api)
  763. {
  764. unsigned long nr, start, size, pci_start;
  765. if (pci_resource_len(pdev, resno) == 0)
  766. return 0;
  767. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  768. start = vma->vm_pgoff;
  769. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  770. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  771. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  772. if (start >= pci_start && start < pci_start + size &&
  773. start + nr <= pci_start + size)
  774. return 1;
  775. return 0;
  776. }
  777. /**
  778. * pci_mmap_resource - map a PCI resource into user memory space
  779. * @kobj: kobject for mapping
  780. * @attr: struct bin_attribute for the file being mapped
  781. * @vma: struct vm_area_struct passed into the mmap
  782. * @write_combine: 1 for write_combine mapping
  783. *
  784. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  785. */
  786. static int
  787. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  788. struct vm_area_struct *vma, int write_combine)
  789. {
  790. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  791. struct device, kobj));
  792. struct resource *res = attr->private;
  793. enum pci_mmap_state mmap_type;
  794. resource_size_t start, end;
  795. int i;
  796. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  797. if (res == &pdev->resource[i])
  798. break;
  799. if (i >= PCI_ROM_RESOURCE)
  800. return -ENODEV;
  801. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  802. WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
  803. "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  804. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  805. pci_name(pdev), i,
  806. (u64)pci_resource_start(pdev, i),
  807. (u64)pci_resource_len(pdev, i));
  808. return -EINVAL;
  809. }
  810. /* pci_mmap_page_range() expects the same kind of entry as coming
  811. * from /proc/bus/pci/ which is a "user visible" value. If this is
  812. * different from the resource itself, arch will do necessary fixup.
  813. */
  814. pci_resource_to_user(pdev, i, res, &start, &end);
  815. vma->vm_pgoff += start >> PAGE_SHIFT;
  816. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  817. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  818. return -EINVAL;
  819. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  820. }
  821. static int
  822. pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  823. struct bin_attribute *attr,
  824. struct vm_area_struct *vma)
  825. {
  826. return pci_mmap_resource(kobj, attr, vma, 0);
  827. }
  828. static int
  829. pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  830. struct bin_attribute *attr,
  831. struct vm_area_struct *vma)
  832. {
  833. return pci_mmap_resource(kobj, attr, vma, 1);
  834. }
  835. static ssize_t
  836. pci_resource_io(struct file *filp, struct kobject *kobj,
  837. struct bin_attribute *attr, char *buf,
  838. loff_t off, size_t count, bool write)
  839. {
  840. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  841. struct device, kobj));
  842. struct resource *res = attr->private;
  843. unsigned long port = off;
  844. int i;
  845. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  846. if (res == &pdev->resource[i])
  847. break;
  848. if (i >= PCI_ROM_RESOURCE)
  849. return -ENODEV;
  850. port += pci_resource_start(pdev, i);
  851. if (port > pci_resource_end(pdev, i))
  852. return 0;
  853. if (port + count - 1 > pci_resource_end(pdev, i))
  854. return -EINVAL;
  855. switch (count) {
  856. case 1:
  857. if (write)
  858. outb(*(u8 *)buf, port);
  859. else
  860. *(u8 *)buf = inb(port);
  861. return 1;
  862. case 2:
  863. if (write)
  864. outw(*(u16 *)buf, port);
  865. else
  866. *(u16 *)buf = inw(port);
  867. return 2;
  868. case 4:
  869. if (write)
  870. outl(*(u32 *)buf, port);
  871. else
  872. *(u32 *)buf = inl(port);
  873. return 4;
  874. }
  875. return -EINVAL;
  876. }
  877. static ssize_t
  878. pci_read_resource_io(struct file *filp, struct kobject *kobj,
  879. struct bin_attribute *attr, char *buf,
  880. loff_t off, size_t count)
  881. {
  882. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  883. }
  884. static ssize_t
  885. pci_write_resource_io(struct file *filp, struct kobject *kobj,
  886. struct bin_attribute *attr, char *buf,
  887. loff_t off, size_t count)
  888. {
  889. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  890. }
  891. /**
  892. * pci_remove_resource_files - cleanup resource files
  893. * @pdev: dev to cleanup
  894. *
  895. * If we created resource files for @pdev, remove them from sysfs and
  896. * free their resources.
  897. */
  898. static void
  899. pci_remove_resource_files(struct pci_dev *pdev)
  900. {
  901. int i;
  902. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  903. struct bin_attribute *res_attr;
  904. res_attr = pdev->res_attr[i];
  905. if (res_attr) {
  906. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  907. kfree(res_attr);
  908. }
  909. res_attr = pdev->res_attr_wc[i];
  910. if (res_attr) {
  911. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  912. kfree(res_attr);
  913. }
  914. }
  915. }
  916. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  917. {
  918. /* allocate attribute structure, piggyback attribute name */
  919. int name_len = write_combine ? 13 : 10;
  920. struct bin_attribute *res_attr;
  921. int retval;
  922. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  923. if (res_attr) {
  924. char *res_attr_name = (char *)(res_attr + 1);
  925. sysfs_bin_attr_init(res_attr);
  926. if (write_combine) {
  927. pdev->res_attr_wc[num] = res_attr;
  928. sprintf(res_attr_name, "resource%d_wc", num);
  929. res_attr->mmap = pci_mmap_resource_wc;
  930. } else {
  931. pdev->res_attr[num] = res_attr;
  932. sprintf(res_attr_name, "resource%d", num);
  933. res_attr->mmap = pci_mmap_resource_uc;
  934. }
  935. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  936. res_attr->read = pci_read_resource_io;
  937. res_attr->write = pci_write_resource_io;
  938. }
  939. res_attr->attr.name = res_attr_name;
  940. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  941. res_attr->size = pci_resource_len(pdev, num);
  942. res_attr->private = &pdev->resource[num];
  943. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  944. } else
  945. retval = -ENOMEM;
  946. return retval;
  947. }
  948. /**
  949. * pci_create_resource_files - create resource files in sysfs for @dev
  950. * @pdev: dev in question
  951. *
  952. * Walk the resources in @pdev creating files for each resource available.
  953. */
  954. static int pci_create_resource_files(struct pci_dev *pdev)
  955. {
  956. int i;
  957. int retval;
  958. /* Expose the PCI resources from this device as files */
  959. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  960. /* skip empty resources */
  961. if (!pci_resource_len(pdev, i))
  962. continue;
  963. retval = pci_create_attr(pdev, i, 0);
  964. /* for prefetchable resources, create a WC mappable file */
  965. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  966. retval = pci_create_attr(pdev, i, 1);
  967. if (retval) {
  968. pci_remove_resource_files(pdev);
  969. return retval;
  970. }
  971. }
  972. return 0;
  973. }
  974. #else /* !HAVE_PCI_MMAP */
  975. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  976. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  977. #endif /* HAVE_PCI_MMAP */
  978. /**
  979. * pci_write_rom - used to enable access to the PCI ROM display
  980. * @filp: sysfs file
  981. * @kobj: kernel object handle
  982. * @bin_attr: struct bin_attribute for this file
  983. * @buf: user input
  984. * @off: file offset
  985. * @count: number of byte in input
  986. *
  987. * writing anything except 0 enables it
  988. */
  989. static ssize_t
  990. pci_write_rom(struct file *filp, struct kobject *kobj,
  991. struct bin_attribute *bin_attr,
  992. char *buf, loff_t off, size_t count)
  993. {
  994. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  995. if ((off == 0) && (*buf == '0') && (count == 2))
  996. pdev->rom_attr_enabled = 0;
  997. else
  998. pdev->rom_attr_enabled = 1;
  999. return count;
  1000. }
  1001. /**
  1002. * pci_read_rom - read a PCI ROM
  1003. * @filp: sysfs file
  1004. * @kobj: kernel object handle
  1005. * @bin_attr: struct bin_attribute for this file
  1006. * @buf: where to put the data we read from the ROM
  1007. * @off: file offset
  1008. * @count: number of bytes to read
  1009. *
  1010. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1011. * device corresponding to @kobj.
  1012. */
  1013. static ssize_t
  1014. pci_read_rom(struct file *filp, struct kobject *kobj,
  1015. struct bin_attribute *bin_attr,
  1016. char *buf, loff_t off, size_t count)
  1017. {
  1018. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1019. void __iomem *rom;
  1020. size_t size;
  1021. if (!pdev->rom_attr_enabled)
  1022. return -EINVAL;
  1023. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1024. if (!rom || !size)
  1025. return -EIO;
  1026. if (off >= size)
  1027. count = 0;
  1028. else {
  1029. if (off + count > size)
  1030. count = size - off;
  1031. memcpy_fromio(buf, rom + off, count);
  1032. }
  1033. pci_unmap_rom(pdev, rom);
  1034. return count;
  1035. }
  1036. static struct bin_attribute pci_config_attr = {
  1037. .attr = {
  1038. .name = "config",
  1039. .mode = S_IRUGO | S_IWUSR,
  1040. },
  1041. .size = PCI_CFG_SPACE_SIZE,
  1042. .read = pci_read_config,
  1043. .write = pci_write_config,
  1044. };
  1045. static struct bin_attribute pcie_config_attr = {
  1046. .attr = {
  1047. .name = "config",
  1048. .mode = S_IRUGO | S_IWUSR,
  1049. },
  1050. .size = PCI_CFG_SPACE_EXP_SIZE,
  1051. .read = pci_read_config,
  1052. .write = pci_write_config,
  1053. };
  1054. int __weak pcibios_add_platform_entries(struct pci_dev *dev)
  1055. {
  1056. return 0;
  1057. }
  1058. static ssize_t reset_store(struct device *dev,
  1059. struct device_attribute *attr, const char *buf,
  1060. size_t count)
  1061. {
  1062. struct pci_dev *pdev = to_pci_dev(dev);
  1063. unsigned long val;
  1064. ssize_t result = strict_strtoul(buf, 0, &val);
  1065. if (result < 0)
  1066. return result;
  1067. if (val != 1)
  1068. return -EINVAL;
  1069. result = pci_reset_function(pdev);
  1070. if (result < 0)
  1071. return result;
  1072. return count;
  1073. }
  1074. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1075. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1076. {
  1077. int retval;
  1078. struct bin_attribute *attr;
  1079. /* If the device has VPD, try to expose it in sysfs. */
  1080. if (dev->vpd) {
  1081. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1082. if (!attr)
  1083. return -ENOMEM;
  1084. sysfs_bin_attr_init(attr);
  1085. attr->size = dev->vpd->len;
  1086. attr->attr.name = "vpd";
  1087. attr->attr.mode = S_IRUSR | S_IWUSR;
  1088. attr->read = read_vpd_attr;
  1089. attr->write = write_vpd_attr;
  1090. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1091. if (retval) {
  1092. kfree(attr);
  1093. return retval;
  1094. }
  1095. dev->vpd->attr = attr;
  1096. }
  1097. /* Active State Power Management */
  1098. pcie_aspm_create_sysfs_dev_files(dev);
  1099. if (!pci_probe_reset_function(dev)) {
  1100. retval = device_create_file(&dev->dev, &reset_attr);
  1101. if (retval)
  1102. goto error;
  1103. dev->reset_fn = 1;
  1104. }
  1105. return 0;
  1106. error:
  1107. pcie_aspm_remove_sysfs_dev_files(dev);
  1108. if (dev->vpd && dev->vpd->attr) {
  1109. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1110. kfree(dev->vpd->attr);
  1111. }
  1112. return retval;
  1113. }
  1114. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  1115. {
  1116. int retval;
  1117. int rom_size = 0;
  1118. struct bin_attribute *attr;
  1119. if (!sysfs_initialized)
  1120. return -EACCES;
  1121. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1122. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1123. else
  1124. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1125. if (retval)
  1126. goto err;
  1127. retval = pci_create_resource_files(pdev);
  1128. if (retval)
  1129. goto err_config_file;
  1130. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1131. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1132. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1133. rom_size = 0x20000;
  1134. /* If the device has a ROM, try to expose it in sysfs. */
  1135. if (rom_size) {
  1136. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1137. if (!attr) {
  1138. retval = -ENOMEM;
  1139. goto err_resource_files;
  1140. }
  1141. sysfs_bin_attr_init(attr);
  1142. attr->size = rom_size;
  1143. attr->attr.name = "rom";
  1144. attr->attr.mode = S_IRUSR | S_IWUSR;
  1145. attr->read = pci_read_rom;
  1146. attr->write = pci_write_rom;
  1147. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1148. if (retval) {
  1149. kfree(attr);
  1150. goto err_resource_files;
  1151. }
  1152. pdev->rom_attr = attr;
  1153. }
  1154. /* add platform-specific attributes */
  1155. retval = pcibios_add_platform_entries(pdev);
  1156. if (retval)
  1157. goto err_rom_file;
  1158. /* add sysfs entries for various capabilities */
  1159. retval = pci_create_capabilities_sysfs(pdev);
  1160. if (retval)
  1161. goto err_rom_file;
  1162. pci_create_firmware_label_files(pdev);
  1163. return 0;
  1164. err_rom_file:
  1165. if (rom_size) {
  1166. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1167. kfree(pdev->rom_attr);
  1168. pdev->rom_attr = NULL;
  1169. }
  1170. err_resource_files:
  1171. pci_remove_resource_files(pdev);
  1172. err_config_file:
  1173. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1174. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1175. else
  1176. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1177. err:
  1178. return retval;
  1179. }
  1180. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1181. {
  1182. if (dev->vpd && dev->vpd->attr) {
  1183. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1184. kfree(dev->vpd->attr);
  1185. }
  1186. pcie_aspm_remove_sysfs_dev_files(dev);
  1187. if (dev->reset_fn) {
  1188. device_remove_file(&dev->dev, &reset_attr);
  1189. dev->reset_fn = 0;
  1190. }
  1191. }
  1192. /**
  1193. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1194. * @pdev: device whose entries we should free
  1195. *
  1196. * Cleanup when @pdev is removed from sysfs.
  1197. */
  1198. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1199. {
  1200. int rom_size = 0;
  1201. if (!sysfs_initialized)
  1202. return;
  1203. pci_remove_capabilities_sysfs(pdev);
  1204. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1205. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1206. else
  1207. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1208. pci_remove_resource_files(pdev);
  1209. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1210. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1211. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1212. rom_size = 0x20000;
  1213. if (rom_size && pdev->rom_attr) {
  1214. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1215. kfree(pdev->rom_attr);
  1216. }
  1217. pci_remove_firmware_label_files(pdev);
  1218. }
  1219. static int __init pci_sysfs_init(void)
  1220. {
  1221. struct pci_dev *pdev = NULL;
  1222. int retval;
  1223. sysfs_initialized = 1;
  1224. for_each_pci_dev(pdev) {
  1225. retval = pci_create_sysfs_dev_files(pdev);
  1226. if (retval) {
  1227. pci_dev_put(pdev);
  1228. return retval;
  1229. }
  1230. }
  1231. return 0;
  1232. }
  1233. late_initcall(pci_sysfs_init);
  1234. static struct attribute *pci_dev_dev_attrs[] = {
  1235. &vga_attr.attr,
  1236. NULL,
  1237. };
  1238. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1239. struct attribute *a, int n)
  1240. {
  1241. struct device *dev = container_of(kobj, struct device, kobj);
  1242. struct pci_dev *pdev = to_pci_dev(dev);
  1243. if (a == &vga_attr.attr)
  1244. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1245. return 0;
  1246. return a->mode;
  1247. }
  1248. #ifdef CONFIG_PCI_IOV
  1249. static struct attribute *sriov_dev_attrs[] = {
  1250. &sriov_totalvfs_attr.attr,
  1251. &sriov_numvfs_attr.attr,
  1252. NULL,
  1253. };
  1254. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1255. struct attribute *a, int n)
  1256. {
  1257. struct device *dev = container_of(kobj, struct device, kobj);
  1258. if (!dev_is_pf(dev))
  1259. return 0;
  1260. return a->mode;
  1261. }
  1262. static struct attribute_group sriov_dev_attr_group = {
  1263. .attrs = sriov_dev_attrs,
  1264. .is_visible = sriov_attrs_are_visible,
  1265. };
  1266. #endif /* CONFIG_PCI_IOV */
  1267. static struct attribute_group pci_dev_attr_group = {
  1268. .attrs = pci_dev_dev_attrs,
  1269. .is_visible = pci_dev_attrs_are_visible,
  1270. };
  1271. static const struct attribute_group *pci_dev_attr_groups[] = {
  1272. &pci_dev_attr_group,
  1273. #ifdef CONFIG_PCI_IOV
  1274. &sriov_dev_attr_group,
  1275. #endif
  1276. NULL,
  1277. };
  1278. struct device_type pci_dev_type = {
  1279. .groups = pci_dev_attr_groups,
  1280. };