iov.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776
  1. /*
  2. * drivers/pci/iov.c
  3. *
  4. * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
  5. *
  6. * PCI Express I/O Virtualization (IOV) support.
  7. * Single Root IOV 1.0
  8. * Address Translation Service 1.0
  9. */
  10. #include <linux/pci.h>
  11. #include <linux/slab.h>
  12. #include <linux/mutex.h>
  13. #include <linux/export.h>
  14. #include <linux/string.h>
  15. #include <linux/delay.h>
  16. #include <linux/pci-ats.h>
  17. #include "pci.h"
  18. #define VIRTFN_ID_LEN 16
  19. static inline u8 virtfn_bus(struct pci_dev *dev, int id)
  20. {
  21. return dev->bus->number + ((dev->devfn + dev->sriov->offset +
  22. dev->sriov->stride * id) >> 8);
  23. }
  24. static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
  25. {
  26. return (dev->devfn + dev->sriov->offset +
  27. dev->sriov->stride * id) & 0xff;
  28. }
  29. static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
  30. {
  31. struct pci_bus *child;
  32. if (bus->number == busnr)
  33. return bus;
  34. child = pci_find_bus(pci_domain_nr(bus), busnr);
  35. if (child)
  36. return child;
  37. child = pci_add_new_bus(bus, NULL, busnr);
  38. if (!child)
  39. return NULL;
  40. pci_bus_insert_busn_res(child, busnr, busnr);
  41. bus->is_added = 1;
  42. return child;
  43. }
  44. static void virtfn_remove_bus(struct pci_bus *bus, int busnr)
  45. {
  46. struct pci_bus *child;
  47. if (bus->number == busnr)
  48. return;
  49. child = pci_find_bus(pci_domain_nr(bus), busnr);
  50. BUG_ON(!child);
  51. if (list_empty(&child->devices))
  52. pci_remove_bus(child);
  53. }
  54. static int virtfn_add(struct pci_dev *dev, int id, int reset)
  55. {
  56. int i;
  57. int rc;
  58. u64 size;
  59. char buf[VIRTFN_ID_LEN];
  60. struct pci_dev *virtfn;
  61. struct resource *res;
  62. struct pci_sriov *iov = dev->sriov;
  63. virtfn = alloc_pci_dev();
  64. if (!virtfn)
  65. return -ENOMEM;
  66. mutex_lock(&iov->dev->sriov->lock);
  67. virtfn->bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id));
  68. if (!virtfn->bus) {
  69. kfree(virtfn);
  70. mutex_unlock(&iov->dev->sriov->lock);
  71. return -ENOMEM;
  72. }
  73. virtfn->devfn = virtfn_devfn(dev, id);
  74. virtfn->vendor = dev->vendor;
  75. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
  76. pci_setup_device(virtfn);
  77. virtfn->dev.parent = dev->dev.parent;
  78. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  79. res = dev->resource + PCI_IOV_RESOURCES + i;
  80. if (!res->parent)
  81. continue;
  82. virtfn->resource[i].name = pci_name(virtfn);
  83. virtfn->resource[i].flags = res->flags;
  84. size = resource_size(res);
  85. do_div(size, iov->total_VFs);
  86. virtfn->resource[i].start = res->start + size * id;
  87. virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
  88. rc = request_resource(res, &virtfn->resource[i]);
  89. BUG_ON(rc);
  90. }
  91. if (reset)
  92. __pci_reset_function(virtfn);
  93. pci_device_add(virtfn, virtfn->bus);
  94. mutex_unlock(&iov->dev->sriov->lock);
  95. virtfn->physfn = pci_dev_get(dev);
  96. virtfn->is_virtfn = 1;
  97. rc = pci_bus_add_device(virtfn);
  98. sprintf(buf, "virtfn%u", id);
  99. rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
  100. if (rc)
  101. goto failed1;
  102. rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
  103. if (rc)
  104. goto failed2;
  105. kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
  106. return 0;
  107. failed2:
  108. sysfs_remove_link(&dev->dev.kobj, buf);
  109. failed1:
  110. pci_dev_put(dev);
  111. mutex_lock(&iov->dev->sriov->lock);
  112. pci_stop_and_remove_bus_device(virtfn);
  113. virtfn_remove_bus(dev->bus, virtfn_bus(dev, id));
  114. mutex_unlock(&iov->dev->sriov->lock);
  115. return rc;
  116. }
  117. static void virtfn_remove(struct pci_dev *dev, int id, int reset)
  118. {
  119. char buf[VIRTFN_ID_LEN];
  120. struct pci_bus *bus;
  121. struct pci_dev *virtfn;
  122. struct pci_sriov *iov = dev->sriov;
  123. bus = pci_find_bus(pci_domain_nr(dev->bus), virtfn_bus(dev, id));
  124. if (!bus)
  125. return;
  126. virtfn = pci_get_slot(bus, virtfn_devfn(dev, id));
  127. if (!virtfn)
  128. return;
  129. pci_dev_put(virtfn);
  130. if (reset) {
  131. device_release_driver(&virtfn->dev);
  132. __pci_reset_function(virtfn);
  133. }
  134. sprintf(buf, "virtfn%u", id);
  135. sysfs_remove_link(&dev->dev.kobj, buf);
  136. /*
  137. * pci_stop_dev() could have been called for this virtfn already,
  138. * so the directory for the virtfn may have been removed before.
  139. * Double check to avoid spurious sysfs warnings.
  140. */
  141. if (virtfn->dev.kobj.sd)
  142. sysfs_remove_link(&virtfn->dev.kobj, "physfn");
  143. mutex_lock(&iov->dev->sriov->lock);
  144. pci_stop_and_remove_bus_device(virtfn);
  145. virtfn_remove_bus(dev->bus, virtfn_bus(dev, id));
  146. mutex_unlock(&iov->dev->sriov->lock);
  147. pci_dev_put(dev);
  148. }
  149. static int sriov_migration(struct pci_dev *dev)
  150. {
  151. u16 status;
  152. struct pci_sriov *iov = dev->sriov;
  153. if (!iov->num_VFs)
  154. return 0;
  155. if (!(iov->cap & PCI_SRIOV_CAP_VFM))
  156. return 0;
  157. pci_read_config_word(dev, iov->pos + PCI_SRIOV_STATUS, &status);
  158. if (!(status & PCI_SRIOV_STATUS_VFM))
  159. return 0;
  160. schedule_work(&iov->mtask);
  161. return 1;
  162. }
  163. static void sriov_migration_task(struct work_struct *work)
  164. {
  165. int i;
  166. u8 state;
  167. u16 status;
  168. struct pci_sriov *iov = container_of(work, struct pci_sriov, mtask);
  169. for (i = iov->initial_VFs; i < iov->num_VFs; i++) {
  170. state = readb(iov->mstate + i);
  171. if (state == PCI_SRIOV_VFM_MI) {
  172. writeb(PCI_SRIOV_VFM_AV, iov->mstate + i);
  173. state = readb(iov->mstate + i);
  174. if (state == PCI_SRIOV_VFM_AV)
  175. virtfn_add(iov->self, i, 1);
  176. } else if (state == PCI_SRIOV_VFM_MO) {
  177. virtfn_remove(iov->self, i, 1);
  178. writeb(PCI_SRIOV_VFM_UA, iov->mstate + i);
  179. state = readb(iov->mstate + i);
  180. if (state == PCI_SRIOV_VFM_AV)
  181. virtfn_add(iov->self, i, 0);
  182. }
  183. }
  184. pci_read_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, &status);
  185. status &= ~PCI_SRIOV_STATUS_VFM;
  186. pci_write_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, status);
  187. }
  188. static int sriov_enable_migration(struct pci_dev *dev, int nr_virtfn)
  189. {
  190. int bir;
  191. u32 table;
  192. resource_size_t pa;
  193. struct pci_sriov *iov = dev->sriov;
  194. if (nr_virtfn <= iov->initial_VFs)
  195. return 0;
  196. pci_read_config_dword(dev, iov->pos + PCI_SRIOV_VFM, &table);
  197. bir = PCI_SRIOV_VFM_BIR(table);
  198. if (bir > PCI_STD_RESOURCE_END)
  199. return -EIO;
  200. table = PCI_SRIOV_VFM_OFFSET(table);
  201. if (table + nr_virtfn > pci_resource_len(dev, bir))
  202. return -EIO;
  203. pa = pci_resource_start(dev, bir) + table;
  204. iov->mstate = ioremap(pa, nr_virtfn);
  205. if (!iov->mstate)
  206. return -ENOMEM;
  207. INIT_WORK(&iov->mtask, sriov_migration_task);
  208. iov->ctrl |= PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR;
  209. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  210. return 0;
  211. }
  212. static void sriov_disable_migration(struct pci_dev *dev)
  213. {
  214. struct pci_sriov *iov = dev->sriov;
  215. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR);
  216. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  217. cancel_work_sync(&iov->mtask);
  218. iounmap(iov->mstate);
  219. }
  220. static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
  221. {
  222. int rc;
  223. int i, j;
  224. int nres;
  225. u16 offset, stride, initial;
  226. struct resource *res;
  227. struct pci_dev *pdev;
  228. struct pci_sriov *iov = dev->sriov;
  229. int bars = 0;
  230. if (!nr_virtfn)
  231. return 0;
  232. if (iov->num_VFs)
  233. return -EINVAL;
  234. pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
  235. if (initial > iov->total_VFs ||
  236. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
  237. return -EIO;
  238. if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
  239. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
  240. return -EINVAL;
  241. pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
  242. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
  243. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
  244. if (!offset || (nr_virtfn > 1 && !stride))
  245. return -EIO;
  246. nres = 0;
  247. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  248. bars |= (1 << (i + PCI_IOV_RESOURCES));
  249. res = dev->resource + PCI_IOV_RESOURCES + i;
  250. if (res->parent)
  251. nres++;
  252. }
  253. if (nres != iov->nres) {
  254. dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
  255. return -ENOMEM;
  256. }
  257. iov->offset = offset;
  258. iov->stride = stride;
  259. if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->busn_res.end) {
  260. dev_err(&dev->dev, "SR-IOV: bus number out of range\n");
  261. return -ENOMEM;
  262. }
  263. if (pci_enable_resources(dev, bars)) {
  264. dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
  265. return -ENOMEM;
  266. }
  267. if (iov->link != dev->devfn) {
  268. pdev = pci_get_slot(dev->bus, iov->link);
  269. if (!pdev)
  270. return -ENODEV;
  271. pci_dev_put(pdev);
  272. if (!pdev->is_physfn)
  273. return -ENODEV;
  274. rc = sysfs_create_link(&dev->dev.kobj,
  275. &pdev->dev.kobj, "dep_link");
  276. if (rc)
  277. return rc;
  278. }
  279. iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
  280. pci_cfg_access_lock(dev);
  281. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  282. msleep(100);
  283. pci_cfg_access_unlock(dev);
  284. iov->initial_VFs = initial;
  285. if (nr_virtfn < initial)
  286. initial = nr_virtfn;
  287. for (i = 0; i < initial; i++) {
  288. rc = virtfn_add(dev, i, 0);
  289. if (rc)
  290. goto failed;
  291. }
  292. if (iov->cap & PCI_SRIOV_CAP_VFM) {
  293. rc = sriov_enable_migration(dev, nr_virtfn);
  294. if (rc)
  295. goto failed;
  296. }
  297. kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
  298. iov->num_VFs = nr_virtfn;
  299. return 0;
  300. failed:
  301. for (j = 0; j < i; j++)
  302. virtfn_remove(dev, j, 0);
  303. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  304. pci_cfg_access_lock(dev);
  305. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  306. ssleep(1);
  307. pci_cfg_access_unlock(dev);
  308. if (iov->link != dev->devfn)
  309. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  310. return rc;
  311. }
  312. static void sriov_disable(struct pci_dev *dev)
  313. {
  314. int i;
  315. struct pci_sriov *iov = dev->sriov;
  316. if (!iov->num_VFs)
  317. return;
  318. if (iov->cap & PCI_SRIOV_CAP_VFM)
  319. sriov_disable_migration(dev);
  320. for (i = 0; i < iov->num_VFs; i++)
  321. virtfn_remove(dev, i, 0);
  322. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  323. pci_cfg_access_lock(dev);
  324. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  325. ssleep(1);
  326. pci_cfg_access_unlock(dev);
  327. if (iov->link != dev->devfn)
  328. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  329. iov->num_VFs = 0;
  330. }
  331. static int sriov_init(struct pci_dev *dev, int pos)
  332. {
  333. int i;
  334. int rc;
  335. int nres;
  336. u32 pgsz;
  337. u16 ctrl, total, offset, stride;
  338. struct pci_sriov *iov;
  339. struct resource *res;
  340. struct pci_dev *pdev;
  341. if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
  342. pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
  343. return -ENODEV;
  344. pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
  345. if (ctrl & PCI_SRIOV_CTRL_VFE) {
  346. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
  347. ssleep(1);
  348. }
  349. pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
  350. if (!total)
  351. return 0;
  352. ctrl = 0;
  353. list_for_each_entry(pdev, &dev->bus->devices, bus_list)
  354. if (pdev->is_physfn)
  355. goto found;
  356. pdev = NULL;
  357. if (pci_ari_enabled(dev->bus))
  358. ctrl |= PCI_SRIOV_CTRL_ARI;
  359. found:
  360. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
  361. pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
  362. pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
  363. if (!offset || (total > 1 && !stride))
  364. return -EIO;
  365. pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
  366. i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
  367. pgsz &= ~((1 << i) - 1);
  368. if (!pgsz)
  369. return -EIO;
  370. pgsz &= ~(pgsz - 1);
  371. pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
  372. nres = 0;
  373. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  374. res = dev->resource + PCI_IOV_RESOURCES + i;
  375. i += __pci_read_base(dev, pci_bar_unknown, res,
  376. pos + PCI_SRIOV_BAR + i * 4);
  377. if (!res->flags)
  378. continue;
  379. if (resource_size(res) & (PAGE_SIZE - 1)) {
  380. rc = -EIO;
  381. goto failed;
  382. }
  383. res->end = res->start + resource_size(res) * total - 1;
  384. nres++;
  385. }
  386. iov = kzalloc(sizeof(*iov), GFP_KERNEL);
  387. if (!iov) {
  388. rc = -ENOMEM;
  389. goto failed;
  390. }
  391. iov->pos = pos;
  392. iov->nres = nres;
  393. iov->ctrl = ctrl;
  394. iov->total_VFs = total;
  395. iov->offset = offset;
  396. iov->stride = stride;
  397. iov->pgsz = pgsz;
  398. iov->self = dev;
  399. pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
  400. pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
  401. if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
  402. iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
  403. if (pdev)
  404. iov->dev = pci_dev_get(pdev);
  405. else
  406. iov->dev = dev;
  407. mutex_init(&iov->lock);
  408. dev->sriov = iov;
  409. dev->is_physfn = 1;
  410. return 0;
  411. failed:
  412. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  413. res = dev->resource + PCI_IOV_RESOURCES + i;
  414. res->flags = 0;
  415. }
  416. return rc;
  417. }
  418. static void sriov_release(struct pci_dev *dev)
  419. {
  420. BUG_ON(dev->sriov->num_VFs);
  421. if (dev != dev->sriov->dev)
  422. pci_dev_put(dev->sriov->dev);
  423. mutex_destroy(&dev->sriov->lock);
  424. kfree(dev->sriov);
  425. dev->sriov = NULL;
  426. }
  427. static void sriov_restore_state(struct pci_dev *dev)
  428. {
  429. int i;
  430. u16 ctrl;
  431. struct pci_sriov *iov = dev->sriov;
  432. pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
  433. if (ctrl & PCI_SRIOV_CTRL_VFE)
  434. return;
  435. for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
  436. pci_update_resource(dev, i);
  437. pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
  438. pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->num_VFs);
  439. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  440. if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
  441. msleep(100);
  442. }
  443. /**
  444. * pci_iov_init - initialize the IOV capability
  445. * @dev: the PCI device
  446. *
  447. * Returns 0 on success, or negative on failure.
  448. */
  449. int pci_iov_init(struct pci_dev *dev)
  450. {
  451. int pos;
  452. if (!pci_is_pcie(dev))
  453. return -ENODEV;
  454. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
  455. if (pos)
  456. return sriov_init(dev, pos);
  457. return -ENODEV;
  458. }
  459. /**
  460. * pci_iov_release - release resources used by the IOV capability
  461. * @dev: the PCI device
  462. */
  463. void pci_iov_release(struct pci_dev *dev)
  464. {
  465. if (dev->is_physfn)
  466. sriov_release(dev);
  467. }
  468. /**
  469. * pci_iov_resource_bar - get position of the SR-IOV BAR
  470. * @dev: the PCI device
  471. * @resno: the resource number
  472. * @type: the BAR type to be filled in
  473. *
  474. * Returns position of the BAR encapsulated in the SR-IOV capability.
  475. */
  476. int pci_iov_resource_bar(struct pci_dev *dev, int resno,
  477. enum pci_bar_type *type)
  478. {
  479. if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
  480. return 0;
  481. BUG_ON(!dev->is_physfn);
  482. *type = pci_bar_unknown;
  483. return dev->sriov->pos + PCI_SRIOV_BAR +
  484. 4 * (resno - PCI_IOV_RESOURCES);
  485. }
  486. /**
  487. * pci_sriov_resource_alignment - get resource alignment for VF BAR
  488. * @dev: the PCI device
  489. * @resno: the resource number
  490. *
  491. * Returns the alignment of the VF BAR found in the SR-IOV capability.
  492. * This is not the same as the resource size which is defined as
  493. * the VF BAR size multiplied by the number of VFs. The alignment
  494. * is just the VF BAR size.
  495. */
  496. resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
  497. {
  498. struct resource tmp;
  499. enum pci_bar_type type;
  500. int reg = pci_iov_resource_bar(dev, resno, &type);
  501. if (!reg)
  502. return 0;
  503. __pci_read_base(dev, type, &tmp, reg);
  504. return resource_alignment(&tmp);
  505. }
  506. /**
  507. * pci_restore_iov_state - restore the state of the IOV capability
  508. * @dev: the PCI device
  509. */
  510. void pci_restore_iov_state(struct pci_dev *dev)
  511. {
  512. if (dev->is_physfn)
  513. sriov_restore_state(dev);
  514. }
  515. /**
  516. * pci_iov_bus_range - find bus range used by Virtual Function
  517. * @bus: the PCI bus
  518. *
  519. * Returns max number of buses (exclude current one) used by Virtual
  520. * Functions.
  521. */
  522. int pci_iov_bus_range(struct pci_bus *bus)
  523. {
  524. int max = 0;
  525. u8 busnr;
  526. struct pci_dev *dev;
  527. list_for_each_entry(dev, &bus->devices, bus_list) {
  528. if (!dev->is_physfn)
  529. continue;
  530. busnr = virtfn_bus(dev, dev->sriov->total_VFs - 1);
  531. if (busnr > max)
  532. max = busnr;
  533. }
  534. return max ? max - bus->number : 0;
  535. }
  536. /**
  537. * pci_enable_sriov - enable the SR-IOV capability
  538. * @dev: the PCI device
  539. * @nr_virtfn: number of virtual functions to enable
  540. *
  541. * Returns 0 on success, or negative on failure.
  542. */
  543. int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
  544. {
  545. might_sleep();
  546. if (!dev->is_physfn)
  547. return -ENODEV;
  548. return sriov_enable(dev, nr_virtfn);
  549. }
  550. EXPORT_SYMBOL_GPL(pci_enable_sriov);
  551. /**
  552. * pci_disable_sriov - disable the SR-IOV capability
  553. * @dev: the PCI device
  554. */
  555. void pci_disable_sriov(struct pci_dev *dev)
  556. {
  557. might_sleep();
  558. if (!dev->is_physfn)
  559. return;
  560. sriov_disable(dev);
  561. }
  562. EXPORT_SYMBOL_GPL(pci_disable_sriov);
  563. /**
  564. * pci_sriov_migration - notify SR-IOV core of Virtual Function Migration
  565. * @dev: the PCI device
  566. *
  567. * Returns IRQ_HANDLED if the IRQ is handled, or IRQ_NONE if not.
  568. *
  569. * Physical Function driver is responsible to register IRQ handler using
  570. * VF Migration Interrupt Message Number, and call this function when the
  571. * interrupt is generated by the hardware.
  572. */
  573. irqreturn_t pci_sriov_migration(struct pci_dev *dev)
  574. {
  575. if (!dev->is_physfn)
  576. return IRQ_NONE;
  577. return sriov_migration(dev) ? IRQ_HANDLED : IRQ_NONE;
  578. }
  579. EXPORT_SYMBOL_GPL(pci_sriov_migration);
  580. /**
  581. * pci_num_vf - return number of VFs associated with a PF device_release_driver
  582. * @dev: the PCI device
  583. *
  584. * Returns number of VFs, or 0 if SR-IOV is not enabled.
  585. */
  586. int pci_num_vf(struct pci_dev *dev)
  587. {
  588. if (!dev->is_physfn)
  589. return 0;
  590. return dev->sriov->num_VFs;
  591. }
  592. EXPORT_SYMBOL_GPL(pci_num_vf);
  593. /**
  594. * pci_sriov_set_totalvfs -- reduce the TotalVFs available
  595. * @dev: the PCI PF device
  596. * @numvfs: number that should be used for TotalVFs supported
  597. *
  598. * Should be called from PF driver's probe routine with
  599. * device's mutex held.
  600. *
  601. * Returns 0 if PF is an SRIOV-capable device and
  602. * value of numvfs valid. If not a PF with VFS, return -EINVAL;
  603. * if VFs already enabled, return -EBUSY.
  604. */
  605. int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
  606. {
  607. if (!dev->is_physfn || (numvfs > dev->sriov->total_VFs))
  608. return -EINVAL;
  609. /* Shouldn't change if VFs already enabled */
  610. if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
  611. return -EBUSY;
  612. else
  613. dev->sriov->driver_max_VFs = numvfs;
  614. return 0;
  615. }
  616. EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
  617. /**
  618. * pci_sriov_get_totalvfs -- get total VFs supported on this devic3
  619. * @dev: the PCI PF device
  620. *
  621. * For a PCIe device with SRIOV support, return the PCIe
  622. * SRIOV capability value of TotalVFs or the value of driver_max_VFs
  623. * if the driver reduced it. Otherwise, -EINVAL.
  624. */
  625. int pci_sriov_get_totalvfs(struct pci_dev *dev)
  626. {
  627. if (!dev->is_physfn)
  628. return -EINVAL;
  629. if (dev->sriov->driver_max_VFs)
  630. return dev->sriov->driver_max_VFs;
  631. return dev->sriov->total_VFs;
  632. }
  633. EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);