i2c.c 11 KB

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  1. /*
  2. * I2C Link Layer for PN544 HCI based Driver
  3. *
  4. * Copyright (C) 2012 Intel Corporation. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the
  17. * Free Software Foundation, Inc.,
  18. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19. */
  20. #include <linux/crc-ccitt.h>
  21. #include <linux/module.h>
  22. #include <linux/i2c.h>
  23. #include <linux/gpio.h>
  24. #include <linux/miscdevice.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/delay.h>
  27. #include <linux/platform_data/pn544.h>
  28. #include <net/nfc/hci.h>
  29. #include <net/nfc/llc.h>
  30. #include "pn544.h"
  31. #define PN544_I2C_FRAME_HEADROOM 1
  32. #define PN544_I2C_FRAME_TAILROOM 2
  33. /* framing in HCI mode */
  34. #define PN544_HCI_I2C_LLC_LEN 1
  35. #define PN544_HCI_I2C_LLC_CRC 2
  36. #define PN544_HCI_I2C_LLC_LEN_CRC (PN544_HCI_I2C_LLC_LEN + \
  37. PN544_HCI_I2C_LLC_CRC)
  38. #define PN544_HCI_I2C_LLC_MIN_SIZE (1 + PN544_HCI_I2C_LLC_LEN_CRC)
  39. #define PN544_HCI_I2C_LLC_MAX_PAYLOAD 29
  40. #define PN544_HCI_I2C_LLC_MAX_SIZE (PN544_HCI_I2C_LLC_LEN_CRC + 1 + \
  41. PN544_HCI_I2C_LLC_MAX_PAYLOAD)
  42. static struct i2c_device_id pn544_hci_i2c_id_table[] = {
  43. {"pn544", 0},
  44. {}
  45. };
  46. MODULE_DEVICE_TABLE(i2c, pn544_hci_i2c_id_table);
  47. #define PN544_HCI_I2C_DRIVER_NAME "pn544_hci_i2c"
  48. struct pn544_i2c_phy {
  49. struct i2c_client *i2c_dev;
  50. struct nfc_hci_dev *hdev;
  51. unsigned int gpio_en;
  52. unsigned int gpio_irq;
  53. unsigned int gpio_fw;
  54. unsigned int en_polarity;
  55. int powered;
  56. int hard_fault; /*
  57. * < 0 if hardware error occured (e.g. i2c err)
  58. * and prevents normal operation.
  59. */
  60. };
  61. #define I2C_DUMP_SKB(info, skb) \
  62. do { \
  63. pr_debug("%s:\n", info); \
  64. print_hex_dump(KERN_DEBUG, "i2c: ", DUMP_PREFIX_OFFSET, \
  65. 16, 1, (skb)->data, (skb)->len, 0); \
  66. } while (0)
  67. static void pn544_hci_i2c_platform_init(struct pn544_i2c_phy *phy)
  68. {
  69. int polarity, retry, ret;
  70. char rset_cmd[] = { 0x05, 0xF9, 0x04, 0x00, 0xC3, 0xE5 };
  71. int count = sizeof(rset_cmd);
  72. pr_info(DRIVER_DESC ": %s\n", __func__);
  73. dev_info(&phy->i2c_dev->dev, "Detecting nfc_en polarity\n");
  74. /* Disable fw download */
  75. gpio_set_value(phy->gpio_fw, 0);
  76. for (polarity = 0; polarity < 2; polarity++) {
  77. phy->en_polarity = polarity;
  78. retry = 3;
  79. while (retry--) {
  80. /* power off */
  81. gpio_set_value(phy->gpio_en, !phy->en_polarity);
  82. usleep_range(10000, 15000);
  83. /* power on */
  84. gpio_set_value(phy->gpio_en, phy->en_polarity);
  85. usleep_range(10000, 15000);
  86. /* send reset */
  87. dev_dbg(&phy->i2c_dev->dev, "Sending reset cmd\n");
  88. ret = i2c_master_send(phy->i2c_dev, rset_cmd, count);
  89. if (ret == count) {
  90. dev_info(&phy->i2c_dev->dev,
  91. "nfc_en polarity : active %s\n",
  92. (polarity == 0 ? "low" : "high"));
  93. goto out;
  94. }
  95. }
  96. }
  97. dev_err(&phy->i2c_dev->dev,
  98. "Could not detect nfc_en polarity, fallback to active high\n");
  99. out:
  100. gpio_set_value(phy->gpio_en, !phy->en_polarity);
  101. }
  102. static int pn544_hci_i2c_enable(void *phy_id)
  103. {
  104. struct pn544_i2c_phy *phy = phy_id;
  105. pr_info(DRIVER_DESC ": %s\n", __func__);
  106. gpio_set_value(phy->gpio_fw, 0);
  107. gpio_set_value(phy->gpio_en, phy->en_polarity);
  108. usleep_range(10000, 15000);
  109. phy->powered = 1;
  110. return 0;
  111. }
  112. static void pn544_hci_i2c_disable(void *phy_id)
  113. {
  114. struct pn544_i2c_phy *phy = phy_id;
  115. pr_info(DRIVER_DESC ": %s\n", __func__);
  116. gpio_set_value(phy->gpio_fw, 0);
  117. gpio_set_value(phy->gpio_en, !phy->en_polarity);
  118. usleep_range(10000, 15000);
  119. gpio_set_value(phy->gpio_en, phy->en_polarity);
  120. usleep_range(10000, 15000);
  121. gpio_set_value(phy->gpio_en, !phy->en_polarity);
  122. usleep_range(10000, 15000);
  123. phy->powered = 0;
  124. }
  125. static void pn544_hci_i2c_add_len_crc(struct sk_buff *skb)
  126. {
  127. u16 crc;
  128. int len;
  129. len = skb->len + 2;
  130. *skb_push(skb, 1) = len;
  131. crc = crc_ccitt(0xffff, skb->data, skb->len);
  132. crc = ~crc;
  133. *skb_put(skb, 1) = crc & 0xff;
  134. *skb_put(skb, 1) = crc >> 8;
  135. }
  136. static void pn544_hci_i2c_remove_len_crc(struct sk_buff *skb)
  137. {
  138. skb_pull(skb, PN544_I2C_FRAME_HEADROOM);
  139. skb_trim(skb, PN544_I2C_FRAME_TAILROOM);
  140. }
  141. /*
  142. * Writing a frame must not return the number of written bytes.
  143. * It must return either zero for success, or <0 for error.
  144. * In addition, it must not alter the skb
  145. */
  146. static int pn544_hci_i2c_write(void *phy_id, struct sk_buff *skb)
  147. {
  148. int r;
  149. struct pn544_i2c_phy *phy = phy_id;
  150. struct i2c_client *client = phy->i2c_dev;
  151. if (phy->hard_fault != 0)
  152. return phy->hard_fault;
  153. usleep_range(3000, 6000);
  154. pn544_hci_i2c_add_len_crc(skb);
  155. I2C_DUMP_SKB("i2c frame written", skb);
  156. r = i2c_master_send(client, skb->data, skb->len);
  157. if (r == -EREMOTEIO) { /* Retry, chip was in standby */
  158. usleep_range(6000, 10000);
  159. r = i2c_master_send(client, skb->data, skb->len);
  160. }
  161. if (r >= 0) {
  162. if (r != skb->len)
  163. r = -EREMOTEIO;
  164. else
  165. r = 0;
  166. }
  167. pn544_hci_i2c_remove_len_crc(skb);
  168. return r;
  169. }
  170. static int check_crc(u8 *buf, int buflen)
  171. {
  172. int len;
  173. u16 crc;
  174. len = buf[0] + 1;
  175. crc = crc_ccitt(0xffff, buf, len - 2);
  176. crc = ~crc;
  177. if (buf[len - 2] != (crc & 0xff) || buf[len - 1] != (crc >> 8)) {
  178. pr_err(PN544_HCI_I2C_DRIVER_NAME
  179. ": CRC error 0x%x != 0x%x 0x%x\n",
  180. crc, buf[len - 1], buf[len - 2]);
  181. pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__);
  182. print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE,
  183. 16, 2, buf, buflen, false);
  184. return -EPERM;
  185. }
  186. return 0;
  187. }
  188. /*
  189. * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees
  190. * that i2c bus will be flushed and that next read will start on a new frame.
  191. * returned skb contains only LLC header and payload.
  192. * returns:
  193. * -EREMOTEIO : i2c read error (fatal)
  194. * -EBADMSG : frame was incorrect and discarded
  195. * -ENOMEM : cannot allocate skb, frame dropped
  196. */
  197. static int pn544_hci_i2c_read(struct pn544_i2c_phy *phy, struct sk_buff **skb)
  198. {
  199. int r;
  200. u8 len;
  201. u8 tmp[PN544_HCI_I2C_LLC_MAX_SIZE - 1];
  202. struct i2c_client *client = phy->i2c_dev;
  203. r = i2c_master_recv(client, &len, 1);
  204. if (r != 1) {
  205. dev_err(&client->dev, "cannot read len byte\n");
  206. return -EREMOTEIO;
  207. }
  208. if ((len < (PN544_HCI_I2C_LLC_MIN_SIZE - 1)) ||
  209. (len > (PN544_HCI_I2C_LLC_MAX_SIZE - 1))) {
  210. dev_err(&client->dev, "invalid len byte\n");
  211. r = -EBADMSG;
  212. goto flush;
  213. }
  214. *skb = alloc_skb(1 + len, GFP_KERNEL);
  215. if (*skb == NULL) {
  216. r = -ENOMEM;
  217. goto flush;
  218. }
  219. *skb_put(*skb, 1) = len;
  220. r = i2c_master_recv(client, skb_put(*skb, len), len);
  221. if (r != len) {
  222. kfree_skb(*skb);
  223. return -EREMOTEIO;
  224. }
  225. I2C_DUMP_SKB("i2c frame read", *skb);
  226. r = check_crc((*skb)->data, (*skb)->len);
  227. if (r != 0) {
  228. kfree_skb(*skb);
  229. r = -EBADMSG;
  230. goto flush;
  231. }
  232. skb_pull(*skb, 1);
  233. skb_trim(*skb, (*skb)->len - 2);
  234. usleep_range(3000, 6000);
  235. return 0;
  236. flush:
  237. if (i2c_master_recv(client, tmp, sizeof(tmp)) < 0)
  238. r = -EREMOTEIO;
  239. usleep_range(3000, 6000);
  240. return r;
  241. }
  242. /*
  243. * Reads an shdlc frame from the chip. This is not as straightforward as it
  244. * seems. There are cases where we could loose the frame start synchronization.
  245. * The frame format is len-data-crc, and corruption can occur anywhere while
  246. * transiting on i2c bus, such that we could read an invalid len.
  247. * In order to recover synchronization with the next frame, we must be sure
  248. * to read the real amount of data without using the len byte. We do this by
  249. * assuming the following:
  250. * - the chip will always present only one single complete frame on the bus
  251. * before triggering the interrupt
  252. * - the chip will not present a new frame until we have completely read
  253. * the previous one (or until we have handled the interrupt).
  254. * The tricky case is when we read a corrupted len that is less than the real
  255. * len. We must detect this here in order to determine that we need to flush
  256. * the bus. This is the reason why we check the crc here.
  257. */
  258. static irqreturn_t pn544_hci_i2c_irq_thread_fn(int irq, void *phy_id)
  259. {
  260. struct pn544_i2c_phy *phy = phy_id;
  261. struct i2c_client *client;
  262. struct sk_buff *skb = NULL;
  263. int r;
  264. if (!phy || irq != phy->i2c_dev->irq) {
  265. WARN_ON_ONCE(1);
  266. return IRQ_NONE;
  267. }
  268. client = phy->i2c_dev;
  269. dev_dbg(&client->dev, "IRQ\n");
  270. if (phy->hard_fault != 0)
  271. return IRQ_HANDLED;
  272. r = pn544_hci_i2c_read(phy, &skb);
  273. if (r == -EREMOTEIO) {
  274. phy->hard_fault = r;
  275. nfc_hci_recv_frame(phy->hdev, NULL);
  276. return IRQ_HANDLED;
  277. } else if ((r == -ENOMEM) || (r == -EBADMSG)) {
  278. return IRQ_HANDLED;
  279. }
  280. nfc_hci_recv_frame(phy->hdev, skb);
  281. return IRQ_HANDLED;
  282. }
  283. static struct nfc_phy_ops i2c_phy_ops = {
  284. .write = pn544_hci_i2c_write,
  285. .enable = pn544_hci_i2c_enable,
  286. .disable = pn544_hci_i2c_disable,
  287. };
  288. static int pn544_hci_i2c_probe(struct i2c_client *client,
  289. const struct i2c_device_id *id)
  290. {
  291. struct pn544_i2c_phy *phy;
  292. struct pn544_nfc_platform_data *pdata;
  293. int r = 0;
  294. dev_dbg(&client->dev, "%s\n", __func__);
  295. dev_dbg(&client->dev, "IRQ: %d\n", client->irq);
  296. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
  297. dev_err(&client->dev, "Need I2C_FUNC_I2C\n");
  298. return -ENODEV;
  299. }
  300. phy = devm_kzalloc(&client->dev, sizeof(struct pn544_i2c_phy),
  301. GFP_KERNEL);
  302. if (!phy) {
  303. dev_err(&client->dev,
  304. "Cannot allocate memory for pn544 i2c phy.\n");
  305. return -ENOMEM;
  306. }
  307. phy->i2c_dev = client;
  308. i2c_set_clientdata(client, phy);
  309. pdata = client->dev.platform_data;
  310. if (pdata == NULL) {
  311. dev_err(&client->dev, "No platform data\n");
  312. return -EINVAL;
  313. }
  314. if (pdata->request_resources == NULL) {
  315. dev_err(&client->dev, "request_resources() missing\n");
  316. return -EINVAL;
  317. }
  318. r = pdata->request_resources(client);
  319. if (r) {
  320. dev_err(&client->dev, "Cannot get platform resources\n");
  321. return r;
  322. }
  323. phy->gpio_en = pdata->get_gpio(NFC_GPIO_ENABLE);
  324. phy->gpio_fw = pdata->get_gpio(NFC_GPIO_FW_RESET);
  325. phy->gpio_irq = pdata->get_gpio(NFC_GPIO_IRQ);
  326. pn544_hci_i2c_platform_init(phy);
  327. r = request_threaded_irq(client->irq, NULL, pn544_hci_i2c_irq_thread_fn,
  328. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  329. PN544_HCI_I2C_DRIVER_NAME, phy);
  330. if (r < 0) {
  331. dev_err(&client->dev, "Unable to register IRQ handler\n");
  332. goto err_rti;
  333. }
  334. r = pn544_hci_probe(phy, &i2c_phy_ops, LLC_SHDLC_NAME,
  335. PN544_I2C_FRAME_HEADROOM, PN544_I2C_FRAME_TAILROOM,
  336. PN544_HCI_I2C_LLC_MAX_PAYLOAD, &phy->hdev);
  337. if (r < 0)
  338. goto err_hci;
  339. return 0;
  340. err_hci:
  341. free_irq(client->irq, phy);
  342. err_rti:
  343. if (pdata->free_resources != NULL)
  344. pdata->free_resources();
  345. return r;
  346. }
  347. static int pn544_hci_i2c_remove(struct i2c_client *client)
  348. {
  349. struct pn544_i2c_phy *phy = i2c_get_clientdata(client);
  350. struct pn544_nfc_platform_data *pdata = client->dev.platform_data;
  351. dev_dbg(&client->dev, "%s\n", __func__);
  352. pn544_hci_remove(phy->hdev);
  353. if (phy->powered)
  354. pn544_hci_i2c_disable(phy);
  355. free_irq(client->irq, phy);
  356. if (pdata->free_resources)
  357. pdata->free_resources();
  358. return 0;
  359. }
  360. static struct i2c_driver pn544_hci_i2c_driver = {
  361. .driver = {
  362. .name = PN544_HCI_I2C_DRIVER_NAME,
  363. },
  364. .probe = pn544_hci_i2c_probe,
  365. .id_table = pn544_hci_i2c_id_table,
  366. .remove = pn544_hci_i2c_remove,
  367. };
  368. module_i2c_driver(pn544_hci_i2c_driver);
  369. MODULE_LICENSE("GPL");
  370. MODULE_DESCRIPTION(DRIVER_DESC);