boot.c 14 KB

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  1. /*
  2. * This file is part of wl1271
  3. *
  4. * Copyright (C) 2008-2010 Nokia Corporation
  5. *
  6. * Contact: Luciano Coelho <luciano.coelho@nokia.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. */
  23. #include <linux/slab.h>
  24. #include <linux/wl12xx.h>
  25. #include <linux/export.h>
  26. #include "debug.h"
  27. #include "acx.h"
  28. #include "boot.h"
  29. #include "io.h"
  30. #include "event.h"
  31. #include "rx.h"
  32. #include "hw_ops.h"
  33. static int wl1271_boot_set_ecpu_ctrl(struct wl1271 *wl, u32 flag)
  34. {
  35. u32 cpu_ctrl;
  36. int ret;
  37. /* 10.5.0 run the firmware (I) */
  38. ret = wlcore_read_reg(wl, REG_ECPU_CONTROL, &cpu_ctrl);
  39. if (ret < 0)
  40. goto out;
  41. /* 10.5.1 run the firmware (II) */
  42. cpu_ctrl |= flag;
  43. ret = wlcore_write_reg(wl, REG_ECPU_CONTROL, cpu_ctrl);
  44. out:
  45. return ret;
  46. }
  47. static int wlcore_boot_parse_fw_ver(struct wl1271 *wl,
  48. struct wl1271_static_data *static_data)
  49. {
  50. int ret;
  51. strncpy(wl->chip.fw_ver_str, static_data->fw_version,
  52. sizeof(wl->chip.fw_ver_str));
  53. /* make sure the string is NULL-terminated */
  54. wl->chip.fw_ver_str[sizeof(wl->chip.fw_ver_str) - 1] = '\0';
  55. ret = sscanf(wl->chip.fw_ver_str + 4, "%u.%u.%u.%u.%u",
  56. &wl->chip.fw_ver[0], &wl->chip.fw_ver[1],
  57. &wl->chip.fw_ver[2], &wl->chip.fw_ver[3],
  58. &wl->chip.fw_ver[4]);
  59. if (ret != 5) {
  60. wl1271_warning("fw version incorrect value");
  61. memset(wl->chip.fw_ver, 0, sizeof(wl->chip.fw_ver));
  62. ret = -EINVAL;
  63. goto out;
  64. }
  65. ret = wlcore_identify_fw(wl);
  66. if (ret < 0)
  67. goto out;
  68. out:
  69. return ret;
  70. }
  71. static int wlcore_validate_fw_ver(struct wl1271 *wl)
  72. {
  73. unsigned int *fw_ver = wl->chip.fw_ver;
  74. unsigned int *min_ver = (wl->fw_type == WL12XX_FW_TYPE_MULTI) ?
  75. wl->min_mr_fw_ver : wl->min_sr_fw_ver;
  76. char min_fw_str[32] = "";
  77. int i;
  78. /* the chip must be exactly equal */
  79. if ((min_ver[FW_VER_CHIP] != WLCORE_FW_VER_IGNORE) &&
  80. (min_ver[FW_VER_CHIP] != fw_ver[FW_VER_CHIP]))
  81. goto fail;
  82. /* the firmware type must be equal */
  83. if ((min_ver[FW_VER_IF_TYPE] != WLCORE_FW_VER_IGNORE) &&
  84. (min_ver[FW_VER_IF_TYPE] != fw_ver[FW_VER_IF_TYPE]))
  85. goto fail;
  86. /* the project number must be equal */
  87. if ((min_ver[FW_VER_SUBTYPE] != WLCORE_FW_VER_IGNORE) &&
  88. (min_ver[FW_VER_SUBTYPE] != fw_ver[FW_VER_SUBTYPE]))
  89. goto fail;
  90. /* the API version must be greater or equal */
  91. if ((min_ver[FW_VER_MAJOR] != WLCORE_FW_VER_IGNORE) &&
  92. (min_ver[FW_VER_MAJOR] > fw_ver[FW_VER_MAJOR]))
  93. goto fail;
  94. /* if the API version is equal... */
  95. if (((min_ver[FW_VER_MAJOR] == WLCORE_FW_VER_IGNORE) ||
  96. (min_ver[FW_VER_MAJOR] == fw_ver[FW_VER_MAJOR])) &&
  97. /* ...the minor must be greater or equal */
  98. ((min_ver[FW_VER_MINOR] != WLCORE_FW_VER_IGNORE) &&
  99. (min_ver[FW_VER_MINOR] > fw_ver[FW_VER_MINOR])))
  100. goto fail;
  101. return 0;
  102. fail:
  103. for (i = 0; i < NUM_FW_VER; i++)
  104. if (min_ver[i] == WLCORE_FW_VER_IGNORE)
  105. snprintf(min_fw_str, sizeof(min_fw_str),
  106. "%s*.", min_fw_str);
  107. else
  108. snprintf(min_fw_str, sizeof(min_fw_str),
  109. "%s%u.", min_fw_str, min_ver[i]);
  110. wl1271_error("Your WiFi FW version (%u.%u.%u.%u.%u) is invalid.\n"
  111. "Please use at least FW %s\n"
  112. "You can get the latest firmwares at:\n"
  113. "git://github.com/TI-OpenLink/firmwares.git",
  114. fw_ver[FW_VER_CHIP], fw_ver[FW_VER_IF_TYPE],
  115. fw_ver[FW_VER_MAJOR], fw_ver[FW_VER_SUBTYPE],
  116. fw_ver[FW_VER_MINOR], min_fw_str);
  117. return -EINVAL;
  118. }
  119. static int wlcore_boot_static_data(struct wl1271 *wl)
  120. {
  121. struct wl1271_static_data *static_data;
  122. size_t len = sizeof(*static_data) + wl->static_data_priv_len;
  123. int ret;
  124. static_data = kmalloc(len, GFP_KERNEL);
  125. if (!static_data) {
  126. ret = -ENOMEM;
  127. goto out;
  128. }
  129. ret = wlcore_read(wl, wl->cmd_box_addr, static_data, len, false);
  130. if (ret < 0)
  131. goto out_free;
  132. ret = wlcore_boot_parse_fw_ver(wl, static_data);
  133. if (ret < 0)
  134. goto out_free;
  135. ret = wlcore_validate_fw_ver(wl);
  136. if (ret < 0)
  137. goto out_free;
  138. ret = wlcore_handle_static_data(wl, static_data);
  139. if (ret < 0)
  140. goto out_free;
  141. out_free:
  142. kfree(static_data);
  143. out:
  144. return ret;
  145. }
  146. static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,
  147. size_t fw_data_len, u32 dest)
  148. {
  149. struct wlcore_partition_set partition;
  150. int addr, chunk_num, partition_limit;
  151. u8 *p, *chunk;
  152. int ret;
  153. /* whal_FwCtrl_LoadFwImageSm() */
  154. wl1271_debug(DEBUG_BOOT, "starting firmware upload");
  155. wl1271_debug(DEBUG_BOOT, "fw_data_len %zd chunk_size %d",
  156. fw_data_len, CHUNK_SIZE);
  157. if ((fw_data_len % 4) != 0) {
  158. wl1271_error("firmware length not multiple of four");
  159. return -EIO;
  160. }
  161. chunk = kmalloc(CHUNK_SIZE, GFP_KERNEL);
  162. if (!chunk) {
  163. wl1271_error("allocation for firmware upload chunk failed");
  164. return -ENOMEM;
  165. }
  166. memcpy(&partition, &wl->ptable[PART_DOWN], sizeof(partition));
  167. partition.mem.start = dest;
  168. ret = wlcore_set_partition(wl, &partition);
  169. if (ret < 0)
  170. goto out;
  171. /* 10.1 set partition limit and chunk num */
  172. chunk_num = 0;
  173. partition_limit = wl->ptable[PART_DOWN].mem.size;
  174. while (chunk_num < fw_data_len / CHUNK_SIZE) {
  175. /* 10.2 update partition, if needed */
  176. addr = dest + (chunk_num + 2) * CHUNK_SIZE;
  177. if (addr > partition_limit) {
  178. addr = dest + chunk_num * CHUNK_SIZE;
  179. partition_limit = chunk_num * CHUNK_SIZE +
  180. wl->ptable[PART_DOWN].mem.size;
  181. partition.mem.start = addr;
  182. ret = wlcore_set_partition(wl, &partition);
  183. if (ret < 0)
  184. goto out;
  185. }
  186. /* 10.3 upload the chunk */
  187. addr = dest + chunk_num * CHUNK_SIZE;
  188. p = buf + chunk_num * CHUNK_SIZE;
  189. memcpy(chunk, p, CHUNK_SIZE);
  190. wl1271_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x",
  191. p, addr);
  192. ret = wlcore_write(wl, addr, chunk, CHUNK_SIZE, false);
  193. if (ret < 0)
  194. goto out;
  195. chunk_num++;
  196. }
  197. /* 10.4 upload the last chunk */
  198. addr = dest + chunk_num * CHUNK_SIZE;
  199. p = buf + chunk_num * CHUNK_SIZE;
  200. memcpy(chunk, p, fw_data_len % CHUNK_SIZE);
  201. wl1271_debug(DEBUG_BOOT, "uploading fw last chunk (%zd B) 0x%p to 0x%x",
  202. fw_data_len % CHUNK_SIZE, p, addr);
  203. ret = wlcore_write(wl, addr, chunk, fw_data_len % CHUNK_SIZE, false);
  204. out:
  205. kfree(chunk);
  206. return ret;
  207. }
  208. int wlcore_boot_upload_firmware(struct wl1271 *wl)
  209. {
  210. u32 chunks, addr, len;
  211. int ret = 0;
  212. u8 *fw;
  213. fw = wl->fw;
  214. chunks = be32_to_cpup((__be32 *) fw);
  215. fw += sizeof(u32);
  216. wl1271_debug(DEBUG_BOOT, "firmware chunks to be uploaded: %u", chunks);
  217. while (chunks--) {
  218. addr = be32_to_cpup((__be32 *) fw);
  219. fw += sizeof(u32);
  220. len = be32_to_cpup((__be32 *) fw);
  221. fw += sizeof(u32);
  222. if (len > 300000) {
  223. wl1271_info("firmware chunk too long: %u", len);
  224. return -EINVAL;
  225. }
  226. wl1271_debug(DEBUG_BOOT, "chunk %d addr 0x%x len %u",
  227. chunks, addr, len);
  228. ret = wl1271_boot_upload_firmware_chunk(wl, fw, len, addr);
  229. if (ret != 0)
  230. break;
  231. fw += len;
  232. }
  233. return ret;
  234. }
  235. EXPORT_SYMBOL_GPL(wlcore_boot_upload_firmware);
  236. int wlcore_boot_upload_nvs(struct wl1271 *wl)
  237. {
  238. size_t nvs_len, burst_len;
  239. int i;
  240. u32 dest_addr, val;
  241. u8 *nvs_ptr, *nvs_aligned;
  242. int ret;
  243. if (wl->nvs == NULL) {
  244. wl1271_error("NVS file is needed during boot");
  245. return -ENODEV;
  246. }
  247. if (wl->quirks & WLCORE_QUIRK_LEGACY_NVS) {
  248. struct wl1271_nvs_file *nvs =
  249. (struct wl1271_nvs_file *)wl->nvs;
  250. /*
  251. * FIXME: the LEGACY NVS image support (NVS's missing the 5GHz
  252. * band configurations) can be removed when those NVS files stop
  253. * floating around.
  254. */
  255. if (wl->nvs_len == sizeof(struct wl1271_nvs_file) ||
  256. wl->nvs_len == WL1271_INI_LEGACY_NVS_FILE_SIZE) {
  257. if (nvs->general_params.dual_mode_select)
  258. wl->enable_11a = true;
  259. }
  260. if (wl->nvs_len != sizeof(struct wl1271_nvs_file) &&
  261. (wl->nvs_len != WL1271_INI_LEGACY_NVS_FILE_SIZE ||
  262. wl->enable_11a)) {
  263. wl1271_error("nvs size is not as expected: %zu != %zu",
  264. wl->nvs_len, sizeof(struct wl1271_nvs_file));
  265. kfree(wl->nvs);
  266. wl->nvs = NULL;
  267. wl->nvs_len = 0;
  268. return -EILSEQ;
  269. }
  270. /* only the first part of the NVS needs to be uploaded */
  271. nvs_len = sizeof(nvs->nvs);
  272. nvs_ptr = (u8 *) nvs->nvs;
  273. } else {
  274. struct wl128x_nvs_file *nvs = (struct wl128x_nvs_file *)wl->nvs;
  275. if (wl->nvs_len == sizeof(struct wl128x_nvs_file)) {
  276. if (nvs->general_params.dual_mode_select)
  277. wl->enable_11a = true;
  278. } else {
  279. wl1271_error("nvs size is not as expected: %zu != %zu",
  280. wl->nvs_len,
  281. sizeof(struct wl128x_nvs_file));
  282. kfree(wl->nvs);
  283. wl->nvs = NULL;
  284. wl->nvs_len = 0;
  285. return -EILSEQ;
  286. }
  287. /* only the first part of the NVS needs to be uploaded */
  288. nvs_len = sizeof(nvs->nvs);
  289. nvs_ptr = (u8 *)nvs->nvs;
  290. }
  291. /* update current MAC address to NVS */
  292. nvs_ptr[11] = wl->addresses[0].addr[0];
  293. nvs_ptr[10] = wl->addresses[0].addr[1];
  294. nvs_ptr[6] = wl->addresses[0].addr[2];
  295. nvs_ptr[5] = wl->addresses[0].addr[3];
  296. nvs_ptr[4] = wl->addresses[0].addr[4];
  297. nvs_ptr[3] = wl->addresses[0].addr[5];
  298. /*
  299. * Layout before the actual NVS tables:
  300. * 1 byte : burst length.
  301. * 2 bytes: destination address.
  302. * n bytes: data to burst copy.
  303. *
  304. * This is ended by a 0 length, then the NVS tables.
  305. */
  306. /* FIXME: Do we need to check here whether the LSB is 1? */
  307. while (nvs_ptr[0]) {
  308. burst_len = nvs_ptr[0];
  309. dest_addr = (nvs_ptr[1] & 0xfe) | ((u32)(nvs_ptr[2] << 8));
  310. /*
  311. * Due to our new wl1271_translate_reg_addr function,
  312. * we need to add the register partition start address
  313. * to the destination
  314. */
  315. dest_addr += wl->curr_part.reg.start;
  316. /* We move our pointer to the data */
  317. nvs_ptr += 3;
  318. for (i = 0; i < burst_len; i++) {
  319. if (nvs_ptr + 3 >= (u8 *) wl->nvs + nvs_len)
  320. goto out_badnvs;
  321. val = (nvs_ptr[0] | (nvs_ptr[1] << 8)
  322. | (nvs_ptr[2] << 16) | (nvs_ptr[3] << 24));
  323. wl1271_debug(DEBUG_BOOT,
  324. "nvs burst write 0x%x: 0x%x",
  325. dest_addr, val);
  326. ret = wlcore_write32(wl, dest_addr, val);
  327. if (ret < 0)
  328. return ret;
  329. nvs_ptr += 4;
  330. dest_addr += 4;
  331. }
  332. if (nvs_ptr >= (u8 *) wl->nvs + nvs_len)
  333. goto out_badnvs;
  334. }
  335. /*
  336. * We've reached the first zero length, the first NVS table
  337. * is located at an aligned offset which is at least 7 bytes further.
  338. * NOTE: The wl->nvs->nvs element must be first, in order to
  339. * simplify the casting, we assume it is at the beginning of
  340. * the wl->nvs structure.
  341. */
  342. nvs_ptr = (u8 *)wl->nvs +
  343. ALIGN(nvs_ptr - (u8 *)wl->nvs + 7, 4);
  344. if (nvs_ptr >= (u8 *) wl->nvs + nvs_len)
  345. goto out_badnvs;
  346. nvs_len -= nvs_ptr - (u8 *)wl->nvs;
  347. /* Now we must set the partition correctly */
  348. ret = wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
  349. if (ret < 0)
  350. return ret;
  351. /* Copy the NVS tables to a new block to ensure alignment */
  352. nvs_aligned = kmemdup(nvs_ptr, nvs_len, GFP_KERNEL);
  353. if (!nvs_aligned)
  354. return -ENOMEM;
  355. /* And finally we upload the NVS tables */
  356. ret = wlcore_write_data(wl, REG_CMD_MBOX_ADDRESS, nvs_aligned, nvs_len,
  357. false);
  358. kfree(nvs_aligned);
  359. return ret;
  360. out_badnvs:
  361. wl1271_error("nvs data is malformed");
  362. return -EILSEQ;
  363. }
  364. EXPORT_SYMBOL_GPL(wlcore_boot_upload_nvs);
  365. int wlcore_boot_run_firmware(struct wl1271 *wl)
  366. {
  367. int loop, ret;
  368. u32 chip_id, intr;
  369. /* Make sure we have the boot partition */
  370. ret = wlcore_set_partition(wl, &wl->ptable[PART_BOOT]);
  371. if (ret < 0)
  372. return ret;
  373. ret = wl1271_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);
  374. if (ret < 0)
  375. return ret;
  376. ret = wlcore_read_reg(wl, REG_CHIP_ID_B, &chip_id);
  377. if (ret < 0)
  378. return ret;
  379. wl1271_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id);
  380. if (chip_id != wl->chip.id) {
  381. wl1271_error("chip id doesn't match after firmware boot");
  382. return -EIO;
  383. }
  384. /* wait for init to complete */
  385. loop = 0;
  386. while (loop++ < INIT_LOOP) {
  387. udelay(INIT_LOOP_DELAY);
  388. ret = wlcore_read_reg(wl, REG_INTERRUPT_NO_CLEAR, &intr);
  389. if (ret < 0)
  390. return ret;
  391. if (intr == 0xffffffff) {
  392. wl1271_error("error reading hardware complete "
  393. "init indication");
  394. return -EIO;
  395. }
  396. /* check that ACX_INTR_INIT_COMPLETE is enabled */
  397. else if (intr & WL1271_ACX_INTR_INIT_COMPLETE) {
  398. ret = wlcore_write_reg(wl, REG_INTERRUPT_ACK,
  399. WL1271_ACX_INTR_INIT_COMPLETE);
  400. if (ret < 0)
  401. return ret;
  402. break;
  403. }
  404. }
  405. if (loop > INIT_LOOP) {
  406. wl1271_error("timeout waiting for the hardware to "
  407. "complete initialization");
  408. return -EIO;
  409. }
  410. /* get hardware config command mail box */
  411. ret = wlcore_read_reg(wl, REG_COMMAND_MAILBOX_PTR, &wl->cmd_box_addr);
  412. if (ret < 0)
  413. return ret;
  414. wl1271_debug(DEBUG_MAILBOX, "cmd_box_addr 0x%x", wl->cmd_box_addr);
  415. /* get hardware config event mail box */
  416. ret = wlcore_read_reg(wl, REG_EVENT_MAILBOX_PTR, &wl->mbox_ptr[0]);
  417. if (ret < 0)
  418. return ret;
  419. wl->mbox_ptr[1] = wl->mbox_ptr[0] + wl->mbox_size;
  420. wl1271_debug(DEBUG_MAILBOX, "MBOX ptrs: 0x%x 0x%x",
  421. wl->mbox_ptr[0], wl->mbox_ptr[1]);
  422. ret = wlcore_boot_static_data(wl);
  423. if (ret < 0) {
  424. wl1271_error("error getting static data");
  425. return ret;
  426. }
  427. /*
  428. * in case of full asynchronous mode the firmware event must be
  429. * ready to receive event from the command mailbox
  430. */
  431. /* unmask required mbox events */
  432. ret = wl1271_event_unmask(wl);
  433. if (ret < 0) {
  434. wl1271_error("EVENT mask setting failed");
  435. return ret;
  436. }
  437. /* set the working partition to its "running" mode offset */
  438. ret = wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
  439. /* firmware startup completed */
  440. return ret;
  441. }
  442. EXPORT_SYMBOL_GPL(wlcore_boot_run_firmware);