islpci_mgt.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503
  1. /*
  2. * Copyright (C) 2002 Intersil Americas Inc.
  3. * Copyright 2004 Jens Maurer <Jens.Maurer@gmx.net>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17. *
  18. */
  19. #include <linux/netdevice.h>
  20. #include <linux/module.h>
  21. #include <linux/pci.h>
  22. #include <linux/sched.h>
  23. #include <linux/slab.h>
  24. #include <asm/io.h>
  25. #include <linux/if_arp.h>
  26. #include "prismcompat.h"
  27. #include "isl_38xx.h"
  28. #include "islpci_mgt.h"
  29. #include "isl_oid.h" /* additional types and defs for isl38xx fw */
  30. #include "isl_ioctl.h"
  31. #include <net/iw_handler.h>
  32. /******************************************************************************
  33. Global variable definition section
  34. ******************************************************************************/
  35. int pc_debug = VERBOSE;
  36. module_param(pc_debug, int, 0);
  37. /******************************************************************************
  38. Driver general functions
  39. ******************************************************************************/
  40. #if VERBOSE > SHOW_ERROR_MESSAGES
  41. void
  42. display_buffer(char *buffer, int length)
  43. {
  44. if ((pc_debug & SHOW_BUFFER_CONTENTS) == 0)
  45. return;
  46. while (length > 0) {
  47. printk("[%02x]", *buffer & 255);
  48. length--;
  49. buffer++;
  50. }
  51. printk("\n");
  52. }
  53. #endif
  54. /*****************************************************************************
  55. Queue handling for management frames
  56. ******************************************************************************/
  57. /*
  58. * Helper function to create a PIMFOR management frame header.
  59. */
  60. static void
  61. pimfor_encode_header(int operation, u32 oid, u32 length, pimfor_header_t *h)
  62. {
  63. h->version = PIMFOR_VERSION;
  64. h->operation = operation;
  65. h->device_id = PIMFOR_DEV_ID_MHLI_MIB;
  66. h->flags = 0;
  67. h->oid = cpu_to_be32(oid);
  68. h->length = cpu_to_be32(length);
  69. }
  70. /*
  71. * Helper function to analyze a PIMFOR management frame header.
  72. */
  73. static pimfor_header_t *
  74. pimfor_decode_header(void *data, int len)
  75. {
  76. pimfor_header_t *h = data;
  77. while ((void *) h < data + len) {
  78. if (h->flags & PIMFOR_FLAG_LITTLE_ENDIAN) {
  79. le32_to_cpus(&h->oid);
  80. le32_to_cpus(&h->length);
  81. } else {
  82. be32_to_cpus(&h->oid);
  83. be32_to_cpus(&h->length);
  84. }
  85. if (h->oid != OID_INL_TUNNEL)
  86. return h;
  87. h++;
  88. }
  89. return NULL;
  90. }
  91. /*
  92. * Fill the receive queue for management frames with fresh buffers.
  93. */
  94. int
  95. islpci_mgmt_rx_fill(struct net_device *ndev)
  96. {
  97. islpci_private *priv = netdev_priv(ndev);
  98. isl38xx_control_block *cb = /* volatile not needed */
  99. (isl38xx_control_block *) priv->control_block;
  100. u32 curr = le32_to_cpu(cb->driver_curr_frag[ISL38XX_CB_RX_MGMTQ]);
  101. #if VERBOSE > SHOW_ERROR_MESSAGES
  102. DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgmt_rx_fill\n");
  103. #endif
  104. while (curr - priv->index_mgmt_rx < ISL38XX_CB_MGMT_QSIZE) {
  105. u32 index = curr % ISL38XX_CB_MGMT_QSIZE;
  106. struct islpci_membuf *buf = &priv->mgmt_rx[index];
  107. isl38xx_fragment *frag = &cb->rx_data_mgmt[index];
  108. if (buf->mem == NULL) {
  109. buf->mem = kmalloc(MGMT_FRAME_SIZE, GFP_ATOMIC);
  110. if (!buf->mem)
  111. return -ENOMEM;
  112. buf->size = MGMT_FRAME_SIZE;
  113. }
  114. if (buf->pci_addr == 0) {
  115. buf->pci_addr = pci_map_single(priv->pdev, buf->mem,
  116. MGMT_FRAME_SIZE,
  117. PCI_DMA_FROMDEVICE);
  118. if (!buf->pci_addr) {
  119. printk(KERN_WARNING
  120. "Failed to make memory DMA'able.\n");
  121. return -ENOMEM;
  122. }
  123. }
  124. /* be safe: always reset control block information */
  125. frag->size = cpu_to_le16(MGMT_FRAME_SIZE);
  126. frag->flags = 0;
  127. frag->address = cpu_to_le32(buf->pci_addr);
  128. curr++;
  129. /* The fragment address in the control block must have
  130. * been written before announcing the frame buffer to
  131. * device */
  132. wmb();
  133. cb->driver_curr_frag[ISL38XX_CB_RX_MGMTQ] = cpu_to_le32(curr);
  134. }
  135. return 0;
  136. }
  137. /*
  138. * Create and transmit a management frame using "operation" and "oid",
  139. * with arguments data/length.
  140. * We either return an error and free the frame, or we return 0 and
  141. * islpci_mgt_cleanup_transmit() frees the frame in the tx-done
  142. * interrupt.
  143. */
  144. static int
  145. islpci_mgt_transmit(struct net_device *ndev, int operation, unsigned long oid,
  146. void *data, int length)
  147. {
  148. islpci_private *priv = netdev_priv(ndev);
  149. isl38xx_control_block *cb =
  150. (isl38xx_control_block *) priv->control_block;
  151. void *p;
  152. int err = -EINVAL;
  153. unsigned long flags;
  154. isl38xx_fragment *frag;
  155. struct islpci_membuf buf;
  156. u32 curr_frag;
  157. int index;
  158. int frag_len = length + PIMFOR_HEADER_SIZE;
  159. #if VERBOSE > SHOW_ERROR_MESSAGES
  160. DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgt_transmit\n");
  161. #endif
  162. if (frag_len > MGMT_FRAME_SIZE) {
  163. printk(KERN_DEBUG "%s: mgmt frame too large %d\n",
  164. ndev->name, frag_len);
  165. goto error;
  166. }
  167. err = -ENOMEM;
  168. p = buf.mem = kmalloc(frag_len, GFP_KERNEL);
  169. if (!buf.mem)
  170. goto error;
  171. buf.size = frag_len;
  172. /* create the header directly in the fragment data area */
  173. pimfor_encode_header(operation, oid, length, (pimfor_header_t *) p);
  174. p += PIMFOR_HEADER_SIZE;
  175. if (data)
  176. memcpy(p, data, length);
  177. else
  178. memset(p, 0, length);
  179. #if VERBOSE > SHOW_ERROR_MESSAGES
  180. {
  181. pimfor_header_t *h = buf.mem;
  182. DEBUG(SHOW_PIMFOR_FRAMES,
  183. "PIMFOR: op %i, oid 0x%08lx, device %i, flags 0x%x length 0x%x\n",
  184. h->operation, oid, h->device_id, h->flags, length);
  185. /* display the buffer contents for debugging */
  186. display_buffer((char *) h, sizeof (pimfor_header_t));
  187. display_buffer(p, length);
  188. }
  189. #endif
  190. err = -ENOMEM;
  191. buf.pci_addr = pci_map_single(priv->pdev, buf.mem, frag_len,
  192. PCI_DMA_TODEVICE);
  193. if (!buf.pci_addr) {
  194. printk(KERN_WARNING "%s: cannot map PCI memory for mgmt\n",
  195. ndev->name);
  196. goto error_free;
  197. }
  198. /* Protect the control block modifications against interrupts. */
  199. spin_lock_irqsave(&priv->slock, flags);
  200. curr_frag = le32_to_cpu(cb->driver_curr_frag[ISL38XX_CB_TX_MGMTQ]);
  201. if (curr_frag - priv->index_mgmt_tx >= ISL38XX_CB_MGMT_QSIZE) {
  202. printk(KERN_WARNING "%s: mgmt tx queue is still full\n",
  203. ndev->name);
  204. goto error_unlock;
  205. }
  206. /* commit the frame to the tx device queue */
  207. index = curr_frag % ISL38XX_CB_MGMT_QSIZE;
  208. priv->mgmt_tx[index] = buf;
  209. frag = &cb->tx_data_mgmt[index];
  210. frag->size = cpu_to_le16(frag_len);
  211. frag->flags = 0; /* for any other than the last fragment, set to 1 */
  212. frag->address = cpu_to_le32(buf.pci_addr);
  213. /* The fragment address in the control block must have
  214. * been written before announcing the frame buffer to
  215. * device */
  216. wmb();
  217. cb->driver_curr_frag[ISL38XX_CB_TX_MGMTQ] = cpu_to_le32(curr_frag + 1);
  218. spin_unlock_irqrestore(&priv->slock, flags);
  219. /* trigger the device */
  220. islpci_trigger(priv);
  221. return 0;
  222. error_unlock:
  223. spin_unlock_irqrestore(&priv->slock, flags);
  224. error_free:
  225. kfree(buf.mem);
  226. error:
  227. return err;
  228. }
  229. /*
  230. * Receive a management frame from the device.
  231. * This can be an arbitrary number of traps, and at most one response
  232. * frame for a previous request sent via islpci_mgt_transmit().
  233. */
  234. int
  235. islpci_mgt_receive(struct net_device *ndev)
  236. {
  237. islpci_private *priv = netdev_priv(ndev);
  238. isl38xx_control_block *cb =
  239. (isl38xx_control_block *) priv->control_block;
  240. u32 curr_frag;
  241. #if VERBOSE > SHOW_ERROR_MESSAGES
  242. DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgt_receive\n");
  243. #endif
  244. /* Only once per interrupt, determine fragment range to
  245. * process. This avoids an endless loop (i.e. lockup) if
  246. * frames come in faster than we can process them. */
  247. curr_frag = le32_to_cpu(cb->device_curr_frag[ISL38XX_CB_RX_MGMTQ]);
  248. barrier();
  249. for (; priv->index_mgmt_rx < curr_frag; priv->index_mgmt_rx++) {
  250. pimfor_header_t *header;
  251. u32 index = priv->index_mgmt_rx % ISL38XX_CB_MGMT_QSIZE;
  252. struct islpci_membuf *buf = &priv->mgmt_rx[index];
  253. u16 frag_len;
  254. int size;
  255. struct islpci_mgmtframe *frame;
  256. /* I have no idea (and no documentation) if flags != 0
  257. * is possible. Drop the frame, reuse the buffer. */
  258. if (le16_to_cpu(cb->rx_data_mgmt[index].flags) != 0) {
  259. printk(KERN_WARNING "%s: unknown flags 0x%04x\n",
  260. ndev->name,
  261. le16_to_cpu(cb->rx_data_mgmt[index].flags));
  262. continue;
  263. }
  264. /* The device only returns the size of the header(s) here. */
  265. frag_len = le16_to_cpu(cb->rx_data_mgmt[index].size);
  266. /*
  267. * We appear to have no way to tell the device the
  268. * size of a receive buffer. Thus, if this check
  269. * triggers, we likely have kernel heap corruption. */
  270. if (frag_len > MGMT_FRAME_SIZE) {
  271. printk(KERN_WARNING
  272. "%s: Bogus packet size of %d (%#x).\n",
  273. ndev->name, frag_len, frag_len);
  274. frag_len = MGMT_FRAME_SIZE;
  275. }
  276. /* Ensure the results of device DMA are visible to the CPU. */
  277. pci_dma_sync_single_for_cpu(priv->pdev, buf->pci_addr,
  278. buf->size, PCI_DMA_FROMDEVICE);
  279. /* Perform endianess conversion for PIMFOR header in-place. */
  280. header = pimfor_decode_header(buf->mem, frag_len);
  281. if (!header) {
  282. printk(KERN_WARNING "%s: no PIMFOR header found\n",
  283. ndev->name);
  284. continue;
  285. }
  286. /* The device ID from the PIMFOR packet received from
  287. * the MVC is always 0. We forward a sensible device_id.
  288. * Not that anyone upstream would care... */
  289. header->device_id = priv->ndev->ifindex;
  290. #if VERBOSE > SHOW_ERROR_MESSAGES
  291. DEBUG(SHOW_PIMFOR_FRAMES,
  292. "PIMFOR: op %i, oid 0x%08x, device %i, flags 0x%x length 0x%x\n",
  293. header->operation, header->oid, header->device_id,
  294. header->flags, header->length);
  295. /* display the buffer contents for debugging */
  296. display_buffer((char *) header, PIMFOR_HEADER_SIZE);
  297. display_buffer((char *) header + PIMFOR_HEADER_SIZE,
  298. header->length);
  299. #endif
  300. /* nobody sends these */
  301. if (header->flags & PIMFOR_FLAG_APPLIC_ORIGIN) {
  302. printk(KERN_DEBUG
  303. "%s: errant PIMFOR application frame\n",
  304. ndev->name);
  305. continue;
  306. }
  307. /* Determine frame size, skipping OID_INL_TUNNEL headers. */
  308. size = PIMFOR_HEADER_SIZE + header->length;
  309. frame = kmalloc(sizeof(struct islpci_mgmtframe) + size,
  310. GFP_ATOMIC);
  311. if (!frame)
  312. continue;
  313. frame->ndev = ndev;
  314. memcpy(&frame->buf, header, size);
  315. frame->header = (pimfor_header_t *) frame->buf;
  316. frame->data = frame->buf + PIMFOR_HEADER_SIZE;
  317. #if VERBOSE > SHOW_ERROR_MESSAGES
  318. DEBUG(SHOW_PIMFOR_FRAMES,
  319. "frame: header: %p, data: %p, size: %d\n",
  320. frame->header, frame->data, size);
  321. #endif
  322. if (header->operation == PIMFOR_OP_TRAP) {
  323. #if VERBOSE > SHOW_ERROR_MESSAGES
  324. printk(KERN_DEBUG
  325. "TRAP: oid 0x%x, device %i, flags 0x%x length %i\n",
  326. header->oid, header->device_id, header->flags,
  327. header->length);
  328. #endif
  329. /* Create work to handle trap out of interrupt
  330. * context. */
  331. INIT_WORK(&frame->ws, prism54_process_trap);
  332. schedule_work(&frame->ws);
  333. } else {
  334. /* Signal the one waiting process that a response
  335. * has been received. */
  336. if ((frame = xchg(&priv->mgmt_received, frame)) != NULL) {
  337. printk(KERN_WARNING
  338. "%s: mgmt response not collected\n",
  339. ndev->name);
  340. kfree(frame);
  341. }
  342. #if VERBOSE > SHOW_ERROR_MESSAGES
  343. DEBUG(SHOW_TRACING, "Wake up Mgmt Queue\n");
  344. #endif
  345. wake_up(&priv->mgmt_wqueue);
  346. }
  347. }
  348. return 0;
  349. }
  350. /*
  351. * Cleanup the transmit queue by freeing all frames handled by the device.
  352. */
  353. void
  354. islpci_mgt_cleanup_transmit(struct net_device *ndev)
  355. {
  356. islpci_private *priv = netdev_priv(ndev);
  357. isl38xx_control_block *cb = /* volatile not needed */
  358. (isl38xx_control_block *) priv->control_block;
  359. u32 curr_frag;
  360. #if VERBOSE > SHOW_ERROR_MESSAGES
  361. DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgt_cleanup_transmit\n");
  362. #endif
  363. /* Only once per cleanup, determine fragment range to
  364. * process. This avoids an endless loop (i.e. lockup) if
  365. * the device became confused, incrementing device_curr_frag
  366. * rapidly. */
  367. curr_frag = le32_to_cpu(cb->device_curr_frag[ISL38XX_CB_TX_MGMTQ]);
  368. barrier();
  369. for (; priv->index_mgmt_tx < curr_frag; priv->index_mgmt_tx++) {
  370. int index = priv->index_mgmt_tx % ISL38XX_CB_MGMT_QSIZE;
  371. struct islpci_membuf *buf = &priv->mgmt_tx[index];
  372. pci_unmap_single(priv->pdev, buf->pci_addr, buf->size,
  373. PCI_DMA_TODEVICE);
  374. buf->pci_addr = 0;
  375. kfree(buf->mem);
  376. buf->mem = NULL;
  377. buf->size = 0;
  378. }
  379. }
  380. /*
  381. * Perform one request-response transaction to the device.
  382. */
  383. int
  384. islpci_mgt_transaction(struct net_device *ndev,
  385. int operation, unsigned long oid,
  386. void *senddata, int sendlen,
  387. struct islpci_mgmtframe **recvframe)
  388. {
  389. islpci_private *priv = netdev_priv(ndev);
  390. const long wait_cycle_jiffies = msecs_to_jiffies(ISL38XX_WAIT_CYCLE * 10);
  391. long timeout_left = ISL38XX_MAX_WAIT_CYCLES * wait_cycle_jiffies;
  392. int err;
  393. DEFINE_WAIT(wait);
  394. *recvframe = NULL;
  395. if (mutex_lock_interruptible(&priv->mgmt_lock))
  396. return -ERESTARTSYS;
  397. prepare_to_wait(&priv->mgmt_wqueue, &wait, TASK_UNINTERRUPTIBLE);
  398. err = islpci_mgt_transmit(ndev, operation, oid, senddata, sendlen);
  399. if (err)
  400. goto out;
  401. err = -ETIMEDOUT;
  402. while (timeout_left > 0) {
  403. int timeleft;
  404. struct islpci_mgmtframe *frame;
  405. timeleft = schedule_timeout_uninterruptible(wait_cycle_jiffies);
  406. frame = xchg(&priv->mgmt_received, NULL);
  407. if (frame) {
  408. if (frame->header->oid == oid) {
  409. *recvframe = frame;
  410. err = 0;
  411. goto out;
  412. } else {
  413. printk(KERN_DEBUG
  414. "%s: expecting oid 0x%x, received 0x%x.\n",
  415. ndev->name, (unsigned int) oid,
  416. frame->header->oid);
  417. kfree(frame);
  418. frame = NULL;
  419. }
  420. }
  421. if (timeleft == 0) {
  422. printk(KERN_DEBUG
  423. "%s: timeout waiting for mgmt response %lu, "
  424. "triggering device\n",
  425. ndev->name, timeout_left);
  426. islpci_trigger(priv);
  427. }
  428. timeout_left += timeleft - wait_cycle_jiffies;
  429. }
  430. printk(KERN_WARNING "%s: timeout waiting for mgmt response\n",
  431. ndev->name);
  432. /* TODO: we should reset the device here */
  433. out:
  434. finish_wait(&priv->mgmt_wqueue, &wait);
  435. mutex_unlock(&priv->mgmt_lock);
  436. return err;
  437. }