mwl8k.c 148 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/sched.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/list.h>
  18. #include <linux/pci.h>
  19. #include <linux/delay.h>
  20. #include <linux/completion.h>
  21. #include <linux/etherdevice.h>
  22. #include <linux/slab.h>
  23. #include <net/mac80211.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/firmware.h>
  26. #include <linux/workqueue.h>
  27. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  28. #define MWL8K_NAME KBUILD_MODNAME
  29. #define MWL8K_VERSION "0.13"
  30. /* Module parameters */
  31. static bool ap_mode_default;
  32. module_param(ap_mode_default, bool, 0);
  33. MODULE_PARM_DESC(ap_mode_default,
  34. "Set to 1 to make ap mode the default instead of sta mode");
  35. /* Register definitions */
  36. #define MWL8K_HIU_GEN_PTR 0x00000c10
  37. #define MWL8K_MODE_STA 0x0000005a
  38. #define MWL8K_MODE_AP 0x000000a5
  39. #define MWL8K_HIU_INT_CODE 0x00000c14
  40. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  41. #define MWL8K_FWAP_READY 0xf1f2f4a5
  42. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  43. #define MWL8K_HIU_SCRATCH 0x00000c40
  44. /* Host->device communications */
  45. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  46. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  47. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  48. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  49. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  50. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  51. #define MWL8K_H2A_INT_RESET (1 << 15)
  52. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  53. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  54. /* Device->host communications */
  55. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  56. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  57. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  58. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  59. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  60. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  61. #define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
  62. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  63. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  64. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  65. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  66. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  67. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  68. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  69. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  70. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  71. /* HW micro second timer register
  72. * located at offset 0xA600. This
  73. * will be used to timestamp tx
  74. * packets.
  75. */
  76. #define MWL8K_HW_TIMER_REGISTER 0x0000a600
  77. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  78. MWL8K_A2H_INT_CHNL_SWITCHED | \
  79. MWL8K_A2H_INT_QUEUE_EMPTY | \
  80. MWL8K_A2H_INT_RADAR_DETECT | \
  81. MWL8K_A2H_INT_RADIO_ON | \
  82. MWL8K_A2H_INT_RADIO_OFF | \
  83. MWL8K_A2H_INT_MAC_EVENT | \
  84. MWL8K_A2H_INT_OPC_DONE | \
  85. MWL8K_A2H_INT_RX_READY | \
  86. MWL8K_A2H_INT_TX_DONE | \
  87. MWL8K_A2H_INT_BA_WATCHDOG)
  88. #define MWL8K_RX_QUEUES 1
  89. #define MWL8K_TX_WMM_QUEUES 4
  90. #define MWL8K_MAX_AMPDU_QUEUES 8
  91. #define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
  92. #define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
  93. /* txpriorities are mapped with hw queues.
  94. * Each hw queue has a txpriority.
  95. */
  96. #define TOTAL_HW_TX_QUEUES 8
  97. /* Each HW queue can have one AMPDU stream.
  98. * But, because one of the hw queue is reserved,
  99. * maximum AMPDU queues that can be created are
  100. * one short of total tx queues.
  101. */
  102. #define MWL8K_NUM_AMPDU_STREAMS (TOTAL_HW_TX_QUEUES - 1)
  103. struct rxd_ops {
  104. int rxd_size;
  105. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  106. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  107. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  108. __le16 *qos, s8 *noise);
  109. };
  110. struct mwl8k_device_info {
  111. char *part_name;
  112. char *helper_image;
  113. char *fw_image_sta;
  114. char *fw_image_ap;
  115. struct rxd_ops *ap_rxd_ops;
  116. u32 fw_api_ap;
  117. };
  118. struct mwl8k_rx_queue {
  119. int rxd_count;
  120. /* hw receives here */
  121. int head;
  122. /* refill descs here */
  123. int tail;
  124. void *rxd;
  125. dma_addr_t rxd_dma;
  126. struct {
  127. struct sk_buff *skb;
  128. DEFINE_DMA_UNMAP_ADDR(dma);
  129. } *buf;
  130. };
  131. struct mwl8k_tx_queue {
  132. /* hw transmits here */
  133. int head;
  134. /* sw appends here */
  135. int tail;
  136. unsigned int len;
  137. struct mwl8k_tx_desc *txd;
  138. dma_addr_t txd_dma;
  139. struct sk_buff **skb;
  140. };
  141. enum {
  142. AMPDU_NO_STREAM,
  143. AMPDU_STREAM_NEW,
  144. AMPDU_STREAM_IN_PROGRESS,
  145. AMPDU_STREAM_ACTIVE,
  146. };
  147. struct mwl8k_ampdu_stream {
  148. struct ieee80211_sta *sta;
  149. u8 tid;
  150. u8 state;
  151. u8 idx;
  152. };
  153. struct mwl8k_priv {
  154. struct ieee80211_hw *hw;
  155. struct pci_dev *pdev;
  156. int irq;
  157. struct mwl8k_device_info *device_info;
  158. void __iomem *sram;
  159. void __iomem *regs;
  160. /* firmware */
  161. const struct firmware *fw_helper;
  162. const struct firmware *fw_ucode;
  163. /* hardware/firmware parameters */
  164. bool ap_fw;
  165. struct rxd_ops *rxd_ops;
  166. struct ieee80211_supported_band band_24;
  167. struct ieee80211_channel channels_24[14];
  168. struct ieee80211_rate rates_24[14];
  169. struct ieee80211_supported_band band_50;
  170. struct ieee80211_channel channels_50[4];
  171. struct ieee80211_rate rates_50[9];
  172. u32 ap_macids_supported;
  173. u32 sta_macids_supported;
  174. /* Ampdu stream information */
  175. u8 num_ampdu_queues;
  176. spinlock_t stream_lock;
  177. struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
  178. struct work_struct watchdog_ba_handle;
  179. /* firmware access */
  180. struct mutex fw_mutex;
  181. struct task_struct *fw_mutex_owner;
  182. struct task_struct *hw_restart_owner;
  183. int fw_mutex_depth;
  184. struct completion *hostcmd_wait;
  185. atomic_t watchdog_event_pending;
  186. /* lock held over TX and TX reap */
  187. spinlock_t tx_lock;
  188. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  189. struct completion *tx_wait;
  190. /* List of interfaces. */
  191. u32 macids_used;
  192. struct list_head vif_list;
  193. /* power management status cookie from firmware */
  194. u32 *cookie;
  195. dma_addr_t cookie_dma;
  196. u16 num_mcaddrs;
  197. u8 hw_rev;
  198. u32 fw_rev;
  199. /*
  200. * Running count of TX packets in flight, to avoid
  201. * iterating over the transmit rings each time.
  202. */
  203. int pending_tx_pkts;
  204. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  205. struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
  206. u32 txq_offset[MWL8K_MAX_TX_QUEUES];
  207. bool radio_on;
  208. bool radio_short_preamble;
  209. bool sniffer_enabled;
  210. bool wmm_enabled;
  211. /* XXX need to convert this to handle multiple interfaces */
  212. bool capture_beacon;
  213. u8 capture_bssid[ETH_ALEN];
  214. struct sk_buff *beacon_skb;
  215. /*
  216. * This FJ worker has to be global as it is scheduled from the
  217. * RX handler. At this point we don't know which interface it
  218. * belongs to until the list of bssids waiting to complete join
  219. * is checked.
  220. */
  221. struct work_struct finalize_join_worker;
  222. /* Tasklet to perform TX reclaim. */
  223. struct tasklet_struct poll_tx_task;
  224. /* Tasklet to perform RX. */
  225. struct tasklet_struct poll_rx_task;
  226. /* Most recently reported noise in dBm */
  227. s8 noise;
  228. /*
  229. * preserve the queue configurations so they can be restored if/when
  230. * the firmware image is swapped.
  231. */
  232. struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
  233. /* To perform the task of reloading the firmware */
  234. struct work_struct fw_reload;
  235. bool hw_restart_in_progress;
  236. /* async firmware loading state */
  237. unsigned fw_state;
  238. char *fw_pref;
  239. char *fw_alt;
  240. struct completion firmware_loading_complete;
  241. /* bitmap of running BSSes */
  242. u32 running_bsses;
  243. };
  244. #define MAX_WEP_KEY_LEN 13
  245. #define NUM_WEP_KEYS 4
  246. /* Per interface specific private data */
  247. struct mwl8k_vif {
  248. struct list_head list;
  249. struct ieee80211_vif *vif;
  250. /* Firmware macid for this vif. */
  251. int macid;
  252. /* Non AMPDU sequence number assigned by driver. */
  253. u16 seqno;
  254. /* Saved WEP keys */
  255. struct {
  256. u8 enabled;
  257. u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
  258. } wep_key_conf[NUM_WEP_KEYS];
  259. /* BSSID */
  260. u8 bssid[ETH_ALEN];
  261. /* A flag to indicate is HW crypto is enabled for this bssid */
  262. bool is_hw_crypto_enabled;
  263. };
  264. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  265. #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
  266. struct tx_traffic_info {
  267. u32 start_time;
  268. u32 pkts;
  269. };
  270. #define MWL8K_MAX_TID 8
  271. struct mwl8k_sta {
  272. /* Index into station database. Returned by UPDATE_STADB. */
  273. u8 peer_id;
  274. u8 is_ampdu_allowed;
  275. struct tx_traffic_info tx_stats[MWL8K_MAX_TID];
  276. };
  277. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  278. static const struct ieee80211_channel mwl8k_channels_24[] = {
  279. { .band = IEEE80211_BAND_2GHZ, .center_freq = 2412, .hw_value = 1, },
  280. { .band = IEEE80211_BAND_2GHZ, .center_freq = 2417, .hw_value = 2, },
  281. { .band = IEEE80211_BAND_2GHZ, .center_freq = 2422, .hw_value = 3, },
  282. { .band = IEEE80211_BAND_2GHZ, .center_freq = 2427, .hw_value = 4, },
  283. { .band = IEEE80211_BAND_2GHZ, .center_freq = 2432, .hw_value = 5, },
  284. { .band = IEEE80211_BAND_2GHZ, .center_freq = 2437, .hw_value = 6, },
  285. { .band = IEEE80211_BAND_2GHZ, .center_freq = 2442, .hw_value = 7, },
  286. { .band = IEEE80211_BAND_2GHZ, .center_freq = 2447, .hw_value = 8, },
  287. { .band = IEEE80211_BAND_2GHZ, .center_freq = 2452, .hw_value = 9, },
  288. { .band = IEEE80211_BAND_2GHZ, .center_freq = 2457, .hw_value = 10, },
  289. { .band = IEEE80211_BAND_2GHZ, .center_freq = 2462, .hw_value = 11, },
  290. { .band = IEEE80211_BAND_2GHZ, .center_freq = 2467, .hw_value = 12, },
  291. { .band = IEEE80211_BAND_2GHZ, .center_freq = 2472, .hw_value = 13, },
  292. { .band = IEEE80211_BAND_2GHZ, .center_freq = 2484, .hw_value = 14, },
  293. };
  294. static const struct ieee80211_rate mwl8k_rates_24[] = {
  295. { .bitrate = 10, .hw_value = 2, },
  296. { .bitrate = 20, .hw_value = 4, },
  297. { .bitrate = 55, .hw_value = 11, },
  298. { .bitrate = 110, .hw_value = 22, },
  299. { .bitrate = 220, .hw_value = 44, },
  300. { .bitrate = 60, .hw_value = 12, },
  301. { .bitrate = 90, .hw_value = 18, },
  302. { .bitrate = 120, .hw_value = 24, },
  303. { .bitrate = 180, .hw_value = 36, },
  304. { .bitrate = 240, .hw_value = 48, },
  305. { .bitrate = 360, .hw_value = 72, },
  306. { .bitrate = 480, .hw_value = 96, },
  307. { .bitrate = 540, .hw_value = 108, },
  308. { .bitrate = 720, .hw_value = 144, },
  309. };
  310. static const struct ieee80211_channel mwl8k_channels_50[] = {
  311. { .band = IEEE80211_BAND_5GHZ, .center_freq = 5180, .hw_value = 36, },
  312. { .band = IEEE80211_BAND_5GHZ, .center_freq = 5200, .hw_value = 40, },
  313. { .band = IEEE80211_BAND_5GHZ, .center_freq = 5220, .hw_value = 44, },
  314. { .band = IEEE80211_BAND_5GHZ, .center_freq = 5240, .hw_value = 48, },
  315. };
  316. static const struct ieee80211_rate mwl8k_rates_50[] = {
  317. { .bitrate = 60, .hw_value = 12, },
  318. { .bitrate = 90, .hw_value = 18, },
  319. { .bitrate = 120, .hw_value = 24, },
  320. { .bitrate = 180, .hw_value = 36, },
  321. { .bitrate = 240, .hw_value = 48, },
  322. { .bitrate = 360, .hw_value = 72, },
  323. { .bitrate = 480, .hw_value = 96, },
  324. { .bitrate = 540, .hw_value = 108, },
  325. { .bitrate = 720, .hw_value = 144, },
  326. };
  327. /* Set or get info from Firmware */
  328. #define MWL8K_CMD_GET 0x0000
  329. #define MWL8K_CMD_SET 0x0001
  330. #define MWL8K_CMD_SET_LIST 0x0002
  331. /* Firmware command codes */
  332. #define MWL8K_CMD_CODE_DNLD 0x0001
  333. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  334. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  335. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  336. #define MWL8K_CMD_GET_STAT 0x0014
  337. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  338. #define MWL8K_CMD_RF_TX_POWER 0x001e
  339. #define MWL8K_CMD_TX_POWER 0x001f
  340. #define MWL8K_CMD_RF_ANTENNA 0x0020
  341. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  342. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  343. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  344. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  345. #define MWL8K_CMD_SET_AID 0x010d
  346. #define MWL8K_CMD_SET_RATE 0x0110
  347. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  348. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  349. #define MWL8K_CMD_SET_SLOT 0x0114
  350. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  351. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  352. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  353. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  354. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  355. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  356. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  357. #define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
  358. #define MWL8K_CMD_DEL_MAC_ADDR 0x0206 /* per-vif */
  359. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  360. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  361. #define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
  362. #define MWL8K_CMD_UPDATE_STADB 0x1123
  363. #define MWL8K_CMD_BASTREAM 0x1125
  364. static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
  365. {
  366. u16 command = le16_to_cpu(cmd);
  367. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  368. snprintf(buf, bufsize, "%s", #x);\
  369. return buf;\
  370. } while (0)
  371. switch (command & ~0x8000) {
  372. MWL8K_CMDNAME(CODE_DNLD);
  373. MWL8K_CMDNAME(GET_HW_SPEC);
  374. MWL8K_CMDNAME(SET_HW_SPEC);
  375. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  376. MWL8K_CMDNAME(GET_STAT);
  377. MWL8K_CMDNAME(RADIO_CONTROL);
  378. MWL8K_CMDNAME(RF_TX_POWER);
  379. MWL8K_CMDNAME(TX_POWER);
  380. MWL8K_CMDNAME(RF_ANTENNA);
  381. MWL8K_CMDNAME(SET_BEACON);
  382. MWL8K_CMDNAME(SET_PRE_SCAN);
  383. MWL8K_CMDNAME(SET_POST_SCAN);
  384. MWL8K_CMDNAME(SET_RF_CHANNEL);
  385. MWL8K_CMDNAME(SET_AID);
  386. MWL8K_CMDNAME(SET_RATE);
  387. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  388. MWL8K_CMDNAME(RTS_THRESHOLD);
  389. MWL8K_CMDNAME(SET_SLOT);
  390. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  391. MWL8K_CMDNAME(SET_WMM_MODE);
  392. MWL8K_CMDNAME(MIMO_CONFIG);
  393. MWL8K_CMDNAME(USE_FIXED_RATE);
  394. MWL8K_CMDNAME(ENABLE_SNIFFER);
  395. MWL8K_CMDNAME(SET_MAC_ADDR);
  396. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  397. MWL8K_CMDNAME(BSS_START);
  398. MWL8K_CMDNAME(SET_NEW_STN);
  399. MWL8K_CMDNAME(UPDATE_ENCRYPTION);
  400. MWL8K_CMDNAME(UPDATE_STADB);
  401. MWL8K_CMDNAME(BASTREAM);
  402. MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
  403. default:
  404. snprintf(buf, bufsize, "0x%x", cmd);
  405. }
  406. #undef MWL8K_CMDNAME
  407. return buf;
  408. }
  409. /* Hardware and firmware reset */
  410. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  411. {
  412. iowrite32(MWL8K_H2A_INT_RESET,
  413. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  414. iowrite32(MWL8K_H2A_INT_RESET,
  415. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  416. msleep(20);
  417. }
  418. /* Release fw image */
  419. static void mwl8k_release_fw(const struct firmware **fw)
  420. {
  421. if (*fw == NULL)
  422. return;
  423. release_firmware(*fw);
  424. *fw = NULL;
  425. }
  426. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  427. {
  428. mwl8k_release_fw(&priv->fw_ucode);
  429. mwl8k_release_fw(&priv->fw_helper);
  430. }
  431. /* states for asynchronous f/w loading */
  432. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
  433. enum {
  434. FW_STATE_INIT = 0,
  435. FW_STATE_LOADING_PREF,
  436. FW_STATE_LOADING_ALT,
  437. FW_STATE_ERROR,
  438. };
  439. /* Request fw image */
  440. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  441. const char *fname, const struct firmware **fw,
  442. bool nowait)
  443. {
  444. /* release current image */
  445. if (*fw != NULL)
  446. mwl8k_release_fw(fw);
  447. if (nowait)
  448. return request_firmware_nowait(THIS_MODULE, 1, fname,
  449. &priv->pdev->dev, GFP_KERNEL,
  450. priv, mwl8k_fw_state_machine);
  451. else
  452. return request_firmware(fw, fname, &priv->pdev->dev);
  453. }
  454. static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
  455. bool nowait)
  456. {
  457. struct mwl8k_device_info *di = priv->device_info;
  458. int rc;
  459. if (di->helper_image != NULL) {
  460. if (nowait)
  461. rc = mwl8k_request_fw(priv, di->helper_image,
  462. &priv->fw_helper, true);
  463. else
  464. rc = mwl8k_request_fw(priv, di->helper_image,
  465. &priv->fw_helper, false);
  466. if (rc)
  467. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  468. pci_name(priv->pdev), di->helper_image);
  469. if (rc || nowait)
  470. return rc;
  471. }
  472. if (nowait) {
  473. /*
  474. * if we get here, no helper image is needed. Skip the
  475. * FW_STATE_INIT state.
  476. */
  477. priv->fw_state = FW_STATE_LOADING_PREF;
  478. rc = mwl8k_request_fw(priv, fw_image,
  479. &priv->fw_ucode,
  480. true);
  481. } else
  482. rc = mwl8k_request_fw(priv, fw_image,
  483. &priv->fw_ucode, false);
  484. if (rc) {
  485. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  486. pci_name(priv->pdev), fw_image);
  487. mwl8k_release_fw(&priv->fw_helper);
  488. return rc;
  489. }
  490. return 0;
  491. }
  492. struct mwl8k_cmd_pkt {
  493. __le16 code;
  494. __le16 length;
  495. __u8 seq_num;
  496. __u8 macid;
  497. __le16 result;
  498. char payload[0];
  499. } __packed;
  500. /*
  501. * Firmware loading.
  502. */
  503. static int
  504. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  505. {
  506. void __iomem *regs = priv->regs;
  507. dma_addr_t dma_addr;
  508. int loops;
  509. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  510. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  511. return -ENOMEM;
  512. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  513. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  514. iowrite32(MWL8K_H2A_INT_DOORBELL,
  515. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  516. iowrite32(MWL8K_H2A_INT_DUMMY,
  517. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  518. loops = 1000;
  519. do {
  520. u32 int_code;
  521. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  522. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  523. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  524. break;
  525. }
  526. cond_resched();
  527. udelay(1);
  528. } while (--loops);
  529. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  530. return loops ? 0 : -ETIMEDOUT;
  531. }
  532. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  533. const u8 *data, size_t length)
  534. {
  535. struct mwl8k_cmd_pkt *cmd;
  536. int done;
  537. int rc = 0;
  538. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  539. if (cmd == NULL)
  540. return -ENOMEM;
  541. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  542. cmd->seq_num = 0;
  543. cmd->macid = 0;
  544. cmd->result = 0;
  545. done = 0;
  546. while (length) {
  547. int block_size = length > 256 ? 256 : length;
  548. memcpy(cmd->payload, data + done, block_size);
  549. cmd->length = cpu_to_le16(block_size);
  550. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  551. sizeof(*cmd) + block_size);
  552. if (rc)
  553. break;
  554. done += block_size;
  555. length -= block_size;
  556. }
  557. if (!rc) {
  558. cmd->length = 0;
  559. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  560. }
  561. kfree(cmd);
  562. return rc;
  563. }
  564. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  565. const u8 *data, size_t length)
  566. {
  567. unsigned char *buffer;
  568. int may_continue, rc = 0;
  569. u32 done, prev_block_size;
  570. buffer = kmalloc(1024, GFP_KERNEL);
  571. if (buffer == NULL)
  572. return -ENOMEM;
  573. done = 0;
  574. prev_block_size = 0;
  575. may_continue = 1000;
  576. while (may_continue > 0) {
  577. u32 block_size;
  578. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  579. if (block_size & 1) {
  580. block_size &= ~1;
  581. may_continue--;
  582. } else {
  583. done += prev_block_size;
  584. length -= prev_block_size;
  585. }
  586. if (block_size > 1024 || block_size > length) {
  587. rc = -EOVERFLOW;
  588. break;
  589. }
  590. if (length == 0) {
  591. rc = 0;
  592. break;
  593. }
  594. if (block_size == 0) {
  595. rc = -EPROTO;
  596. may_continue--;
  597. udelay(1);
  598. continue;
  599. }
  600. prev_block_size = block_size;
  601. memcpy(buffer, data + done, block_size);
  602. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  603. if (rc)
  604. break;
  605. }
  606. if (!rc && length != 0)
  607. rc = -EREMOTEIO;
  608. kfree(buffer);
  609. return rc;
  610. }
  611. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  612. {
  613. struct mwl8k_priv *priv = hw->priv;
  614. const struct firmware *fw = priv->fw_ucode;
  615. int rc;
  616. int loops;
  617. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  618. const struct firmware *helper = priv->fw_helper;
  619. if (helper == NULL) {
  620. printk(KERN_ERR "%s: helper image needed but none "
  621. "given\n", pci_name(priv->pdev));
  622. return -EINVAL;
  623. }
  624. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  625. if (rc) {
  626. printk(KERN_ERR "%s: unable to load firmware "
  627. "helper image\n", pci_name(priv->pdev));
  628. return rc;
  629. }
  630. msleep(20);
  631. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  632. } else {
  633. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  634. }
  635. if (rc) {
  636. printk(KERN_ERR "%s: unable to load firmware image\n",
  637. pci_name(priv->pdev));
  638. return rc;
  639. }
  640. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  641. loops = 500000;
  642. do {
  643. u32 ready_code;
  644. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  645. if (ready_code == MWL8K_FWAP_READY) {
  646. priv->ap_fw = true;
  647. break;
  648. } else if (ready_code == MWL8K_FWSTA_READY) {
  649. priv->ap_fw = false;
  650. break;
  651. }
  652. cond_resched();
  653. udelay(1);
  654. } while (--loops);
  655. return loops ? 0 : -ETIMEDOUT;
  656. }
  657. /* DMA header used by firmware and hardware. */
  658. struct mwl8k_dma_data {
  659. __le16 fwlen;
  660. struct ieee80211_hdr wh;
  661. char data[0];
  662. } __packed;
  663. /* Routines to add/remove DMA header from skb. */
  664. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  665. {
  666. struct mwl8k_dma_data *tr;
  667. int hdrlen;
  668. tr = (struct mwl8k_dma_data *)skb->data;
  669. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  670. if (hdrlen != sizeof(tr->wh)) {
  671. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  672. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  673. *((__le16 *)(tr->data - 2)) = qos;
  674. } else {
  675. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  676. }
  677. }
  678. if (hdrlen != sizeof(*tr))
  679. skb_pull(skb, sizeof(*tr) - hdrlen);
  680. }
  681. #define REDUCED_TX_HEADROOM 8
  682. static void
  683. mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb,
  684. int head_pad, int tail_pad)
  685. {
  686. struct ieee80211_hdr *wh;
  687. int hdrlen;
  688. int reqd_hdrlen;
  689. struct mwl8k_dma_data *tr;
  690. /*
  691. * Add a firmware DMA header; the firmware requires that we
  692. * present a 2-byte payload length followed by a 4-address
  693. * header (without QoS field), followed (optionally) by any
  694. * WEP/ExtIV header (but only filled in for CCMP).
  695. */
  696. wh = (struct ieee80211_hdr *)skb->data;
  697. hdrlen = ieee80211_hdrlen(wh->frame_control);
  698. /*
  699. * Check if skb_resize is required because of
  700. * tx_headroom adjustment.
  701. */
  702. if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts)
  703. + REDUCED_TX_HEADROOM))) {
  704. if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) {
  705. wiphy_err(priv->hw->wiphy,
  706. "Failed to reallocate TX buffer\n");
  707. return;
  708. }
  709. skb->truesize += REDUCED_TX_HEADROOM;
  710. }
  711. reqd_hdrlen = sizeof(*tr) + head_pad;
  712. if (hdrlen != reqd_hdrlen)
  713. skb_push(skb, reqd_hdrlen - hdrlen);
  714. if (ieee80211_is_data_qos(wh->frame_control))
  715. hdrlen -= IEEE80211_QOS_CTL_LEN;
  716. tr = (struct mwl8k_dma_data *)skb->data;
  717. if (wh != &tr->wh)
  718. memmove(&tr->wh, wh, hdrlen);
  719. if (hdrlen != sizeof(tr->wh))
  720. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  721. /*
  722. * Firmware length is the length of the fully formed "802.11
  723. * payload". That is, everything except for the 802.11 header.
  724. * This includes all crypto material including the MIC.
  725. */
  726. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
  727. }
  728. static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv,
  729. struct sk_buff *skb)
  730. {
  731. struct ieee80211_hdr *wh;
  732. struct ieee80211_tx_info *tx_info;
  733. struct ieee80211_key_conf *key_conf;
  734. int data_pad;
  735. int head_pad = 0;
  736. wh = (struct ieee80211_hdr *)skb->data;
  737. tx_info = IEEE80211_SKB_CB(skb);
  738. key_conf = NULL;
  739. if (ieee80211_is_data(wh->frame_control))
  740. key_conf = tx_info->control.hw_key;
  741. /*
  742. * Make sure the packet header is in the DMA header format (4-address
  743. * without QoS), and add head & tail padding when HW crypto is enabled.
  744. *
  745. * We have the following trailer padding requirements:
  746. * - WEP: 4 trailer bytes (ICV)
  747. * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
  748. * - CCMP: 8 trailer bytes (MIC)
  749. */
  750. data_pad = 0;
  751. if (key_conf != NULL) {
  752. head_pad = key_conf->iv_len;
  753. switch (key_conf->cipher) {
  754. case WLAN_CIPHER_SUITE_WEP40:
  755. case WLAN_CIPHER_SUITE_WEP104:
  756. data_pad = 4;
  757. break;
  758. case WLAN_CIPHER_SUITE_TKIP:
  759. data_pad = 12;
  760. break;
  761. case WLAN_CIPHER_SUITE_CCMP:
  762. data_pad = 8;
  763. break;
  764. }
  765. }
  766. mwl8k_add_dma_header(priv, skb, head_pad, data_pad);
  767. }
  768. /*
  769. * Packet reception for 88w8366 AP firmware.
  770. */
  771. struct mwl8k_rxd_8366_ap {
  772. __le16 pkt_len;
  773. __u8 sq2;
  774. __u8 rate;
  775. __le32 pkt_phys_addr;
  776. __le32 next_rxd_phys_addr;
  777. __le16 qos_control;
  778. __le16 htsig2;
  779. __le32 hw_rssi_info;
  780. __le32 hw_noise_floor_info;
  781. __u8 noise_floor;
  782. __u8 pad0[3];
  783. __u8 rssi;
  784. __u8 rx_status;
  785. __u8 channel;
  786. __u8 rx_ctrl;
  787. } __packed;
  788. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  789. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  790. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  791. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  792. /* 8366 AP rx_status bits */
  793. #define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
  794. #define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
  795. #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
  796. #define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
  797. #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
  798. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  799. {
  800. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  801. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  802. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  803. }
  804. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  805. {
  806. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  807. rxd->pkt_len = cpu_to_le16(len);
  808. rxd->pkt_phys_addr = cpu_to_le32(addr);
  809. wmb();
  810. rxd->rx_ctrl = 0;
  811. }
  812. static int
  813. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  814. __le16 *qos, s8 *noise)
  815. {
  816. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  817. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  818. return -1;
  819. rmb();
  820. memset(status, 0, sizeof(*status));
  821. status->signal = -rxd->rssi;
  822. *noise = -rxd->noise_floor;
  823. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  824. status->flag |= RX_FLAG_HT;
  825. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  826. status->flag |= RX_FLAG_40MHZ;
  827. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  828. } else {
  829. int i;
  830. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  831. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  832. status->rate_idx = i;
  833. break;
  834. }
  835. }
  836. }
  837. if (rxd->channel > 14) {
  838. status->band = IEEE80211_BAND_5GHZ;
  839. if (!(status->flag & RX_FLAG_HT))
  840. status->rate_idx -= 5;
  841. } else {
  842. status->band = IEEE80211_BAND_2GHZ;
  843. }
  844. status->freq = ieee80211_channel_to_frequency(rxd->channel,
  845. status->band);
  846. *qos = rxd->qos_control;
  847. if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
  848. (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
  849. (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
  850. status->flag |= RX_FLAG_MMIC_ERROR;
  851. return le16_to_cpu(rxd->pkt_len);
  852. }
  853. static struct rxd_ops rxd_8366_ap_ops = {
  854. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  855. .rxd_init = mwl8k_rxd_8366_ap_init,
  856. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  857. .rxd_process = mwl8k_rxd_8366_ap_process,
  858. };
  859. /*
  860. * Packet reception for STA firmware.
  861. */
  862. struct mwl8k_rxd_sta {
  863. __le16 pkt_len;
  864. __u8 link_quality;
  865. __u8 noise_level;
  866. __le32 pkt_phys_addr;
  867. __le32 next_rxd_phys_addr;
  868. __le16 qos_control;
  869. __le16 rate_info;
  870. __le32 pad0[4];
  871. __u8 rssi;
  872. __u8 channel;
  873. __le16 pad1;
  874. __u8 rx_ctrl;
  875. __u8 rx_status;
  876. __u8 pad2[2];
  877. } __packed;
  878. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  879. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  880. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  881. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  882. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  883. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  884. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  885. #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
  886. /* ICV=0 or MIC=1 */
  887. #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
  888. /* Key is uploaded only in failure case */
  889. #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
  890. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  891. {
  892. struct mwl8k_rxd_sta *rxd = _rxd;
  893. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  894. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  895. }
  896. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  897. {
  898. struct mwl8k_rxd_sta *rxd = _rxd;
  899. rxd->pkt_len = cpu_to_le16(len);
  900. rxd->pkt_phys_addr = cpu_to_le32(addr);
  901. wmb();
  902. rxd->rx_ctrl = 0;
  903. }
  904. static int
  905. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  906. __le16 *qos, s8 *noise)
  907. {
  908. struct mwl8k_rxd_sta *rxd = _rxd;
  909. u16 rate_info;
  910. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  911. return -1;
  912. rmb();
  913. rate_info = le16_to_cpu(rxd->rate_info);
  914. memset(status, 0, sizeof(*status));
  915. status->signal = -rxd->rssi;
  916. *noise = -rxd->noise_level;
  917. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  918. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  919. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  920. status->flag |= RX_FLAG_SHORTPRE;
  921. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  922. status->flag |= RX_FLAG_40MHZ;
  923. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  924. status->flag |= RX_FLAG_SHORT_GI;
  925. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  926. status->flag |= RX_FLAG_HT;
  927. if (rxd->channel > 14) {
  928. status->band = IEEE80211_BAND_5GHZ;
  929. if (!(status->flag & RX_FLAG_HT))
  930. status->rate_idx -= 5;
  931. } else {
  932. status->band = IEEE80211_BAND_2GHZ;
  933. }
  934. status->freq = ieee80211_channel_to_frequency(rxd->channel,
  935. status->band);
  936. *qos = rxd->qos_control;
  937. if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
  938. (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
  939. status->flag |= RX_FLAG_MMIC_ERROR;
  940. return le16_to_cpu(rxd->pkt_len);
  941. }
  942. static struct rxd_ops rxd_sta_ops = {
  943. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  944. .rxd_init = mwl8k_rxd_sta_init,
  945. .rxd_refill = mwl8k_rxd_sta_refill,
  946. .rxd_process = mwl8k_rxd_sta_process,
  947. };
  948. #define MWL8K_RX_DESCS 256
  949. #define MWL8K_RX_MAXSZ 3800
  950. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  951. {
  952. struct mwl8k_priv *priv = hw->priv;
  953. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  954. int size;
  955. int i;
  956. rxq->rxd_count = 0;
  957. rxq->head = 0;
  958. rxq->tail = 0;
  959. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  960. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  961. if (rxq->rxd == NULL) {
  962. wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
  963. return -ENOMEM;
  964. }
  965. memset(rxq->rxd, 0, size);
  966. rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
  967. if (rxq->buf == NULL) {
  968. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  969. return -ENOMEM;
  970. }
  971. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  972. int desc_size;
  973. void *rxd;
  974. int nexti;
  975. dma_addr_t next_dma_addr;
  976. desc_size = priv->rxd_ops->rxd_size;
  977. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  978. nexti = i + 1;
  979. if (nexti == MWL8K_RX_DESCS)
  980. nexti = 0;
  981. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  982. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  983. }
  984. return 0;
  985. }
  986. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  987. {
  988. struct mwl8k_priv *priv = hw->priv;
  989. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  990. int refilled;
  991. refilled = 0;
  992. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  993. struct sk_buff *skb;
  994. dma_addr_t addr;
  995. int rx;
  996. void *rxd;
  997. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  998. if (skb == NULL)
  999. break;
  1000. addr = pci_map_single(priv->pdev, skb->data,
  1001. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  1002. rxq->rxd_count++;
  1003. rx = rxq->tail++;
  1004. if (rxq->tail == MWL8K_RX_DESCS)
  1005. rxq->tail = 0;
  1006. rxq->buf[rx].skb = skb;
  1007. dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
  1008. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  1009. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  1010. refilled++;
  1011. }
  1012. return refilled;
  1013. }
  1014. /* Must be called only when the card's reception is completely halted */
  1015. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  1016. {
  1017. struct mwl8k_priv *priv = hw->priv;
  1018. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  1019. int i;
  1020. if (rxq->rxd == NULL)
  1021. return;
  1022. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  1023. if (rxq->buf[i].skb != NULL) {
  1024. pci_unmap_single(priv->pdev,
  1025. dma_unmap_addr(&rxq->buf[i], dma),
  1026. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  1027. dma_unmap_addr_set(&rxq->buf[i], dma, 0);
  1028. kfree_skb(rxq->buf[i].skb);
  1029. rxq->buf[i].skb = NULL;
  1030. }
  1031. }
  1032. kfree(rxq->buf);
  1033. rxq->buf = NULL;
  1034. pci_free_consistent(priv->pdev,
  1035. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  1036. rxq->rxd, rxq->rxd_dma);
  1037. rxq->rxd = NULL;
  1038. }
  1039. /*
  1040. * Scan a list of BSSIDs to process for finalize join.
  1041. * Allows for extension to process multiple BSSIDs.
  1042. */
  1043. static inline int
  1044. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  1045. {
  1046. return priv->capture_beacon &&
  1047. ieee80211_is_beacon(wh->frame_control) &&
  1048. ether_addr_equal(wh->addr3, priv->capture_bssid);
  1049. }
  1050. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  1051. struct sk_buff *skb)
  1052. {
  1053. struct mwl8k_priv *priv = hw->priv;
  1054. priv->capture_beacon = false;
  1055. memset(priv->capture_bssid, 0, ETH_ALEN);
  1056. /*
  1057. * Use GFP_ATOMIC as rxq_process is called from
  1058. * the primary interrupt handler, memory allocation call
  1059. * must not sleep.
  1060. */
  1061. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  1062. if (priv->beacon_skb != NULL)
  1063. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  1064. }
  1065. static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
  1066. u8 *bssid)
  1067. {
  1068. struct mwl8k_vif *mwl8k_vif;
  1069. list_for_each_entry(mwl8k_vif,
  1070. vif_list, list) {
  1071. if (memcmp(bssid, mwl8k_vif->bssid,
  1072. ETH_ALEN) == 0)
  1073. return mwl8k_vif;
  1074. }
  1075. return NULL;
  1076. }
  1077. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  1078. {
  1079. struct mwl8k_priv *priv = hw->priv;
  1080. struct mwl8k_vif *mwl8k_vif = NULL;
  1081. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  1082. int processed;
  1083. processed = 0;
  1084. while (rxq->rxd_count && limit--) {
  1085. struct sk_buff *skb;
  1086. void *rxd;
  1087. int pkt_len;
  1088. struct ieee80211_rx_status status;
  1089. struct ieee80211_hdr *wh;
  1090. __le16 qos;
  1091. skb = rxq->buf[rxq->head].skb;
  1092. if (skb == NULL)
  1093. break;
  1094. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  1095. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
  1096. &priv->noise);
  1097. if (pkt_len < 0)
  1098. break;
  1099. rxq->buf[rxq->head].skb = NULL;
  1100. pci_unmap_single(priv->pdev,
  1101. dma_unmap_addr(&rxq->buf[rxq->head], dma),
  1102. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  1103. dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  1104. rxq->head++;
  1105. if (rxq->head == MWL8K_RX_DESCS)
  1106. rxq->head = 0;
  1107. rxq->rxd_count--;
  1108. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1109. /*
  1110. * Check for a pending join operation. Save a
  1111. * copy of the beacon and schedule a tasklet to
  1112. * send a FINALIZE_JOIN command to the firmware.
  1113. */
  1114. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  1115. mwl8k_save_beacon(hw, skb);
  1116. if (ieee80211_has_protected(wh->frame_control)) {
  1117. /* Check if hw crypto has been enabled for
  1118. * this bss. If yes, set the status flags
  1119. * accordingly
  1120. */
  1121. mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
  1122. wh->addr1);
  1123. if (mwl8k_vif != NULL &&
  1124. mwl8k_vif->is_hw_crypto_enabled) {
  1125. /*
  1126. * When MMIC ERROR is encountered
  1127. * by the firmware, payload is
  1128. * dropped and only 32 bytes of
  1129. * mwl8k Firmware header is sent
  1130. * to the host.
  1131. *
  1132. * We need to add four bytes of
  1133. * key information. In it
  1134. * MAC80211 expects keyidx set to
  1135. * 0 for triggering Counter
  1136. * Measure of MMIC failure.
  1137. */
  1138. if (status.flag & RX_FLAG_MMIC_ERROR) {
  1139. struct mwl8k_dma_data *tr;
  1140. tr = (struct mwl8k_dma_data *)skb->data;
  1141. memset((void *)&(tr->data), 0, 4);
  1142. pkt_len += 4;
  1143. }
  1144. if (!ieee80211_is_auth(wh->frame_control))
  1145. status.flag |= RX_FLAG_IV_STRIPPED |
  1146. RX_FLAG_DECRYPTED |
  1147. RX_FLAG_MMIC_STRIPPED;
  1148. }
  1149. }
  1150. skb_put(skb, pkt_len);
  1151. mwl8k_remove_dma_header(skb, qos);
  1152. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  1153. ieee80211_rx_irqsafe(hw, skb);
  1154. processed++;
  1155. }
  1156. return processed;
  1157. }
  1158. /*
  1159. * Packet transmission.
  1160. */
  1161. #define MWL8K_TXD_STATUS_OK 0x00000001
  1162. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  1163. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  1164. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  1165. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  1166. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  1167. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  1168. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  1169. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  1170. #define MWL8K_QOS_EOSP 0x0010
  1171. struct mwl8k_tx_desc {
  1172. __le32 status;
  1173. __u8 data_rate;
  1174. __u8 tx_priority;
  1175. __le16 qos_control;
  1176. __le32 pkt_phys_addr;
  1177. __le16 pkt_len;
  1178. __u8 dest_MAC_addr[ETH_ALEN];
  1179. __le32 next_txd_phys_addr;
  1180. __le32 timestamp;
  1181. __le16 rate_info;
  1182. __u8 peer_id;
  1183. __u8 tx_frag_cnt;
  1184. } __packed;
  1185. #define MWL8K_TX_DESCS 128
  1186. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  1187. {
  1188. struct mwl8k_priv *priv = hw->priv;
  1189. struct mwl8k_tx_queue *txq = priv->txq + index;
  1190. int size;
  1191. int i;
  1192. txq->len = 0;
  1193. txq->head = 0;
  1194. txq->tail = 0;
  1195. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  1196. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  1197. if (txq->txd == NULL) {
  1198. wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
  1199. return -ENOMEM;
  1200. }
  1201. memset(txq->txd, 0, size);
  1202. txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
  1203. if (txq->skb == NULL) {
  1204. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  1205. return -ENOMEM;
  1206. }
  1207. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  1208. struct mwl8k_tx_desc *tx_desc;
  1209. int nexti;
  1210. tx_desc = txq->txd + i;
  1211. nexti = (i + 1) % MWL8K_TX_DESCS;
  1212. tx_desc->status = 0;
  1213. tx_desc->next_txd_phys_addr =
  1214. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  1215. }
  1216. return 0;
  1217. }
  1218. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  1219. {
  1220. iowrite32(MWL8K_H2A_INT_PPA_READY,
  1221. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1222. iowrite32(MWL8K_H2A_INT_DUMMY,
  1223. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1224. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  1225. }
  1226. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  1227. {
  1228. struct mwl8k_priv *priv = hw->priv;
  1229. int i;
  1230. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  1231. struct mwl8k_tx_queue *txq = priv->txq + i;
  1232. int fw_owned = 0;
  1233. int drv_owned = 0;
  1234. int unused = 0;
  1235. int desc;
  1236. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  1237. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  1238. u32 status;
  1239. status = le32_to_cpu(tx_desc->status);
  1240. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  1241. fw_owned++;
  1242. else
  1243. drv_owned++;
  1244. if (tx_desc->pkt_len == 0)
  1245. unused++;
  1246. }
  1247. wiphy_err(hw->wiphy,
  1248. "txq[%d] len=%d head=%d tail=%d "
  1249. "fw_owned=%d drv_owned=%d unused=%d\n",
  1250. i,
  1251. txq->len, txq->head, txq->tail,
  1252. fw_owned, drv_owned, unused);
  1253. }
  1254. }
  1255. /*
  1256. * Must be called with priv->fw_mutex held and tx queues stopped.
  1257. */
  1258. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1259. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1260. {
  1261. struct mwl8k_priv *priv = hw->priv;
  1262. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1263. int retry;
  1264. int rc;
  1265. might_sleep();
  1266. /* Since fw restart is in progress, allow only the firmware
  1267. * commands from the restart code and block the other
  1268. * commands since they are going to fail in any case since
  1269. * the firmware has crashed
  1270. */
  1271. if (priv->hw_restart_in_progress) {
  1272. if (priv->hw_restart_owner == current)
  1273. return 0;
  1274. else
  1275. return -EBUSY;
  1276. }
  1277. if (atomic_read(&priv->watchdog_event_pending))
  1278. return 0;
  1279. /*
  1280. * The TX queues are stopped at this point, so this test
  1281. * doesn't need to take ->tx_lock.
  1282. */
  1283. if (!priv->pending_tx_pkts)
  1284. return 0;
  1285. retry = 0;
  1286. rc = 0;
  1287. spin_lock_bh(&priv->tx_lock);
  1288. priv->tx_wait = &tx_wait;
  1289. while (!rc) {
  1290. int oldcount;
  1291. unsigned long timeout;
  1292. oldcount = priv->pending_tx_pkts;
  1293. spin_unlock_bh(&priv->tx_lock);
  1294. timeout = wait_for_completion_timeout(&tx_wait,
  1295. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1296. if (atomic_read(&priv->watchdog_event_pending)) {
  1297. spin_lock_bh(&priv->tx_lock);
  1298. priv->tx_wait = NULL;
  1299. spin_unlock_bh(&priv->tx_lock);
  1300. return 0;
  1301. }
  1302. spin_lock_bh(&priv->tx_lock);
  1303. if (timeout) {
  1304. WARN_ON(priv->pending_tx_pkts);
  1305. if (retry)
  1306. wiphy_notice(hw->wiphy, "tx rings drained\n");
  1307. break;
  1308. }
  1309. if (priv->pending_tx_pkts < oldcount) {
  1310. wiphy_notice(hw->wiphy,
  1311. "waiting for tx rings to drain (%d -> %d pkts)\n",
  1312. oldcount, priv->pending_tx_pkts);
  1313. retry = 1;
  1314. continue;
  1315. }
  1316. priv->tx_wait = NULL;
  1317. wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
  1318. MWL8K_TX_WAIT_TIMEOUT_MS);
  1319. mwl8k_dump_tx_rings(hw);
  1320. priv->hw_restart_in_progress = true;
  1321. ieee80211_queue_work(hw, &priv->fw_reload);
  1322. rc = -ETIMEDOUT;
  1323. }
  1324. priv->tx_wait = NULL;
  1325. spin_unlock_bh(&priv->tx_lock);
  1326. return rc;
  1327. }
  1328. #define MWL8K_TXD_SUCCESS(status) \
  1329. ((status) & (MWL8K_TXD_STATUS_OK | \
  1330. MWL8K_TXD_STATUS_OK_RETRY | \
  1331. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1332. static int mwl8k_tid_queue_mapping(u8 tid)
  1333. {
  1334. BUG_ON(tid > 7);
  1335. switch (tid) {
  1336. case 0:
  1337. case 3:
  1338. return IEEE80211_AC_BE;
  1339. break;
  1340. case 1:
  1341. case 2:
  1342. return IEEE80211_AC_BK;
  1343. break;
  1344. case 4:
  1345. case 5:
  1346. return IEEE80211_AC_VI;
  1347. break;
  1348. case 6:
  1349. case 7:
  1350. return IEEE80211_AC_VO;
  1351. break;
  1352. default:
  1353. return -1;
  1354. break;
  1355. }
  1356. }
  1357. /* The firmware will fill in the rate information
  1358. * for each packet that gets queued in the hardware
  1359. * and these macros will interpret that info.
  1360. */
  1361. #define RI_FORMAT(a) (a & 0x0001)
  1362. #define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3)
  1363. static int
  1364. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1365. {
  1366. struct mwl8k_priv *priv = hw->priv;
  1367. struct mwl8k_tx_queue *txq = priv->txq + index;
  1368. int processed;
  1369. processed = 0;
  1370. while (txq->len > 0 && limit--) {
  1371. int tx;
  1372. struct mwl8k_tx_desc *tx_desc;
  1373. unsigned long addr;
  1374. int size;
  1375. struct sk_buff *skb;
  1376. struct ieee80211_tx_info *info;
  1377. u32 status;
  1378. struct ieee80211_sta *sta;
  1379. struct mwl8k_sta *sta_info = NULL;
  1380. u16 rate_info;
  1381. struct ieee80211_hdr *wh;
  1382. tx = txq->head;
  1383. tx_desc = txq->txd + tx;
  1384. status = le32_to_cpu(tx_desc->status);
  1385. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1386. if (!force)
  1387. break;
  1388. tx_desc->status &=
  1389. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1390. }
  1391. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1392. BUG_ON(txq->len == 0);
  1393. txq->len--;
  1394. priv->pending_tx_pkts--;
  1395. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1396. size = le16_to_cpu(tx_desc->pkt_len);
  1397. skb = txq->skb[tx];
  1398. txq->skb[tx] = NULL;
  1399. BUG_ON(skb == NULL);
  1400. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1401. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1402. wh = (struct ieee80211_hdr *) skb->data;
  1403. /* Mark descriptor as unused */
  1404. tx_desc->pkt_phys_addr = 0;
  1405. tx_desc->pkt_len = 0;
  1406. info = IEEE80211_SKB_CB(skb);
  1407. if (ieee80211_is_data(wh->frame_control)) {
  1408. rcu_read_lock();
  1409. sta = ieee80211_find_sta_by_ifaddr(hw, wh->addr1,
  1410. wh->addr2);
  1411. if (sta) {
  1412. sta_info = MWL8K_STA(sta);
  1413. BUG_ON(sta_info == NULL);
  1414. rate_info = le16_to_cpu(tx_desc->rate_info);
  1415. /* If rate is < 6.5 Mpbs for an ht station
  1416. * do not form an ampdu. If the station is a
  1417. * legacy station (format = 0), do not form an
  1418. * ampdu
  1419. */
  1420. if (RI_RATE_ID_MCS(rate_info) < 1 ||
  1421. RI_FORMAT(rate_info) == 0) {
  1422. sta_info->is_ampdu_allowed = false;
  1423. } else {
  1424. sta_info->is_ampdu_allowed = true;
  1425. }
  1426. }
  1427. rcu_read_unlock();
  1428. }
  1429. ieee80211_tx_info_clear_status(info);
  1430. /* Rate control is happening in the firmware.
  1431. * Ensure no tx rate is being reported.
  1432. */
  1433. info->status.rates[0].idx = -1;
  1434. info->status.rates[0].count = 1;
  1435. if (MWL8K_TXD_SUCCESS(status))
  1436. info->flags |= IEEE80211_TX_STAT_ACK;
  1437. ieee80211_tx_status_irqsafe(hw, skb);
  1438. processed++;
  1439. }
  1440. return processed;
  1441. }
  1442. /* must be called only when the card's transmit is completely halted */
  1443. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1444. {
  1445. struct mwl8k_priv *priv = hw->priv;
  1446. struct mwl8k_tx_queue *txq = priv->txq + index;
  1447. if (txq->txd == NULL)
  1448. return;
  1449. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1450. kfree(txq->skb);
  1451. txq->skb = NULL;
  1452. pci_free_consistent(priv->pdev,
  1453. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1454. txq->txd, txq->txd_dma);
  1455. txq->txd = NULL;
  1456. }
  1457. /* caller must hold priv->stream_lock when calling the stream functions */
  1458. static struct mwl8k_ampdu_stream *
  1459. mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
  1460. {
  1461. struct mwl8k_ampdu_stream *stream;
  1462. struct mwl8k_priv *priv = hw->priv;
  1463. int i;
  1464. for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
  1465. stream = &priv->ampdu[i];
  1466. if (stream->state == AMPDU_NO_STREAM) {
  1467. stream->sta = sta;
  1468. stream->state = AMPDU_STREAM_NEW;
  1469. stream->tid = tid;
  1470. stream->idx = i;
  1471. wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
  1472. sta->addr, tid);
  1473. return stream;
  1474. }
  1475. }
  1476. return NULL;
  1477. }
  1478. static int
  1479. mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
  1480. {
  1481. int ret;
  1482. /* if the stream has already been started, don't start it again */
  1483. if (stream->state != AMPDU_STREAM_NEW)
  1484. return 0;
  1485. ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
  1486. if (ret)
  1487. wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
  1488. "%d\n", stream->sta->addr, stream->tid, ret);
  1489. else
  1490. wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
  1491. stream->sta->addr, stream->tid);
  1492. return ret;
  1493. }
  1494. static void
  1495. mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
  1496. {
  1497. wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
  1498. stream->tid);
  1499. memset(stream, 0, sizeof(*stream));
  1500. }
  1501. static struct mwl8k_ampdu_stream *
  1502. mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
  1503. {
  1504. struct mwl8k_priv *priv = hw->priv;
  1505. int i;
  1506. for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
  1507. struct mwl8k_ampdu_stream *stream;
  1508. stream = &priv->ampdu[i];
  1509. if (stream->state == AMPDU_NO_STREAM)
  1510. continue;
  1511. if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
  1512. stream->tid == tid)
  1513. return stream;
  1514. }
  1515. return NULL;
  1516. }
  1517. #define MWL8K_AMPDU_PACKET_THRESHOLD 64
  1518. static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid)
  1519. {
  1520. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  1521. struct tx_traffic_info *tx_stats;
  1522. BUG_ON(tid >= MWL8K_MAX_TID);
  1523. tx_stats = &sta_info->tx_stats[tid];
  1524. return sta_info->is_ampdu_allowed &&
  1525. tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD;
  1526. }
  1527. static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid)
  1528. {
  1529. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  1530. struct tx_traffic_info *tx_stats;
  1531. BUG_ON(tid >= MWL8K_MAX_TID);
  1532. tx_stats = &sta_info->tx_stats[tid];
  1533. if (tx_stats->start_time == 0)
  1534. tx_stats->start_time = jiffies;
  1535. /* reset the packet count after each second elapses. If the number of
  1536. * packets ever exceeds the ampdu_min_traffic threshold, we will allow
  1537. * an ampdu stream to be started.
  1538. */
  1539. if (jiffies - tx_stats->start_time > HZ) {
  1540. tx_stats->pkts = 0;
  1541. tx_stats->start_time = 0;
  1542. } else
  1543. tx_stats->pkts++;
  1544. }
  1545. /* The hardware ampdu queues start from 5.
  1546. * txpriorities for ampdu queues are
  1547. * 5 6 7 0 1 2 3 4 ie., queue 5 is highest
  1548. * and queue 3 is lowest (queue 4 is reserved)
  1549. */
  1550. #define BA_QUEUE 5
  1551. static void
  1552. mwl8k_txq_xmit(struct ieee80211_hw *hw,
  1553. int index,
  1554. struct ieee80211_sta *sta,
  1555. struct sk_buff *skb)
  1556. {
  1557. struct mwl8k_priv *priv = hw->priv;
  1558. struct ieee80211_tx_info *tx_info;
  1559. struct mwl8k_vif *mwl8k_vif;
  1560. struct ieee80211_hdr *wh;
  1561. struct mwl8k_tx_queue *txq;
  1562. struct mwl8k_tx_desc *tx;
  1563. dma_addr_t dma;
  1564. u32 txstatus;
  1565. u8 txdatarate;
  1566. u16 qos;
  1567. int txpriority;
  1568. u8 tid = 0;
  1569. struct mwl8k_ampdu_stream *stream = NULL;
  1570. bool start_ba_session = false;
  1571. bool mgmtframe = false;
  1572. struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
  1573. bool eapol_frame = false;
  1574. wh = (struct ieee80211_hdr *)skb->data;
  1575. if (ieee80211_is_data_qos(wh->frame_control))
  1576. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1577. else
  1578. qos = 0;
  1579. if (skb->protocol == cpu_to_be16(ETH_P_PAE))
  1580. eapol_frame = true;
  1581. if (ieee80211_is_mgmt(wh->frame_control))
  1582. mgmtframe = true;
  1583. if (priv->ap_fw)
  1584. mwl8k_encapsulate_tx_frame(priv, skb);
  1585. else
  1586. mwl8k_add_dma_header(priv, skb, 0, 0);
  1587. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1588. tx_info = IEEE80211_SKB_CB(skb);
  1589. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1590. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1591. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1592. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1593. mwl8k_vif->seqno += 0x10;
  1594. }
  1595. /* Setup firmware control bit fields for each frame type. */
  1596. txstatus = 0;
  1597. txdatarate = 0;
  1598. if (ieee80211_is_mgmt(wh->frame_control) ||
  1599. ieee80211_is_ctl(wh->frame_control)) {
  1600. txdatarate = 0;
  1601. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1602. } else if (ieee80211_is_data(wh->frame_control)) {
  1603. txdatarate = 1;
  1604. if (is_multicast_ether_addr(wh->addr1))
  1605. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1606. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1607. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1608. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1609. else
  1610. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1611. }
  1612. /* Queue ADDBA request in the respective data queue. While setting up
  1613. * the ampdu stream, mac80211 queues further packets for that
  1614. * particular ra/tid pair. However, packets piled up in the hardware
  1615. * for that ra/tid pair will still go out. ADDBA request and the
  1616. * related data packets going out from different queues asynchronously
  1617. * will cause a shift in the receiver window which might result in
  1618. * ampdu packets getting dropped at the receiver after the stream has
  1619. * been setup.
  1620. */
  1621. if (unlikely(ieee80211_is_action(wh->frame_control) &&
  1622. mgmt->u.action.category == WLAN_CATEGORY_BACK &&
  1623. mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
  1624. priv->ap_fw)) {
  1625. u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
  1626. tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
  1627. index = mwl8k_tid_queue_mapping(tid);
  1628. }
  1629. txpriority = index;
  1630. if (priv->ap_fw && sta && sta->ht_cap.ht_supported && !eapol_frame &&
  1631. ieee80211_is_data_qos(wh->frame_control)) {
  1632. tid = qos & 0xf;
  1633. mwl8k_tx_count_packet(sta, tid);
  1634. spin_lock(&priv->stream_lock);
  1635. stream = mwl8k_lookup_stream(hw, sta->addr, tid);
  1636. if (stream != NULL) {
  1637. if (stream->state == AMPDU_STREAM_ACTIVE) {
  1638. WARN_ON(!(qos & MWL8K_QOS_ACK_POLICY_BLOCKACK));
  1639. txpriority = (BA_QUEUE + stream->idx) %
  1640. TOTAL_HW_TX_QUEUES;
  1641. if (stream->idx <= 1)
  1642. index = stream->idx +
  1643. MWL8K_TX_WMM_QUEUES;
  1644. } else if (stream->state == AMPDU_STREAM_NEW) {
  1645. /* We get here if the driver sends us packets
  1646. * after we've initiated a stream, but before
  1647. * our ampdu_action routine has been called
  1648. * with IEEE80211_AMPDU_TX_START to get the SSN
  1649. * for the ADDBA request. So this packet can
  1650. * go out with no risk of sequence number
  1651. * mismatch. No special handling is required.
  1652. */
  1653. } else {
  1654. /* Drop packets that would go out after the
  1655. * ADDBA request was sent but before the ADDBA
  1656. * response is received. If we don't do this,
  1657. * the recipient would probably receive it
  1658. * after the ADDBA request with SSN 0. This
  1659. * will cause the recipient's BA receive window
  1660. * to shift, which would cause the subsequent
  1661. * packets in the BA stream to be discarded.
  1662. * mac80211 queues our packets for us in this
  1663. * case, so this is really just a safety check.
  1664. */
  1665. wiphy_warn(hw->wiphy,
  1666. "Cannot send packet while ADDBA "
  1667. "dialog is underway.\n");
  1668. spin_unlock(&priv->stream_lock);
  1669. dev_kfree_skb(skb);
  1670. return;
  1671. }
  1672. } else {
  1673. /* Defer calling mwl8k_start_stream so that the current
  1674. * skb can go out before the ADDBA request. This
  1675. * prevents sequence number mismatch at the recepient
  1676. * as described above.
  1677. */
  1678. if (mwl8k_ampdu_allowed(sta, tid)) {
  1679. stream = mwl8k_add_stream(hw, sta, tid);
  1680. if (stream != NULL)
  1681. start_ba_session = true;
  1682. }
  1683. }
  1684. spin_unlock(&priv->stream_lock);
  1685. } else {
  1686. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1687. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1688. }
  1689. dma = pci_map_single(priv->pdev, skb->data,
  1690. skb->len, PCI_DMA_TODEVICE);
  1691. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1692. wiphy_debug(hw->wiphy,
  1693. "failed to dma map skb, dropping TX frame.\n");
  1694. if (start_ba_session) {
  1695. spin_lock(&priv->stream_lock);
  1696. mwl8k_remove_stream(hw, stream);
  1697. spin_unlock(&priv->stream_lock);
  1698. }
  1699. dev_kfree_skb(skb);
  1700. return;
  1701. }
  1702. spin_lock_bh(&priv->tx_lock);
  1703. txq = priv->txq + index;
  1704. /* Mgmt frames that go out frequently are probe
  1705. * responses. Other mgmt frames got out relatively
  1706. * infrequently. Hence reserve 2 buffers so that
  1707. * other mgmt frames do not get dropped due to an
  1708. * already queued probe response in one of the
  1709. * reserved buffers.
  1710. */
  1711. if (txq->len >= MWL8K_TX_DESCS - 2) {
  1712. if (!mgmtframe || txq->len == MWL8K_TX_DESCS) {
  1713. if (start_ba_session) {
  1714. spin_lock(&priv->stream_lock);
  1715. mwl8k_remove_stream(hw, stream);
  1716. spin_unlock(&priv->stream_lock);
  1717. }
  1718. spin_unlock_bh(&priv->tx_lock);
  1719. pci_unmap_single(priv->pdev, dma, skb->len,
  1720. PCI_DMA_TODEVICE);
  1721. dev_kfree_skb(skb);
  1722. return;
  1723. }
  1724. }
  1725. BUG_ON(txq->skb[txq->tail] != NULL);
  1726. txq->skb[txq->tail] = skb;
  1727. tx = txq->txd + txq->tail;
  1728. tx->data_rate = txdatarate;
  1729. tx->tx_priority = txpriority;
  1730. tx->qos_control = cpu_to_le16(qos);
  1731. tx->pkt_phys_addr = cpu_to_le32(dma);
  1732. tx->pkt_len = cpu_to_le16(skb->len);
  1733. tx->rate_info = 0;
  1734. if (!priv->ap_fw && sta != NULL)
  1735. tx->peer_id = MWL8K_STA(sta)->peer_id;
  1736. else
  1737. tx->peer_id = 0;
  1738. if (priv->ap_fw && ieee80211_is_data(wh->frame_control) && !eapol_frame)
  1739. tx->timestamp = cpu_to_le32(ioread32(priv->regs +
  1740. MWL8K_HW_TIMER_REGISTER));
  1741. else
  1742. tx->timestamp = 0;
  1743. wmb();
  1744. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1745. txq->len++;
  1746. priv->pending_tx_pkts++;
  1747. txq->tail++;
  1748. if (txq->tail == MWL8K_TX_DESCS)
  1749. txq->tail = 0;
  1750. mwl8k_tx_start(priv);
  1751. spin_unlock_bh(&priv->tx_lock);
  1752. /* Initiate the ampdu session here */
  1753. if (start_ba_session) {
  1754. spin_lock(&priv->stream_lock);
  1755. if (mwl8k_start_stream(hw, stream))
  1756. mwl8k_remove_stream(hw, stream);
  1757. spin_unlock(&priv->stream_lock);
  1758. }
  1759. }
  1760. /*
  1761. * Firmware access.
  1762. *
  1763. * We have the following requirements for issuing firmware commands:
  1764. * - Some commands require that the packet transmit path is idle when
  1765. * the command is issued. (For simplicity, we'll just quiesce the
  1766. * transmit path for every command.)
  1767. * - There are certain sequences of commands that need to be issued to
  1768. * the hardware sequentially, with no other intervening commands.
  1769. *
  1770. * This leads to an implementation of a "firmware lock" as a mutex that
  1771. * can be taken recursively, and which is taken by both the low-level
  1772. * command submission function (mwl8k_post_cmd) as well as any users of
  1773. * that function that require issuing of an atomic sequence of commands,
  1774. * and quiesces the transmit path whenever it's taken.
  1775. */
  1776. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1777. {
  1778. struct mwl8k_priv *priv = hw->priv;
  1779. if (priv->fw_mutex_owner != current) {
  1780. int rc;
  1781. mutex_lock(&priv->fw_mutex);
  1782. ieee80211_stop_queues(hw);
  1783. rc = mwl8k_tx_wait_empty(hw);
  1784. if (rc) {
  1785. if (!priv->hw_restart_in_progress)
  1786. ieee80211_wake_queues(hw);
  1787. mutex_unlock(&priv->fw_mutex);
  1788. return rc;
  1789. }
  1790. priv->fw_mutex_owner = current;
  1791. }
  1792. priv->fw_mutex_depth++;
  1793. return 0;
  1794. }
  1795. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1796. {
  1797. struct mwl8k_priv *priv = hw->priv;
  1798. if (!--priv->fw_mutex_depth) {
  1799. if (!priv->hw_restart_in_progress)
  1800. ieee80211_wake_queues(hw);
  1801. priv->fw_mutex_owner = NULL;
  1802. mutex_unlock(&priv->fw_mutex);
  1803. }
  1804. }
  1805. static void mwl8k_enable_bsses(struct ieee80211_hw *hw, bool enable,
  1806. u32 bitmap);
  1807. /*
  1808. * Command processing.
  1809. */
  1810. /* Timeout firmware commands after 10s */
  1811. #define MWL8K_CMD_TIMEOUT_MS 10000
  1812. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1813. {
  1814. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1815. struct mwl8k_priv *priv = hw->priv;
  1816. void __iomem *regs = priv->regs;
  1817. dma_addr_t dma_addr;
  1818. unsigned int dma_size;
  1819. int rc;
  1820. unsigned long timeout = 0;
  1821. u8 buf[32];
  1822. u32 bitmap = 0;
  1823. wiphy_dbg(hw->wiphy, "Posting %s [%d]\n",
  1824. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), cmd->macid);
  1825. /* Before posting firmware commands that could change the hardware
  1826. * characteristics, make sure that all BSSes are stopped temporary.
  1827. * Enable these stopped BSSes after completion of the commands
  1828. */
  1829. rc = mwl8k_fw_lock(hw);
  1830. if (rc)
  1831. return rc;
  1832. if (priv->ap_fw && priv->running_bsses) {
  1833. switch (le16_to_cpu(cmd->code)) {
  1834. case MWL8K_CMD_SET_RF_CHANNEL:
  1835. case MWL8K_CMD_RADIO_CONTROL:
  1836. case MWL8K_CMD_RF_TX_POWER:
  1837. case MWL8K_CMD_TX_POWER:
  1838. case MWL8K_CMD_RF_ANTENNA:
  1839. case MWL8K_CMD_RTS_THRESHOLD:
  1840. case MWL8K_CMD_MIMO_CONFIG:
  1841. bitmap = priv->running_bsses;
  1842. mwl8k_enable_bsses(hw, false, bitmap);
  1843. break;
  1844. }
  1845. }
  1846. cmd->result = (__force __le16) 0xffff;
  1847. dma_size = le16_to_cpu(cmd->length);
  1848. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1849. PCI_DMA_BIDIRECTIONAL);
  1850. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1851. return -ENOMEM;
  1852. priv->hostcmd_wait = &cmd_wait;
  1853. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1854. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1855. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1856. iowrite32(MWL8K_H2A_INT_DUMMY,
  1857. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1858. timeout = wait_for_completion_timeout(&cmd_wait,
  1859. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1860. priv->hostcmd_wait = NULL;
  1861. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1862. PCI_DMA_BIDIRECTIONAL);
  1863. if (!timeout) {
  1864. wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
  1865. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1866. MWL8K_CMD_TIMEOUT_MS);
  1867. rc = -ETIMEDOUT;
  1868. } else {
  1869. int ms;
  1870. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1871. rc = cmd->result ? -EINVAL : 0;
  1872. if (rc)
  1873. wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
  1874. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1875. le16_to_cpu(cmd->result));
  1876. else if (ms > 2000)
  1877. wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
  1878. mwl8k_cmd_name(cmd->code,
  1879. buf, sizeof(buf)),
  1880. ms);
  1881. }
  1882. if (bitmap)
  1883. mwl8k_enable_bsses(hw, true, bitmap);
  1884. mwl8k_fw_unlock(hw);
  1885. return rc;
  1886. }
  1887. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1888. struct ieee80211_vif *vif,
  1889. struct mwl8k_cmd_pkt *cmd)
  1890. {
  1891. if (vif != NULL)
  1892. cmd->macid = MWL8K_VIF(vif)->macid;
  1893. return mwl8k_post_cmd(hw, cmd);
  1894. }
  1895. /*
  1896. * Setup code shared between STA and AP firmware images.
  1897. */
  1898. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1899. {
  1900. struct mwl8k_priv *priv = hw->priv;
  1901. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1902. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1903. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1904. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1905. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1906. priv->band_24.channels = priv->channels_24;
  1907. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1908. priv->band_24.bitrates = priv->rates_24;
  1909. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1910. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1911. }
  1912. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1913. {
  1914. struct mwl8k_priv *priv = hw->priv;
  1915. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1916. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1917. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1918. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1919. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1920. priv->band_50.channels = priv->channels_50;
  1921. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1922. priv->band_50.bitrates = priv->rates_50;
  1923. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1924. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1925. }
  1926. /*
  1927. * CMD_GET_HW_SPEC (STA version).
  1928. */
  1929. struct mwl8k_cmd_get_hw_spec_sta {
  1930. struct mwl8k_cmd_pkt header;
  1931. __u8 hw_rev;
  1932. __u8 host_interface;
  1933. __le16 num_mcaddrs;
  1934. __u8 perm_addr[ETH_ALEN];
  1935. __le16 region_code;
  1936. __le32 fw_rev;
  1937. __le32 ps_cookie;
  1938. __le32 caps;
  1939. __u8 mcs_bitmap[16];
  1940. __le32 rx_queue_ptr;
  1941. __le32 num_tx_queues;
  1942. __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
  1943. __le32 caps2;
  1944. __le32 num_tx_desc_per_queue;
  1945. __le32 total_rxd;
  1946. } __packed;
  1947. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1948. #define MWL8K_CAP_GREENFIELD 0x08000000
  1949. #define MWL8K_CAP_AMPDU 0x04000000
  1950. #define MWL8K_CAP_RX_STBC 0x01000000
  1951. #define MWL8K_CAP_TX_STBC 0x00800000
  1952. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1953. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1954. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1955. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1956. #define MWL8K_CAP_DELAY_BA 0x00003000
  1957. #define MWL8K_CAP_MIMO 0x00000200
  1958. #define MWL8K_CAP_40MHZ 0x00000100
  1959. #define MWL8K_CAP_BAND_MASK 0x00000007
  1960. #define MWL8K_CAP_5GHZ 0x00000004
  1961. #define MWL8K_CAP_2GHZ4 0x00000001
  1962. static void
  1963. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1964. struct ieee80211_supported_band *band, u32 cap)
  1965. {
  1966. int rx_streams;
  1967. int tx_streams;
  1968. band->ht_cap.ht_supported = 1;
  1969. if (cap & MWL8K_CAP_MAX_AMSDU)
  1970. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1971. if (cap & MWL8K_CAP_GREENFIELD)
  1972. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1973. if (cap & MWL8K_CAP_AMPDU) {
  1974. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1975. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1976. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1977. }
  1978. if (cap & MWL8K_CAP_RX_STBC)
  1979. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1980. if (cap & MWL8K_CAP_TX_STBC)
  1981. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1982. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1983. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1984. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1985. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1986. if (cap & MWL8K_CAP_DELAY_BA)
  1987. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1988. if (cap & MWL8K_CAP_40MHZ)
  1989. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1990. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1991. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1992. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1993. if (rx_streams >= 2)
  1994. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1995. if (rx_streams >= 3)
  1996. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1997. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1998. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1999. if (rx_streams != tx_streams) {
  2000. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  2001. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  2002. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  2003. }
  2004. }
  2005. static void
  2006. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  2007. {
  2008. struct mwl8k_priv *priv = hw->priv;
  2009. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  2010. mwl8k_setup_2ghz_band(hw);
  2011. if (caps & MWL8K_CAP_MIMO)
  2012. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  2013. }
  2014. if (caps & MWL8K_CAP_5GHZ) {
  2015. mwl8k_setup_5ghz_band(hw);
  2016. if (caps & MWL8K_CAP_MIMO)
  2017. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  2018. }
  2019. }
  2020. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  2021. {
  2022. struct mwl8k_priv *priv = hw->priv;
  2023. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  2024. int rc;
  2025. int i;
  2026. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2027. if (cmd == NULL)
  2028. return -ENOMEM;
  2029. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  2030. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2031. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  2032. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2033. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  2034. cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
  2035. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  2036. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  2037. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  2038. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  2039. rc = mwl8k_post_cmd(hw, &cmd->header);
  2040. if (!rc) {
  2041. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  2042. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  2043. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  2044. priv->hw_rev = cmd->hw_rev;
  2045. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  2046. priv->ap_macids_supported = 0x00000000;
  2047. priv->sta_macids_supported = 0x00000001;
  2048. }
  2049. kfree(cmd);
  2050. return rc;
  2051. }
  2052. /*
  2053. * CMD_GET_HW_SPEC (AP version).
  2054. */
  2055. struct mwl8k_cmd_get_hw_spec_ap {
  2056. struct mwl8k_cmd_pkt header;
  2057. __u8 hw_rev;
  2058. __u8 host_interface;
  2059. __le16 num_wcb;
  2060. __le16 num_mcaddrs;
  2061. __u8 perm_addr[ETH_ALEN];
  2062. __le16 region_code;
  2063. __le16 num_antenna;
  2064. __le32 fw_rev;
  2065. __le32 wcbbase0;
  2066. __le32 rxwrptr;
  2067. __le32 rxrdptr;
  2068. __le32 ps_cookie;
  2069. __le32 wcbbase1;
  2070. __le32 wcbbase2;
  2071. __le32 wcbbase3;
  2072. __le32 fw_api_version;
  2073. __le32 caps;
  2074. __le32 num_of_ampdu_queues;
  2075. __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
  2076. } __packed;
  2077. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  2078. {
  2079. struct mwl8k_priv *priv = hw->priv;
  2080. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  2081. int rc, i;
  2082. u32 api_version;
  2083. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2084. if (cmd == NULL)
  2085. return -ENOMEM;
  2086. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  2087. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2088. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  2089. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2090. rc = mwl8k_post_cmd(hw, &cmd->header);
  2091. if (!rc) {
  2092. int off;
  2093. api_version = le32_to_cpu(cmd->fw_api_version);
  2094. if (priv->device_info->fw_api_ap != api_version) {
  2095. printk(KERN_ERR "%s: Unsupported fw API version for %s."
  2096. " Expected %d got %d.\n", MWL8K_NAME,
  2097. priv->device_info->part_name,
  2098. priv->device_info->fw_api_ap,
  2099. api_version);
  2100. rc = -EINVAL;
  2101. goto done;
  2102. }
  2103. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  2104. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  2105. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  2106. priv->hw_rev = cmd->hw_rev;
  2107. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  2108. priv->ap_macids_supported = 0x000000ff;
  2109. priv->sta_macids_supported = 0x00000100;
  2110. priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
  2111. if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
  2112. wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
  2113. " but we only support %d.\n",
  2114. priv->num_ampdu_queues,
  2115. MWL8K_MAX_AMPDU_QUEUES);
  2116. priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
  2117. }
  2118. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  2119. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  2120. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  2121. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  2122. priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  2123. priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  2124. priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  2125. priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  2126. for (i = 0; i < priv->num_ampdu_queues; i++)
  2127. priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
  2128. le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
  2129. }
  2130. done:
  2131. kfree(cmd);
  2132. return rc;
  2133. }
  2134. /*
  2135. * CMD_SET_HW_SPEC.
  2136. */
  2137. struct mwl8k_cmd_set_hw_spec {
  2138. struct mwl8k_cmd_pkt header;
  2139. __u8 hw_rev;
  2140. __u8 host_interface;
  2141. __le16 num_mcaddrs;
  2142. __u8 perm_addr[ETH_ALEN];
  2143. __le16 region_code;
  2144. __le32 fw_rev;
  2145. __le32 ps_cookie;
  2146. __le32 caps;
  2147. __le32 rx_queue_ptr;
  2148. __le32 num_tx_queues;
  2149. __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
  2150. __le32 flags;
  2151. __le32 num_tx_desc_per_queue;
  2152. __le32 total_rxd;
  2153. } __packed;
  2154. /* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
  2155. * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
  2156. * the packets that are queued for more than 500ms, will be dropped in the
  2157. * hardware. This helps minimizing the issues caused due to head-of-line
  2158. * blocking where a slow client can hog the bandwidth and affect traffic to a
  2159. * faster client.
  2160. */
  2161. #define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
  2162. #define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200
  2163. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  2164. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  2165. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  2166. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  2167. {
  2168. struct mwl8k_priv *priv = hw->priv;
  2169. struct mwl8k_cmd_set_hw_spec *cmd;
  2170. int rc;
  2171. int i;
  2172. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2173. if (cmd == NULL)
  2174. return -ENOMEM;
  2175. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  2176. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2177. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2178. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  2179. cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
  2180. /*
  2181. * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
  2182. * that order. Firmware has Q3 as highest priority and Q0 as lowest
  2183. * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
  2184. * priority is interpreted the right way in firmware.
  2185. */
  2186. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  2187. int j = mwl8k_tx_queues(priv) - 1 - i;
  2188. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
  2189. }
  2190. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  2191. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  2192. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON |
  2193. MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY |
  2194. MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR);
  2195. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  2196. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  2197. rc = mwl8k_post_cmd(hw, &cmd->header);
  2198. kfree(cmd);
  2199. return rc;
  2200. }
  2201. /*
  2202. * CMD_MAC_MULTICAST_ADR.
  2203. */
  2204. struct mwl8k_cmd_mac_multicast_adr {
  2205. struct mwl8k_cmd_pkt header;
  2206. __le16 action;
  2207. __le16 numaddr;
  2208. __u8 addr[0][ETH_ALEN];
  2209. };
  2210. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  2211. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  2212. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  2213. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  2214. static struct mwl8k_cmd_pkt *
  2215. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  2216. struct netdev_hw_addr_list *mc_list)
  2217. {
  2218. struct mwl8k_priv *priv = hw->priv;
  2219. struct mwl8k_cmd_mac_multicast_adr *cmd;
  2220. int size;
  2221. int mc_count = 0;
  2222. if (mc_list)
  2223. mc_count = netdev_hw_addr_list_count(mc_list);
  2224. if (allmulti || mc_count > priv->num_mcaddrs) {
  2225. allmulti = 1;
  2226. mc_count = 0;
  2227. }
  2228. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  2229. cmd = kzalloc(size, GFP_ATOMIC);
  2230. if (cmd == NULL)
  2231. return NULL;
  2232. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  2233. cmd->header.length = cpu_to_le16(size);
  2234. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  2235. MWL8K_ENABLE_RX_BROADCAST);
  2236. if (allmulti) {
  2237. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  2238. } else if (mc_count) {
  2239. struct netdev_hw_addr *ha;
  2240. int i = 0;
  2241. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  2242. cmd->numaddr = cpu_to_le16(mc_count);
  2243. netdev_hw_addr_list_for_each(ha, mc_list) {
  2244. memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
  2245. }
  2246. }
  2247. return &cmd->header;
  2248. }
  2249. /*
  2250. * CMD_GET_STAT.
  2251. */
  2252. struct mwl8k_cmd_get_stat {
  2253. struct mwl8k_cmd_pkt header;
  2254. __le32 stats[64];
  2255. } __packed;
  2256. #define MWL8K_STAT_ACK_FAILURE 9
  2257. #define MWL8K_STAT_RTS_FAILURE 12
  2258. #define MWL8K_STAT_FCS_ERROR 24
  2259. #define MWL8K_STAT_RTS_SUCCESS 11
  2260. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  2261. struct ieee80211_low_level_stats *stats)
  2262. {
  2263. struct mwl8k_cmd_get_stat *cmd;
  2264. int rc;
  2265. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2266. if (cmd == NULL)
  2267. return -ENOMEM;
  2268. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  2269. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2270. rc = mwl8k_post_cmd(hw, &cmd->header);
  2271. if (!rc) {
  2272. stats->dot11ACKFailureCount =
  2273. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  2274. stats->dot11RTSFailureCount =
  2275. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  2276. stats->dot11FCSErrorCount =
  2277. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  2278. stats->dot11RTSSuccessCount =
  2279. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  2280. }
  2281. kfree(cmd);
  2282. return rc;
  2283. }
  2284. /*
  2285. * CMD_RADIO_CONTROL.
  2286. */
  2287. struct mwl8k_cmd_radio_control {
  2288. struct mwl8k_cmd_pkt header;
  2289. __le16 action;
  2290. __le16 control;
  2291. __le16 radio_on;
  2292. } __packed;
  2293. static int
  2294. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  2295. {
  2296. struct mwl8k_priv *priv = hw->priv;
  2297. struct mwl8k_cmd_radio_control *cmd;
  2298. int rc;
  2299. if (enable == priv->radio_on && !force)
  2300. return 0;
  2301. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2302. if (cmd == NULL)
  2303. return -ENOMEM;
  2304. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  2305. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2306. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2307. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  2308. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  2309. rc = mwl8k_post_cmd(hw, &cmd->header);
  2310. kfree(cmd);
  2311. if (!rc)
  2312. priv->radio_on = enable;
  2313. return rc;
  2314. }
  2315. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  2316. {
  2317. return mwl8k_cmd_radio_control(hw, 0, 0);
  2318. }
  2319. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  2320. {
  2321. return mwl8k_cmd_radio_control(hw, 1, 0);
  2322. }
  2323. static int
  2324. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  2325. {
  2326. struct mwl8k_priv *priv = hw->priv;
  2327. priv->radio_short_preamble = short_preamble;
  2328. return mwl8k_cmd_radio_control(hw, 1, 1);
  2329. }
  2330. /*
  2331. * CMD_RF_TX_POWER.
  2332. */
  2333. #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
  2334. struct mwl8k_cmd_rf_tx_power {
  2335. struct mwl8k_cmd_pkt header;
  2336. __le16 action;
  2337. __le16 support_level;
  2338. __le16 current_level;
  2339. __le16 reserved;
  2340. __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
  2341. } __packed;
  2342. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  2343. {
  2344. struct mwl8k_cmd_rf_tx_power *cmd;
  2345. int rc;
  2346. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2347. if (cmd == NULL)
  2348. return -ENOMEM;
  2349. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  2350. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2351. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2352. cmd->support_level = cpu_to_le16(dBm);
  2353. rc = mwl8k_post_cmd(hw, &cmd->header);
  2354. kfree(cmd);
  2355. return rc;
  2356. }
  2357. /*
  2358. * CMD_TX_POWER.
  2359. */
  2360. #define MWL8K_TX_POWER_LEVEL_TOTAL 12
  2361. struct mwl8k_cmd_tx_power {
  2362. struct mwl8k_cmd_pkt header;
  2363. __le16 action;
  2364. __le16 band;
  2365. __le16 channel;
  2366. __le16 bw;
  2367. __le16 sub_ch;
  2368. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  2369. } __packed;
  2370. static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
  2371. struct ieee80211_conf *conf,
  2372. unsigned short pwr)
  2373. {
  2374. struct ieee80211_channel *channel = conf->channel;
  2375. struct mwl8k_cmd_tx_power *cmd;
  2376. int rc;
  2377. int i;
  2378. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2379. if (cmd == NULL)
  2380. return -ENOMEM;
  2381. cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
  2382. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2383. cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
  2384. if (channel->band == IEEE80211_BAND_2GHZ)
  2385. cmd->band = cpu_to_le16(0x1);
  2386. else if (channel->band == IEEE80211_BAND_5GHZ)
  2387. cmd->band = cpu_to_le16(0x4);
  2388. cmd->channel = cpu_to_le16(channel->hw_value);
  2389. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  2390. conf->channel_type == NL80211_CHAN_HT20) {
  2391. cmd->bw = cpu_to_le16(0x2);
  2392. } else {
  2393. cmd->bw = cpu_to_le16(0x4);
  2394. if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  2395. cmd->sub_ch = cpu_to_le16(0x3);
  2396. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  2397. cmd->sub_ch = cpu_to_le16(0x1);
  2398. }
  2399. for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
  2400. cmd->power_level_list[i] = cpu_to_le16(pwr);
  2401. rc = mwl8k_post_cmd(hw, &cmd->header);
  2402. kfree(cmd);
  2403. return rc;
  2404. }
  2405. /*
  2406. * CMD_RF_ANTENNA.
  2407. */
  2408. struct mwl8k_cmd_rf_antenna {
  2409. struct mwl8k_cmd_pkt header;
  2410. __le16 antenna;
  2411. __le16 mode;
  2412. } __packed;
  2413. #define MWL8K_RF_ANTENNA_RX 1
  2414. #define MWL8K_RF_ANTENNA_TX 2
  2415. static int
  2416. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  2417. {
  2418. struct mwl8k_cmd_rf_antenna *cmd;
  2419. int rc;
  2420. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2421. if (cmd == NULL)
  2422. return -ENOMEM;
  2423. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  2424. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2425. cmd->antenna = cpu_to_le16(antenna);
  2426. cmd->mode = cpu_to_le16(mask);
  2427. rc = mwl8k_post_cmd(hw, &cmd->header);
  2428. kfree(cmd);
  2429. return rc;
  2430. }
  2431. /*
  2432. * CMD_SET_BEACON.
  2433. */
  2434. struct mwl8k_cmd_set_beacon {
  2435. struct mwl8k_cmd_pkt header;
  2436. __le16 beacon_len;
  2437. __u8 beacon[0];
  2438. };
  2439. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  2440. struct ieee80211_vif *vif, u8 *beacon, int len)
  2441. {
  2442. struct mwl8k_cmd_set_beacon *cmd;
  2443. int rc;
  2444. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  2445. if (cmd == NULL)
  2446. return -ENOMEM;
  2447. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  2448. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  2449. cmd->beacon_len = cpu_to_le16(len);
  2450. memcpy(cmd->beacon, beacon, len);
  2451. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2452. kfree(cmd);
  2453. return rc;
  2454. }
  2455. /*
  2456. * CMD_SET_PRE_SCAN.
  2457. */
  2458. struct mwl8k_cmd_set_pre_scan {
  2459. struct mwl8k_cmd_pkt header;
  2460. } __packed;
  2461. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  2462. {
  2463. struct mwl8k_cmd_set_pre_scan *cmd;
  2464. int rc;
  2465. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2466. if (cmd == NULL)
  2467. return -ENOMEM;
  2468. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  2469. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2470. rc = mwl8k_post_cmd(hw, &cmd->header);
  2471. kfree(cmd);
  2472. return rc;
  2473. }
  2474. /*
  2475. * CMD_SET_POST_SCAN.
  2476. */
  2477. struct mwl8k_cmd_set_post_scan {
  2478. struct mwl8k_cmd_pkt header;
  2479. __le32 isibss;
  2480. __u8 bssid[ETH_ALEN];
  2481. } __packed;
  2482. static int
  2483. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  2484. {
  2485. struct mwl8k_cmd_set_post_scan *cmd;
  2486. int rc;
  2487. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2488. if (cmd == NULL)
  2489. return -ENOMEM;
  2490. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  2491. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2492. cmd->isibss = 0;
  2493. memcpy(cmd->bssid, mac, ETH_ALEN);
  2494. rc = mwl8k_post_cmd(hw, &cmd->header);
  2495. kfree(cmd);
  2496. return rc;
  2497. }
  2498. /*
  2499. * CMD_SET_RF_CHANNEL.
  2500. */
  2501. struct mwl8k_cmd_set_rf_channel {
  2502. struct mwl8k_cmd_pkt header;
  2503. __le16 action;
  2504. __u8 current_channel;
  2505. __le32 channel_flags;
  2506. } __packed;
  2507. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  2508. struct ieee80211_conf *conf)
  2509. {
  2510. struct ieee80211_channel *channel = conf->channel;
  2511. struct mwl8k_cmd_set_rf_channel *cmd;
  2512. int rc;
  2513. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2514. if (cmd == NULL)
  2515. return -ENOMEM;
  2516. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  2517. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2518. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2519. cmd->current_channel = channel->hw_value;
  2520. if (channel->band == IEEE80211_BAND_2GHZ)
  2521. cmd->channel_flags |= cpu_to_le32(0x00000001);
  2522. else if (channel->band == IEEE80211_BAND_5GHZ)
  2523. cmd->channel_flags |= cpu_to_le32(0x00000004);
  2524. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  2525. conf->channel_type == NL80211_CHAN_HT20)
  2526. cmd->channel_flags |= cpu_to_le32(0x00000080);
  2527. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  2528. cmd->channel_flags |= cpu_to_le32(0x000001900);
  2529. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  2530. cmd->channel_flags |= cpu_to_le32(0x000000900);
  2531. rc = mwl8k_post_cmd(hw, &cmd->header);
  2532. kfree(cmd);
  2533. return rc;
  2534. }
  2535. /*
  2536. * CMD_SET_AID.
  2537. */
  2538. #define MWL8K_FRAME_PROT_DISABLED 0x00
  2539. #define MWL8K_FRAME_PROT_11G 0x07
  2540. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  2541. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  2542. struct mwl8k_cmd_update_set_aid {
  2543. struct mwl8k_cmd_pkt header;
  2544. __le16 aid;
  2545. /* AP's MAC address (BSSID) */
  2546. __u8 bssid[ETH_ALEN];
  2547. __le16 protection_mode;
  2548. __u8 supp_rates[14];
  2549. } __packed;
  2550. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  2551. {
  2552. int i;
  2553. int j;
  2554. /*
  2555. * Clear nonstandard rates 4 and 13.
  2556. */
  2557. mask &= 0x1fef;
  2558. for (i = 0, j = 0; i < 14; i++) {
  2559. if (mask & (1 << i))
  2560. rates[j++] = mwl8k_rates_24[i].hw_value;
  2561. }
  2562. }
  2563. static int
  2564. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  2565. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  2566. {
  2567. struct mwl8k_cmd_update_set_aid *cmd;
  2568. u16 prot_mode;
  2569. int rc;
  2570. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2571. if (cmd == NULL)
  2572. return -ENOMEM;
  2573. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  2574. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2575. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  2576. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  2577. if (vif->bss_conf.use_cts_prot) {
  2578. prot_mode = MWL8K_FRAME_PROT_11G;
  2579. } else {
  2580. switch (vif->bss_conf.ht_operation_mode &
  2581. IEEE80211_HT_OP_MODE_PROTECTION) {
  2582. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  2583. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  2584. break;
  2585. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  2586. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  2587. break;
  2588. default:
  2589. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  2590. break;
  2591. }
  2592. }
  2593. cmd->protection_mode = cpu_to_le16(prot_mode);
  2594. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  2595. rc = mwl8k_post_cmd(hw, &cmd->header);
  2596. kfree(cmd);
  2597. return rc;
  2598. }
  2599. /*
  2600. * CMD_SET_RATE.
  2601. */
  2602. struct mwl8k_cmd_set_rate {
  2603. struct mwl8k_cmd_pkt header;
  2604. __u8 legacy_rates[14];
  2605. /* Bitmap for supported MCS codes. */
  2606. __u8 mcs_set[16];
  2607. __u8 reserved[16];
  2608. } __packed;
  2609. static int
  2610. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2611. u32 legacy_rate_mask, u8 *mcs_rates)
  2612. {
  2613. struct mwl8k_cmd_set_rate *cmd;
  2614. int rc;
  2615. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2616. if (cmd == NULL)
  2617. return -ENOMEM;
  2618. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  2619. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2620. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  2621. memcpy(cmd->mcs_set, mcs_rates, 16);
  2622. rc = mwl8k_post_cmd(hw, &cmd->header);
  2623. kfree(cmd);
  2624. return rc;
  2625. }
  2626. /*
  2627. * CMD_FINALIZE_JOIN.
  2628. */
  2629. #define MWL8K_FJ_BEACON_MAXLEN 128
  2630. struct mwl8k_cmd_finalize_join {
  2631. struct mwl8k_cmd_pkt header;
  2632. __le32 sleep_interval; /* Number of beacon periods to sleep */
  2633. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  2634. } __packed;
  2635. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  2636. int framelen, int dtim)
  2637. {
  2638. struct mwl8k_cmd_finalize_join *cmd;
  2639. struct ieee80211_mgmt *payload = frame;
  2640. int payload_len;
  2641. int rc;
  2642. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2643. if (cmd == NULL)
  2644. return -ENOMEM;
  2645. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  2646. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2647. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  2648. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  2649. if (payload_len < 0)
  2650. payload_len = 0;
  2651. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  2652. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  2653. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  2654. rc = mwl8k_post_cmd(hw, &cmd->header);
  2655. kfree(cmd);
  2656. return rc;
  2657. }
  2658. /*
  2659. * CMD_SET_RTS_THRESHOLD.
  2660. */
  2661. struct mwl8k_cmd_set_rts_threshold {
  2662. struct mwl8k_cmd_pkt header;
  2663. __le16 action;
  2664. __le16 threshold;
  2665. } __packed;
  2666. static int
  2667. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  2668. {
  2669. struct mwl8k_cmd_set_rts_threshold *cmd;
  2670. int rc;
  2671. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2672. if (cmd == NULL)
  2673. return -ENOMEM;
  2674. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2675. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2676. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2677. cmd->threshold = cpu_to_le16(rts_thresh);
  2678. rc = mwl8k_post_cmd(hw, &cmd->header);
  2679. kfree(cmd);
  2680. return rc;
  2681. }
  2682. /*
  2683. * CMD_SET_SLOT.
  2684. */
  2685. struct mwl8k_cmd_set_slot {
  2686. struct mwl8k_cmd_pkt header;
  2687. __le16 action;
  2688. __u8 short_slot;
  2689. } __packed;
  2690. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2691. {
  2692. struct mwl8k_cmd_set_slot *cmd;
  2693. int rc;
  2694. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2695. if (cmd == NULL)
  2696. return -ENOMEM;
  2697. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2698. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2699. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2700. cmd->short_slot = short_slot_time;
  2701. rc = mwl8k_post_cmd(hw, &cmd->header);
  2702. kfree(cmd);
  2703. return rc;
  2704. }
  2705. /*
  2706. * CMD_SET_EDCA_PARAMS.
  2707. */
  2708. struct mwl8k_cmd_set_edca_params {
  2709. struct mwl8k_cmd_pkt header;
  2710. /* See MWL8K_SET_EDCA_XXX below */
  2711. __le16 action;
  2712. /* TX opportunity in units of 32 us */
  2713. __le16 txop;
  2714. union {
  2715. struct {
  2716. /* Log exponent of max contention period: 0...15 */
  2717. __le32 log_cw_max;
  2718. /* Log exponent of min contention period: 0...15 */
  2719. __le32 log_cw_min;
  2720. /* Adaptive interframe spacing in units of 32us */
  2721. __u8 aifs;
  2722. /* TX queue to configure */
  2723. __u8 txq;
  2724. } ap;
  2725. struct {
  2726. /* Log exponent of max contention period: 0...15 */
  2727. __u8 log_cw_max;
  2728. /* Log exponent of min contention period: 0...15 */
  2729. __u8 log_cw_min;
  2730. /* Adaptive interframe spacing in units of 32us */
  2731. __u8 aifs;
  2732. /* TX queue to configure */
  2733. __u8 txq;
  2734. } sta;
  2735. };
  2736. } __packed;
  2737. #define MWL8K_SET_EDCA_CW 0x01
  2738. #define MWL8K_SET_EDCA_TXOP 0x02
  2739. #define MWL8K_SET_EDCA_AIFS 0x04
  2740. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2741. MWL8K_SET_EDCA_TXOP | \
  2742. MWL8K_SET_EDCA_AIFS)
  2743. static int
  2744. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2745. __u16 cw_min, __u16 cw_max,
  2746. __u8 aifs, __u16 txop)
  2747. {
  2748. struct mwl8k_priv *priv = hw->priv;
  2749. struct mwl8k_cmd_set_edca_params *cmd;
  2750. int rc;
  2751. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2752. if (cmd == NULL)
  2753. return -ENOMEM;
  2754. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2755. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2756. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2757. cmd->txop = cpu_to_le16(txop);
  2758. if (priv->ap_fw) {
  2759. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2760. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2761. cmd->ap.aifs = aifs;
  2762. cmd->ap.txq = qnum;
  2763. } else {
  2764. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2765. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2766. cmd->sta.aifs = aifs;
  2767. cmd->sta.txq = qnum;
  2768. }
  2769. rc = mwl8k_post_cmd(hw, &cmd->header);
  2770. kfree(cmd);
  2771. return rc;
  2772. }
  2773. /*
  2774. * CMD_SET_WMM_MODE.
  2775. */
  2776. struct mwl8k_cmd_set_wmm_mode {
  2777. struct mwl8k_cmd_pkt header;
  2778. __le16 action;
  2779. } __packed;
  2780. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2781. {
  2782. struct mwl8k_priv *priv = hw->priv;
  2783. struct mwl8k_cmd_set_wmm_mode *cmd;
  2784. int rc;
  2785. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2786. if (cmd == NULL)
  2787. return -ENOMEM;
  2788. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2789. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2790. cmd->action = cpu_to_le16(!!enable);
  2791. rc = mwl8k_post_cmd(hw, &cmd->header);
  2792. kfree(cmd);
  2793. if (!rc)
  2794. priv->wmm_enabled = enable;
  2795. return rc;
  2796. }
  2797. /*
  2798. * CMD_MIMO_CONFIG.
  2799. */
  2800. struct mwl8k_cmd_mimo_config {
  2801. struct mwl8k_cmd_pkt header;
  2802. __le32 action;
  2803. __u8 rx_antenna_map;
  2804. __u8 tx_antenna_map;
  2805. } __packed;
  2806. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2807. {
  2808. struct mwl8k_cmd_mimo_config *cmd;
  2809. int rc;
  2810. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2811. if (cmd == NULL)
  2812. return -ENOMEM;
  2813. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2814. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2815. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2816. cmd->rx_antenna_map = rx;
  2817. cmd->tx_antenna_map = tx;
  2818. rc = mwl8k_post_cmd(hw, &cmd->header);
  2819. kfree(cmd);
  2820. return rc;
  2821. }
  2822. /*
  2823. * CMD_USE_FIXED_RATE (STA version).
  2824. */
  2825. struct mwl8k_cmd_use_fixed_rate_sta {
  2826. struct mwl8k_cmd_pkt header;
  2827. __le32 action;
  2828. __le32 allow_rate_drop;
  2829. __le32 num_rates;
  2830. struct {
  2831. __le32 is_ht_rate;
  2832. __le32 enable_retry;
  2833. __le32 rate;
  2834. __le32 retry_count;
  2835. } rate_entry[8];
  2836. __le32 rate_type;
  2837. __le32 reserved1;
  2838. __le32 reserved2;
  2839. } __packed;
  2840. #define MWL8K_USE_AUTO_RATE 0x0002
  2841. #define MWL8K_UCAST_RATE 0
  2842. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2843. {
  2844. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2845. int rc;
  2846. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2847. if (cmd == NULL)
  2848. return -ENOMEM;
  2849. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2850. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2851. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2852. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2853. rc = mwl8k_post_cmd(hw, &cmd->header);
  2854. kfree(cmd);
  2855. return rc;
  2856. }
  2857. /*
  2858. * CMD_USE_FIXED_RATE (AP version).
  2859. */
  2860. struct mwl8k_cmd_use_fixed_rate_ap {
  2861. struct mwl8k_cmd_pkt header;
  2862. __le32 action;
  2863. __le32 allow_rate_drop;
  2864. __le32 num_rates;
  2865. struct mwl8k_rate_entry_ap {
  2866. __le32 is_ht_rate;
  2867. __le32 enable_retry;
  2868. __le32 rate;
  2869. __le32 retry_count;
  2870. } rate_entry[4];
  2871. u8 multicast_rate;
  2872. u8 multicast_rate_type;
  2873. u8 management_rate;
  2874. } __packed;
  2875. static int
  2876. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2877. {
  2878. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2879. int rc;
  2880. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2881. if (cmd == NULL)
  2882. return -ENOMEM;
  2883. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2884. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2885. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2886. cmd->multicast_rate = mcast;
  2887. cmd->management_rate = mgmt;
  2888. rc = mwl8k_post_cmd(hw, &cmd->header);
  2889. kfree(cmd);
  2890. return rc;
  2891. }
  2892. /*
  2893. * CMD_ENABLE_SNIFFER.
  2894. */
  2895. struct mwl8k_cmd_enable_sniffer {
  2896. struct mwl8k_cmd_pkt header;
  2897. __le32 action;
  2898. } __packed;
  2899. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2900. {
  2901. struct mwl8k_cmd_enable_sniffer *cmd;
  2902. int rc;
  2903. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2904. if (cmd == NULL)
  2905. return -ENOMEM;
  2906. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2907. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2908. cmd->action = cpu_to_le32(!!enable);
  2909. rc = mwl8k_post_cmd(hw, &cmd->header);
  2910. kfree(cmd);
  2911. return rc;
  2912. }
  2913. struct mwl8k_cmd_update_mac_addr {
  2914. struct mwl8k_cmd_pkt header;
  2915. union {
  2916. struct {
  2917. __le16 mac_type;
  2918. __u8 mac_addr[ETH_ALEN];
  2919. } mbss;
  2920. __u8 mac_addr[ETH_ALEN];
  2921. };
  2922. } __packed;
  2923. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2924. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  2925. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2926. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  2927. static int mwl8k_cmd_update_mac_addr(struct ieee80211_hw *hw,
  2928. struct ieee80211_vif *vif, u8 *mac, bool set)
  2929. {
  2930. struct mwl8k_priv *priv = hw->priv;
  2931. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2932. struct mwl8k_cmd_update_mac_addr *cmd;
  2933. int mac_type;
  2934. int rc;
  2935. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2936. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  2937. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  2938. if (priv->ap_fw)
  2939. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2940. else
  2941. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  2942. else
  2943. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2944. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  2945. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  2946. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2947. else
  2948. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  2949. }
  2950. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2951. if (cmd == NULL)
  2952. return -ENOMEM;
  2953. if (set)
  2954. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2955. else
  2956. cmd->header.code = cpu_to_le16(MWL8K_CMD_DEL_MAC_ADDR);
  2957. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2958. if (priv->ap_fw) {
  2959. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  2960. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2961. } else {
  2962. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2963. }
  2964. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2965. kfree(cmd);
  2966. return rc;
  2967. }
  2968. /*
  2969. * MWL8K_CMD_SET_MAC_ADDR.
  2970. */
  2971. static inline int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2972. struct ieee80211_vif *vif, u8 *mac)
  2973. {
  2974. return mwl8k_cmd_update_mac_addr(hw, vif, mac, true);
  2975. }
  2976. /*
  2977. * MWL8K_CMD_DEL_MAC_ADDR.
  2978. */
  2979. static inline int mwl8k_cmd_del_mac_addr(struct ieee80211_hw *hw,
  2980. struct ieee80211_vif *vif, u8 *mac)
  2981. {
  2982. return mwl8k_cmd_update_mac_addr(hw, vif, mac, false);
  2983. }
  2984. /*
  2985. * CMD_SET_RATEADAPT_MODE.
  2986. */
  2987. struct mwl8k_cmd_set_rate_adapt_mode {
  2988. struct mwl8k_cmd_pkt header;
  2989. __le16 action;
  2990. __le16 mode;
  2991. } __packed;
  2992. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2993. {
  2994. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2995. int rc;
  2996. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2997. if (cmd == NULL)
  2998. return -ENOMEM;
  2999. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  3000. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3001. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  3002. cmd->mode = cpu_to_le16(mode);
  3003. rc = mwl8k_post_cmd(hw, &cmd->header);
  3004. kfree(cmd);
  3005. return rc;
  3006. }
  3007. /*
  3008. * CMD_GET_WATCHDOG_BITMAP.
  3009. */
  3010. struct mwl8k_cmd_get_watchdog_bitmap {
  3011. struct mwl8k_cmd_pkt header;
  3012. u8 bitmap;
  3013. } __packed;
  3014. static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
  3015. {
  3016. struct mwl8k_cmd_get_watchdog_bitmap *cmd;
  3017. int rc;
  3018. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3019. if (cmd == NULL)
  3020. return -ENOMEM;
  3021. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
  3022. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3023. rc = mwl8k_post_cmd(hw, &cmd->header);
  3024. if (!rc)
  3025. *bitmap = cmd->bitmap;
  3026. kfree(cmd);
  3027. return rc;
  3028. }
  3029. #define MWL8K_WMM_QUEUE_NUMBER 3
  3030. static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
  3031. u8 idx);
  3032. static void mwl8k_watchdog_ba_events(struct work_struct *work)
  3033. {
  3034. int rc;
  3035. u8 bitmap = 0, stream_index;
  3036. struct mwl8k_ampdu_stream *streams;
  3037. struct mwl8k_priv *priv =
  3038. container_of(work, struct mwl8k_priv, watchdog_ba_handle);
  3039. struct ieee80211_hw *hw = priv->hw;
  3040. int i;
  3041. u32 status = 0;
  3042. mwl8k_fw_lock(hw);
  3043. rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
  3044. if (rc)
  3045. goto done;
  3046. spin_lock(&priv->stream_lock);
  3047. /* the bitmap is the hw queue number. Map it to the ampdu queue. */
  3048. for (i = 0; i < TOTAL_HW_TX_QUEUES; i++) {
  3049. if (bitmap & (1 << i)) {
  3050. stream_index = (i + MWL8K_WMM_QUEUE_NUMBER) %
  3051. TOTAL_HW_TX_QUEUES;
  3052. streams = &priv->ampdu[stream_index];
  3053. if (streams->state == AMPDU_STREAM_ACTIVE) {
  3054. ieee80211_stop_tx_ba_session(streams->sta,
  3055. streams->tid);
  3056. spin_unlock(&priv->stream_lock);
  3057. mwl8k_destroy_ba(hw, stream_index);
  3058. spin_lock(&priv->stream_lock);
  3059. }
  3060. }
  3061. }
  3062. spin_unlock(&priv->stream_lock);
  3063. done:
  3064. atomic_dec(&priv->watchdog_event_pending);
  3065. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3066. iowrite32((status | MWL8K_A2H_INT_BA_WATCHDOG),
  3067. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3068. mwl8k_fw_unlock(hw);
  3069. return;
  3070. }
  3071. /*
  3072. * CMD_BSS_START.
  3073. */
  3074. struct mwl8k_cmd_bss_start {
  3075. struct mwl8k_cmd_pkt header;
  3076. __le32 enable;
  3077. } __packed;
  3078. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  3079. struct ieee80211_vif *vif, int enable)
  3080. {
  3081. struct mwl8k_cmd_bss_start *cmd;
  3082. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3083. struct mwl8k_priv *priv = hw->priv;
  3084. int rc;
  3085. if (enable && (priv->running_bsses & (1 << mwl8k_vif->macid)))
  3086. return 0;
  3087. if (!enable && !(priv->running_bsses & (1 << mwl8k_vif->macid)))
  3088. return 0;
  3089. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3090. if (cmd == NULL)
  3091. return -ENOMEM;
  3092. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  3093. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3094. cmd->enable = cpu_to_le32(enable);
  3095. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3096. kfree(cmd);
  3097. if (!rc) {
  3098. if (enable)
  3099. priv->running_bsses |= (1 << mwl8k_vif->macid);
  3100. else
  3101. priv->running_bsses &= ~(1 << mwl8k_vif->macid);
  3102. }
  3103. return rc;
  3104. }
  3105. static void mwl8k_enable_bsses(struct ieee80211_hw *hw, bool enable, u32 bitmap)
  3106. {
  3107. struct mwl8k_priv *priv = hw->priv;
  3108. struct mwl8k_vif *mwl8k_vif, *tmp_vif;
  3109. struct ieee80211_vif *vif;
  3110. list_for_each_entry_safe(mwl8k_vif, tmp_vif, &priv->vif_list, list) {
  3111. vif = mwl8k_vif->vif;
  3112. if (!(bitmap & (1 << mwl8k_vif->macid)))
  3113. continue;
  3114. if (vif->type == NL80211_IFTYPE_AP)
  3115. mwl8k_cmd_bss_start(hw, vif, enable);
  3116. }
  3117. }
  3118. /*
  3119. * CMD_BASTREAM.
  3120. */
  3121. /*
  3122. * UPSTREAM is tx direction
  3123. */
  3124. #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
  3125. #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
  3126. enum ba_stream_action_type {
  3127. MWL8K_BA_CREATE,
  3128. MWL8K_BA_UPDATE,
  3129. MWL8K_BA_DESTROY,
  3130. MWL8K_BA_FLUSH,
  3131. MWL8K_BA_CHECK,
  3132. };
  3133. struct mwl8k_create_ba_stream {
  3134. __le32 flags;
  3135. __le32 idle_thrs;
  3136. __le32 bar_thrs;
  3137. __le32 window_size;
  3138. u8 peer_mac_addr[6];
  3139. u8 dialog_token;
  3140. u8 tid;
  3141. u8 queue_id;
  3142. u8 param_info;
  3143. __le32 ba_context;
  3144. u8 reset_seq_no_flag;
  3145. __le16 curr_seq_no;
  3146. u8 sta_src_mac_addr[6];
  3147. } __packed;
  3148. struct mwl8k_destroy_ba_stream {
  3149. __le32 flags;
  3150. __le32 ba_context;
  3151. } __packed;
  3152. struct mwl8k_cmd_bastream {
  3153. struct mwl8k_cmd_pkt header;
  3154. __le32 action;
  3155. union {
  3156. struct mwl8k_create_ba_stream create_params;
  3157. struct mwl8k_destroy_ba_stream destroy_params;
  3158. };
  3159. } __packed;
  3160. static int
  3161. mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
  3162. struct ieee80211_vif *vif)
  3163. {
  3164. struct mwl8k_cmd_bastream *cmd;
  3165. int rc;
  3166. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3167. if (cmd == NULL)
  3168. return -ENOMEM;
  3169. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3170. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3171. cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
  3172. cmd->create_params.queue_id = stream->idx;
  3173. memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
  3174. ETH_ALEN);
  3175. cmd->create_params.tid = stream->tid;
  3176. cmd->create_params.flags =
  3177. cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
  3178. cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
  3179. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3180. kfree(cmd);
  3181. return rc;
  3182. }
  3183. static int
  3184. mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
  3185. u8 buf_size, struct ieee80211_vif *vif)
  3186. {
  3187. struct mwl8k_cmd_bastream *cmd;
  3188. int rc;
  3189. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3190. if (cmd == NULL)
  3191. return -ENOMEM;
  3192. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3193. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3194. cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
  3195. cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
  3196. cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
  3197. cmd->create_params.queue_id = stream->idx;
  3198. memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
  3199. cmd->create_params.tid = stream->tid;
  3200. cmd->create_params.curr_seq_no = cpu_to_le16(0);
  3201. cmd->create_params.reset_seq_no_flag = 1;
  3202. cmd->create_params.param_info =
  3203. (stream->sta->ht_cap.ampdu_factor &
  3204. IEEE80211_HT_AMPDU_PARM_FACTOR) |
  3205. ((stream->sta->ht_cap.ampdu_density << 2) &
  3206. IEEE80211_HT_AMPDU_PARM_DENSITY);
  3207. cmd->create_params.flags =
  3208. cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
  3209. BASTREAM_FLAG_DIRECTION_UPSTREAM);
  3210. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3211. wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
  3212. stream->sta->addr, stream->tid);
  3213. kfree(cmd);
  3214. return rc;
  3215. }
  3216. static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
  3217. u8 idx)
  3218. {
  3219. struct mwl8k_cmd_bastream *cmd;
  3220. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3221. if (cmd == NULL)
  3222. return;
  3223. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3224. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3225. cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
  3226. cmd->destroy_params.ba_context = cpu_to_le32(idx);
  3227. mwl8k_post_cmd(hw, &cmd->header);
  3228. wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", idx);
  3229. kfree(cmd);
  3230. }
  3231. /*
  3232. * CMD_SET_NEW_STN.
  3233. */
  3234. struct mwl8k_cmd_set_new_stn {
  3235. struct mwl8k_cmd_pkt header;
  3236. __le16 aid;
  3237. __u8 mac_addr[6];
  3238. __le16 stn_id;
  3239. __le16 action;
  3240. __le16 rsvd;
  3241. __le32 legacy_rates;
  3242. __u8 ht_rates[4];
  3243. __le16 cap_info;
  3244. __le16 ht_capabilities_info;
  3245. __u8 mac_ht_param_info;
  3246. __u8 rev;
  3247. __u8 control_channel;
  3248. __u8 add_channel;
  3249. __le16 op_mode;
  3250. __le16 stbc;
  3251. __u8 add_qos_info;
  3252. __u8 is_qos_sta;
  3253. __le32 fw_sta_ptr;
  3254. } __packed;
  3255. #define MWL8K_STA_ACTION_ADD 0
  3256. #define MWL8K_STA_ACTION_REMOVE 2
  3257. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  3258. struct ieee80211_vif *vif,
  3259. struct ieee80211_sta *sta)
  3260. {
  3261. struct mwl8k_cmd_set_new_stn *cmd;
  3262. u32 rates;
  3263. int rc;
  3264. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3265. if (cmd == NULL)
  3266. return -ENOMEM;
  3267. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3268. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3269. cmd->aid = cpu_to_le16(sta->aid);
  3270. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  3271. cmd->stn_id = cpu_to_le16(sta->aid);
  3272. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  3273. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  3274. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  3275. else
  3276. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  3277. cmd->legacy_rates = cpu_to_le32(rates);
  3278. if (sta->ht_cap.ht_supported) {
  3279. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  3280. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  3281. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  3282. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  3283. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  3284. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  3285. ((sta->ht_cap.ampdu_density & 7) << 2);
  3286. cmd->is_qos_sta = 1;
  3287. }
  3288. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3289. kfree(cmd);
  3290. return rc;
  3291. }
  3292. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  3293. struct ieee80211_vif *vif)
  3294. {
  3295. struct mwl8k_cmd_set_new_stn *cmd;
  3296. int rc;
  3297. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3298. if (cmd == NULL)
  3299. return -ENOMEM;
  3300. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3301. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3302. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  3303. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3304. kfree(cmd);
  3305. return rc;
  3306. }
  3307. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  3308. struct ieee80211_vif *vif, u8 *addr)
  3309. {
  3310. struct mwl8k_cmd_set_new_stn *cmd;
  3311. struct mwl8k_priv *priv = hw->priv;
  3312. int rc, i;
  3313. u8 idx;
  3314. spin_lock(&priv->stream_lock);
  3315. /* Destroy any active ampdu streams for this sta */
  3316. for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
  3317. struct mwl8k_ampdu_stream *s;
  3318. s = &priv->ampdu[i];
  3319. if (s->state != AMPDU_NO_STREAM) {
  3320. if (memcmp(s->sta->addr, addr, ETH_ALEN) == 0) {
  3321. if (s->state == AMPDU_STREAM_ACTIVE) {
  3322. idx = s->idx;
  3323. spin_unlock(&priv->stream_lock);
  3324. mwl8k_destroy_ba(hw, idx);
  3325. spin_lock(&priv->stream_lock);
  3326. } else if (s->state == AMPDU_STREAM_NEW) {
  3327. mwl8k_remove_stream(hw, s);
  3328. }
  3329. }
  3330. }
  3331. }
  3332. spin_unlock(&priv->stream_lock);
  3333. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3334. if (cmd == NULL)
  3335. return -ENOMEM;
  3336. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3337. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3338. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3339. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  3340. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3341. kfree(cmd);
  3342. return rc;
  3343. }
  3344. /*
  3345. * CMD_UPDATE_ENCRYPTION.
  3346. */
  3347. #define MAX_ENCR_KEY_LENGTH 16
  3348. #define MIC_KEY_LENGTH 8
  3349. struct mwl8k_cmd_update_encryption {
  3350. struct mwl8k_cmd_pkt header;
  3351. __le32 action;
  3352. __le32 reserved;
  3353. __u8 mac_addr[6];
  3354. __u8 encr_type;
  3355. } __packed;
  3356. struct mwl8k_cmd_set_key {
  3357. struct mwl8k_cmd_pkt header;
  3358. __le32 action;
  3359. __le32 reserved;
  3360. __le16 length;
  3361. __le16 key_type_id;
  3362. __le32 key_info;
  3363. __le32 key_id;
  3364. __le16 key_len;
  3365. __u8 key_material[MAX_ENCR_KEY_LENGTH];
  3366. __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
  3367. __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
  3368. __le16 tkip_rsc_low;
  3369. __le32 tkip_rsc_high;
  3370. __le16 tkip_tsc_low;
  3371. __le32 tkip_tsc_high;
  3372. __u8 mac_addr[6];
  3373. } __packed;
  3374. enum {
  3375. MWL8K_ENCR_ENABLE,
  3376. MWL8K_ENCR_SET_KEY,
  3377. MWL8K_ENCR_REMOVE_KEY,
  3378. MWL8K_ENCR_SET_GROUP_KEY,
  3379. };
  3380. #define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
  3381. #define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
  3382. #define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
  3383. #define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
  3384. #define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
  3385. enum {
  3386. MWL8K_ALG_WEP,
  3387. MWL8K_ALG_TKIP,
  3388. MWL8K_ALG_CCMP,
  3389. };
  3390. #define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
  3391. #define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
  3392. #define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
  3393. #define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
  3394. #define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
  3395. static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
  3396. struct ieee80211_vif *vif,
  3397. u8 *addr,
  3398. u8 encr_type)
  3399. {
  3400. struct mwl8k_cmd_update_encryption *cmd;
  3401. int rc;
  3402. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3403. if (cmd == NULL)
  3404. return -ENOMEM;
  3405. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
  3406. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3407. cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
  3408. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3409. cmd->encr_type = encr_type;
  3410. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3411. kfree(cmd);
  3412. return rc;
  3413. }
  3414. static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
  3415. u8 *addr,
  3416. struct ieee80211_key_conf *key)
  3417. {
  3418. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
  3419. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3420. cmd->length = cpu_to_le16(sizeof(*cmd) -
  3421. offsetof(struct mwl8k_cmd_set_key, length));
  3422. cmd->key_id = cpu_to_le32(key->keyidx);
  3423. cmd->key_len = cpu_to_le16(key->keylen);
  3424. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3425. switch (key->cipher) {
  3426. case WLAN_CIPHER_SUITE_WEP40:
  3427. case WLAN_CIPHER_SUITE_WEP104:
  3428. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
  3429. if (key->keyidx == 0)
  3430. cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
  3431. break;
  3432. case WLAN_CIPHER_SUITE_TKIP:
  3433. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
  3434. cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3435. ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
  3436. : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
  3437. cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
  3438. | MWL8K_KEY_FLAG_TSC_VALID);
  3439. break;
  3440. case WLAN_CIPHER_SUITE_CCMP:
  3441. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
  3442. cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3443. ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
  3444. : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
  3445. break;
  3446. default:
  3447. return -ENOTSUPP;
  3448. }
  3449. return 0;
  3450. }
  3451. static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
  3452. struct ieee80211_vif *vif,
  3453. u8 *addr,
  3454. struct ieee80211_key_conf *key)
  3455. {
  3456. struct mwl8k_cmd_set_key *cmd;
  3457. int rc;
  3458. int keymlen;
  3459. u32 action;
  3460. u8 idx;
  3461. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3462. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3463. if (cmd == NULL)
  3464. return -ENOMEM;
  3465. rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
  3466. if (rc < 0)
  3467. goto done;
  3468. idx = key->keyidx;
  3469. if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3470. action = MWL8K_ENCR_SET_KEY;
  3471. else
  3472. action = MWL8K_ENCR_SET_GROUP_KEY;
  3473. switch (key->cipher) {
  3474. case WLAN_CIPHER_SUITE_WEP40:
  3475. case WLAN_CIPHER_SUITE_WEP104:
  3476. if (!mwl8k_vif->wep_key_conf[idx].enabled) {
  3477. memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
  3478. sizeof(*key) + key->keylen);
  3479. mwl8k_vif->wep_key_conf[idx].enabled = 1;
  3480. }
  3481. keymlen = key->keylen;
  3482. action = MWL8K_ENCR_SET_KEY;
  3483. break;
  3484. case WLAN_CIPHER_SUITE_TKIP:
  3485. keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
  3486. break;
  3487. case WLAN_CIPHER_SUITE_CCMP:
  3488. keymlen = key->keylen;
  3489. break;
  3490. default:
  3491. rc = -ENOTSUPP;
  3492. goto done;
  3493. }
  3494. memcpy(cmd->key_material, key->key, keymlen);
  3495. cmd->action = cpu_to_le32(action);
  3496. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3497. done:
  3498. kfree(cmd);
  3499. return rc;
  3500. }
  3501. static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
  3502. struct ieee80211_vif *vif,
  3503. u8 *addr,
  3504. struct ieee80211_key_conf *key)
  3505. {
  3506. struct mwl8k_cmd_set_key *cmd;
  3507. int rc;
  3508. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3509. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3510. if (cmd == NULL)
  3511. return -ENOMEM;
  3512. rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
  3513. if (rc < 0)
  3514. goto done;
  3515. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  3516. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  3517. mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
  3518. cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
  3519. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3520. done:
  3521. kfree(cmd);
  3522. return rc;
  3523. }
  3524. static int mwl8k_set_key(struct ieee80211_hw *hw,
  3525. enum set_key_cmd cmd_param,
  3526. struct ieee80211_vif *vif,
  3527. struct ieee80211_sta *sta,
  3528. struct ieee80211_key_conf *key)
  3529. {
  3530. int rc = 0;
  3531. u8 encr_type;
  3532. u8 *addr;
  3533. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3534. struct mwl8k_priv *priv = hw->priv;
  3535. if (vif->type == NL80211_IFTYPE_STATION && !priv->ap_fw)
  3536. return -EOPNOTSUPP;
  3537. if (sta == NULL)
  3538. addr = vif->addr;
  3539. else
  3540. addr = sta->addr;
  3541. if (cmd_param == SET_KEY) {
  3542. rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
  3543. if (rc)
  3544. goto out;
  3545. if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
  3546. || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
  3547. encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
  3548. else
  3549. encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
  3550. rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
  3551. encr_type);
  3552. if (rc)
  3553. goto out;
  3554. mwl8k_vif->is_hw_crypto_enabled = true;
  3555. } else {
  3556. rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
  3557. if (rc)
  3558. goto out;
  3559. }
  3560. out:
  3561. return rc;
  3562. }
  3563. /*
  3564. * CMD_UPDATE_STADB.
  3565. */
  3566. struct ewc_ht_info {
  3567. __le16 control1;
  3568. __le16 control2;
  3569. __le16 control3;
  3570. } __packed;
  3571. struct peer_capability_info {
  3572. /* Peer type - AP vs. STA. */
  3573. __u8 peer_type;
  3574. /* Basic 802.11 capabilities from assoc resp. */
  3575. __le16 basic_caps;
  3576. /* Set if peer supports 802.11n high throughput (HT). */
  3577. __u8 ht_support;
  3578. /* Valid if HT is supported. */
  3579. __le16 ht_caps;
  3580. __u8 extended_ht_caps;
  3581. struct ewc_ht_info ewc_info;
  3582. /* Legacy rate table. Intersection of our rates and peer rates. */
  3583. __u8 legacy_rates[12];
  3584. /* HT rate table. Intersection of our rates and peer rates. */
  3585. __u8 ht_rates[16];
  3586. __u8 pad[16];
  3587. /* If set, interoperability mode, no proprietary extensions. */
  3588. __u8 interop;
  3589. __u8 pad2;
  3590. __u8 station_id;
  3591. __le16 amsdu_enabled;
  3592. } __packed;
  3593. struct mwl8k_cmd_update_stadb {
  3594. struct mwl8k_cmd_pkt header;
  3595. /* See STADB_ACTION_TYPE */
  3596. __le32 action;
  3597. /* Peer MAC address */
  3598. __u8 peer_addr[ETH_ALEN];
  3599. __le32 reserved;
  3600. /* Peer info - valid during add/update. */
  3601. struct peer_capability_info peer_info;
  3602. } __packed;
  3603. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  3604. #define MWL8K_STA_DB_DEL_ENTRY 2
  3605. /* Peer Entry flags - used to define the type of the peer node */
  3606. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  3607. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  3608. struct ieee80211_vif *vif,
  3609. struct ieee80211_sta *sta)
  3610. {
  3611. struct mwl8k_cmd_update_stadb *cmd;
  3612. struct peer_capability_info *p;
  3613. u32 rates;
  3614. int rc;
  3615. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3616. if (cmd == NULL)
  3617. return -ENOMEM;
  3618. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  3619. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3620. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  3621. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  3622. p = &cmd->peer_info;
  3623. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  3624. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  3625. p->ht_support = sta->ht_cap.ht_supported;
  3626. p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
  3627. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  3628. ((sta->ht_cap.ampdu_density & 7) << 2);
  3629. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  3630. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  3631. else
  3632. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  3633. legacy_rate_mask_to_array(p->legacy_rates, rates);
  3634. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  3635. p->interop = 1;
  3636. p->amsdu_enabled = 0;
  3637. rc = mwl8k_post_cmd(hw, &cmd->header);
  3638. if (!rc)
  3639. rc = p->station_id;
  3640. kfree(cmd);
  3641. return rc;
  3642. }
  3643. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  3644. struct ieee80211_vif *vif, u8 *addr)
  3645. {
  3646. struct mwl8k_cmd_update_stadb *cmd;
  3647. int rc;
  3648. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3649. if (cmd == NULL)
  3650. return -ENOMEM;
  3651. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  3652. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3653. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  3654. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  3655. rc = mwl8k_post_cmd(hw, &cmd->header);
  3656. kfree(cmd);
  3657. return rc;
  3658. }
  3659. /*
  3660. * Interrupt handling.
  3661. */
  3662. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  3663. {
  3664. struct ieee80211_hw *hw = dev_id;
  3665. struct mwl8k_priv *priv = hw->priv;
  3666. u32 status;
  3667. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3668. if (!status)
  3669. return IRQ_NONE;
  3670. if (status & MWL8K_A2H_INT_TX_DONE) {
  3671. status &= ~MWL8K_A2H_INT_TX_DONE;
  3672. tasklet_schedule(&priv->poll_tx_task);
  3673. }
  3674. if (status & MWL8K_A2H_INT_RX_READY) {
  3675. status &= ~MWL8K_A2H_INT_RX_READY;
  3676. tasklet_schedule(&priv->poll_rx_task);
  3677. }
  3678. if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
  3679. iowrite32(~MWL8K_A2H_INT_BA_WATCHDOG,
  3680. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3681. atomic_inc(&priv->watchdog_event_pending);
  3682. status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
  3683. ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
  3684. }
  3685. if (status)
  3686. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3687. if (status & MWL8K_A2H_INT_OPC_DONE) {
  3688. if (priv->hostcmd_wait != NULL)
  3689. complete(priv->hostcmd_wait);
  3690. }
  3691. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  3692. if (!mutex_is_locked(&priv->fw_mutex) &&
  3693. priv->radio_on && priv->pending_tx_pkts)
  3694. mwl8k_tx_start(priv);
  3695. }
  3696. return IRQ_HANDLED;
  3697. }
  3698. static void mwl8k_tx_poll(unsigned long data)
  3699. {
  3700. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  3701. struct mwl8k_priv *priv = hw->priv;
  3702. int limit;
  3703. int i;
  3704. limit = 32;
  3705. spin_lock_bh(&priv->tx_lock);
  3706. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  3707. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  3708. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  3709. complete(priv->tx_wait);
  3710. priv->tx_wait = NULL;
  3711. }
  3712. spin_unlock_bh(&priv->tx_lock);
  3713. if (limit) {
  3714. writel(~MWL8K_A2H_INT_TX_DONE,
  3715. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3716. } else {
  3717. tasklet_schedule(&priv->poll_tx_task);
  3718. }
  3719. }
  3720. static void mwl8k_rx_poll(unsigned long data)
  3721. {
  3722. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  3723. struct mwl8k_priv *priv = hw->priv;
  3724. int limit;
  3725. limit = 32;
  3726. limit -= rxq_process(hw, 0, limit);
  3727. limit -= rxq_refill(hw, 0, limit);
  3728. if (limit) {
  3729. writel(~MWL8K_A2H_INT_RX_READY,
  3730. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3731. } else {
  3732. tasklet_schedule(&priv->poll_rx_task);
  3733. }
  3734. }
  3735. /*
  3736. * Core driver operations.
  3737. */
  3738. static void mwl8k_tx(struct ieee80211_hw *hw,
  3739. struct ieee80211_tx_control *control,
  3740. struct sk_buff *skb)
  3741. {
  3742. struct mwl8k_priv *priv = hw->priv;
  3743. int index = skb_get_queue_mapping(skb);
  3744. if (!priv->radio_on) {
  3745. wiphy_debug(hw->wiphy,
  3746. "dropped TX frame since radio disabled\n");
  3747. dev_kfree_skb(skb);
  3748. return;
  3749. }
  3750. mwl8k_txq_xmit(hw, index, control->sta, skb);
  3751. }
  3752. static int mwl8k_start(struct ieee80211_hw *hw)
  3753. {
  3754. struct mwl8k_priv *priv = hw->priv;
  3755. int rc;
  3756. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3757. IRQF_SHARED, MWL8K_NAME, hw);
  3758. if (rc) {
  3759. priv->irq = -1;
  3760. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  3761. return -EIO;
  3762. }
  3763. priv->irq = priv->pdev->irq;
  3764. /* Enable TX reclaim and RX tasklets. */
  3765. tasklet_enable(&priv->poll_tx_task);
  3766. tasklet_enable(&priv->poll_rx_task);
  3767. /* Enable interrupts */
  3768. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3769. iowrite32(MWL8K_A2H_EVENTS,
  3770. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3771. rc = mwl8k_fw_lock(hw);
  3772. if (!rc) {
  3773. rc = mwl8k_cmd_radio_enable(hw);
  3774. if (!priv->ap_fw) {
  3775. if (!rc)
  3776. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  3777. if (!rc)
  3778. rc = mwl8k_cmd_set_pre_scan(hw);
  3779. if (!rc)
  3780. rc = mwl8k_cmd_set_post_scan(hw,
  3781. "\x00\x00\x00\x00\x00\x00");
  3782. }
  3783. if (!rc)
  3784. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  3785. if (!rc)
  3786. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  3787. mwl8k_fw_unlock(hw);
  3788. }
  3789. if (rc) {
  3790. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3791. free_irq(priv->pdev->irq, hw);
  3792. priv->irq = -1;
  3793. tasklet_disable(&priv->poll_tx_task);
  3794. tasklet_disable(&priv->poll_rx_task);
  3795. } else {
  3796. ieee80211_wake_queues(hw);
  3797. }
  3798. return rc;
  3799. }
  3800. static void mwl8k_stop(struct ieee80211_hw *hw)
  3801. {
  3802. struct mwl8k_priv *priv = hw->priv;
  3803. int i;
  3804. if (!priv->hw_restart_in_progress)
  3805. mwl8k_cmd_radio_disable(hw);
  3806. ieee80211_stop_queues(hw);
  3807. /* Disable interrupts */
  3808. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3809. if (priv->irq != -1) {
  3810. free_irq(priv->pdev->irq, hw);
  3811. priv->irq = -1;
  3812. }
  3813. /* Stop finalize join worker */
  3814. cancel_work_sync(&priv->finalize_join_worker);
  3815. cancel_work_sync(&priv->watchdog_ba_handle);
  3816. if (priv->beacon_skb != NULL)
  3817. dev_kfree_skb(priv->beacon_skb);
  3818. /* Stop TX reclaim and RX tasklets. */
  3819. tasklet_disable(&priv->poll_tx_task);
  3820. tasklet_disable(&priv->poll_rx_task);
  3821. /* Return all skbs to mac80211 */
  3822. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  3823. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3824. }
  3825. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
  3826. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  3827. struct ieee80211_vif *vif)
  3828. {
  3829. struct mwl8k_priv *priv = hw->priv;
  3830. struct mwl8k_vif *mwl8k_vif;
  3831. u32 macids_supported;
  3832. int macid, rc;
  3833. struct mwl8k_device_info *di;
  3834. /*
  3835. * Reject interface creation if sniffer mode is active, as
  3836. * STA operation is mutually exclusive with hardware sniffer
  3837. * mode. (Sniffer mode is only used on STA firmware.)
  3838. */
  3839. if (priv->sniffer_enabled) {
  3840. wiphy_info(hw->wiphy,
  3841. "unable to create STA interface because sniffer mode is enabled\n");
  3842. return -EINVAL;
  3843. }
  3844. di = priv->device_info;
  3845. switch (vif->type) {
  3846. case NL80211_IFTYPE_AP:
  3847. if (!priv->ap_fw && di->fw_image_ap) {
  3848. /* we must load the ap fw to meet this request */
  3849. if (!list_empty(&priv->vif_list))
  3850. return -EBUSY;
  3851. rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
  3852. if (rc)
  3853. return rc;
  3854. }
  3855. macids_supported = priv->ap_macids_supported;
  3856. break;
  3857. case NL80211_IFTYPE_STATION:
  3858. if (priv->ap_fw && di->fw_image_sta) {
  3859. if (!list_empty(&priv->vif_list)) {
  3860. wiphy_warn(hw->wiphy, "AP interface is running.\n"
  3861. "Adding STA interface for WDS");
  3862. } else {
  3863. /* we must load the sta fw to
  3864. * meet this request.
  3865. */
  3866. rc = mwl8k_reload_firmware(hw,
  3867. di->fw_image_sta);
  3868. if (rc)
  3869. return rc;
  3870. }
  3871. }
  3872. macids_supported = priv->sta_macids_supported;
  3873. break;
  3874. default:
  3875. return -EINVAL;
  3876. }
  3877. macid = ffs(macids_supported & ~priv->macids_used);
  3878. if (!macid--)
  3879. return -EBUSY;
  3880. /* Setup driver private area. */
  3881. mwl8k_vif = MWL8K_VIF(vif);
  3882. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  3883. mwl8k_vif->vif = vif;
  3884. mwl8k_vif->macid = macid;
  3885. mwl8k_vif->seqno = 0;
  3886. memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
  3887. mwl8k_vif->is_hw_crypto_enabled = false;
  3888. /* Set the mac address. */
  3889. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  3890. if (vif->type == NL80211_IFTYPE_AP)
  3891. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  3892. priv->macids_used |= 1 << mwl8k_vif->macid;
  3893. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  3894. return 0;
  3895. }
  3896. static void mwl8k_remove_vif(struct mwl8k_priv *priv, struct mwl8k_vif *vif)
  3897. {
  3898. /* Has ieee80211_restart_hw re-added the removed interfaces? */
  3899. if (!priv->macids_used)
  3900. return;
  3901. priv->macids_used &= ~(1 << vif->macid);
  3902. list_del(&vif->list);
  3903. }
  3904. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  3905. struct ieee80211_vif *vif)
  3906. {
  3907. struct mwl8k_priv *priv = hw->priv;
  3908. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3909. if (vif->type == NL80211_IFTYPE_AP)
  3910. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  3911. mwl8k_cmd_del_mac_addr(hw, vif, vif->addr);
  3912. mwl8k_remove_vif(priv, mwl8k_vif);
  3913. }
  3914. static void mwl8k_hw_restart_work(struct work_struct *work)
  3915. {
  3916. struct mwl8k_priv *priv =
  3917. container_of(work, struct mwl8k_priv, fw_reload);
  3918. struct ieee80211_hw *hw = priv->hw;
  3919. struct mwl8k_device_info *di;
  3920. int rc;
  3921. /* If some command is waiting for a response, clear it */
  3922. if (priv->hostcmd_wait != NULL) {
  3923. complete(priv->hostcmd_wait);
  3924. priv->hostcmd_wait = NULL;
  3925. }
  3926. priv->hw_restart_owner = current;
  3927. di = priv->device_info;
  3928. mwl8k_fw_lock(hw);
  3929. if (priv->ap_fw)
  3930. rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
  3931. else
  3932. rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
  3933. if (rc)
  3934. goto fail;
  3935. priv->hw_restart_owner = NULL;
  3936. priv->hw_restart_in_progress = false;
  3937. /*
  3938. * This unlock will wake up the queues and
  3939. * also opens the command path for other
  3940. * commands
  3941. */
  3942. mwl8k_fw_unlock(hw);
  3943. ieee80211_restart_hw(hw);
  3944. wiphy_err(hw->wiphy, "Firmware restarted successfully\n");
  3945. return;
  3946. fail:
  3947. mwl8k_fw_unlock(hw);
  3948. wiphy_err(hw->wiphy, "Firmware restart failed\n");
  3949. }
  3950. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  3951. {
  3952. struct ieee80211_conf *conf = &hw->conf;
  3953. struct mwl8k_priv *priv = hw->priv;
  3954. int rc;
  3955. if (conf->flags & IEEE80211_CONF_IDLE) {
  3956. mwl8k_cmd_radio_disable(hw);
  3957. return 0;
  3958. }
  3959. rc = mwl8k_fw_lock(hw);
  3960. if (rc)
  3961. return rc;
  3962. rc = mwl8k_cmd_radio_enable(hw);
  3963. if (rc)
  3964. goto out;
  3965. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  3966. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  3967. if (rc)
  3968. goto out;
  3969. }
  3970. if (conf->power_level > 18)
  3971. conf->power_level = 18;
  3972. if (priv->ap_fw) {
  3973. if (conf->flags & IEEE80211_CONF_CHANGE_POWER) {
  3974. rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
  3975. if (rc)
  3976. goto out;
  3977. }
  3978. } else {
  3979. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  3980. if (rc)
  3981. goto out;
  3982. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  3983. }
  3984. out:
  3985. mwl8k_fw_unlock(hw);
  3986. return rc;
  3987. }
  3988. static void
  3989. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3990. struct ieee80211_bss_conf *info, u32 changed)
  3991. {
  3992. struct mwl8k_priv *priv = hw->priv;
  3993. u32 ap_legacy_rates = 0;
  3994. u8 ap_mcs_rates[16];
  3995. int rc;
  3996. if (mwl8k_fw_lock(hw))
  3997. return;
  3998. /*
  3999. * No need to capture a beacon if we're no longer associated.
  4000. */
  4001. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  4002. priv->capture_beacon = false;
  4003. /*
  4004. * Get the AP's legacy and MCS rates.
  4005. */
  4006. if (vif->bss_conf.assoc) {
  4007. struct ieee80211_sta *ap;
  4008. rcu_read_lock();
  4009. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  4010. if (ap == NULL) {
  4011. rcu_read_unlock();
  4012. goto out;
  4013. }
  4014. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  4015. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  4016. } else {
  4017. ap_legacy_rates =
  4018. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  4019. }
  4020. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  4021. rcu_read_unlock();
  4022. }
  4023. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc &&
  4024. !priv->ap_fw) {
  4025. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  4026. if (rc)
  4027. goto out;
  4028. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  4029. if (rc)
  4030. goto out;
  4031. } else {
  4032. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc &&
  4033. priv->ap_fw) {
  4034. int idx;
  4035. int rate;
  4036. /* Use AP firmware specific rate command.
  4037. */
  4038. idx = ffs(vif->bss_conf.basic_rates);
  4039. if (idx)
  4040. idx--;
  4041. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  4042. rate = mwl8k_rates_24[idx].hw_value;
  4043. else
  4044. rate = mwl8k_rates_50[idx].hw_value;
  4045. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  4046. }
  4047. }
  4048. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  4049. rc = mwl8k_set_radio_preamble(hw,
  4050. vif->bss_conf.use_short_preamble);
  4051. if (rc)
  4052. goto out;
  4053. }
  4054. if ((changed & BSS_CHANGED_ERP_SLOT) && !priv->ap_fw) {
  4055. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  4056. if (rc)
  4057. goto out;
  4058. }
  4059. if (vif->bss_conf.assoc && !priv->ap_fw &&
  4060. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  4061. BSS_CHANGED_HT))) {
  4062. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  4063. if (rc)
  4064. goto out;
  4065. }
  4066. if (vif->bss_conf.assoc &&
  4067. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  4068. /*
  4069. * Finalize the join. Tell rx handler to process
  4070. * next beacon from our BSSID.
  4071. */
  4072. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  4073. priv->capture_beacon = true;
  4074. }
  4075. out:
  4076. mwl8k_fw_unlock(hw);
  4077. }
  4078. static void
  4079. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4080. struct ieee80211_bss_conf *info, u32 changed)
  4081. {
  4082. int rc;
  4083. if (mwl8k_fw_lock(hw))
  4084. return;
  4085. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  4086. rc = mwl8k_set_radio_preamble(hw,
  4087. vif->bss_conf.use_short_preamble);
  4088. if (rc)
  4089. goto out;
  4090. }
  4091. if (changed & BSS_CHANGED_BASIC_RATES) {
  4092. int idx;
  4093. int rate;
  4094. /*
  4095. * Use lowest supported basic rate for multicasts
  4096. * and management frames (such as probe responses --
  4097. * beacons will always go out at 1 Mb/s).
  4098. */
  4099. idx = ffs(vif->bss_conf.basic_rates);
  4100. if (idx)
  4101. idx--;
  4102. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  4103. rate = mwl8k_rates_24[idx].hw_value;
  4104. else
  4105. rate = mwl8k_rates_50[idx].hw_value;
  4106. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  4107. }
  4108. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  4109. struct sk_buff *skb;
  4110. skb = ieee80211_beacon_get(hw, vif);
  4111. if (skb != NULL) {
  4112. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  4113. kfree_skb(skb);
  4114. }
  4115. }
  4116. if (changed & BSS_CHANGED_BEACON_ENABLED)
  4117. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  4118. out:
  4119. mwl8k_fw_unlock(hw);
  4120. }
  4121. static void
  4122. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4123. struct ieee80211_bss_conf *info, u32 changed)
  4124. {
  4125. if (vif->type == NL80211_IFTYPE_STATION)
  4126. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  4127. if (vif->type == NL80211_IFTYPE_AP)
  4128. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  4129. }
  4130. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  4131. struct netdev_hw_addr_list *mc_list)
  4132. {
  4133. struct mwl8k_cmd_pkt *cmd;
  4134. /*
  4135. * Synthesize and return a command packet that programs the
  4136. * hardware multicast address filter. At this point we don't
  4137. * know whether FIF_ALLMULTI is being requested, but if it is,
  4138. * we'll end up throwing this packet away and creating a new
  4139. * one in mwl8k_configure_filter().
  4140. */
  4141. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
  4142. return (unsigned long)cmd;
  4143. }
  4144. static int
  4145. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  4146. unsigned int changed_flags,
  4147. unsigned int *total_flags)
  4148. {
  4149. struct mwl8k_priv *priv = hw->priv;
  4150. /*
  4151. * Hardware sniffer mode is mutually exclusive with STA
  4152. * operation, so refuse to enable sniffer mode if a STA
  4153. * interface is active.
  4154. */
  4155. if (!list_empty(&priv->vif_list)) {
  4156. if (net_ratelimit())
  4157. wiphy_info(hw->wiphy,
  4158. "not enabling sniffer mode because STA interface is active\n");
  4159. return 0;
  4160. }
  4161. if (!priv->sniffer_enabled) {
  4162. if (mwl8k_cmd_enable_sniffer(hw, 1))
  4163. return 0;
  4164. priv->sniffer_enabled = true;
  4165. }
  4166. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  4167. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  4168. FIF_OTHER_BSS;
  4169. return 1;
  4170. }
  4171. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  4172. {
  4173. if (!list_empty(&priv->vif_list))
  4174. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  4175. return NULL;
  4176. }
  4177. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  4178. unsigned int changed_flags,
  4179. unsigned int *total_flags,
  4180. u64 multicast)
  4181. {
  4182. struct mwl8k_priv *priv = hw->priv;
  4183. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  4184. /*
  4185. * AP firmware doesn't allow fine-grained control over
  4186. * the receive filter.
  4187. */
  4188. if (priv->ap_fw) {
  4189. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  4190. kfree(cmd);
  4191. return;
  4192. }
  4193. /*
  4194. * Enable hardware sniffer mode if FIF_CONTROL or
  4195. * FIF_OTHER_BSS is requested.
  4196. */
  4197. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  4198. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  4199. kfree(cmd);
  4200. return;
  4201. }
  4202. /* Clear unsupported feature flags */
  4203. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  4204. if (mwl8k_fw_lock(hw)) {
  4205. kfree(cmd);
  4206. return;
  4207. }
  4208. if (priv->sniffer_enabled) {
  4209. mwl8k_cmd_enable_sniffer(hw, 0);
  4210. priv->sniffer_enabled = false;
  4211. }
  4212. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  4213. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  4214. /*
  4215. * Disable the BSS filter.
  4216. */
  4217. mwl8k_cmd_set_pre_scan(hw);
  4218. } else {
  4219. struct mwl8k_vif *mwl8k_vif;
  4220. const u8 *bssid;
  4221. /*
  4222. * Enable the BSS filter.
  4223. *
  4224. * If there is an active STA interface, use that
  4225. * interface's BSSID, otherwise use a dummy one
  4226. * (where the OUI part needs to be nonzero for
  4227. * the BSSID to be accepted by POST_SCAN).
  4228. */
  4229. mwl8k_vif = mwl8k_first_vif(priv);
  4230. if (mwl8k_vif != NULL)
  4231. bssid = mwl8k_vif->vif->bss_conf.bssid;
  4232. else
  4233. bssid = "\x01\x00\x00\x00\x00\x00";
  4234. mwl8k_cmd_set_post_scan(hw, bssid);
  4235. }
  4236. }
  4237. /*
  4238. * If FIF_ALLMULTI is being requested, throw away the command
  4239. * packet that ->prepare_multicast() built and replace it with
  4240. * a command packet that enables reception of all multicast
  4241. * packets.
  4242. */
  4243. if (*total_flags & FIF_ALLMULTI) {
  4244. kfree(cmd);
  4245. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
  4246. }
  4247. if (cmd != NULL) {
  4248. mwl8k_post_cmd(hw, cmd);
  4249. kfree(cmd);
  4250. }
  4251. mwl8k_fw_unlock(hw);
  4252. }
  4253. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  4254. {
  4255. return mwl8k_cmd_set_rts_threshold(hw, value);
  4256. }
  4257. static int mwl8k_sta_remove(struct ieee80211_hw *hw,
  4258. struct ieee80211_vif *vif,
  4259. struct ieee80211_sta *sta)
  4260. {
  4261. struct mwl8k_priv *priv = hw->priv;
  4262. if (priv->ap_fw)
  4263. return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
  4264. else
  4265. return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
  4266. }
  4267. static int mwl8k_sta_add(struct ieee80211_hw *hw,
  4268. struct ieee80211_vif *vif,
  4269. struct ieee80211_sta *sta)
  4270. {
  4271. struct mwl8k_priv *priv = hw->priv;
  4272. int ret;
  4273. int i;
  4274. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  4275. struct ieee80211_key_conf *key;
  4276. if (!priv->ap_fw) {
  4277. ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
  4278. if (ret >= 0) {
  4279. MWL8K_STA(sta)->peer_id = ret;
  4280. if (sta->ht_cap.ht_supported)
  4281. MWL8K_STA(sta)->is_ampdu_allowed = true;
  4282. ret = 0;
  4283. }
  4284. } else {
  4285. ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  4286. }
  4287. for (i = 0; i < NUM_WEP_KEYS; i++) {
  4288. key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
  4289. if (mwl8k_vif->wep_key_conf[i].enabled)
  4290. mwl8k_set_key(hw, SET_KEY, vif, sta, key);
  4291. }
  4292. return ret;
  4293. }
  4294. static int mwl8k_conf_tx(struct ieee80211_hw *hw,
  4295. struct ieee80211_vif *vif, u16 queue,
  4296. const struct ieee80211_tx_queue_params *params)
  4297. {
  4298. struct mwl8k_priv *priv = hw->priv;
  4299. int rc;
  4300. rc = mwl8k_fw_lock(hw);
  4301. if (!rc) {
  4302. BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
  4303. memcpy(&priv->wmm_params[queue], params, sizeof(*params));
  4304. if (!priv->wmm_enabled)
  4305. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  4306. if (!rc) {
  4307. int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
  4308. rc = mwl8k_cmd_set_edca_params(hw, q,
  4309. params->cw_min,
  4310. params->cw_max,
  4311. params->aifs,
  4312. params->txop);
  4313. }
  4314. mwl8k_fw_unlock(hw);
  4315. }
  4316. return rc;
  4317. }
  4318. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  4319. struct ieee80211_low_level_stats *stats)
  4320. {
  4321. return mwl8k_cmd_get_stat(hw, stats);
  4322. }
  4323. static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
  4324. struct survey_info *survey)
  4325. {
  4326. struct mwl8k_priv *priv = hw->priv;
  4327. struct ieee80211_conf *conf = &hw->conf;
  4328. if (idx != 0)
  4329. return -ENOENT;
  4330. survey->channel = conf->channel;
  4331. survey->filled = SURVEY_INFO_NOISE_DBM;
  4332. survey->noise = priv->noise;
  4333. return 0;
  4334. }
  4335. #define MAX_AMPDU_ATTEMPTS 5
  4336. static int
  4337. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4338. enum ieee80211_ampdu_mlme_action action,
  4339. struct ieee80211_sta *sta, u16 tid, u16 *ssn,
  4340. u8 buf_size)
  4341. {
  4342. int i, rc = 0;
  4343. struct mwl8k_priv *priv = hw->priv;
  4344. struct mwl8k_ampdu_stream *stream;
  4345. u8 *addr = sta->addr, idx;
  4346. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  4347. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  4348. return -ENOTSUPP;
  4349. spin_lock(&priv->stream_lock);
  4350. stream = mwl8k_lookup_stream(hw, addr, tid);
  4351. switch (action) {
  4352. case IEEE80211_AMPDU_RX_START:
  4353. case IEEE80211_AMPDU_RX_STOP:
  4354. break;
  4355. case IEEE80211_AMPDU_TX_START:
  4356. /* By the time we get here the hw queues may contain outgoing
  4357. * packets for this RA/TID that are not part of this BA
  4358. * session. The hw will assign sequence numbers to these
  4359. * packets as they go out. So if we query the hw for its next
  4360. * sequence number and use that for the SSN here, it may end up
  4361. * being wrong, which will lead to sequence number mismatch at
  4362. * the recipient. To avoid this, we reset the sequence number
  4363. * to O for the first MPDU in this BA stream.
  4364. */
  4365. *ssn = 0;
  4366. if (stream == NULL) {
  4367. /* This means that somebody outside this driver called
  4368. * ieee80211_start_tx_ba_session. This is unexpected
  4369. * because we do our own rate control. Just warn and
  4370. * move on.
  4371. */
  4372. wiphy_warn(hw->wiphy, "Unexpected call to %s. "
  4373. "Proceeding anyway.\n", __func__);
  4374. stream = mwl8k_add_stream(hw, sta, tid);
  4375. }
  4376. if (stream == NULL) {
  4377. wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
  4378. rc = -EBUSY;
  4379. break;
  4380. }
  4381. stream->state = AMPDU_STREAM_IN_PROGRESS;
  4382. /* Release the lock before we do the time consuming stuff */
  4383. spin_unlock(&priv->stream_lock);
  4384. for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
  4385. /* Check if link is still valid */
  4386. if (!sta_info->is_ampdu_allowed) {
  4387. spin_lock(&priv->stream_lock);
  4388. mwl8k_remove_stream(hw, stream);
  4389. spin_unlock(&priv->stream_lock);
  4390. return -EBUSY;
  4391. }
  4392. rc = mwl8k_check_ba(hw, stream, vif);
  4393. /* If HW restart is in progress mwl8k_post_cmd will
  4394. * return -EBUSY. Avoid retrying mwl8k_check_ba in
  4395. * such cases
  4396. */
  4397. if (!rc || rc == -EBUSY)
  4398. break;
  4399. /*
  4400. * HW queues take time to be flushed, give them
  4401. * sufficient time
  4402. */
  4403. msleep(1000);
  4404. }
  4405. spin_lock(&priv->stream_lock);
  4406. if (rc) {
  4407. wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
  4408. " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
  4409. mwl8k_remove_stream(hw, stream);
  4410. rc = -EBUSY;
  4411. break;
  4412. }
  4413. ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
  4414. break;
  4415. case IEEE80211_AMPDU_TX_STOP_CONT:
  4416. case IEEE80211_AMPDU_TX_STOP_FLUSH:
  4417. case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
  4418. if (stream) {
  4419. if (stream->state == AMPDU_STREAM_ACTIVE) {
  4420. idx = stream->idx;
  4421. spin_unlock(&priv->stream_lock);
  4422. mwl8k_destroy_ba(hw, idx);
  4423. spin_lock(&priv->stream_lock);
  4424. }
  4425. mwl8k_remove_stream(hw, stream);
  4426. }
  4427. ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
  4428. break;
  4429. case IEEE80211_AMPDU_TX_OPERATIONAL:
  4430. BUG_ON(stream == NULL);
  4431. BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
  4432. spin_unlock(&priv->stream_lock);
  4433. rc = mwl8k_create_ba(hw, stream, buf_size, vif);
  4434. spin_lock(&priv->stream_lock);
  4435. if (!rc)
  4436. stream->state = AMPDU_STREAM_ACTIVE;
  4437. else {
  4438. idx = stream->idx;
  4439. spin_unlock(&priv->stream_lock);
  4440. mwl8k_destroy_ba(hw, idx);
  4441. spin_lock(&priv->stream_lock);
  4442. wiphy_debug(hw->wiphy,
  4443. "Failed adding stream for sta %pM tid %d\n",
  4444. addr, tid);
  4445. mwl8k_remove_stream(hw, stream);
  4446. }
  4447. break;
  4448. default:
  4449. rc = -ENOTSUPP;
  4450. }
  4451. spin_unlock(&priv->stream_lock);
  4452. return rc;
  4453. }
  4454. static const struct ieee80211_ops mwl8k_ops = {
  4455. .tx = mwl8k_tx,
  4456. .start = mwl8k_start,
  4457. .stop = mwl8k_stop,
  4458. .add_interface = mwl8k_add_interface,
  4459. .remove_interface = mwl8k_remove_interface,
  4460. .config = mwl8k_config,
  4461. .bss_info_changed = mwl8k_bss_info_changed,
  4462. .prepare_multicast = mwl8k_prepare_multicast,
  4463. .configure_filter = mwl8k_configure_filter,
  4464. .set_key = mwl8k_set_key,
  4465. .set_rts_threshold = mwl8k_set_rts_threshold,
  4466. .sta_add = mwl8k_sta_add,
  4467. .sta_remove = mwl8k_sta_remove,
  4468. .conf_tx = mwl8k_conf_tx,
  4469. .get_stats = mwl8k_get_stats,
  4470. .get_survey = mwl8k_get_survey,
  4471. .ampdu_action = mwl8k_ampdu_action,
  4472. };
  4473. static void mwl8k_finalize_join_worker(struct work_struct *work)
  4474. {
  4475. struct mwl8k_priv *priv =
  4476. container_of(work, struct mwl8k_priv, finalize_join_worker);
  4477. struct sk_buff *skb = priv->beacon_skb;
  4478. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  4479. int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  4480. const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
  4481. mgmt->u.beacon.variable, len);
  4482. int dtim_period = 1;
  4483. if (tim && tim[1] >= 2)
  4484. dtim_period = tim[3];
  4485. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
  4486. dev_kfree_skb(skb);
  4487. priv->beacon_skb = NULL;
  4488. }
  4489. enum {
  4490. MWL8363 = 0,
  4491. MWL8687,
  4492. MWL8366,
  4493. };
  4494. #define MWL8K_8366_AP_FW_API 3
  4495. #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
  4496. #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
  4497. static struct mwl8k_device_info mwl8k_info_tbl[] = {
  4498. [MWL8363] = {
  4499. .part_name = "88w8363",
  4500. .helper_image = "mwl8k/helper_8363.fw",
  4501. .fw_image_sta = "mwl8k/fmimage_8363.fw",
  4502. },
  4503. [MWL8687] = {
  4504. .part_name = "88w8687",
  4505. .helper_image = "mwl8k/helper_8687.fw",
  4506. .fw_image_sta = "mwl8k/fmimage_8687.fw",
  4507. },
  4508. [MWL8366] = {
  4509. .part_name = "88w8366",
  4510. .helper_image = "mwl8k/helper_8366.fw",
  4511. .fw_image_sta = "mwl8k/fmimage_8366.fw",
  4512. .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
  4513. .fw_api_ap = MWL8K_8366_AP_FW_API,
  4514. .ap_rxd_ops = &rxd_8366_ap_ops,
  4515. },
  4516. };
  4517. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  4518. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  4519. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  4520. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  4521. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  4522. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  4523. MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
  4524. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  4525. { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
  4526. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  4527. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  4528. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  4529. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  4530. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  4531. { PCI_VDEVICE(MARVELL, 0x2a41), .driver_data = MWL8366, },
  4532. { PCI_VDEVICE(MARVELL, 0x2a42), .driver_data = MWL8366, },
  4533. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  4534. { },
  4535. };
  4536. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  4537. static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
  4538. {
  4539. int rc;
  4540. printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
  4541. "Trying alternative firmware %s\n", pci_name(priv->pdev),
  4542. priv->fw_pref, priv->fw_alt);
  4543. rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
  4544. if (rc) {
  4545. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  4546. pci_name(priv->pdev), priv->fw_alt);
  4547. return rc;
  4548. }
  4549. return 0;
  4550. }
  4551. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
  4552. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
  4553. {
  4554. struct mwl8k_priv *priv = context;
  4555. struct mwl8k_device_info *di = priv->device_info;
  4556. int rc;
  4557. switch (priv->fw_state) {
  4558. case FW_STATE_INIT:
  4559. if (!fw) {
  4560. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  4561. pci_name(priv->pdev), di->helper_image);
  4562. goto fail;
  4563. }
  4564. priv->fw_helper = fw;
  4565. rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
  4566. true);
  4567. if (rc && priv->fw_alt) {
  4568. rc = mwl8k_request_alt_fw(priv);
  4569. if (rc)
  4570. goto fail;
  4571. priv->fw_state = FW_STATE_LOADING_ALT;
  4572. } else if (rc)
  4573. goto fail;
  4574. else
  4575. priv->fw_state = FW_STATE_LOADING_PREF;
  4576. break;
  4577. case FW_STATE_LOADING_PREF:
  4578. if (!fw) {
  4579. if (priv->fw_alt) {
  4580. rc = mwl8k_request_alt_fw(priv);
  4581. if (rc)
  4582. goto fail;
  4583. priv->fw_state = FW_STATE_LOADING_ALT;
  4584. } else
  4585. goto fail;
  4586. } else {
  4587. priv->fw_ucode = fw;
  4588. rc = mwl8k_firmware_load_success(priv);
  4589. if (rc)
  4590. goto fail;
  4591. else
  4592. complete(&priv->firmware_loading_complete);
  4593. }
  4594. break;
  4595. case FW_STATE_LOADING_ALT:
  4596. if (!fw) {
  4597. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  4598. pci_name(priv->pdev), di->helper_image);
  4599. goto fail;
  4600. }
  4601. priv->fw_ucode = fw;
  4602. rc = mwl8k_firmware_load_success(priv);
  4603. if (rc)
  4604. goto fail;
  4605. else
  4606. complete(&priv->firmware_loading_complete);
  4607. break;
  4608. default:
  4609. printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
  4610. MWL8K_NAME, priv->fw_state);
  4611. BUG_ON(1);
  4612. }
  4613. return;
  4614. fail:
  4615. priv->fw_state = FW_STATE_ERROR;
  4616. complete(&priv->firmware_loading_complete);
  4617. device_release_driver(&priv->pdev->dev);
  4618. mwl8k_release_firmware(priv);
  4619. }
  4620. #define MAX_RESTART_ATTEMPTS 1
  4621. static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
  4622. bool nowait)
  4623. {
  4624. struct mwl8k_priv *priv = hw->priv;
  4625. int rc;
  4626. int count = MAX_RESTART_ATTEMPTS;
  4627. retry:
  4628. /* Reset firmware and hardware */
  4629. mwl8k_hw_reset(priv);
  4630. /* Ask userland hotplug daemon for the device firmware */
  4631. rc = mwl8k_request_firmware(priv, fw_image, nowait);
  4632. if (rc) {
  4633. wiphy_err(hw->wiphy, "Firmware files not found\n");
  4634. return rc;
  4635. }
  4636. if (nowait)
  4637. return rc;
  4638. /* Load firmware into hardware */
  4639. rc = mwl8k_load_firmware(hw);
  4640. if (rc)
  4641. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  4642. /* Reclaim memory once firmware is successfully loaded */
  4643. mwl8k_release_firmware(priv);
  4644. if (rc && count) {
  4645. /* FW did not start successfully;
  4646. * lets try one more time
  4647. */
  4648. count--;
  4649. wiphy_err(hw->wiphy, "Trying to reload the firmware again\n");
  4650. msleep(20);
  4651. goto retry;
  4652. }
  4653. return rc;
  4654. }
  4655. static int mwl8k_init_txqs(struct ieee80211_hw *hw)
  4656. {
  4657. struct mwl8k_priv *priv = hw->priv;
  4658. int rc = 0;
  4659. int i;
  4660. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  4661. rc = mwl8k_txq_init(hw, i);
  4662. if (rc)
  4663. break;
  4664. if (priv->ap_fw)
  4665. iowrite32(priv->txq[i].txd_dma,
  4666. priv->sram + priv->txq_offset[i]);
  4667. }
  4668. return rc;
  4669. }
  4670. /* initialize hw after successfully loading a firmware image */
  4671. static int mwl8k_probe_hw(struct ieee80211_hw *hw)
  4672. {
  4673. struct mwl8k_priv *priv = hw->priv;
  4674. int rc = 0;
  4675. int i;
  4676. if (priv->ap_fw) {
  4677. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  4678. if (priv->rxd_ops == NULL) {
  4679. wiphy_err(hw->wiphy,
  4680. "Driver does not have AP firmware image support for this hardware\n");
  4681. rc = -ENOENT;
  4682. goto err_stop_firmware;
  4683. }
  4684. } else {
  4685. priv->rxd_ops = &rxd_sta_ops;
  4686. }
  4687. priv->sniffer_enabled = false;
  4688. priv->wmm_enabled = false;
  4689. priv->pending_tx_pkts = 0;
  4690. atomic_set(&priv->watchdog_event_pending, 0);
  4691. rc = mwl8k_rxq_init(hw, 0);
  4692. if (rc)
  4693. goto err_stop_firmware;
  4694. rxq_refill(hw, 0, INT_MAX);
  4695. /* For the sta firmware, we need to know the dma addresses of tx queues
  4696. * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
  4697. * prior to issuing this command. But for the AP case, we learn the
  4698. * total number of queues from the result CMD_GET_HW_SPEC, so for this
  4699. * case we must initialize the tx queues after.
  4700. */
  4701. priv->num_ampdu_queues = 0;
  4702. if (!priv->ap_fw) {
  4703. rc = mwl8k_init_txqs(hw);
  4704. if (rc)
  4705. goto err_free_queues;
  4706. }
  4707. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  4708. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4709. iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
  4710. MWL8K_A2H_INT_BA_WATCHDOG,
  4711. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  4712. iowrite32(MWL8K_A2H_INT_OPC_DONE,
  4713. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  4714. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  4715. IRQF_SHARED, MWL8K_NAME, hw);
  4716. if (rc) {
  4717. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  4718. goto err_free_queues;
  4719. }
  4720. /*
  4721. * When hw restart is requested,
  4722. * mac80211 will take care of clearing
  4723. * the ampdu streams, so do not clear
  4724. * the ampdu state here
  4725. */
  4726. if (!priv->hw_restart_in_progress)
  4727. memset(priv->ampdu, 0, sizeof(priv->ampdu));
  4728. /*
  4729. * Temporarily enable interrupts. Initial firmware host
  4730. * commands use interrupts and avoid polling. Disable
  4731. * interrupts when done.
  4732. */
  4733. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4734. /* Get config data, mac addrs etc */
  4735. if (priv->ap_fw) {
  4736. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  4737. if (!rc)
  4738. rc = mwl8k_init_txqs(hw);
  4739. if (!rc)
  4740. rc = mwl8k_cmd_set_hw_spec(hw);
  4741. } else {
  4742. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  4743. }
  4744. if (rc) {
  4745. wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
  4746. goto err_free_irq;
  4747. }
  4748. /* Turn radio off */
  4749. rc = mwl8k_cmd_radio_disable(hw);
  4750. if (rc) {
  4751. wiphy_err(hw->wiphy, "Cannot disable\n");
  4752. goto err_free_irq;
  4753. }
  4754. /* Clear MAC address */
  4755. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  4756. if (rc) {
  4757. wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
  4758. goto err_free_irq;
  4759. }
  4760. /* Configure Antennas */
  4761. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
  4762. if (rc)
  4763. wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
  4764. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  4765. if (rc)
  4766. wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
  4767. /* Disable interrupts */
  4768. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4769. free_irq(priv->pdev->irq, hw);
  4770. wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
  4771. priv->device_info->part_name,
  4772. priv->hw_rev, hw->wiphy->perm_addr,
  4773. priv->ap_fw ? "AP" : "STA",
  4774. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  4775. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  4776. return 0;
  4777. err_free_irq:
  4778. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4779. free_irq(priv->pdev->irq, hw);
  4780. err_free_queues:
  4781. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4782. mwl8k_txq_deinit(hw, i);
  4783. mwl8k_rxq_deinit(hw, 0);
  4784. err_stop_firmware:
  4785. mwl8k_hw_reset(priv);
  4786. return rc;
  4787. }
  4788. /*
  4789. * invoke mwl8k_reload_firmware to change the firmware image after the device
  4790. * has already been registered
  4791. */
  4792. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
  4793. {
  4794. int i, rc = 0;
  4795. struct mwl8k_priv *priv = hw->priv;
  4796. struct mwl8k_vif *vif, *tmp_vif;
  4797. mwl8k_stop(hw);
  4798. mwl8k_rxq_deinit(hw, 0);
  4799. /*
  4800. * All the existing interfaces are re-added by the ieee80211_reconfig;
  4801. * which means driver should remove existing interfaces before calling
  4802. * ieee80211_restart_hw
  4803. */
  4804. if (priv->hw_restart_in_progress)
  4805. list_for_each_entry_safe(vif, tmp_vif, &priv->vif_list, list)
  4806. mwl8k_remove_vif(priv, vif);
  4807. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4808. mwl8k_txq_deinit(hw, i);
  4809. rc = mwl8k_init_firmware(hw, fw_image, false);
  4810. if (rc)
  4811. goto fail;
  4812. rc = mwl8k_probe_hw(hw);
  4813. if (rc)
  4814. goto fail;
  4815. if (priv->hw_restart_in_progress)
  4816. return rc;
  4817. rc = mwl8k_start(hw);
  4818. if (rc)
  4819. goto fail;
  4820. rc = mwl8k_config(hw, ~0);
  4821. if (rc)
  4822. goto fail;
  4823. for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
  4824. rc = mwl8k_conf_tx(hw, NULL, i, &priv->wmm_params[i]);
  4825. if (rc)
  4826. goto fail;
  4827. }
  4828. return rc;
  4829. fail:
  4830. printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
  4831. return rc;
  4832. }
  4833. static const struct ieee80211_iface_limit ap_if_limits[] = {
  4834. { .max = 8, .types = BIT(NL80211_IFTYPE_AP) },
  4835. { .max = 1, .types = BIT(NL80211_IFTYPE_STATION) },
  4836. };
  4837. static const struct ieee80211_iface_combination ap_if_comb = {
  4838. .limits = ap_if_limits,
  4839. .n_limits = ARRAY_SIZE(ap_if_limits),
  4840. .max_interfaces = 8,
  4841. .num_different_channels = 1,
  4842. };
  4843. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
  4844. {
  4845. struct ieee80211_hw *hw = priv->hw;
  4846. int i, rc;
  4847. rc = mwl8k_load_firmware(hw);
  4848. mwl8k_release_firmware(priv);
  4849. if (rc) {
  4850. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  4851. return rc;
  4852. }
  4853. /*
  4854. * Extra headroom is the size of the required DMA header
  4855. * minus the size of the smallest 802.11 frame (CTS frame).
  4856. */
  4857. hw->extra_tx_headroom =
  4858. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  4859. hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0;
  4860. hw->channel_change_time = 10;
  4861. hw->queues = MWL8K_TX_WMM_QUEUES;
  4862. /* Set rssi values to dBm */
  4863. hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
  4864. /*
  4865. * Ask mac80211 to not to trigger PS mode
  4866. * based on PM bit of incoming frames.
  4867. */
  4868. if (priv->ap_fw)
  4869. hw->flags |= IEEE80211_HW_AP_LINK_PS;
  4870. hw->vif_data_size = sizeof(struct mwl8k_vif);
  4871. hw->sta_data_size = sizeof(struct mwl8k_sta);
  4872. priv->macids_used = 0;
  4873. INIT_LIST_HEAD(&priv->vif_list);
  4874. /* Set default radio state and preamble */
  4875. priv->radio_on = false;
  4876. priv->radio_short_preamble = false;
  4877. /* Finalize join worker */
  4878. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  4879. /* Handle watchdog ba events */
  4880. INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
  4881. /* To reload the firmware if it crashes */
  4882. INIT_WORK(&priv->fw_reload, mwl8k_hw_restart_work);
  4883. /* TX reclaim and RX tasklets. */
  4884. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  4885. tasklet_disable(&priv->poll_tx_task);
  4886. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  4887. tasklet_disable(&priv->poll_rx_task);
  4888. /* Power management cookie */
  4889. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  4890. if (priv->cookie == NULL)
  4891. return -ENOMEM;
  4892. mutex_init(&priv->fw_mutex);
  4893. priv->fw_mutex_owner = NULL;
  4894. priv->fw_mutex_depth = 0;
  4895. priv->hostcmd_wait = NULL;
  4896. spin_lock_init(&priv->tx_lock);
  4897. spin_lock_init(&priv->stream_lock);
  4898. priv->tx_wait = NULL;
  4899. rc = mwl8k_probe_hw(hw);
  4900. if (rc)
  4901. goto err_free_cookie;
  4902. hw->wiphy->interface_modes = 0;
  4903. if (priv->ap_macids_supported || priv->device_info->fw_image_ap) {
  4904. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  4905. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  4906. hw->wiphy->iface_combinations = &ap_if_comb;
  4907. hw->wiphy->n_iface_combinations = 1;
  4908. }
  4909. if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
  4910. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  4911. rc = ieee80211_register_hw(hw);
  4912. if (rc) {
  4913. wiphy_err(hw->wiphy, "Cannot register device\n");
  4914. goto err_unprobe_hw;
  4915. }
  4916. return 0;
  4917. err_unprobe_hw:
  4918. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4919. mwl8k_txq_deinit(hw, i);
  4920. mwl8k_rxq_deinit(hw, 0);
  4921. err_free_cookie:
  4922. if (priv->cookie != NULL)
  4923. pci_free_consistent(priv->pdev, 4,
  4924. priv->cookie, priv->cookie_dma);
  4925. return rc;
  4926. }
  4927. static int mwl8k_probe(struct pci_dev *pdev,
  4928. const struct pci_device_id *id)
  4929. {
  4930. static int printed_version;
  4931. struct ieee80211_hw *hw;
  4932. struct mwl8k_priv *priv;
  4933. struct mwl8k_device_info *di;
  4934. int rc;
  4935. if (!printed_version) {
  4936. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  4937. printed_version = 1;
  4938. }
  4939. rc = pci_enable_device(pdev);
  4940. if (rc) {
  4941. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  4942. MWL8K_NAME);
  4943. return rc;
  4944. }
  4945. rc = pci_request_regions(pdev, MWL8K_NAME);
  4946. if (rc) {
  4947. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  4948. MWL8K_NAME);
  4949. goto err_disable_device;
  4950. }
  4951. pci_set_master(pdev);
  4952. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  4953. if (hw == NULL) {
  4954. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  4955. rc = -ENOMEM;
  4956. goto err_free_reg;
  4957. }
  4958. SET_IEEE80211_DEV(hw, &pdev->dev);
  4959. pci_set_drvdata(pdev, hw);
  4960. priv = hw->priv;
  4961. priv->hw = hw;
  4962. priv->pdev = pdev;
  4963. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  4964. priv->sram = pci_iomap(pdev, 0, 0x10000);
  4965. if (priv->sram == NULL) {
  4966. wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
  4967. rc = -EIO;
  4968. goto err_iounmap;
  4969. }
  4970. /*
  4971. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  4972. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  4973. */
  4974. priv->regs = pci_iomap(pdev, 1, 0x10000);
  4975. if (priv->regs == NULL) {
  4976. priv->regs = pci_iomap(pdev, 2, 0x10000);
  4977. if (priv->regs == NULL) {
  4978. wiphy_err(hw->wiphy, "Cannot map device registers\n");
  4979. rc = -EIO;
  4980. goto err_iounmap;
  4981. }
  4982. }
  4983. /*
  4984. * Choose the initial fw image depending on user input. If a second
  4985. * image is available, make it the alternative image that will be
  4986. * loaded if the first one fails.
  4987. */
  4988. init_completion(&priv->firmware_loading_complete);
  4989. di = priv->device_info;
  4990. if (ap_mode_default && di->fw_image_ap) {
  4991. priv->fw_pref = di->fw_image_ap;
  4992. priv->fw_alt = di->fw_image_sta;
  4993. } else if (!ap_mode_default && di->fw_image_sta) {
  4994. priv->fw_pref = di->fw_image_sta;
  4995. priv->fw_alt = di->fw_image_ap;
  4996. } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
  4997. printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
  4998. priv->fw_pref = di->fw_image_sta;
  4999. } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
  5000. printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
  5001. priv->fw_pref = di->fw_image_ap;
  5002. }
  5003. rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
  5004. if (rc)
  5005. goto err_stop_firmware;
  5006. priv->hw_restart_in_progress = false;
  5007. priv->running_bsses = 0;
  5008. return rc;
  5009. err_stop_firmware:
  5010. mwl8k_hw_reset(priv);
  5011. err_iounmap:
  5012. if (priv->regs != NULL)
  5013. pci_iounmap(pdev, priv->regs);
  5014. if (priv->sram != NULL)
  5015. pci_iounmap(pdev, priv->sram);
  5016. pci_set_drvdata(pdev, NULL);
  5017. ieee80211_free_hw(hw);
  5018. err_free_reg:
  5019. pci_release_regions(pdev);
  5020. err_disable_device:
  5021. pci_disable_device(pdev);
  5022. return rc;
  5023. }
  5024. static void mwl8k_remove(struct pci_dev *pdev)
  5025. {
  5026. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  5027. struct mwl8k_priv *priv;
  5028. int i;
  5029. if (hw == NULL)
  5030. return;
  5031. priv = hw->priv;
  5032. wait_for_completion(&priv->firmware_loading_complete);
  5033. if (priv->fw_state == FW_STATE_ERROR) {
  5034. mwl8k_hw_reset(priv);
  5035. goto unmap;
  5036. }
  5037. ieee80211_stop_queues(hw);
  5038. ieee80211_unregister_hw(hw);
  5039. /* Remove TX reclaim and RX tasklets. */
  5040. tasklet_kill(&priv->poll_tx_task);
  5041. tasklet_kill(&priv->poll_rx_task);
  5042. /* Stop hardware */
  5043. mwl8k_hw_reset(priv);
  5044. /* Return all skbs to mac80211 */
  5045. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  5046. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  5047. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  5048. mwl8k_txq_deinit(hw, i);
  5049. mwl8k_rxq_deinit(hw, 0);
  5050. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  5051. unmap:
  5052. pci_iounmap(pdev, priv->regs);
  5053. pci_iounmap(pdev, priv->sram);
  5054. pci_set_drvdata(pdev, NULL);
  5055. ieee80211_free_hw(hw);
  5056. pci_release_regions(pdev);
  5057. pci_disable_device(pdev);
  5058. }
  5059. static struct pci_driver mwl8k_driver = {
  5060. .name = MWL8K_NAME,
  5061. .id_table = mwl8k_pci_id_table,
  5062. .probe = mwl8k_probe,
  5063. .remove = mwl8k_remove,
  5064. };
  5065. module_pci_driver(mwl8k_driver);
  5066. MODULE_DESCRIPTION(MWL8K_DESC);
  5067. MODULE_VERSION(MWL8K_VERSION);
  5068. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  5069. MODULE_LICENSE("GPL");