pcie.c 64 KB

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  1. /*
  2. * Marvell Wireless LAN device driver: PCIE specific handling
  3. *
  4. * Copyright (C) 2011, Marvell International Ltd.
  5. *
  6. * This software file (the "File") is distributed by Marvell International
  7. * Ltd. under the terms of the GNU General Public License Version 2, June 1991
  8. * (the "License"). You may use, redistribute and/or modify this File in
  9. * accordance with the terms and conditions of the License, a copy of which
  10. * is available by writing to the Free Software Foundation, Inc.,
  11. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
  12. * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
  13. *
  14. * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
  15. * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
  16. * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
  17. * this warranty disclaimer.
  18. */
  19. #include <linux/firmware.h>
  20. #include "decl.h"
  21. #include "ioctl.h"
  22. #include "util.h"
  23. #include "fw.h"
  24. #include "main.h"
  25. #include "wmm.h"
  26. #include "11n.h"
  27. #include "pcie.h"
  28. #define PCIE_VERSION "1.0"
  29. #define DRV_NAME "Marvell mwifiex PCIe"
  30. static u8 user_rmmod;
  31. static struct mwifiex_if_ops pcie_ops;
  32. static struct semaphore add_remove_card_sem;
  33. static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter);
  34. static int mwifiex_pcie_resume(struct pci_dev *pdev);
  35. static int
  36. mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
  37. int size, int flags)
  38. {
  39. struct pcie_service_card *card = adapter->card;
  40. dma_addr_t buf_pa;
  41. buf_pa = pci_map_single(card->dev, skb->data, size, flags);
  42. if (pci_dma_mapping_error(card->dev, buf_pa)) {
  43. dev_err(adapter->dev, "failed to map pci memory!\n");
  44. return -1;
  45. }
  46. memcpy(skb->cb, &buf_pa, sizeof(dma_addr_t));
  47. return 0;
  48. }
  49. /*
  50. * This function reads sleep cookie and checks if FW is ready
  51. */
  52. static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
  53. {
  54. u32 *cookie_addr;
  55. struct pcie_service_card *card = adapter->card;
  56. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  57. if (!reg->sleep_cookie)
  58. return true;
  59. if (card->sleep_cookie_vbase) {
  60. cookie_addr = (u32 *)card->sleep_cookie_vbase;
  61. dev_dbg(adapter->dev, "info: ACCESS_HW: sleep cookie=0x%x\n",
  62. *cookie_addr);
  63. if (*cookie_addr == FW_AWAKE_COOKIE)
  64. return true;
  65. }
  66. return false;
  67. }
  68. /*
  69. * This function probes an mwifiex device and registers it. It allocates
  70. * the card structure, enables PCIE function number and initiates the
  71. * device registration and initialization procedure by adding a logical
  72. * interface.
  73. */
  74. static int mwifiex_pcie_probe(struct pci_dev *pdev,
  75. const struct pci_device_id *ent)
  76. {
  77. struct pcie_service_card *card;
  78. pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
  79. pdev->vendor, pdev->device, pdev->revision);
  80. card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL);
  81. if (!card)
  82. return -ENOMEM;
  83. card->dev = pdev;
  84. if (ent->driver_data) {
  85. struct mwifiex_pcie_device *data = (void *)ent->driver_data;
  86. card->pcie.firmware = data->firmware;
  87. card->pcie.reg = data->reg;
  88. card->pcie.blksz_fw_dl = data->blksz_fw_dl;
  89. }
  90. if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops,
  91. MWIFIEX_PCIE)) {
  92. pr_err("%s failed\n", __func__);
  93. kfree(card);
  94. return -1;
  95. }
  96. return 0;
  97. }
  98. /*
  99. * This function removes the interface and frees up the card structure.
  100. */
  101. static void mwifiex_pcie_remove(struct pci_dev *pdev)
  102. {
  103. struct pcie_service_card *card;
  104. struct mwifiex_adapter *adapter;
  105. struct mwifiex_private *priv;
  106. int i;
  107. card = pci_get_drvdata(pdev);
  108. if (!card)
  109. return;
  110. adapter = card->adapter;
  111. if (!adapter || !adapter->priv_num)
  112. return;
  113. /* In case driver is removed when asynchronous FW load is in progress */
  114. wait_for_completion(&adapter->fw_load);
  115. if (user_rmmod) {
  116. #ifdef CONFIG_PM
  117. if (adapter->is_suspended)
  118. mwifiex_pcie_resume(pdev);
  119. #endif
  120. for (i = 0; i < adapter->priv_num; i++)
  121. if ((GET_BSS_ROLE(adapter->priv[i]) ==
  122. MWIFIEX_BSS_ROLE_STA) &&
  123. adapter->priv[i]->media_connected)
  124. mwifiex_deauthenticate(adapter->priv[i], NULL);
  125. priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
  126. mwifiex_disable_auto_ds(priv);
  127. mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
  128. }
  129. mwifiex_remove_card(card->adapter, &add_remove_card_sem);
  130. kfree(card);
  131. }
  132. /*
  133. * Kernel needs to suspend all functions separately. Therefore all
  134. * registered functions must have drivers with suspend and resume
  135. * methods. Failing that the kernel simply removes the whole card.
  136. *
  137. * If already not suspended, this function allocates and sends a host
  138. * sleep activate request to the firmware and turns off the traffic.
  139. */
  140. static int mwifiex_pcie_suspend(struct pci_dev *pdev, pm_message_t state)
  141. {
  142. struct mwifiex_adapter *adapter;
  143. struct pcie_service_card *card;
  144. int hs_actived;
  145. if (pdev) {
  146. card = (struct pcie_service_card *) pci_get_drvdata(pdev);
  147. if (!card || !card->adapter) {
  148. pr_err("Card or adapter structure is not valid\n");
  149. return 0;
  150. }
  151. } else {
  152. pr_err("PCIE device is not specified\n");
  153. return 0;
  154. }
  155. adapter = card->adapter;
  156. hs_actived = mwifiex_enable_hs(adapter);
  157. /* Indicate device suspended */
  158. adapter->is_suspended = true;
  159. return 0;
  160. }
  161. /*
  162. * Kernel needs to suspend all functions separately. Therefore all
  163. * registered functions must have drivers with suspend and resume
  164. * methods. Failing that the kernel simply removes the whole card.
  165. *
  166. * If already not resumed, this function turns on the traffic and
  167. * sends a host sleep cancel request to the firmware.
  168. */
  169. static int mwifiex_pcie_resume(struct pci_dev *pdev)
  170. {
  171. struct mwifiex_adapter *adapter;
  172. struct pcie_service_card *card;
  173. if (pdev) {
  174. card = (struct pcie_service_card *) pci_get_drvdata(pdev);
  175. if (!card || !card->adapter) {
  176. pr_err("Card or adapter structure is not valid\n");
  177. return 0;
  178. }
  179. } else {
  180. pr_err("PCIE device is not specified\n");
  181. return 0;
  182. }
  183. adapter = card->adapter;
  184. if (!adapter->is_suspended) {
  185. dev_warn(adapter->dev, "Device already resumed\n");
  186. return 0;
  187. }
  188. adapter->is_suspended = false;
  189. mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
  190. MWIFIEX_ASYNC_CMD);
  191. return 0;
  192. }
  193. static DEFINE_PCI_DEVICE_TABLE(mwifiex_ids) = {
  194. {
  195. PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
  196. PCI_ANY_ID, PCI_ANY_ID, 0, 0,
  197. .driver_data = (unsigned long) &mwifiex_pcie8766,
  198. },
  199. {
  200. PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
  201. PCI_ANY_ID, PCI_ANY_ID, 0, 0,
  202. .driver_data = (unsigned long) &mwifiex_pcie8897,
  203. },
  204. {},
  205. };
  206. MODULE_DEVICE_TABLE(pci, mwifiex_ids);
  207. /* PCI Device Driver */
  208. static struct pci_driver __refdata mwifiex_pcie = {
  209. .name = "mwifiex_pcie",
  210. .id_table = mwifiex_ids,
  211. .probe = mwifiex_pcie_probe,
  212. .remove = mwifiex_pcie_remove,
  213. #ifdef CONFIG_PM
  214. /* Power Management Hooks */
  215. .suspend = mwifiex_pcie_suspend,
  216. .resume = mwifiex_pcie_resume,
  217. #endif
  218. };
  219. /*
  220. * This function writes data into PCIE card register.
  221. */
  222. static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
  223. {
  224. struct pcie_service_card *card = adapter->card;
  225. iowrite32(data, card->pci_mmap1 + reg);
  226. return 0;
  227. }
  228. /*
  229. * This function reads data from PCIE card register.
  230. */
  231. static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
  232. {
  233. struct pcie_service_card *card = adapter->card;
  234. *data = ioread32(card->pci_mmap1 + reg);
  235. return 0;
  236. }
  237. /*
  238. * This function wakes up the card.
  239. *
  240. * A host power up command is written to the card configuration
  241. * register to wake up the card.
  242. */
  243. static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
  244. {
  245. int i = 0;
  246. struct pcie_service_card *card = adapter->card;
  247. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  248. while (reg->sleep_cookie && mwifiex_pcie_ok_to_access_hw(adapter)) {
  249. i++;
  250. usleep_range(10, 20);
  251. /* 50ms max wait */
  252. if (i == 5000)
  253. break;
  254. }
  255. dev_dbg(adapter->dev, "event: Wakeup device...\n");
  256. /* Enable interrupts or any chip access will wakeup device */
  257. if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, HOST_INTR_MASK)) {
  258. dev_warn(adapter->dev, "Enable host interrupt failed\n");
  259. return -1;
  260. }
  261. dev_dbg(adapter->dev, "PCIE wakeup: Setting PS_STATE_AWAKE\n");
  262. adapter->ps_state = PS_STATE_AWAKE;
  263. return 0;
  264. }
  265. /*
  266. * This function is called after the card has woken up.
  267. *
  268. * The card configuration register is reset.
  269. */
  270. static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
  271. {
  272. dev_dbg(adapter->dev, "cmd: Wakeup device completed\n");
  273. return 0;
  274. }
  275. /*
  276. * This function disables the host interrupt.
  277. *
  278. * The host interrupt mask is read, the disable bit is reset and
  279. * written back to the card host interrupt mask register.
  280. */
  281. static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
  282. {
  283. if (mwifiex_pcie_ok_to_access_hw(adapter)) {
  284. if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
  285. 0x00000000)) {
  286. dev_warn(adapter->dev, "Disable host interrupt failed\n");
  287. return -1;
  288. }
  289. }
  290. return 0;
  291. }
  292. /*
  293. * This function enables the host interrupt.
  294. *
  295. * The host interrupt enable mask is written to the card
  296. * host interrupt mask register.
  297. */
  298. static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
  299. {
  300. if (mwifiex_pcie_ok_to_access_hw(adapter)) {
  301. /* Simply write the mask to the register */
  302. if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
  303. HOST_INTR_MASK)) {
  304. dev_warn(adapter->dev, "Enable host interrupt failed\n");
  305. return -1;
  306. }
  307. }
  308. return 0;
  309. }
  310. /*
  311. * This function initializes TX buffer ring descriptors
  312. */
  313. static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
  314. {
  315. struct pcie_service_card *card = adapter->card;
  316. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  317. struct mwifiex_pcie_buf_desc *desc;
  318. struct mwifiex_pfu_buf_desc *desc2;
  319. int i;
  320. for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
  321. card->tx_buf_list[i] = NULL;
  322. if (reg->pfu_enabled) {
  323. card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
  324. (sizeof(*desc2) * i);
  325. desc2 = card->txbd_ring[i];
  326. memset(desc2, 0, sizeof(*desc2));
  327. } else {
  328. card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
  329. (sizeof(*desc) * i);
  330. desc = card->txbd_ring[i];
  331. memset(desc, 0, sizeof(*desc));
  332. }
  333. }
  334. return 0;
  335. }
  336. /* This function initializes RX buffer ring descriptors. Each SKB is allocated
  337. * here and after mapping PCI memory, its physical address is assigned to
  338. * PCIE Rx buffer descriptor's physical address.
  339. */
  340. static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
  341. {
  342. struct pcie_service_card *card = adapter->card;
  343. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  344. struct sk_buff *skb;
  345. struct mwifiex_pcie_buf_desc *desc;
  346. struct mwifiex_pfu_buf_desc *desc2;
  347. dma_addr_t buf_pa;
  348. int i;
  349. for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
  350. /* Allocate skb here so that firmware can DMA data from it */
  351. skb = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
  352. if (!skb) {
  353. dev_err(adapter->dev,
  354. "Unable to allocate skb for RX ring.\n");
  355. kfree(card->rxbd_ring_vbase);
  356. return -ENOMEM;
  357. }
  358. if (mwifiex_map_pci_memory(adapter, skb,
  359. MWIFIEX_RX_DATA_BUF_SIZE,
  360. PCI_DMA_FROMDEVICE))
  361. return -1;
  362. MWIFIEX_SKB_PACB(skb, &buf_pa);
  363. dev_dbg(adapter->dev,
  364. "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
  365. skb, skb->len, skb->data, (u32)buf_pa,
  366. (u32)((u64)buf_pa >> 32));
  367. card->rx_buf_list[i] = skb;
  368. if (reg->pfu_enabled) {
  369. card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
  370. (sizeof(*desc2) * i);
  371. desc2 = card->rxbd_ring[i];
  372. desc2->paddr = buf_pa;
  373. desc2->len = (u16)skb->len;
  374. desc2->frag_len = (u16)skb->len;
  375. desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
  376. desc2->offset = 0;
  377. } else {
  378. card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
  379. (sizeof(*desc) * i));
  380. desc = card->rxbd_ring[i];
  381. desc->paddr = buf_pa;
  382. desc->len = (u16)skb->len;
  383. desc->flags = 0;
  384. }
  385. }
  386. return 0;
  387. }
  388. /* This function initializes event buffer ring descriptors. Each SKB is
  389. * allocated here and after mapping PCI memory, its physical address is assigned
  390. * to PCIE Rx buffer descriptor's physical address
  391. */
  392. static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
  393. {
  394. struct pcie_service_card *card = adapter->card;
  395. struct mwifiex_evt_buf_desc *desc;
  396. struct sk_buff *skb;
  397. dma_addr_t buf_pa;
  398. int i;
  399. for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
  400. /* Allocate skb here so that firmware can DMA data from it */
  401. skb = dev_alloc_skb(MAX_EVENT_SIZE);
  402. if (!skb) {
  403. dev_err(adapter->dev,
  404. "Unable to allocate skb for EVENT buf.\n");
  405. kfree(card->evtbd_ring_vbase);
  406. return -ENOMEM;
  407. }
  408. skb_put(skb, MAX_EVENT_SIZE);
  409. if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
  410. PCI_DMA_FROMDEVICE))
  411. return -1;
  412. MWIFIEX_SKB_PACB(skb, &buf_pa);
  413. dev_dbg(adapter->dev,
  414. "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
  415. skb, skb->len, skb->data, (u32)buf_pa,
  416. (u32)((u64)buf_pa >> 32));
  417. card->evt_buf_list[i] = skb;
  418. card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
  419. (sizeof(*desc) * i));
  420. desc = card->evtbd_ring[i];
  421. desc->paddr = buf_pa;
  422. desc->len = (u16)skb->len;
  423. desc->flags = 0;
  424. }
  425. return 0;
  426. }
  427. /* This function cleans up TX buffer rings. If any of the buffer list has valid
  428. * SKB address, associated SKB is freed.
  429. */
  430. static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
  431. {
  432. struct pcie_service_card *card = adapter->card;
  433. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  434. struct sk_buff *skb;
  435. struct mwifiex_pcie_buf_desc *desc;
  436. struct mwifiex_pfu_buf_desc *desc2;
  437. int i;
  438. for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
  439. if (reg->pfu_enabled) {
  440. desc2 = card->txbd_ring[i];
  441. if (card->tx_buf_list[i]) {
  442. skb = card->tx_buf_list[i];
  443. pci_unmap_single(card->dev, desc2->paddr,
  444. skb->len, PCI_DMA_TODEVICE);
  445. dev_kfree_skb_any(skb);
  446. }
  447. memset(desc2, 0, sizeof(*desc2));
  448. } else {
  449. desc = card->txbd_ring[i];
  450. if (card->tx_buf_list[i]) {
  451. skb = card->tx_buf_list[i];
  452. pci_unmap_single(card->dev, desc->paddr,
  453. skb->len, PCI_DMA_TODEVICE);
  454. dev_kfree_skb_any(skb);
  455. }
  456. memset(desc, 0, sizeof(*desc));
  457. }
  458. card->tx_buf_list[i] = NULL;
  459. }
  460. return;
  461. }
  462. /* This function cleans up RX buffer rings. If any of the buffer list has valid
  463. * SKB address, associated SKB is freed.
  464. */
  465. static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
  466. {
  467. struct pcie_service_card *card = adapter->card;
  468. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  469. struct mwifiex_pcie_buf_desc *desc;
  470. struct mwifiex_pfu_buf_desc *desc2;
  471. struct sk_buff *skb;
  472. int i;
  473. for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
  474. if (reg->pfu_enabled) {
  475. desc2 = card->rxbd_ring[i];
  476. if (card->rx_buf_list[i]) {
  477. skb = card->rx_buf_list[i];
  478. pci_unmap_single(card->dev, desc2->paddr,
  479. skb->len, PCI_DMA_TODEVICE);
  480. dev_kfree_skb_any(skb);
  481. }
  482. memset(desc2, 0, sizeof(*desc2));
  483. } else {
  484. desc = card->rxbd_ring[i];
  485. if (card->rx_buf_list[i]) {
  486. skb = card->rx_buf_list[i];
  487. pci_unmap_single(card->dev, desc->paddr,
  488. skb->len, PCI_DMA_TODEVICE);
  489. dev_kfree_skb_any(skb);
  490. }
  491. memset(desc, 0, sizeof(*desc));
  492. }
  493. card->rx_buf_list[i] = NULL;
  494. }
  495. return;
  496. }
  497. /* This function cleans up event buffer rings. If any of the buffer list has
  498. * valid SKB address, associated SKB is freed.
  499. */
  500. static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
  501. {
  502. struct pcie_service_card *card = adapter->card;
  503. struct mwifiex_evt_buf_desc *desc;
  504. struct sk_buff *skb;
  505. int i;
  506. for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
  507. desc = card->evtbd_ring[i];
  508. if (card->evt_buf_list[i]) {
  509. skb = card->evt_buf_list[i];
  510. pci_unmap_single(card->dev, desc->paddr, MAX_EVENT_SIZE,
  511. PCI_DMA_FROMDEVICE);
  512. dev_kfree_skb_any(skb);
  513. }
  514. card->evt_buf_list[i] = NULL;
  515. memset(desc, 0, sizeof(*desc));
  516. }
  517. return;
  518. }
  519. /* This function creates buffer descriptor ring for TX
  520. */
  521. static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
  522. {
  523. struct pcie_service_card *card = adapter->card;
  524. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  525. /*
  526. * driver maintaines the write pointer and firmware maintaines the read
  527. * pointer. The write pointer starts at 0 (zero) while the read pointer
  528. * starts at zero with rollover bit set
  529. */
  530. card->txbd_wrptr = 0;
  531. if (reg->pfu_enabled)
  532. card->txbd_rdptr = 0;
  533. else
  534. card->txbd_rdptr |= reg->tx_rollover_ind;
  535. /* allocate shared memory for the BD ring and divide the same in to
  536. several descriptors */
  537. if (reg->pfu_enabled)
  538. card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
  539. MWIFIEX_MAX_TXRX_BD;
  540. else
  541. card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
  542. MWIFIEX_MAX_TXRX_BD;
  543. dev_dbg(adapter->dev, "info: txbd_ring: Allocating %d bytes\n",
  544. card->txbd_ring_size);
  545. card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
  546. card->txbd_ring_size,
  547. &card->txbd_ring_pbase);
  548. if (!card->txbd_ring_vbase) {
  549. dev_err(adapter->dev,
  550. "allocate consistent memory (%d bytes) failed!\n",
  551. card->txbd_ring_size);
  552. return -ENOMEM;
  553. }
  554. dev_dbg(adapter->dev,
  555. "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
  556. card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
  557. (u32)((u64)card->txbd_ring_pbase >> 32), card->txbd_ring_size);
  558. return mwifiex_init_txq_ring(adapter);
  559. }
  560. static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
  561. {
  562. struct pcie_service_card *card = adapter->card;
  563. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  564. mwifiex_cleanup_txq_ring(adapter);
  565. if (card->txbd_ring_vbase)
  566. pci_free_consistent(card->dev, card->txbd_ring_size,
  567. card->txbd_ring_vbase,
  568. card->txbd_ring_pbase);
  569. card->txbd_ring_size = 0;
  570. card->txbd_wrptr = 0;
  571. card->txbd_rdptr = 0 | reg->tx_rollover_ind;
  572. card->txbd_ring_vbase = NULL;
  573. card->txbd_ring_pbase = 0;
  574. return 0;
  575. }
  576. /*
  577. * This function creates buffer descriptor ring for RX
  578. */
  579. static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
  580. {
  581. struct pcie_service_card *card = adapter->card;
  582. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  583. /*
  584. * driver maintaines the read pointer and firmware maintaines the write
  585. * pointer. The write pointer starts at 0 (zero) while the read pointer
  586. * starts at zero with rollover bit set
  587. */
  588. card->rxbd_wrptr = 0;
  589. card->rxbd_rdptr = reg->rx_rollover_ind;
  590. if (reg->pfu_enabled)
  591. card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
  592. MWIFIEX_MAX_TXRX_BD;
  593. else
  594. card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
  595. MWIFIEX_MAX_TXRX_BD;
  596. dev_dbg(adapter->dev, "info: rxbd_ring: Allocating %d bytes\n",
  597. card->rxbd_ring_size);
  598. card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
  599. card->rxbd_ring_size,
  600. &card->rxbd_ring_pbase);
  601. if (!card->rxbd_ring_vbase) {
  602. dev_err(adapter->dev,
  603. "allocate consistent memory (%d bytes) failed!\n",
  604. card->rxbd_ring_size);
  605. return -ENOMEM;
  606. }
  607. dev_dbg(adapter->dev,
  608. "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
  609. card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
  610. (u32)((u64)card->rxbd_ring_pbase >> 32),
  611. card->rxbd_ring_size);
  612. return mwifiex_init_rxq_ring(adapter);
  613. }
  614. /*
  615. * This function deletes Buffer descriptor ring for RX
  616. */
  617. static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
  618. {
  619. struct pcie_service_card *card = adapter->card;
  620. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  621. mwifiex_cleanup_rxq_ring(adapter);
  622. if (card->rxbd_ring_vbase)
  623. pci_free_consistent(card->dev, card->rxbd_ring_size,
  624. card->rxbd_ring_vbase,
  625. card->rxbd_ring_pbase);
  626. card->rxbd_ring_size = 0;
  627. card->rxbd_wrptr = 0;
  628. card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
  629. card->rxbd_ring_vbase = NULL;
  630. card->rxbd_ring_pbase = 0;
  631. return 0;
  632. }
  633. /*
  634. * This function creates buffer descriptor ring for Events
  635. */
  636. static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
  637. {
  638. struct pcie_service_card *card = adapter->card;
  639. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  640. /*
  641. * driver maintaines the read pointer and firmware maintaines the write
  642. * pointer. The write pointer starts at 0 (zero) while the read pointer
  643. * starts at zero with rollover bit set
  644. */
  645. card->evtbd_wrptr = 0;
  646. card->evtbd_rdptr = reg->evt_rollover_ind;
  647. card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
  648. MWIFIEX_MAX_EVT_BD;
  649. dev_dbg(adapter->dev, "info: evtbd_ring: Allocating %d bytes\n",
  650. card->evtbd_ring_size);
  651. card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
  652. card->evtbd_ring_size,
  653. &card->evtbd_ring_pbase);
  654. if (!card->evtbd_ring_vbase) {
  655. dev_err(adapter->dev,
  656. "allocate consistent memory (%d bytes) failed!\n",
  657. card->evtbd_ring_size);
  658. return -ENOMEM;
  659. }
  660. dev_dbg(adapter->dev,
  661. "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
  662. card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
  663. (u32)((u64)card->evtbd_ring_pbase >> 32),
  664. card->evtbd_ring_size);
  665. return mwifiex_pcie_init_evt_ring(adapter);
  666. }
  667. /*
  668. * This function deletes Buffer descriptor ring for Events
  669. */
  670. static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
  671. {
  672. struct pcie_service_card *card = adapter->card;
  673. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  674. mwifiex_cleanup_evt_ring(adapter);
  675. if (card->evtbd_ring_vbase)
  676. pci_free_consistent(card->dev, card->evtbd_ring_size,
  677. card->evtbd_ring_vbase,
  678. card->evtbd_ring_pbase);
  679. card->evtbd_wrptr = 0;
  680. card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
  681. card->evtbd_ring_size = 0;
  682. card->evtbd_ring_vbase = NULL;
  683. card->evtbd_ring_pbase = 0;
  684. return 0;
  685. }
  686. /*
  687. * This function allocates a buffer for CMDRSP
  688. */
  689. static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
  690. {
  691. struct pcie_service_card *card = adapter->card;
  692. struct sk_buff *skb;
  693. /* Allocate memory for receiving command response data */
  694. skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
  695. if (!skb) {
  696. dev_err(adapter->dev,
  697. "Unable to allocate skb for command response data.\n");
  698. return -ENOMEM;
  699. }
  700. skb_put(skb, MWIFIEX_UPLD_SIZE);
  701. if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
  702. PCI_DMA_FROMDEVICE))
  703. return -1;
  704. card->cmdrsp_buf = skb;
  705. return 0;
  706. }
  707. /*
  708. * This function deletes a buffer for CMDRSP
  709. */
  710. static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
  711. {
  712. struct pcie_service_card *card;
  713. dma_addr_t buf_pa;
  714. if (!adapter)
  715. return 0;
  716. card = adapter->card;
  717. if (card && card->cmdrsp_buf) {
  718. MWIFIEX_SKB_PACB(card->cmdrsp_buf, &buf_pa);
  719. pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
  720. PCI_DMA_FROMDEVICE);
  721. dev_kfree_skb_any(card->cmdrsp_buf);
  722. }
  723. if (card && card->cmd_buf) {
  724. MWIFIEX_SKB_PACB(card->cmd_buf, &buf_pa);
  725. pci_unmap_single(card->dev, buf_pa, MWIFIEX_SIZE_OF_CMD_BUFFER,
  726. PCI_DMA_TODEVICE);
  727. dev_kfree_skb_any(card->cmd_buf);
  728. }
  729. return 0;
  730. }
  731. /*
  732. * This function allocates a buffer for sleep cookie
  733. */
  734. static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
  735. {
  736. struct pcie_service_card *card = adapter->card;
  737. card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
  738. &card->sleep_cookie_pbase);
  739. if (!card->sleep_cookie_vbase) {
  740. dev_err(adapter->dev, "pci_alloc_consistent failed!\n");
  741. return -ENOMEM;
  742. }
  743. /* Init val of Sleep Cookie */
  744. *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE;
  745. dev_dbg(adapter->dev, "alloc_scook: sleep cookie=0x%x\n",
  746. *((u32 *)card->sleep_cookie_vbase));
  747. return 0;
  748. }
  749. /*
  750. * This function deletes buffer for sleep cookie
  751. */
  752. static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
  753. {
  754. struct pcie_service_card *card;
  755. if (!adapter)
  756. return 0;
  757. card = adapter->card;
  758. if (card && card->sleep_cookie_vbase) {
  759. pci_free_consistent(card->dev, sizeof(u32),
  760. card->sleep_cookie_vbase,
  761. card->sleep_cookie_pbase);
  762. card->sleep_cookie_vbase = NULL;
  763. }
  764. return 0;
  765. }
  766. /* This function flushes the TX buffer descriptor ring
  767. * This function defined as handler is also called while cleaning TXRX
  768. * during disconnect/ bss stop.
  769. */
  770. static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
  771. {
  772. struct pcie_service_card *card = adapter->card;
  773. if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) {
  774. card->txbd_flush = 1;
  775. /* write pointer already set at last send
  776. * send dnld-rdy intr again, wait for completion.
  777. */
  778. if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
  779. CPU_INTR_DNLD_RDY)) {
  780. dev_err(adapter->dev,
  781. "failed to assert dnld-rdy interrupt.\n");
  782. return -1;
  783. }
  784. }
  785. return 0;
  786. }
  787. /*
  788. * This function unmaps and frees downloaded data buffer
  789. */
  790. static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
  791. {
  792. struct sk_buff *skb;
  793. dma_addr_t buf_pa;
  794. u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
  795. struct mwifiex_pcie_buf_desc *desc;
  796. struct mwifiex_pfu_buf_desc *desc2;
  797. struct pcie_service_card *card = adapter->card;
  798. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  799. if (!mwifiex_pcie_ok_to_access_hw(adapter))
  800. mwifiex_pm_wakeup_card(adapter);
  801. /* Read the TX ring read pointer set by firmware */
  802. if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
  803. dev_err(adapter->dev,
  804. "SEND COMP: failed to read reg->tx_rdptr\n");
  805. return -1;
  806. }
  807. dev_dbg(adapter->dev, "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
  808. card->txbd_rdptr, rdptr);
  809. num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
  810. /* free from previous txbd_rdptr to current txbd_rdptr */
  811. while (((card->txbd_rdptr & reg->tx_mask) !=
  812. (rdptr & reg->tx_mask)) ||
  813. ((card->txbd_rdptr & reg->tx_rollover_ind) !=
  814. (rdptr & reg->tx_rollover_ind))) {
  815. wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
  816. reg->tx_start_ptr;
  817. skb = card->tx_buf_list[wrdoneidx];
  818. if (skb) {
  819. dev_dbg(adapter->dev,
  820. "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
  821. skb, wrdoneidx);
  822. MWIFIEX_SKB_PACB(skb, &buf_pa);
  823. pci_unmap_single(card->dev, buf_pa, skb->len,
  824. PCI_DMA_TODEVICE);
  825. unmap_count++;
  826. if (card->txbd_flush)
  827. mwifiex_write_data_complete(adapter, skb, 0,
  828. -1);
  829. else
  830. mwifiex_write_data_complete(adapter, skb, 0, 0);
  831. }
  832. card->tx_buf_list[wrdoneidx] = NULL;
  833. if (reg->pfu_enabled) {
  834. desc2 = (void *)card->txbd_ring[wrdoneidx];
  835. memset(desc2, 0, sizeof(*desc2));
  836. } else {
  837. desc = card->txbd_ring[wrdoneidx];
  838. memset(desc, 0, sizeof(*desc));
  839. }
  840. switch (card->dev->device) {
  841. case PCIE_DEVICE_ID_MARVELL_88W8766P:
  842. card->txbd_rdptr++;
  843. break;
  844. case PCIE_DEVICE_ID_MARVELL_88W8897:
  845. card->txbd_rdptr += reg->ring_tx_start_ptr;
  846. break;
  847. }
  848. if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
  849. card->txbd_rdptr = ((card->txbd_rdptr &
  850. reg->tx_rollover_ind) ^
  851. reg->tx_rollover_ind);
  852. }
  853. if (unmap_count)
  854. adapter->data_sent = false;
  855. if (card->txbd_flush) {
  856. if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
  857. card->txbd_flush = 0;
  858. else
  859. mwifiex_clean_pcie_ring_buf(adapter);
  860. }
  861. return 0;
  862. }
  863. /* This function sends data buffer to device. First 4 bytes of payload
  864. * are filled with payload length and payload type. Then this payload
  865. * is mapped to PCI device memory. Tx ring pointers are advanced accordingly.
  866. * Download ready interrupt to FW is deffered if Tx ring is not full and
  867. * additional payload can be accomodated.
  868. */
  869. static int
  870. mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
  871. struct mwifiex_tx_param *tx_param)
  872. {
  873. struct pcie_service_card *card = adapter->card;
  874. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  875. u32 wrindx, num_tx_buffs, rx_val;
  876. int ret;
  877. dma_addr_t buf_pa;
  878. struct mwifiex_pcie_buf_desc *desc;
  879. struct mwifiex_pfu_buf_desc *desc2;
  880. __le16 *tmp;
  881. if (!(skb->data && skb->len)) {
  882. dev_err(adapter->dev, "%s(): invalid parameter <%p, %#x>\n",
  883. __func__, skb->data, skb->len);
  884. return -1;
  885. }
  886. if (!mwifiex_pcie_ok_to_access_hw(adapter))
  887. mwifiex_pm_wakeup_card(adapter);
  888. num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
  889. dev_dbg(adapter->dev, "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
  890. card->txbd_rdptr, card->txbd_wrptr);
  891. if (mwifiex_pcie_txbd_not_full(card)) {
  892. u8 *payload;
  893. adapter->data_sent = true;
  894. payload = skb->data;
  895. tmp = (__le16 *)&payload[0];
  896. *tmp = cpu_to_le16((u16)skb->len);
  897. tmp = (__le16 *)&payload[2];
  898. *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA);
  899. if (mwifiex_map_pci_memory(adapter, skb, skb->len ,
  900. PCI_DMA_TODEVICE))
  901. return -1;
  902. wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
  903. MWIFIEX_SKB_PACB(skb, &buf_pa);
  904. card->tx_buf_list[wrindx] = skb;
  905. if (reg->pfu_enabled) {
  906. desc2 = (void *)card->txbd_ring[wrindx];
  907. desc2->paddr = buf_pa;
  908. desc2->len = (u16)skb->len;
  909. desc2->frag_len = (u16)skb->len;
  910. desc2->offset = 0;
  911. desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
  912. MWIFIEX_BD_FLAG_LAST_DESC;
  913. } else {
  914. desc = card->txbd_ring[wrindx];
  915. desc->paddr = buf_pa;
  916. desc->len = (u16)skb->len;
  917. desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
  918. MWIFIEX_BD_FLAG_LAST_DESC;
  919. }
  920. switch (card->dev->device) {
  921. case PCIE_DEVICE_ID_MARVELL_88W8766P:
  922. card->txbd_wrptr++;
  923. break;
  924. case PCIE_DEVICE_ID_MARVELL_88W8897:
  925. card->txbd_wrptr += reg->ring_tx_start_ptr;
  926. break;
  927. }
  928. if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
  929. card->txbd_wrptr = ((card->txbd_wrptr &
  930. reg->tx_rollover_ind) ^
  931. reg->tx_rollover_ind);
  932. rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
  933. /* Write the TX ring write pointer in to reg->tx_wrptr */
  934. if (mwifiex_write_reg(adapter, reg->tx_wrptr,
  935. card->txbd_wrptr | rx_val)) {
  936. dev_err(adapter->dev,
  937. "SEND DATA: failed to write reg->tx_wrptr\n");
  938. ret = -1;
  939. goto done_unmap;
  940. }
  941. if ((mwifiex_pcie_txbd_not_full(card)) &&
  942. tx_param->next_pkt_len) {
  943. /* have more packets and TxBD still can hold more */
  944. dev_dbg(adapter->dev,
  945. "SEND DATA: delay dnld-rdy interrupt.\n");
  946. adapter->data_sent = false;
  947. } else {
  948. /* Send the TX ready interrupt */
  949. if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
  950. CPU_INTR_DNLD_RDY)) {
  951. dev_err(adapter->dev,
  952. "SEND DATA: failed to assert dnld-rdy interrupt.\n");
  953. ret = -1;
  954. goto done_unmap;
  955. }
  956. }
  957. dev_dbg(adapter->dev, "info: SEND DATA: Updated <Rd: %#x, Wr: "
  958. "%#x> and sent packet to firmware successfully\n",
  959. card->txbd_rdptr, card->txbd_wrptr);
  960. } else {
  961. dev_dbg(adapter->dev,
  962. "info: TX Ring full, can't send packets to fw\n");
  963. adapter->data_sent = true;
  964. /* Send the TX ready interrupt */
  965. if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
  966. CPU_INTR_DNLD_RDY))
  967. dev_err(adapter->dev,
  968. "SEND DATA: failed to assert door-bell intr\n");
  969. return -EBUSY;
  970. }
  971. return -EINPROGRESS;
  972. done_unmap:
  973. MWIFIEX_SKB_PACB(skb, &buf_pa);
  974. pci_unmap_single(card->dev, buf_pa, skb->len, PCI_DMA_TODEVICE);
  975. card->tx_buf_list[wrindx] = NULL;
  976. if (reg->pfu_enabled)
  977. memset(desc2, 0, sizeof(*desc2));
  978. else
  979. memset(desc, 0, sizeof(*desc));
  980. return ret;
  981. }
  982. /*
  983. * This function handles received buffer ring and
  984. * dispatches packets to upper
  985. */
  986. static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
  987. {
  988. struct pcie_service_card *card = adapter->card;
  989. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  990. u32 wrptr, rd_index, tx_val;
  991. dma_addr_t buf_pa;
  992. int ret = 0;
  993. struct sk_buff *skb_tmp = NULL;
  994. struct mwifiex_pcie_buf_desc *desc;
  995. struct mwifiex_pfu_buf_desc *desc2;
  996. if (!mwifiex_pcie_ok_to_access_hw(adapter))
  997. mwifiex_pm_wakeup_card(adapter);
  998. /* Read the RX ring Write pointer set by firmware */
  999. if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
  1000. dev_err(adapter->dev,
  1001. "RECV DATA: failed to read reg->rx_wrptr\n");
  1002. ret = -1;
  1003. goto done;
  1004. }
  1005. card->rxbd_wrptr = wrptr;
  1006. while (((wrptr & reg->rx_mask) !=
  1007. (card->rxbd_rdptr & reg->rx_mask)) ||
  1008. ((wrptr & reg->rx_rollover_ind) ==
  1009. (card->rxbd_rdptr & reg->rx_rollover_ind))) {
  1010. struct sk_buff *skb_data;
  1011. u16 rx_len;
  1012. __le16 pkt_len;
  1013. rd_index = card->rxbd_rdptr & reg->rx_mask;
  1014. skb_data = card->rx_buf_list[rd_index];
  1015. MWIFIEX_SKB_PACB(skb_data, &buf_pa);
  1016. pci_unmap_single(card->dev, buf_pa, MWIFIEX_RX_DATA_BUF_SIZE,
  1017. PCI_DMA_FROMDEVICE);
  1018. card->rx_buf_list[rd_index] = NULL;
  1019. /* Get data length from interface header -
  1020. * first 2 bytes for len, next 2 bytes is for type
  1021. */
  1022. pkt_len = *((__le16 *)skb_data->data);
  1023. rx_len = le16_to_cpu(pkt_len);
  1024. skb_put(skb_data, rx_len);
  1025. dev_dbg(adapter->dev,
  1026. "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
  1027. card->rxbd_rdptr, wrptr, rx_len);
  1028. skb_pull(skb_data, INTF_HEADER_LEN);
  1029. mwifiex_handle_rx_packet(adapter, skb_data);
  1030. skb_tmp = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
  1031. if (!skb_tmp) {
  1032. dev_err(adapter->dev,
  1033. "Unable to allocate skb.\n");
  1034. return -ENOMEM;
  1035. }
  1036. if (mwifiex_map_pci_memory(adapter, skb_tmp,
  1037. MWIFIEX_RX_DATA_BUF_SIZE,
  1038. PCI_DMA_FROMDEVICE))
  1039. return -1;
  1040. MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
  1041. dev_dbg(adapter->dev,
  1042. "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
  1043. skb_tmp, rd_index);
  1044. card->rx_buf_list[rd_index] = skb_tmp;
  1045. if (reg->pfu_enabled) {
  1046. desc2 = (void *)card->rxbd_ring[rd_index];
  1047. desc2->paddr = buf_pa;
  1048. desc2->len = skb_tmp->len;
  1049. desc2->frag_len = skb_tmp->len;
  1050. desc2->offset = 0;
  1051. desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
  1052. } else {
  1053. desc = card->rxbd_ring[rd_index];
  1054. desc->paddr = buf_pa;
  1055. desc->len = skb_tmp->len;
  1056. desc->flags = 0;
  1057. }
  1058. if ((++card->rxbd_rdptr & reg->rx_mask) ==
  1059. MWIFIEX_MAX_TXRX_BD) {
  1060. card->rxbd_rdptr = ((card->rxbd_rdptr &
  1061. reg->rx_rollover_ind) ^
  1062. reg->rx_rollover_ind);
  1063. }
  1064. dev_dbg(adapter->dev, "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
  1065. card->rxbd_rdptr, wrptr);
  1066. tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
  1067. /* Write the RX ring read pointer in to reg->rx_rdptr */
  1068. if (mwifiex_write_reg(adapter, reg->rx_rdptr,
  1069. card->rxbd_rdptr | tx_val)) {
  1070. dev_err(adapter->dev,
  1071. "RECV DATA: failed to write reg->rx_rdptr\n");
  1072. ret = -1;
  1073. goto done;
  1074. }
  1075. /* Read the RX ring Write pointer set by firmware */
  1076. if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
  1077. dev_err(adapter->dev,
  1078. "RECV DATA: failed to read reg->rx_wrptr\n");
  1079. ret = -1;
  1080. goto done;
  1081. }
  1082. dev_dbg(adapter->dev,
  1083. "info: RECV DATA: Rcvd packet from fw successfully\n");
  1084. card->rxbd_wrptr = wrptr;
  1085. }
  1086. done:
  1087. return ret;
  1088. }
  1089. /*
  1090. * This function downloads the boot command to device
  1091. */
  1092. static int
  1093. mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
  1094. {
  1095. dma_addr_t buf_pa;
  1096. struct pcie_service_card *card = adapter->card;
  1097. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  1098. if (!(skb->data && skb->len)) {
  1099. dev_err(adapter->dev,
  1100. "Invalid parameter in %s <%p. len %d>\n",
  1101. __func__, skb->data, skb->len);
  1102. return -1;
  1103. }
  1104. if (mwifiex_map_pci_memory(adapter, skb, skb->len , PCI_DMA_TODEVICE))
  1105. return -1;
  1106. MWIFIEX_SKB_PACB(skb, &buf_pa);
  1107. /* Write the lower 32bits of the physical address to low command
  1108. * address scratch register
  1109. */
  1110. if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
  1111. dev_err(adapter->dev,
  1112. "%s: failed to write download command to boot code.\n",
  1113. __func__);
  1114. pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
  1115. PCI_DMA_TODEVICE);
  1116. return -1;
  1117. }
  1118. /* Write the upper 32bits of the physical address to high command
  1119. * address scratch register
  1120. */
  1121. if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
  1122. (u32)((u64)buf_pa >> 32))) {
  1123. dev_err(adapter->dev,
  1124. "%s: failed to write download command to boot code.\n",
  1125. __func__);
  1126. pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
  1127. PCI_DMA_TODEVICE);
  1128. return -1;
  1129. }
  1130. /* Write the command length to cmd_size scratch register */
  1131. if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
  1132. dev_err(adapter->dev,
  1133. "%s: failed to write command len to cmd_size scratch reg\n",
  1134. __func__);
  1135. pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
  1136. PCI_DMA_TODEVICE);
  1137. return -1;
  1138. }
  1139. /* Ring the door bell */
  1140. if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
  1141. CPU_INTR_DOOR_BELL)) {
  1142. dev_err(adapter->dev,
  1143. "%s: failed to assert door-bell intr\n", __func__);
  1144. pci_unmap_single(card->dev, buf_pa,
  1145. MWIFIEX_UPLD_SIZE, PCI_DMA_TODEVICE);
  1146. return -1;
  1147. }
  1148. return 0;
  1149. }
  1150. /* This function init rx port in firmware which in turn enables to receive data
  1151. * from device before transmitting any packet.
  1152. */
  1153. static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
  1154. {
  1155. struct pcie_service_card *card = adapter->card;
  1156. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  1157. int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
  1158. /* Write the RX ring read pointer in to reg->rx_rdptr */
  1159. if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
  1160. tx_wrap)) {
  1161. dev_err(adapter->dev,
  1162. "RECV DATA: failed to write reg->rx_rdptr\n");
  1163. return -1;
  1164. }
  1165. return 0;
  1166. }
  1167. /* This function downloads commands to the device
  1168. */
  1169. static int
  1170. mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
  1171. {
  1172. struct pcie_service_card *card = adapter->card;
  1173. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  1174. int ret = 0;
  1175. dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
  1176. u8 *payload = (u8 *)skb->data;
  1177. if (!(skb->data && skb->len)) {
  1178. dev_err(adapter->dev, "Invalid parameter in %s <%p, %#x>\n",
  1179. __func__, skb->data, skb->len);
  1180. return -1;
  1181. }
  1182. /* Make sure a command response buffer is available */
  1183. if (!card->cmdrsp_buf) {
  1184. dev_err(adapter->dev,
  1185. "No response buffer available, send command failed\n");
  1186. return -EBUSY;
  1187. }
  1188. if (!mwifiex_pcie_ok_to_access_hw(adapter))
  1189. mwifiex_pm_wakeup_card(adapter);
  1190. adapter->cmd_sent = true;
  1191. *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len);
  1192. *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD);
  1193. if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
  1194. return -1;
  1195. card->cmd_buf = skb;
  1196. /* To send a command, the driver will:
  1197. 1. Write the 64bit physical address of the data buffer to
  1198. cmd response address low + cmd response address high
  1199. 2. Ring the door bell (i.e. set the door bell interrupt)
  1200. In response to door bell interrupt, the firmware will perform
  1201. the DMA of the command packet (first header to obtain the total
  1202. length and then rest of the command).
  1203. */
  1204. if (card->cmdrsp_buf) {
  1205. MWIFIEX_SKB_PACB(card->cmdrsp_buf, &cmdrsp_buf_pa);
  1206. /* Write the lower 32bits of the cmdrsp buffer physical
  1207. address */
  1208. if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
  1209. (u32)cmdrsp_buf_pa)) {
  1210. dev_err(adapter->dev,
  1211. "Failed to write download cmd to boot code.\n");
  1212. ret = -1;
  1213. goto done;
  1214. }
  1215. /* Write the upper 32bits of the cmdrsp buffer physical
  1216. address */
  1217. if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
  1218. (u32)((u64)cmdrsp_buf_pa >> 32))) {
  1219. dev_err(adapter->dev,
  1220. "Failed to write download cmd to boot code.\n");
  1221. ret = -1;
  1222. goto done;
  1223. }
  1224. }
  1225. MWIFIEX_SKB_PACB(card->cmd_buf, &cmd_buf_pa);
  1226. /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */
  1227. if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
  1228. (u32)cmd_buf_pa)) {
  1229. dev_err(adapter->dev,
  1230. "Failed to write download cmd to boot code.\n");
  1231. ret = -1;
  1232. goto done;
  1233. }
  1234. /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */
  1235. if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
  1236. (u32)((u64)cmd_buf_pa >> 32))) {
  1237. dev_err(adapter->dev,
  1238. "Failed to write download cmd to boot code.\n");
  1239. ret = -1;
  1240. goto done;
  1241. }
  1242. /* Write the command length to reg->cmd_size */
  1243. if (mwifiex_write_reg(adapter, reg->cmd_size,
  1244. card->cmd_buf->len)) {
  1245. dev_err(adapter->dev,
  1246. "Failed to write cmd len to reg->cmd_size\n");
  1247. ret = -1;
  1248. goto done;
  1249. }
  1250. /* Ring the door bell */
  1251. if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
  1252. CPU_INTR_DOOR_BELL)) {
  1253. dev_err(adapter->dev,
  1254. "Failed to assert door-bell intr\n");
  1255. ret = -1;
  1256. goto done;
  1257. }
  1258. done:
  1259. if (ret)
  1260. adapter->cmd_sent = false;
  1261. return 0;
  1262. }
  1263. /*
  1264. * This function handles command complete interrupt
  1265. */
  1266. static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
  1267. {
  1268. struct pcie_service_card *card = adapter->card;
  1269. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  1270. struct sk_buff *skb = card->cmdrsp_buf;
  1271. int count = 0;
  1272. u16 rx_len;
  1273. __le16 pkt_len;
  1274. dma_addr_t buf_pa;
  1275. dev_dbg(adapter->dev, "info: Rx CMD Response\n");
  1276. MWIFIEX_SKB_PACB(skb, &buf_pa);
  1277. pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
  1278. PCI_DMA_FROMDEVICE);
  1279. pkt_len = *((__le16 *)skb->data);
  1280. rx_len = le16_to_cpu(pkt_len);
  1281. skb_trim(skb, rx_len);
  1282. skb_pull(skb, INTF_HEADER_LEN);
  1283. if (!adapter->curr_cmd) {
  1284. if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
  1285. mwifiex_process_sleep_confirm_resp(adapter, skb->data,
  1286. skb->len);
  1287. while (reg->sleep_cookie && (count++ < 10) &&
  1288. mwifiex_pcie_ok_to_access_hw(adapter))
  1289. usleep_range(50, 60);
  1290. } else {
  1291. dev_err(adapter->dev,
  1292. "There is no command but got cmdrsp\n");
  1293. }
  1294. memcpy(adapter->upld_buf, skb->data,
  1295. min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
  1296. if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
  1297. PCI_DMA_FROMDEVICE))
  1298. return -1;
  1299. MWIFIEX_SKB_PACB(skb, &buf_pa);
  1300. } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
  1301. adapter->curr_cmd->resp_skb = skb;
  1302. adapter->cmd_resp_received = true;
  1303. /* Take the pointer and set it to CMD node and will
  1304. return in the response complete callback */
  1305. card->cmdrsp_buf = NULL;
  1306. /* Clear the cmd-rsp buffer address in scratch registers. This
  1307. will prevent firmware from writing to the same response
  1308. buffer again. */
  1309. if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
  1310. dev_err(adapter->dev,
  1311. "cmd_done: failed to clear cmd_rsp_addr_lo\n");
  1312. return -1;
  1313. }
  1314. /* Write the upper 32bits of the cmdrsp buffer physical
  1315. address */
  1316. if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
  1317. dev_err(adapter->dev,
  1318. "cmd_done: failed to clear cmd_rsp_addr_hi\n");
  1319. return -1;
  1320. }
  1321. }
  1322. return 0;
  1323. }
  1324. /*
  1325. * Command Response processing complete handler
  1326. */
  1327. static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
  1328. struct sk_buff *skb)
  1329. {
  1330. struct pcie_service_card *card = adapter->card;
  1331. dma_addr_t buf_pa;
  1332. struct sk_buff *skb_tmp;
  1333. if (skb) {
  1334. card->cmdrsp_buf = skb;
  1335. skb_push(card->cmdrsp_buf, INTF_HEADER_LEN);
  1336. if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
  1337. PCI_DMA_FROMDEVICE))
  1338. return -1;
  1339. }
  1340. skb_tmp = card->cmd_buf;
  1341. if (skb_tmp) {
  1342. MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
  1343. pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
  1344. PCI_DMA_FROMDEVICE);
  1345. card->cmd_buf = NULL;
  1346. }
  1347. return 0;
  1348. }
  1349. /*
  1350. * This function handles firmware event ready interrupt
  1351. */
  1352. static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
  1353. {
  1354. struct pcie_service_card *card = adapter->card;
  1355. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  1356. u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
  1357. u32 wrptr, event;
  1358. dma_addr_t buf_pa;
  1359. struct mwifiex_evt_buf_desc *desc;
  1360. if (!mwifiex_pcie_ok_to_access_hw(adapter))
  1361. mwifiex_pm_wakeup_card(adapter);
  1362. if (adapter->event_received) {
  1363. dev_dbg(adapter->dev, "info: Event being processed, "
  1364. "do not process this interrupt just yet\n");
  1365. return 0;
  1366. }
  1367. if (rdptr >= MWIFIEX_MAX_EVT_BD) {
  1368. dev_dbg(adapter->dev, "info: Invalid read pointer...\n");
  1369. return -1;
  1370. }
  1371. /* Read the event ring write pointer set by firmware */
  1372. if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
  1373. dev_err(adapter->dev,
  1374. "EventReady: failed to read reg->evt_wrptr\n");
  1375. return -1;
  1376. }
  1377. dev_dbg(adapter->dev, "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
  1378. card->evtbd_rdptr, wrptr);
  1379. if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
  1380. & MWIFIEX_EVTBD_MASK)) ||
  1381. ((wrptr & reg->evt_rollover_ind) ==
  1382. (card->evtbd_rdptr & reg->evt_rollover_ind))) {
  1383. struct sk_buff *skb_cmd;
  1384. __le16 data_len = 0;
  1385. u16 evt_len;
  1386. dev_dbg(adapter->dev, "info: Read Index: %d\n", rdptr);
  1387. skb_cmd = card->evt_buf_list[rdptr];
  1388. MWIFIEX_SKB_PACB(skb_cmd, &buf_pa);
  1389. pci_unmap_single(card->dev, buf_pa, MAX_EVENT_SIZE,
  1390. PCI_DMA_FROMDEVICE);
  1391. /* Take the pointer and set it to event pointer in adapter
  1392. and will return back after event handling callback */
  1393. card->evt_buf_list[rdptr] = NULL;
  1394. desc = card->evtbd_ring[rdptr];
  1395. memset(desc, 0, sizeof(*desc));
  1396. event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN];
  1397. adapter->event_cause = event;
  1398. /* The first 4bytes will be the event transfer header
  1399. len is 2 bytes followed by type which is 2 bytes */
  1400. memcpy(&data_len, skb_cmd->data, sizeof(__le16));
  1401. evt_len = le16_to_cpu(data_len);
  1402. skb_pull(skb_cmd, INTF_HEADER_LEN);
  1403. dev_dbg(adapter->dev, "info: Event length: %d\n", evt_len);
  1404. if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE))
  1405. memcpy(adapter->event_body, skb_cmd->data +
  1406. MWIFIEX_EVENT_HEADER_LEN, evt_len -
  1407. MWIFIEX_EVENT_HEADER_LEN);
  1408. adapter->event_received = true;
  1409. adapter->event_skb = skb_cmd;
  1410. /* Do not update the event read pointer here, wait till the
  1411. buffer is released. This is just to make things simpler,
  1412. we need to find a better method of managing these buffers.
  1413. */
  1414. }
  1415. return 0;
  1416. }
  1417. /*
  1418. * Event processing complete handler
  1419. */
  1420. static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
  1421. struct sk_buff *skb)
  1422. {
  1423. struct pcie_service_card *card = adapter->card;
  1424. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  1425. int ret = 0;
  1426. u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
  1427. u32 wrptr;
  1428. dma_addr_t buf_pa;
  1429. struct mwifiex_evt_buf_desc *desc;
  1430. if (!skb)
  1431. return 0;
  1432. if (rdptr >= MWIFIEX_MAX_EVT_BD) {
  1433. dev_err(adapter->dev, "event_complete: Invalid rdptr 0x%x\n",
  1434. rdptr);
  1435. return -EINVAL;
  1436. }
  1437. /* Read the event ring write pointer set by firmware */
  1438. if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
  1439. dev_err(adapter->dev,
  1440. "event_complete: failed to read reg->evt_wrptr\n");
  1441. return -1;
  1442. }
  1443. if (!card->evt_buf_list[rdptr]) {
  1444. skb_push(skb, INTF_HEADER_LEN);
  1445. if (mwifiex_map_pci_memory(adapter, skb,
  1446. MAX_EVENT_SIZE,
  1447. PCI_DMA_FROMDEVICE))
  1448. return -1;
  1449. MWIFIEX_SKB_PACB(skb, &buf_pa);
  1450. card->evt_buf_list[rdptr] = skb;
  1451. MWIFIEX_SKB_PACB(skb, &buf_pa);
  1452. desc = card->evtbd_ring[rdptr];
  1453. desc->paddr = buf_pa;
  1454. desc->len = (u16)skb->len;
  1455. desc->flags = 0;
  1456. skb = NULL;
  1457. } else {
  1458. dev_dbg(adapter->dev,
  1459. "info: ERROR: buf still valid at index %d, <%p, %p>\n",
  1460. rdptr, card->evt_buf_list[rdptr], skb);
  1461. }
  1462. if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
  1463. card->evtbd_rdptr = ((card->evtbd_rdptr &
  1464. reg->evt_rollover_ind) ^
  1465. reg->evt_rollover_ind);
  1466. }
  1467. dev_dbg(adapter->dev, "info: Updated <Rd: 0x%x, Wr: 0x%x>",
  1468. card->evtbd_rdptr, wrptr);
  1469. /* Write the event ring read pointer in to reg->evt_rdptr */
  1470. if (mwifiex_write_reg(adapter, reg->evt_rdptr,
  1471. card->evtbd_rdptr)) {
  1472. dev_err(adapter->dev,
  1473. "event_complete: failed to read reg->evt_rdptr\n");
  1474. return -1;
  1475. }
  1476. dev_dbg(adapter->dev, "info: Check Events Again\n");
  1477. ret = mwifiex_pcie_process_event_ready(adapter);
  1478. return ret;
  1479. }
  1480. /*
  1481. * This function downloads the firmware to the card.
  1482. *
  1483. * Firmware is downloaded to the card in blocks. Every block download
  1484. * is tested for CRC errors, and retried a number of times before
  1485. * returning failure.
  1486. */
  1487. static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
  1488. struct mwifiex_fw_image *fw)
  1489. {
  1490. int ret;
  1491. u8 *firmware = fw->fw_buf;
  1492. u32 firmware_len = fw->fw_len;
  1493. u32 offset = 0;
  1494. struct sk_buff *skb;
  1495. u32 txlen, tx_blocks = 0, tries, len;
  1496. u32 block_retry_cnt = 0;
  1497. dma_addr_t buf_pa;
  1498. struct pcie_service_card *card = adapter->card;
  1499. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  1500. if (!firmware || !firmware_len) {
  1501. dev_err(adapter->dev,
  1502. "No firmware image found! Terminating download\n");
  1503. return -1;
  1504. }
  1505. dev_dbg(adapter->dev, "info: Downloading FW image (%d bytes)\n",
  1506. firmware_len);
  1507. if (mwifiex_pcie_disable_host_int(adapter)) {
  1508. dev_err(adapter->dev,
  1509. "%s: Disabling interrupts failed.\n", __func__);
  1510. return -1;
  1511. }
  1512. skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
  1513. if (!skb) {
  1514. ret = -ENOMEM;
  1515. goto done;
  1516. }
  1517. /* Perform firmware data transfer */
  1518. do {
  1519. u32 ireg_intr = 0;
  1520. /* More data? */
  1521. if (offset >= firmware_len)
  1522. break;
  1523. for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
  1524. ret = mwifiex_read_reg(adapter, reg->cmd_size,
  1525. &len);
  1526. if (ret) {
  1527. dev_warn(adapter->dev,
  1528. "Failed reading len from boot code\n");
  1529. goto done;
  1530. }
  1531. if (len)
  1532. break;
  1533. usleep_range(10, 20);
  1534. }
  1535. if (!len) {
  1536. break;
  1537. } else if (len > MWIFIEX_UPLD_SIZE) {
  1538. pr_err("FW download failure @ %d, invalid length %d\n",
  1539. offset, len);
  1540. ret = -1;
  1541. goto done;
  1542. }
  1543. txlen = len;
  1544. if (len & BIT(0)) {
  1545. block_retry_cnt++;
  1546. if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
  1547. pr_err("FW download failure @ %d, over max "
  1548. "retry count\n", offset);
  1549. ret = -1;
  1550. goto done;
  1551. }
  1552. dev_err(adapter->dev, "FW CRC error indicated by the "
  1553. "helper: len = 0x%04X, txlen = %d\n",
  1554. len, txlen);
  1555. len &= ~BIT(0);
  1556. /* Setting this to 0 to resend from same offset */
  1557. txlen = 0;
  1558. } else {
  1559. block_retry_cnt = 0;
  1560. /* Set blocksize to transfer - checking for
  1561. last block */
  1562. if (firmware_len - offset < txlen)
  1563. txlen = firmware_len - offset;
  1564. dev_dbg(adapter->dev, ".");
  1565. tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
  1566. card->pcie.blksz_fw_dl;
  1567. /* Copy payload to buffer */
  1568. memmove(skb->data, &firmware[offset], txlen);
  1569. }
  1570. skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
  1571. skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
  1572. /* Send the boot command to device */
  1573. if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
  1574. dev_err(adapter->dev,
  1575. "Failed to send firmware download command\n");
  1576. ret = -1;
  1577. goto done;
  1578. }
  1579. MWIFIEX_SKB_PACB(skb, &buf_pa);
  1580. /* Wait for the command done interrupt */
  1581. do {
  1582. if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
  1583. &ireg_intr)) {
  1584. dev_err(adapter->dev, "%s: Failed to read "
  1585. "interrupt status during fw dnld.\n",
  1586. __func__);
  1587. pci_unmap_single(card->dev, buf_pa, skb->len,
  1588. PCI_DMA_TODEVICE);
  1589. ret = -1;
  1590. goto done;
  1591. }
  1592. } while ((ireg_intr & CPU_INTR_DOOR_BELL) ==
  1593. CPU_INTR_DOOR_BELL);
  1594. pci_unmap_single(card->dev, buf_pa, skb->len,
  1595. PCI_DMA_TODEVICE);
  1596. offset += txlen;
  1597. } while (true);
  1598. dev_dbg(adapter->dev, "info:\nFW download over, size %d bytes\n",
  1599. offset);
  1600. ret = 0;
  1601. done:
  1602. dev_kfree_skb_any(skb);
  1603. return ret;
  1604. }
  1605. /*
  1606. * This function checks the firmware status in card.
  1607. *
  1608. * The winner interface is also determined by this function.
  1609. */
  1610. static int
  1611. mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
  1612. {
  1613. int ret = 0;
  1614. u32 firmware_stat, winner_status;
  1615. struct pcie_service_card *card = adapter->card;
  1616. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  1617. u32 tries;
  1618. /* Mask spurios interrupts */
  1619. if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
  1620. HOST_INTR_MASK)) {
  1621. dev_warn(adapter->dev, "Write register failed\n");
  1622. return -1;
  1623. }
  1624. dev_dbg(adapter->dev, "Setting driver ready signature\n");
  1625. if (mwifiex_write_reg(adapter, reg->drv_rdy,
  1626. FIRMWARE_READY_PCIE)) {
  1627. dev_err(adapter->dev,
  1628. "Failed to write driver ready signature\n");
  1629. return -1;
  1630. }
  1631. /* Wait for firmware initialization event */
  1632. for (tries = 0; tries < poll_num; tries++) {
  1633. if (mwifiex_read_reg(adapter, reg->fw_status,
  1634. &firmware_stat))
  1635. ret = -1;
  1636. else
  1637. ret = 0;
  1638. if (ret)
  1639. continue;
  1640. if (firmware_stat == FIRMWARE_READY_PCIE) {
  1641. ret = 0;
  1642. break;
  1643. } else {
  1644. mdelay(100);
  1645. ret = -1;
  1646. }
  1647. }
  1648. if (ret) {
  1649. if (mwifiex_read_reg(adapter, reg->fw_status,
  1650. &winner_status))
  1651. ret = -1;
  1652. else if (!winner_status) {
  1653. dev_err(adapter->dev, "PCI-E is the winner\n");
  1654. adapter->winner = 1;
  1655. ret = -1;
  1656. } else {
  1657. dev_err(adapter->dev,
  1658. "PCI-E is not the winner <%#x,%d>, exit dnld\n",
  1659. ret, adapter->winner);
  1660. ret = 0;
  1661. }
  1662. }
  1663. return ret;
  1664. }
  1665. /*
  1666. * This function reads the interrupt status from card.
  1667. */
  1668. static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
  1669. {
  1670. u32 pcie_ireg;
  1671. unsigned long flags;
  1672. if (!mwifiex_pcie_ok_to_access_hw(adapter))
  1673. return;
  1674. if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, &pcie_ireg)) {
  1675. dev_warn(adapter->dev, "Read register failed\n");
  1676. return;
  1677. }
  1678. if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
  1679. mwifiex_pcie_disable_host_int(adapter);
  1680. /* Clear the pending interrupts */
  1681. if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
  1682. ~pcie_ireg)) {
  1683. dev_warn(adapter->dev, "Write register failed\n");
  1684. return;
  1685. }
  1686. spin_lock_irqsave(&adapter->int_lock, flags);
  1687. adapter->int_status |= pcie_ireg;
  1688. spin_unlock_irqrestore(&adapter->int_lock, flags);
  1689. if (pcie_ireg & HOST_INTR_CMD_DONE) {
  1690. if ((adapter->ps_state == PS_STATE_SLEEP_CFM) ||
  1691. (adapter->ps_state == PS_STATE_SLEEP)) {
  1692. mwifiex_pcie_enable_host_int(adapter);
  1693. if (mwifiex_write_reg(adapter,
  1694. PCIE_CPU_INT_EVENT,
  1695. CPU_INTR_SLEEP_CFM_DONE)
  1696. ) {
  1697. dev_warn(adapter->dev,
  1698. "Write register failed\n");
  1699. return;
  1700. }
  1701. }
  1702. } else if (!adapter->pps_uapsd_mode &&
  1703. adapter->ps_state == PS_STATE_SLEEP) {
  1704. /* Potentially for PCIe we could get other
  1705. * interrupts like shared. Don't change power
  1706. * state until cookie is set */
  1707. if (mwifiex_pcie_ok_to_access_hw(adapter))
  1708. adapter->ps_state = PS_STATE_AWAKE;
  1709. }
  1710. }
  1711. }
  1712. /*
  1713. * Interrupt handler for PCIe root port
  1714. *
  1715. * This function reads the interrupt status from firmware and assigns
  1716. * the main process in workqueue which will handle the interrupt.
  1717. */
  1718. static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
  1719. {
  1720. struct pci_dev *pdev = (struct pci_dev *)context;
  1721. struct pcie_service_card *card;
  1722. struct mwifiex_adapter *adapter;
  1723. if (!pdev) {
  1724. pr_debug("info: %s: pdev is NULL\n", (u8 *)pdev);
  1725. goto exit;
  1726. }
  1727. card = (struct pcie_service_card *) pci_get_drvdata(pdev);
  1728. if (!card || !card->adapter) {
  1729. pr_debug("info: %s: card=%p adapter=%p\n", __func__, card,
  1730. card ? card->adapter : NULL);
  1731. goto exit;
  1732. }
  1733. adapter = card->adapter;
  1734. if (adapter->surprise_removed)
  1735. goto exit;
  1736. mwifiex_interrupt_status(adapter);
  1737. queue_work(adapter->workqueue, &adapter->main_work);
  1738. exit:
  1739. return IRQ_HANDLED;
  1740. }
  1741. /*
  1742. * This function checks the current interrupt status.
  1743. *
  1744. * The following interrupts are checked and handled by this function -
  1745. * - Data sent
  1746. * - Command sent
  1747. * - Command received
  1748. * - Packets received
  1749. * - Events received
  1750. *
  1751. * In case of Rx packets received, the packets are uploaded from card to
  1752. * host and processed accordingly.
  1753. */
  1754. static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
  1755. {
  1756. int ret;
  1757. u32 pcie_ireg;
  1758. unsigned long flags;
  1759. spin_lock_irqsave(&adapter->int_lock, flags);
  1760. /* Clear out unused interrupts */
  1761. pcie_ireg = adapter->int_status;
  1762. adapter->int_status = 0;
  1763. spin_unlock_irqrestore(&adapter->int_lock, flags);
  1764. while (pcie_ireg & HOST_INTR_MASK) {
  1765. if (pcie_ireg & HOST_INTR_DNLD_DONE) {
  1766. pcie_ireg &= ~HOST_INTR_DNLD_DONE;
  1767. dev_dbg(adapter->dev, "info: TX DNLD Done\n");
  1768. ret = mwifiex_pcie_send_data_complete(adapter);
  1769. if (ret)
  1770. return ret;
  1771. }
  1772. if (pcie_ireg & HOST_INTR_UPLD_RDY) {
  1773. pcie_ireg &= ~HOST_INTR_UPLD_RDY;
  1774. dev_dbg(adapter->dev, "info: Rx DATA\n");
  1775. ret = mwifiex_pcie_process_recv_data(adapter);
  1776. if (ret)
  1777. return ret;
  1778. }
  1779. if (pcie_ireg & HOST_INTR_EVENT_RDY) {
  1780. pcie_ireg &= ~HOST_INTR_EVENT_RDY;
  1781. dev_dbg(adapter->dev, "info: Rx EVENT\n");
  1782. ret = mwifiex_pcie_process_event_ready(adapter);
  1783. if (ret)
  1784. return ret;
  1785. }
  1786. if (pcie_ireg & HOST_INTR_CMD_DONE) {
  1787. pcie_ireg &= ~HOST_INTR_CMD_DONE;
  1788. if (adapter->cmd_sent) {
  1789. dev_dbg(adapter->dev,
  1790. "info: CMD sent Interrupt\n");
  1791. adapter->cmd_sent = false;
  1792. }
  1793. /* Handle command response */
  1794. ret = mwifiex_pcie_process_cmd_complete(adapter);
  1795. if (ret)
  1796. return ret;
  1797. }
  1798. if (mwifiex_pcie_ok_to_access_hw(adapter)) {
  1799. if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
  1800. &pcie_ireg)) {
  1801. dev_warn(adapter->dev,
  1802. "Read register failed\n");
  1803. return -1;
  1804. }
  1805. if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
  1806. if (mwifiex_write_reg(adapter,
  1807. PCIE_HOST_INT_STATUS,
  1808. ~pcie_ireg)) {
  1809. dev_warn(adapter->dev,
  1810. "Write register failed\n");
  1811. return -1;
  1812. }
  1813. }
  1814. }
  1815. }
  1816. dev_dbg(adapter->dev, "info: cmd_sent=%d data_sent=%d\n",
  1817. adapter->cmd_sent, adapter->data_sent);
  1818. mwifiex_pcie_enable_host_int(adapter);
  1819. return 0;
  1820. }
  1821. /*
  1822. * This function downloads data from driver to card.
  1823. *
  1824. * Both commands and data packets are transferred to the card by this
  1825. * function.
  1826. *
  1827. * This function adds the PCIE specific header to the front of the buffer
  1828. * before transferring. The header contains the length of the packet and
  1829. * the type. The firmware handles the packets based upon this set type.
  1830. */
  1831. static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
  1832. struct sk_buff *skb,
  1833. struct mwifiex_tx_param *tx_param)
  1834. {
  1835. if (!skb) {
  1836. dev_err(adapter->dev, "Passed NULL skb to %s\n", __func__);
  1837. return -1;
  1838. }
  1839. if (type == MWIFIEX_TYPE_DATA)
  1840. return mwifiex_pcie_send_data(adapter, skb, tx_param);
  1841. else if (type == MWIFIEX_TYPE_CMD)
  1842. return mwifiex_pcie_send_cmd(adapter, skb);
  1843. return 0;
  1844. }
  1845. /*
  1846. * This function initializes the PCI-E host memory space, WCB rings, etc.
  1847. *
  1848. * The following initializations steps are followed -
  1849. * - Allocate TXBD ring buffers
  1850. * - Allocate RXBD ring buffers
  1851. * - Allocate event BD ring buffers
  1852. * - Allocate command response ring buffer
  1853. * - Allocate sleep cookie buffer
  1854. */
  1855. static int mwifiex_pcie_init(struct mwifiex_adapter *adapter)
  1856. {
  1857. struct pcie_service_card *card = adapter->card;
  1858. int ret;
  1859. struct pci_dev *pdev = card->dev;
  1860. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  1861. pci_set_drvdata(pdev, card);
  1862. ret = pci_enable_device(pdev);
  1863. if (ret)
  1864. goto err_enable_dev;
  1865. pci_set_master(pdev);
  1866. dev_dbg(adapter->dev, "try set_consistent_dma_mask(32)\n");
  1867. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1868. if (ret) {
  1869. dev_err(adapter->dev, "set_dma_mask(32) failed\n");
  1870. goto err_set_dma_mask;
  1871. }
  1872. ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  1873. if (ret) {
  1874. dev_err(adapter->dev, "set_consistent_dma_mask(64) failed\n");
  1875. goto err_set_dma_mask;
  1876. }
  1877. ret = pci_request_region(pdev, 0, DRV_NAME);
  1878. if (ret) {
  1879. dev_err(adapter->dev, "req_reg(0) error\n");
  1880. goto err_req_region0;
  1881. }
  1882. card->pci_mmap = pci_iomap(pdev, 0, 0);
  1883. if (!card->pci_mmap) {
  1884. dev_err(adapter->dev, "iomap(0) error\n");
  1885. ret = -EIO;
  1886. goto err_iomap0;
  1887. }
  1888. ret = pci_request_region(pdev, 2, DRV_NAME);
  1889. if (ret) {
  1890. dev_err(adapter->dev, "req_reg(2) error\n");
  1891. goto err_req_region2;
  1892. }
  1893. card->pci_mmap1 = pci_iomap(pdev, 2, 0);
  1894. if (!card->pci_mmap1) {
  1895. dev_err(adapter->dev, "iomap(2) error\n");
  1896. ret = -EIO;
  1897. goto err_iomap2;
  1898. }
  1899. dev_dbg(adapter->dev,
  1900. "PCI memory map Virt0: %p PCI memory map Virt2: %p\n",
  1901. card->pci_mmap, card->pci_mmap1);
  1902. card->cmdrsp_buf = NULL;
  1903. ret = mwifiex_pcie_create_txbd_ring(adapter);
  1904. if (ret)
  1905. goto err_cre_txbd;
  1906. ret = mwifiex_pcie_create_rxbd_ring(adapter);
  1907. if (ret)
  1908. goto err_cre_rxbd;
  1909. ret = mwifiex_pcie_create_evtbd_ring(adapter);
  1910. if (ret)
  1911. goto err_cre_evtbd;
  1912. ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
  1913. if (ret)
  1914. goto err_alloc_cmdbuf;
  1915. if (reg->sleep_cookie) {
  1916. ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
  1917. if (ret)
  1918. goto err_alloc_cookie;
  1919. } else {
  1920. card->sleep_cookie_vbase = NULL;
  1921. }
  1922. return ret;
  1923. err_alloc_cookie:
  1924. mwifiex_pcie_delete_cmdrsp_buf(adapter);
  1925. err_alloc_cmdbuf:
  1926. mwifiex_pcie_delete_evtbd_ring(adapter);
  1927. err_cre_evtbd:
  1928. mwifiex_pcie_delete_rxbd_ring(adapter);
  1929. err_cre_rxbd:
  1930. mwifiex_pcie_delete_txbd_ring(adapter);
  1931. err_cre_txbd:
  1932. pci_iounmap(pdev, card->pci_mmap1);
  1933. err_iomap2:
  1934. pci_release_region(pdev, 2);
  1935. err_req_region2:
  1936. pci_iounmap(pdev, card->pci_mmap);
  1937. err_iomap0:
  1938. pci_release_region(pdev, 0);
  1939. err_req_region0:
  1940. err_set_dma_mask:
  1941. pci_disable_device(pdev);
  1942. err_enable_dev:
  1943. pci_set_drvdata(pdev, NULL);
  1944. return ret;
  1945. }
  1946. /*
  1947. * This function cleans up the allocated card buffers.
  1948. *
  1949. * The following are freed by this function -
  1950. * - TXBD ring buffers
  1951. * - RXBD ring buffers
  1952. * - Event BD ring buffers
  1953. * - Command response ring buffer
  1954. * - Sleep cookie buffer
  1955. */
  1956. static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter)
  1957. {
  1958. struct pcie_service_card *card = adapter->card;
  1959. struct pci_dev *pdev = card->dev;
  1960. const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
  1961. if (user_rmmod) {
  1962. dev_dbg(adapter->dev, "Clearing driver ready signature\n");
  1963. if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
  1964. dev_err(adapter->dev,
  1965. "Failed to write driver not-ready signature\n");
  1966. }
  1967. if (pdev) {
  1968. pci_iounmap(pdev, card->pci_mmap);
  1969. pci_iounmap(pdev, card->pci_mmap1);
  1970. pci_release_regions(pdev);
  1971. pci_disable_device(pdev);
  1972. pci_set_drvdata(pdev, NULL);
  1973. }
  1974. }
  1975. /*
  1976. * This function registers the PCIE device.
  1977. *
  1978. * PCIE IRQ is claimed, block size is set and driver data is initialized.
  1979. */
  1980. static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
  1981. {
  1982. int ret;
  1983. struct pcie_service_card *card = adapter->card;
  1984. struct pci_dev *pdev = card->dev;
  1985. /* save adapter pointer in card */
  1986. card->adapter = adapter;
  1987. ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
  1988. "MRVL_PCIE", pdev);
  1989. if (ret) {
  1990. pr_err("request_irq failed: ret=%d\n", ret);
  1991. adapter->card = NULL;
  1992. return -1;
  1993. }
  1994. adapter->dev = &pdev->dev;
  1995. strcpy(adapter->fw_name, card->pcie.firmware);
  1996. return 0;
  1997. }
  1998. /*
  1999. * This function unregisters the PCIE device.
  2000. *
  2001. * The PCIE IRQ is released, the function is disabled and driver
  2002. * data is set to null.
  2003. */
  2004. static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
  2005. {
  2006. struct pcie_service_card *card = adapter->card;
  2007. const struct mwifiex_pcie_card_reg *reg;
  2008. if (card) {
  2009. dev_dbg(adapter->dev, "%s(): calling free_irq()\n", __func__);
  2010. free_irq(card->dev->irq, card->dev);
  2011. reg = card->pcie.reg;
  2012. if (reg->sleep_cookie)
  2013. mwifiex_pcie_delete_sleep_cookie_buf(adapter);
  2014. mwifiex_pcie_delete_cmdrsp_buf(adapter);
  2015. mwifiex_pcie_delete_evtbd_ring(adapter);
  2016. mwifiex_pcie_delete_rxbd_ring(adapter);
  2017. mwifiex_pcie_delete_txbd_ring(adapter);
  2018. card->cmdrsp_buf = NULL;
  2019. }
  2020. }
  2021. static struct mwifiex_if_ops pcie_ops = {
  2022. .init_if = mwifiex_pcie_init,
  2023. .cleanup_if = mwifiex_pcie_cleanup,
  2024. .check_fw_status = mwifiex_check_fw_status,
  2025. .prog_fw = mwifiex_prog_fw_w_helper,
  2026. .register_dev = mwifiex_register_dev,
  2027. .unregister_dev = mwifiex_unregister_dev,
  2028. .enable_int = mwifiex_pcie_enable_host_int,
  2029. .process_int_status = mwifiex_process_int_status,
  2030. .host_to_card = mwifiex_pcie_host_to_card,
  2031. .wakeup = mwifiex_pm_wakeup_card,
  2032. .wakeup_complete = mwifiex_pm_wakeup_card_complete,
  2033. /* PCIE specific */
  2034. .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
  2035. .event_complete = mwifiex_pcie_event_complete,
  2036. .update_mp_end_port = NULL,
  2037. .cleanup_mpa_buf = NULL,
  2038. .init_fw_port = mwifiex_pcie_init_fw_port,
  2039. .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
  2040. };
  2041. /*
  2042. * This function initializes the PCIE driver module.
  2043. *
  2044. * This initiates the semaphore and registers the device with
  2045. * PCIE bus.
  2046. */
  2047. static int mwifiex_pcie_init_module(void)
  2048. {
  2049. int ret;
  2050. pr_debug("Marvell PCIe Driver\n");
  2051. sema_init(&add_remove_card_sem, 1);
  2052. /* Clear the flag in case user removes the card. */
  2053. user_rmmod = 0;
  2054. ret = pci_register_driver(&mwifiex_pcie);
  2055. if (ret)
  2056. pr_err("Driver register failed!\n");
  2057. else
  2058. pr_debug("info: Driver registered successfully!\n");
  2059. return ret;
  2060. }
  2061. /*
  2062. * This function cleans up the PCIE driver.
  2063. *
  2064. * The following major steps are followed for cleanup -
  2065. * - Resume the device if its suspended
  2066. * - Disconnect the device if connected
  2067. * - Shutdown the firmware
  2068. * - Unregister the device from PCIE bus.
  2069. */
  2070. static void mwifiex_pcie_cleanup_module(void)
  2071. {
  2072. if (!down_interruptible(&add_remove_card_sem))
  2073. up(&add_remove_card_sem);
  2074. /* Set the flag as user is removing this module. */
  2075. user_rmmod = 1;
  2076. pci_unregister_driver(&mwifiex_pcie);
  2077. }
  2078. module_init(mwifiex_pcie_init_module);
  2079. module_exit(mwifiex_pcie_cleanup_module);
  2080. MODULE_AUTHOR("Marvell International Ltd.");
  2081. MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
  2082. MODULE_VERSION(PCIE_VERSION);
  2083. MODULE_LICENSE("GPL v2");
  2084. MODULE_FIRMWARE(PCIE8766_DEFAULT_FW_NAME);
  2085. MODULE_FIRMWARE(PCIE8897_DEFAULT_FW_NAME);