main.c 109 KB

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  1. /*
  2. *
  3. * Broadcom B43legacy wireless driver
  4. *
  5. * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
  6. * Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
  7. * Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch>
  8. * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
  9. * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  10. * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  11. *
  12. * Some parts of the code in this file are derived from the ipw2200
  13. * driver Copyright(c) 2003 - 2004 Intel Corporation.
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; see the file COPYING. If not, write to
  26. * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  27. * Boston, MA 02110-1301, USA.
  28. *
  29. */
  30. #include <linux/delay.h>
  31. #include <linux/init.h>
  32. #include <linux/module.h>
  33. #include <linux/if_arp.h>
  34. #include <linux/etherdevice.h>
  35. #include <linux/firmware.h>
  36. #include <linux/workqueue.h>
  37. #include <linux/sched.h>
  38. #include <linux/skbuff.h>
  39. #include <linux/dma-mapping.h>
  40. #include <linux/slab.h>
  41. #include <net/dst.h>
  42. #include <asm/unaligned.h>
  43. #include "b43legacy.h"
  44. #include "main.h"
  45. #include "debugfs.h"
  46. #include "phy.h"
  47. #include "dma.h"
  48. #include "pio.h"
  49. #include "sysfs.h"
  50. #include "xmit.h"
  51. #include "radio.h"
  52. MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
  53. MODULE_AUTHOR("Martin Langer");
  54. MODULE_AUTHOR("Stefano Brivio");
  55. MODULE_AUTHOR("Michael Buesch");
  56. MODULE_LICENSE("GPL");
  57. MODULE_FIRMWARE("b43legacy/ucode2.fw");
  58. MODULE_FIRMWARE("b43legacy/ucode4.fw");
  59. #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
  60. static int modparam_pio;
  61. module_param_named(pio, modparam_pio, int, 0444);
  62. MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
  63. #elif defined(CONFIG_B43LEGACY_DMA)
  64. # define modparam_pio 0
  65. #elif defined(CONFIG_B43LEGACY_PIO)
  66. # define modparam_pio 1
  67. #endif
  68. static int modparam_bad_frames_preempt;
  69. module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  70. MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
  71. " Preemption");
  72. static char modparam_fwpostfix[16];
  73. module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
  74. MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
  75. /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
  76. static const struct ssb_device_id b43legacy_ssb_tbl[] = {
  77. SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
  78. SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
  79. SSB_DEVTABLE_END
  80. };
  81. MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
  82. /* Channel and ratetables are shared for all devices.
  83. * They can't be const, because ieee80211 puts some precalculated
  84. * data in there. This data is the same for all devices, so we don't
  85. * get concurrency issues */
  86. #define RATETAB_ENT(_rateid, _flags) \
  87. { \
  88. .bitrate = B43legacy_RATE_TO_100KBPS(_rateid), \
  89. .hw_value = (_rateid), \
  90. .flags = (_flags), \
  91. }
  92. /*
  93. * NOTE: When changing this, sync with xmit.c's
  94. * b43legacy_plcp_get_bitrate_idx_* functions!
  95. */
  96. static struct ieee80211_rate __b43legacy_ratetable[] = {
  97. RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
  98. RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
  99. RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
  100. RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
  101. RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
  102. RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
  103. RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
  104. RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
  105. RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
  106. RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
  107. RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
  108. RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
  109. };
  110. #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
  111. #define b43legacy_b_ratetable_size 4
  112. #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
  113. #define b43legacy_g_ratetable_size 12
  114. #define CHANTAB_ENT(_chanid, _freq) \
  115. { \
  116. .center_freq = (_freq), \
  117. .hw_value = (_chanid), \
  118. }
  119. static struct ieee80211_channel b43legacy_bg_chantable[] = {
  120. CHANTAB_ENT(1, 2412),
  121. CHANTAB_ENT(2, 2417),
  122. CHANTAB_ENT(3, 2422),
  123. CHANTAB_ENT(4, 2427),
  124. CHANTAB_ENT(5, 2432),
  125. CHANTAB_ENT(6, 2437),
  126. CHANTAB_ENT(7, 2442),
  127. CHANTAB_ENT(8, 2447),
  128. CHANTAB_ENT(9, 2452),
  129. CHANTAB_ENT(10, 2457),
  130. CHANTAB_ENT(11, 2462),
  131. CHANTAB_ENT(12, 2467),
  132. CHANTAB_ENT(13, 2472),
  133. CHANTAB_ENT(14, 2484),
  134. };
  135. static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
  136. .channels = b43legacy_bg_chantable,
  137. .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
  138. .bitrates = b43legacy_b_ratetable,
  139. .n_bitrates = b43legacy_b_ratetable_size,
  140. };
  141. static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
  142. .channels = b43legacy_bg_chantable,
  143. .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
  144. .bitrates = b43legacy_g_ratetable,
  145. .n_bitrates = b43legacy_g_ratetable_size,
  146. };
  147. static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
  148. static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
  149. static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
  150. static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
  151. static int b43legacy_ratelimit(struct b43legacy_wl *wl)
  152. {
  153. if (!wl || !wl->current_dev)
  154. return 1;
  155. if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
  156. return 1;
  157. /* We are up and running.
  158. * Ratelimit the messages to avoid DoS over the net. */
  159. return net_ratelimit();
  160. }
  161. void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
  162. {
  163. struct va_format vaf;
  164. va_list args;
  165. if (!b43legacy_ratelimit(wl))
  166. return;
  167. va_start(args, fmt);
  168. vaf.fmt = fmt;
  169. vaf.va = &args;
  170. printk(KERN_INFO "b43legacy-%s: %pV",
  171. (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
  172. va_end(args);
  173. }
  174. void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
  175. {
  176. struct va_format vaf;
  177. va_list args;
  178. if (!b43legacy_ratelimit(wl))
  179. return;
  180. va_start(args, fmt);
  181. vaf.fmt = fmt;
  182. vaf.va = &args;
  183. printk(KERN_ERR "b43legacy-%s ERROR: %pV",
  184. (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
  185. va_end(args);
  186. }
  187. void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
  188. {
  189. struct va_format vaf;
  190. va_list args;
  191. if (!b43legacy_ratelimit(wl))
  192. return;
  193. va_start(args, fmt);
  194. vaf.fmt = fmt;
  195. vaf.va = &args;
  196. printk(KERN_WARNING "b43legacy-%s warning: %pV",
  197. (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
  198. va_end(args);
  199. }
  200. #if B43legacy_DEBUG
  201. void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
  202. {
  203. struct va_format vaf;
  204. va_list args;
  205. va_start(args, fmt);
  206. vaf.fmt = fmt;
  207. vaf.va = &args;
  208. printk(KERN_DEBUG "b43legacy-%s debug: %pV",
  209. (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
  210. va_end(args);
  211. }
  212. #endif /* DEBUG */
  213. static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
  214. u32 val)
  215. {
  216. u32 status;
  217. B43legacy_WARN_ON(offset % 4 != 0);
  218. status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  219. if (status & B43legacy_MACCTL_BE)
  220. val = swab32(val);
  221. b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
  222. mmiowb();
  223. b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
  224. }
  225. static inline
  226. void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
  227. u16 routing, u16 offset)
  228. {
  229. u32 control;
  230. /* "offset" is the WORD offset. */
  231. control = routing;
  232. control <<= 16;
  233. control |= offset;
  234. b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
  235. }
  236. u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
  237. u16 routing, u16 offset)
  238. {
  239. u32 ret;
  240. if (routing == B43legacy_SHM_SHARED) {
  241. B43legacy_WARN_ON((offset & 0x0001) != 0);
  242. if (offset & 0x0003) {
  243. /* Unaligned access */
  244. b43legacy_shm_control_word(dev, routing, offset >> 2);
  245. ret = b43legacy_read16(dev,
  246. B43legacy_MMIO_SHM_DATA_UNALIGNED);
  247. ret <<= 16;
  248. b43legacy_shm_control_word(dev, routing,
  249. (offset >> 2) + 1);
  250. ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
  251. return ret;
  252. }
  253. offset >>= 2;
  254. }
  255. b43legacy_shm_control_word(dev, routing, offset);
  256. ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
  257. return ret;
  258. }
  259. u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
  260. u16 routing, u16 offset)
  261. {
  262. u16 ret;
  263. if (routing == B43legacy_SHM_SHARED) {
  264. B43legacy_WARN_ON((offset & 0x0001) != 0);
  265. if (offset & 0x0003) {
  266. /* Unaligned access */
  267. b43legacy_shm_control_word(dev, routing, offset >> 2);
  268. ret = b43legacy_read16(dev,
  269. B43legacy_MMIO_SHM_DATA_UNALIGNED);
  270. return ret;
  271. }
  272. offset >>= 2;
  273. }
  274. b43legacy_shm_control_word(dev, routing, offset);
  275. ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
  276. return ret;
  277. }
  278. void b43legacy_shm_write32(struct b43legacy_wldev *dev,
  279. u16 routing, u16 offset,
  280. u32 value)
  281. {
  282. if (routing == B43legacy_SHM_SHARED) {
  283. B43legacy_WARN_ON((offset & 0x0001) != 0);
  284. if (offset & 0x0003) {
  285. /* Unaligned access */
  286. b43legacy_shm_control_word(dev, routing, offset >> 2);
  287. mmiowb();
  288. b43legacy_write16(dev,
  289. B43legacy_MMIO_SHM_DATA_UNALIGNED,
  290. (value >> 16) & 0xffff);
  291. mmiowb();
  292. b43legacy_shm_control_word(dev, routing,
  293. (offset >> 2) + 1);
  294. mmiowb();
  295. b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
  296. value & 0xffff);
  297. return;
  298. }
  299. offset >>= 2;
  300. }
  301. b43legacy_shm_control_word(dev, routing, offset);
  302. mmiowb();
  303. b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
  304. }
  305. void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
  306. u16 value)
  307. {
  308. if (routing == B43legacy_SHM_SHARED) {
  309. B43legacy_WARN_ON((offset & 0x0001) != 0);
  310. if (offset & 0x0003) {
  311. /* Unaligned access */
  312. b43legacy_shm_control_word(dev, routing, offset >> 2);
  313. mmiowb();
  314. b43legacy_write16(dev,
  315. B43legacy_MMIO_SHM_DATA_UNALIGNED,
  316. value);
  317. return;
  318. }
  319. offset >>= 2;
  320. }
  321. b43legacy_shm_control_word(dev, routing, offset);
  322. mmiowb();
  323. b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
  324. }
  325. /* Read HostFlags */
  326. u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
  327. {
  328. u32 ret;
  329. ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  330. B43legacy_SHM_SH_HOSTFHI);
  331. ret <<= 16;
  332. ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  333. B43legacy_SHM_SH_HOSTFLO);
  334. return ret;
  335. }
  336. /* Write HostFlags */
  337. void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
  338. {
  339. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  340. B43legacy_SHM_SH_HOSTFLO,
  341. (value & 0x0000FFFF));
  342. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  343. B43legacy_SHM_SH_HOSTFHI,
  344. ((value & 0xFFFF0000) >> 16));
  345. }
  346. void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
  347. {
  348. /* We need to be careful. As we read the TSF from multiple
  349. * registers, we should take care of register overflows.
  350. * In theory, the whole tsf read process should be atomic.
  351. * We try to be atomic here, by restaring the read process,
  352. * if any of the high registers changed (overflew).
  353. */
  354. if (dev->dev->id.revision >= 3) {
  355. u32 low;
  356. u32 high;
  357. u32 high2;
  358. do {
  359. high = b43legacy_read32(dev,
  360. B43legacy_MMIO_REV3PLUS_TSF_HIGH);
  361. low = b43legacy_read32(dev,
  362. B43legacy_MMIO_REV3PLUS_TSF_LOW);
  363. high2 = b43legacy_read32(dev,
  364. B43legacy_MMIO_REV3PLUS_TSF_HIGH);
  365. } while (unlikely(high != high2));
  366. *tsf = high;
  367. *tsf <<= 32;
  368. *tsf |= low;
  369. } else {
  370. u64 tmp;
  371. u16 v0;
  372. u16 v1;
  373. u16 v2;
  374. u16 v3;
  375. u16 test1;
  376. u16 test2;
  377. u16 test3;
  378. do {
  379. v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
  380. v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
  381. v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
  382. v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
  383. test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
  384. test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
  385. test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
  386. } while (v3 != test3 || v2 != test2 || v1 != test1);
  387. *tsf = v3;
  388. *tsf <<= 48;
  389. tmp = v2;
  390. tmp <<= 32;
  391. *tsf |= tmp;
  392. tmp = v1;
  393. tmp <<= 16;
  394. *tsf |= tmp;
  395. *tsf |= v0;
  396. }
  397. }
  398. static void b43legacy_time_lock(struct b43legacy_wldev *dev)
  399. {
  400. u32 status;
  401. status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  402. status |= B43legacy_MACCTL_TBTTHOLD;
  403. b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
  404. mmiowb();
  405. }
  406. static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
  407. {
  408. u32 status;
  409. status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  410. status &= ~B43legacy_MACCTL_TBTTHOLD;
  411. b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
  412. }
  413. static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
  414. {
  415. /* Be careful with the in-progress timer.
  416. * First zero out the low register, so we have a full
  417. * register-overflow duration to complete the operation.
  418. */
  419. if (dev->dev->id.revision >= 3) {
  420. u32 lo = (tsf & 0x00000000FFFFFFFFULL);
  421. u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
  422. b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
  423. mmiowb();
  424. b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
  425. hi);
  426. mmiowb();
  427. b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
  428. lo);
  429. } else {
  430. u16 v0 = (tsf & 0x000000000000FFFFULL);
  431. u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
  432. u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
  433. u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
  434. b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
  435. mmiowb();
  436. b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
  437. mmiowb();
  438. b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
  439. mmiowb();
  440. b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
  441. mmiowb();
  442. b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
  443. }
  444. }
  445. void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
  446. {
  447. b43legacy_time_lock(dev);
  448. b43legacy_tsf_write_locked(dev, tsf);
  449. b43legacy_time_unlock(dev);
  450. }
  451. static
  452. void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
  453. u16 offset, const u8 *mac)
  454. {
  455. static const u8 zero_addr[ETH_ALEN] = { 0 };
  456. u16 data;
  457. if (!mac)
  458. mac = zero_addr;
  459. offset |= 0x0020;
  460. b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
  461. data = mac[0];
  462. data |= mac[1] << 8;
  463. b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
  464. data = mac[2];
  465. data |= mac[3] << 8;
  466. b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
  467. data = mac[4];
  468. data |= mac[5] << 8;
  469. b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
  470. }
  471. static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
  472. {
  473. static const u8 zero_addr[ETH_ALEN] = { 0 };
  474. const u8 *mac = dev->wl->mac_addr;
  475. const u8 *bssid = dev->wl->bssid;
  476. u8 mac_bssid[ETH_ALEN * 2];
  477. int i;
  478. u32 tmp;
  479. if (!bssid)
  480. bssid = zero_addr;
  481. if (!mac)
  482. mac = zero_addr;
  483. b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
  484. memcpy(mac_bssid, mac, ETH_ALEN);
  485. memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
  486. /* Write our MAC address and BSSID to template ram */
  487. for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
  488. tmp = (u32)(mac_bssid[i + 0]);
  489. tmp |= (u32)(mac_bssid[i + 1]) << 8;
  490. tmp |= (u32)(mac_bssid[i + 2]) << 16;
  491. tmp |= (u32)(mac_bssid[i + 3]) << 24;
  492. b43legacy_ram_write(dev, 0x20 + i, tmp);
  493. b43legacy_ram_write(dev, 0x78 + i, tmp);
  494. b43legacy_ram_write(dev, 0x478 + i, tmp);
  495. }
  496. }
  497. static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
  498. {
  499. b43legacy_write_mac_bssid_templates(dev);
  500. b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
  501. dev->wl->mac_addr);
  502. }
  503. static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
  504. u16 slot_time)
  505. {
  506. /* slot_time is in usec. */
  507. if (dev->phy.type != B43legacy_PHYTYPE_G)
  508. return;
  509. b43legacy_write16(dev, 0x684, 510 + slot_time);
  510. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
  511. slot_time);
  512. }
  513. static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
  514. {
  515. b43legacy_set_slot_time(dev, 9);
  516. }
  517. static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
  518. {
  519. b43legacy_set_slot_time(dev, 20);
  520. }
  521. /* Synchronize IRQ top- and bottom-half.
  522. * IRQs must be masked before calling this.
  523. * This must not be called with the irq_lock held.
  524. */
  525. static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
  526. {
  527. synchronize_irq(dev->dev->irq);
  528. tasklet_kill(&dev->isr_tasklet);
  529. }
  530. /* DummyTransmission function, as documented on
  531. * http://bcm-specs.sipsolutions.net/DummyTransmission
  532. */
  533. void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
  534. {
  535. struct b43legacy_phy *phy = &dev->phy;
  536. unsigned int i;
  537. unsigned int max_loop;
  538. u16 value;
  539. u32 buffer[5] = {
  540. 0x00000000,
  541. 0x00D40000,
  542. 0x00000000,
  543. 0x01000000,
  544. 0x00000000,
  545. };
  546. switch (phy->type) {
  547. case B43legacy_PHYTYPE_B:
  548. case B43legacy_PHYTYPE_G:
  549. max_loop = 0xFA;
  550. buffer[0] = 0x000B846E;
  551. break;
  552. default:
  553. B43legacy_BUG_ON(1);
  554. return;
  555. }
  556. for (i = 0; i < 5; i++)
  557. b43legacy_ram_write(dev, i * 4, buffer[i]);
  558. /* dummy read follows */
  559. b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  560. b43legacy_write16(dev, 0x0568, 0x0000);
  561. b43legacy_write16(dev, 0x07C0, 0x0000);
  562. b43legacy_write16(dev, 0x050C, 0x0000);
  563. b43legacy_write16(dev, 0x0508, 0x0000);
  564. b43legacy_write16(dev, 0x050A, 0x0000);
  565. b43legacy_write16(dev, 0x054C, 0x0000);
  566. b43legacy_write16(dev, 0x056A, 0x0014);
  567. b43legacy_write16(dev, 0x0568, 0x0826);
  568. b43legacy_write16(dev, 0x0500, 0x0000);
  569. b43legacy_write16(dev, 0x0502, 0x0030);
  570. if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
  571. b43legacy_radio_write16(dev, 0x0051, 0x0017);
  572. for (i = 0x00; i < max_loop; i++) {
  573. value = b43legacy_read16(dev, 0x050E);
  574. if (value & 0x0080)
  575. break;
  576. udelay(10);
  577. }
  578. for (i = 0x00; i < 0x0A; i++) {
  579. value = b43legacy_read16(dev, 0x050E);
  580. if (value & 0x0400)
  581. break;
  582. udelay(10);
  583. }
  584. for (i = 0x00; i < 0x0A; i++) {
  585. value = b43legacy_read16(dev, 0x0690);
  586. if (!(value & 0x0100))
  587. break;
  588. udelay(10);
  589. }
  590. if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
  591. b43legacy_radio_write16(dev, 0x0051, 0x0037);
  592. }
  593. /* Turn the Analog ON/OFF */
  594. static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
  595. {
  596. b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
  597. }
  598. void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
  599. {
  600. u32 tmslow;
  601. u32 macctl;
  602. flags |= B43legacy_TMSLOW_PHYCLKEN;
  603. flags |= B43legacy_TMSLOW_PHYRESET;
  604. ssb_device_enable(dev->dev, flags);
  605. msleep(2); /* Wait for the PLL to turn on. */
  606. /* Now take the PHY out of Reset again */
  607. tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
  608. tmslow |= SSB_TMSLOW_FGC;
  609. tmslow &= ~B43legacy_TMSLOW_PHYRESET;
  610. ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
  611. ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
  612. msleep(1);
  613. tmslow &= ~SSB_TMSLOW_FGC;
  614. ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
  615. ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
  616. msleep(1);
  617. /* Turn Analog ON */
  618. b43legacy_switch_analog(dev, 1);
  619. macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  620. macctl &= ~B43legacy_MACCTL_GMODE;
  621. if (flags & B43legacy_TMSLOW_GMODE) {
  622. macctl |= B43legacy_MACCTL_GMODE;
  623. dev->phy.gmode = true;
  624. } else
  625. dev->phy.gmode = false;
  626. macctl |= B43legacy_MACCTL_IHR_ENABLED;
  627. b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
  628. }
  629. static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
  630. {
  631. u32 v0;
  632. u32 v1;
  633. u16 tmp;
  634. struct b43legacy_txstatus stat;
  635. while (1) {
  636. v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
  637. if (!(v0 & 0x00000001))
  638. break;
  639. v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
  640. stat.cookie = (v0 >> 16);
  641. stat.seq = (v1 & 0x0000FFFF);
  642. stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
  643. tmp = (v0 & 0x0000FFFF);
  644. stat.frame_count = ((tmp & 0xF000) >> 12);
  645. stat.rts_count = ((tmp & 0x0F00) >> 8);
  646. stat.supp_reason = ((tmp & 0x001C) >> 2);
  647. stat.pm_indicated = !!(tmp & 0x0080);
  648. stat.intermediate = !!(tmp & 0x0040);
  649. stat.for_ampdu = !!(tmp & 0x0020);
  650. stat.acked = !!(tmp & 0x0002);
  651. b43legacy_handle_txstatus(dev, &stat);
  652. }
  653. }
  654. static void drain_txstatus_queue(struct b43legacy_wldev *dev)
  655. {
  656. u32 dummy;
  657. if (dev->dev->id.revision < 5)
  658. return;
  659. /* Read all entries from the microcode TXstatus FIFO
  660. * and throw them away.
  661. */
  662. while (1) {
  663. dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
  664. if (!(dummy & 0x00000001))
  665. break;
  666. dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
  667. }
  668. }
  669. static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
  670. {
  671. u32 val = 0;
  672. val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
  673. val <<= 16;
  674. val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
  675. return val;
  676. }
  677. static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
  678. {
  679. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
  680. (jssi & 0x0000FFFF));
  681. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
  682. (jssi & 0xFFFF0000) >> 16);
  683. }
  684. static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
  685. {
  686. b43legacy_jssi_write(dev, 0x7F7F7F7F);
  687. b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
  688. b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
  689. | B43legacy_MACCMD_BGNOISE);
  690. B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
  691. dev->phy.channel);
  692. }
  693. static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
  694. {
  695. /* Top half of Link Quality calculation. */
  696. if (dev->noisecalc.calculation_running)
  697. return;
  698. dev->noisecalc.channel_at_start = dev->phy.channel;
  699. dev->noisecalc.calculation_running = true;
  700. dev->noisecalc.nr_samples = 0;
  701. b43legacy_generate_noise_sample(dev);
  702. }
  703. static void handle_irq_noise(struct b43legacy_wldev *dev)
  704. {
  705. struct b43legacy_phy *phy = &dev->phy;
  706. u16 tmp;
  707. u8 noise[4];
  708. u8 i;
  709. u8 j;
  710. s32 average;
  711. /* Bottom half of Link Quality calculation. */
  712. B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
  713. if (dev->noisecalc.channel_at_start != phy->channel)
  714. goto drop_calculation;
  715. *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
  716. if (noise[0] == 0x7F || noise[1] == 0x7F ||
  717. noise[2] == 0x7F || noise[3] == 0x7F)
  718. goto generate_new;
  719. /* Get the noise samples. */
  720. B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
  721. i = dev->noisecalc.nr_samples;
  722. noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
  723. noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
  724. noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
  725. noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
  726. dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
  727. dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
  728. dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
  729. dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
  730. dev->noisecalc.nr_samples++;
  731. if (dev->noisecalc.nr_samples == 8) {
  732. /* Calculate the Link Quality by the noise samples. */
  733. average = 0;
  734. for (i = 0; i < 8; i++) {
  735. for (j = 0; j < 4; j++)
  736. average += dev->noisecalc.samples[i][j];
  737. }
  738. average /= (8 * 4);
  739. average *= 125;
  740. average += 64;
  741. average /= 128;
  742. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  743. 0x40C);
  744. tmp = (tmp / 128) & 0x1F;
  745. if (tmp >= 8)
  746. average += 2;
  747. else
  748. average -= 25;
  749. if (tmp == 8)
  750. average -= 72;
  751. else
  752. average -= 48;
  753. dev->stats.link_noise = average;
  754. drop_calculation:
  755. dev->noisecalc.calculation_running = false;
  756. return;
  757. }
  758. generate_new:
  759. b43legacy_generate_noise_sample(dev);
  760. }
  761. static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
  762. {
  763. if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
  764. /* TODO: PS TBTT */
  765. } else {
  766. if (1/*FIXME: the last PSpoll frame was sent successfully */)
  767. b43legacy_power_saving_ctl_bits(dev, -1, -1);
  768. }
  769. if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
  770. dev->dfq_valid = true;
  771. }
  772. static void handle_irq_atim_end(struct b43legacy_wldev *dev)
  773. {
  774. if (dev->dfq_valid) {
  775. b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
  776. b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
  777. | B43legacy_MACCMD_DFQ_VALID);
  778. dev->dfq_valid = false;
  779. }
  780. }
  781. static void handle_irq_pmq(struct b43legacy_wldev *dev)
  782. {
  783. u32 tmp;
  784. /* TODO: AP mode. */
  785. while (1) {
  786. tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
  787. if (!(tmp & 0x00000008))
  788. break;
  789. }
  790. /* 16bit write is odd, but correct. */
  791. b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
  792. }
  793. static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
  794. const u8 *data, u16 size,
  795. u16 ram_offset,
  796. u16 shm_size_offset, u8 rate)
  797. {
  798. u32 i;
  799. u32 tmp;
  800. struct b43legacy_plcp_hdr4 plcp;
  801. plcp.data = 0;
  802. b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
  803. b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
  804. ram_offset += sizeof(u32);
  805. /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
  806. * So leave the first two bytes of the next write blank.
  807. */
  808. tmp = (u32)(data[0]) << 16;
  809. tmp |= (u32)(data[1]) << 24;
  810. b43legacy_ram_write(dev, ram_offset, tmp);
  811. ram_offset += sizeof(u32);
  812. for (i = 2; i < size; i += sizeof(u32)) {
  813. tmp = (u32)(data[i + 0]);
  814. if (i + 1 < size)
  815. tmp |= (u32)(data[i + 1]) << 8;
  816. if (i + 2 < size)
  817. tmp |= (u32)(data[i + 2]) << 16;
  818. if (i + 3 < size)
  819. tmp |= (u32)(data[i + 3]) << 24;
  820. b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
  821. }
  822. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
  823. size + sizeof(struct b43legacy_plcp_hdr6));
  824. }
  825. /* Convert a b43legacy antenna number value to the PHY TX control value. */
  826. static u16 b43legacy_antenna_to_phyctl(int antenna)
  827. {
  828. switch (antenna) {
  829. case B43legacy_ANTENNA0:
  830. return B43legacy_TX4_PHY_ANT0;
  831. case B43legacy_ANTENNA1:
  832. return B43legacy_TX4_PHY_ANT1;
  833. }
  834. return B43legacy_TX4_PHY_ANTLAST;
  835. }
  836. static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
  837. u16 ram_offset,
  838. u16 shm_size_offset)
  839. {
  840. unsigned int i, len, variable_len;
  841. const struct ieee80211_mgmt *bcn;
  842. const u8 *ie;
  843. bool tim_found = false;
  844. unsigned int rate;
  845. u16 ctl;
  846. int antenna;
  847. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
  848. bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
  849. len = min((size_t)dev->wl->current_beacon->len,
  850. 0x200 - sizeof(struct b43legacy_plcp_hdr6));
  851. rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
  852. b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
  853. shm_size_offset, rate);
  854. /* Write the PHY TX control parameters. */
  855. antenna = B43legacy_ANTENNA_DEFAULT;
  856. antenna = b43legacy_antenna_to_phyctl(antenna);
  857. ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  858. B43legacy_SHM_SH_BEACPHYCTL);
  859. /* We can't send beacons with short preamble. Would get PHY errors. */
  860. ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
  861. ctl &= ~B43legacy_TX4_PHY_ANT;
  862. ctl &= ~B43legacy_TX4_PHY_ENC;
  863. ctl |= antenna;
  864. ctl |= B43legacy_TX4_PHY_ENC_CCK;
  865. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  866. B43legacy_SHM_SH_BEACPHYCTL, ctl);
  867. /* Find the position of the TIM and the DTIM_period value
  868. * and write them to SHM. */
  869. ie = bcn->u.beacon.variable;
  870. variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  871. for (i = 0; i < variable_len - 2; ) {
  872. uint8_t ie_id, ie_len;
  873. ie_id = ie[i];
  874. ie_len = ie[i + 1];
  875. if (ie_id == 5) {
  876. u16 tim_position;
  877. u16 dtim_period;
  878. /* This is the TIM Information Element */
  879. /* Check whether the ie_len is in the beacon data range. */
  880. if (variable_len < ie_len + 2 + i)
  881. break;
  882. /* A valid TIM is at least 4 bytes long. */
  883. if (ie_len < 4)
  884. break;
  885. tim_found = true;
  886. tim_position = sizeof(struct b43legacy_plcp_hdr6);
  887. tim_position += offsetof(struct ieee80211_mgmt,
  888. u.beacon.variable);
  889. tim_position += i;
  890. dtim_period = ie[i + 3];
  891. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  892. B43legacy_SHM_SH_TIMPOS, tim_position);
  893. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  894. B43legacy_SHM_SH_DTIMP, dtim_period);
  895. break;
  896. }
  897. i += ie_len + 2;
  898. }
  899. if (!tim_found) {
  900. b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
  901. "beacon template packet. AP or IBSS operation "
  902. "may be broken.\n");
  903. } else
  904. b43legacydbg(dev->wl, "Updated beacon template\n");
  905. }
  906. static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
  907. u16 shm_offset, u16 size,
  908. struct ieee80211_rate *rate)
  909. {
  910. struct b43legacy_plcp_hdr4 plcp;
  911. u32 tmp;
  912. __le16 dur;
  913. plcp.data = 0;
  914. b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
  915. dur = ieee80211_generic_frame_duration(dev->wl->hw,
  916. dev->wl->vif,
  917. IEEE80211_BAND_2GHZ,
  918. size,
  919. rate);
  920. /* Write PLCP in two parts and timing for packet transfer */
  921. tmp = le32_to_cpu(plcp.data);
  922. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
  923. tmp & 0xFFFF);
  924. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
  925. tmp >> 16);
  926. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
  927. le16_to_cpu(dur));
  928. }
  929. /* Instead of using custom probe response template, this function
  930. * just patches custom beacon template by:
  931. * 1) Changing packet type
  932. * 2) Patching duration field
  933. * 3) Stripping TIM
  934. */
  935. static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
  936. u16 *dest_size,
  937. struct ieee80211_rate *rate)
  938. {
  939. const u8 *src_data;
  940. u8 *dest_data;
  941. u16 src_size, elem_size, src_pos, dest_pos;
  942. __le16 dur;
  943. struct ieee80211_hdr *hdr;
  944. size_t ie_start;
  945. src_size = dev->wl->current_beacon->len;
  946. src_data = (const u8 *)dev->wl->current_beacon->data;
  947. /* Get the start offset of the variable IEs in the packet. */
  948. ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
  949. B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
  950. u.beacon.variable));
  951. if (B43legacy_WARN_ON(src_size < ie_start))
  952. return NULL;
  953. dest_data = kmalloc(src_size, GFP_ATOMIC);
  954. if (unlikely(!dest_data))
  955. return NULL;
  956. /* Copy the static data and all Information Elements, except the TIM. */
  957. memcpy(dest_data, src_data, ie_start);
  958. src_pos = ie_start;
  959. dest_pos = ie_start;
  960. for ( ; src_pos < src_size - 2; src_pos += elem_size) {
  961. elem_size = src_data[src_pos + 1] + 2;
  962. if (src_data[src_pos] == 5) {
  963. /* This is the TIM. */
  964. continue;
  965. }
  966. memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
  967. dest_pos += elem_size;
  968. }
  969. *dest_size = dest_pos;
  970. hdr = (struct ieee80211_hdr *)dest_data;
  971. /* Set the frame control. */
  972. hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
  973. IEEE80211_STYPE_PROBE_RESP);
  974. dur = ieee80211_generic_frame_duration(dev->wl->hw,
  975. dev->wl->vif,
  976. IEEE80211_BAND_2GHZ,
  977. *dest_size,
  978. rate);
  979. hdr->duration_id = dur;
  980. return dest_data;
  981. }
  982. static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
  983. u16 ram_offset,
  984. u16 shm_size_offset,
  985. struct ieee80211_rate *rate)
  986. {
  987. const u8 *probe_resp_data;
  988. u16 size;
  989. size = dev->wl->current_beacon->len;
  990. probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
  991. if (unlikely(!probe_resp_data))
  992. return;
  993. /* Looks like PLCP headers plus packet timings are stored for
  994. * all possible basic rates
  995. */
  996. b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
  997. &b43legacy_b_ratetable[0]);
  998. b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
  999. &b43legacy_b_ratetable[1]);
  1000. b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
  1001. &b43legacy_b_ratetable[2]);
  1002. b43legacy_write_probe_resp_plcp(dev, 0x350, size,
  1003. &b43legacy_b_ratetable[3]);
  1004. size = min((size_t)size,
  1005. 0x200 - sizeof(struct b43legacy_plcp_hdr6));
  1006. b43legacy_write_template_common(dev, probe_resp_data,
  1007. size, ram_offset,
  1008. shm_size_offset, rate->hw_value);
  1009. kfree(probe_resp_data);
  1010. }
  1011. static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
  1012. {
  1013. struct b43legacy_wl *wl = dev->wl;
  1014. if (wl->beacon0_uploaded)
  1015. return;
  1016. b43legacy_write_beacon_template(dev, 0x68, 0x18);
  1017. /* FIXME: Probe resp upload doesn't really belong here,
  1018. * but we don't use that feature anyway. */
  1019. b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
  1020. &__b43legacy_ratetable[3]);
  1021. wl->beacon0_uploaded = true;
  1022. }
  1023. static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
  1024. {
  1025. struct b43legacy_wl *wl = dev->wl;
  1026. if (wl->beacon1_uploaded)
  1027. return;
  1028. b43legacy_write_beacon_template(dev, 0x468, 0x1A);
  1029. wl->beacon1_uploaded = true;
  1030. }
  1031. static void handle_irq_beacon(struct b43legacy_wldev *dev)
  1032. {
  1033. struct b43legacy_wl *wl = dev->wl;
  1034. u32 cmd, beacon0_valid, beacon1_valid;
  1035. if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
  1036. return;
  1037. /* This is the bottom half of the asynchronous beacon update. */
  1038. /* Ignore interrupt in the future. */
  1039. dev->irq_mask &= ~B43legacy_IRQ_BEACON;
  1040. cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
  1041. beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
  1042. beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
  1043. /* Schedule interrupt manually, if busy. */
  1044. if (beacon0_valid && beacon1_valid) {
  1045. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
  1046. dev->irq_mask |= B43legacy_IRQ_BEACON;
  1047. return;
  1048. }
  1049. if (unlikely(wl->beacon_templates_virgin)) {
  1050. /* We never uploaded a beacon before.
  1051. * Upload both templates now, but only mark one valid. */
  1052. wl->beacon_templates_virgin = false;
  1053. b43legacy_upload_beacon0(dev);
  1054. b43legacy_upload_beacon1(dev);
  1055. cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
  1056. cmd |= B43legacy_MACCMD_BEACON0_VALID;
  1057. b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
  1058. } else {
  1059. if (!beacon0_valid) {
  1060. b43legacy_upload_beacon0(dev);
  1061. cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
  1062. cmd |= B43legacy_MACCMD_BEACON0_VALID;
  1063. b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
  1064. } else if (!beacon1_valid) {
  1065. b43legacy_upload_beacon1(dev);
  1066. cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
  1067. cmd |= B43legacy_MACCMD_BEACON1_VALID;
  1068. b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
  1069. }
  1070. }
  1071. }
  1072. static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
  1073. {
  1074. struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
  1075. beacon_update_trigger);
  1076. struct b43legacy_wldev *dev;
  1077. mutex_lock(&wl->mutex);
  1078. dev = wl->current_dev;
  1079. if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
  1080. spin_lock_irq(&wl->irq_lock);
  1081. /* Update beacon right away or defer to IRQ. */
  1082. handle_irq_beacon(dev);
  1083. /* The handler might have updated the IRQ mask. */
  1084. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
  1085. dev->irq_mask);
  1086. mmiowb();
  1087. spin_unlock_irq(&wl->irq_lock);
  1088. }
  1089. mutex_unlock(&wl->mutex);
  1090. }
  1091. /* Asynchronously update the packet templates in template RAM.
  1092. * Locking: Requires wl->irq_lock to be locked. */
  1093. static void b43legacy_update_templates(struct b43legacy_wl *wl)
  1094. {
  1095. struct sk_buff *beacon;
  1096. /* This is the top half of the ansynchronous beacon update. The bottom
  1097. * half is the beacon IRQ. Beacon update must be asynchronous to avoid
  1098. * sending an invalid beacon. This can happen for example, if the
  1099. * firmware transmits a beacon while we are updating it. */
  1100. /* We could modify the existing beacon and set the aid bit in the TIM
  1101. * field, but that would probably require resizing and moving of data
  1102. * within the beacon template. Simply request a new beacon and let
  1103. * mac80211 do the hard work. */
  1104. beacon = ieee80211_beacon_get(wl->hw, wl->vif);
  1105. if (unlikely(!beacon))
  1106. return;
  1107. if (wl->current_beacon)
  1108. dev_kfree_skb_any(wl->current_beacon);
  1109. wl->current_beacon = beacon;
  1110. wl->beacon0_uploaded = false;
  1111. wl->beacon1_uploaded = false;
  1112. ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
  1113. }
  1114. static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
  1115. u16 beacon_int)
  1116. {
  1117. b43legacy_time_lock(dev);
  1118. if (dev->dev->id.revision >= 3) {
  1119. b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
  1120. (beacon_int << 16));
  1121. b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
  1122. (beacon_int << 10));
  1123. } else {
  1124. b43legacy_write16(dev, 0x606, (beacon_int >> 6));
  1125. b43legacy_write16(dev, 0x610, beacon_int);
  1126. }
  1127. b43legacy_time_unlock(dev);
  1128. b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
  1129. }
  1130. static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
  1131. {
  1132. }
  1133. /* Interrupt handler bottom-half */
  1134. static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
  1135. {
  1136. u32 reason;
  1137. u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
  1138. u32 merged_dma_reason = 0;
  1139. int i;
  1140. unsigned long flags;
  1141. spin_lock_irqsave(&dev->wl->irq_lock, flags);
  1142. B43legacy_WARN_ON(b43legacy_status(dev) <
  1143. B43legacy_STAT_INITIALIZED);
  1144. reason = dev->irq_reason;
  1145. for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
  1146. dma_reason[i] = dev->dma_reason[i];
  1147. merged_dma_reason |= dma_reason[i];
  1148. }
  1149. if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
  1150. b43legacyerr(dev->wl, "MAC transmission error\n");
  1151. if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
  1152. b43legacyerr(dev->wl, "PHY transmission error\n");
  1153. rmb();
  1154. if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
  1155. b43legacyerr(dev->wl, "Too many PHY TX errors, "
  1156. "restarting the controller\n");
  1157. b43legacy_controller_restart(dev, "PHY TX errors");
  1158. }
  1159. }
  1160. if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
  1161. B43legacy_DMAIRQ_NONFATALMASK))) {
  1162. if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
  1163. b43legacyerr(dev->wl, "Fatal DMA error: "
  1164. "0x%08X, 0x%08X, 0x%08X, "
  1165. "0x%08X, 0x%08X, 0x%08X\n",
  1166. dma_reason[0], dma_reason[1],
  1167. dma_reason[2], dma_reason[3],
  1168. dma_reason[4], dma_reason[5]);
  1169. b43legacy_controller_restart(dev, "DMA error");
  1170. mmiowb();
  1171. spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
  1172. return;
  1173. }
  1174. if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
  1175. b43legacyerr(dev->wl, "DMA error: "
  1176. "0x%08X, 0x%08X, 0x%08X, "
  1177. "0x%08X, 0x%08X, 0x%08X\n",
  1178. dma_reason[0], dma_reason[1],
  1179. dma_reason[2], dma_reason[3],
  1180. dma_reason[4], dma_reason[5]);
  1181. }
  1182. if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
  1183. handle_irq_ucode_debug(dev);
  1184. if (reason & B43legacy_IRQ_TBTT_INDI)
  1185. handle_irq_tbtt_indication(dev);
  1186. if (reason & B43legacy_IRQ_ATIM_END)
  1187. handle_irq_atim_end(dev);
  1188. if (reason & B43legacy_IRQ_BEACON)
  1189. handle_irq_beacon(dev);
  1190. if (reason & B43legacy_IRQ_PMQ)
  1191. handle_irq_pmq(dev);
  1192. if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
  1193. ;/*TODO*/
  1194. if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
  1195. handle_irq_noise(dev);
  1196. /* Check the DMA reason registers for received data. */
  1197. if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
  1198. if (b43legacy_using_pio(dev))
  1199. b43legacy_pio_rx(dev->pio.queue0);
  1200. else
  1201. b43legacy_dma_rx(dev->dma.rx_ring0);
  1202. }
  1203. B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
  1204. B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
  1205. if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
  1206. if (b43legacy_using_pio(dev))
  1207. b43legacy_pio_rx(dev->pio.queue3);
  1208. else
  1209. b43legacy_dma_rx(dev->dma.rx_ring3);
  1210. }
  1211. B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
  1212. B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
  1213. if (reason & B43legacy_IRQ_TX_OK)
  1214. handle_irq_transmit_status(dev);
  1215. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
  1216. mmiowb();
  1217. spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
  1218. }
  1219. static void pio_irq_workaround(struct b43legacy_wldev *dev,
  1220. u16 base, int queueidx)
  1221. {
  1222. u16 rxctl;
  1223. rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
  1224. if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
  1225. dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
  1226. else
  1227. dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
  1228. }
  1229. static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
  1230. {
  1231. if (b43legacy_using_pio(dev) &&
  1232. (dev->dev->id.revision < 3) &&
  1233. (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
  1234. /* Apply a PIO specific workaround to the dma_reasons */
  1235. pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
  1236. pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
  1237. pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
  1238. pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
  1239. }
  1240. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
  1241. b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
  1242. dev->dma_reason[0]);
  1243. b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
  1244. dev->dma_reason[1]);
  1245. b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
  1246. dev->dma_reason[2]);
  1247. b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
  1248. dev->dma_reason[3]);
  1249. b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
  1250. dev->dma_reason[4]);
  1251. b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
  1252. dev->dma_reason[5]);
  1253. }
  1254. /* Interrupt handler top-half */
  1255. static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
  1256. {
  1257. irqreturn_t ret = IRQ_NONE;
  1258. struct b43legacy_wldev *dev = dev_id;
  1259. u32 reason;
  1260. B43legacy_WARN_ON(!dev);
  1261. spin_lock(&dev->wl->irq_lock);
  1262. if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
  1263. /* This can only happen on shared IRQ lines. */
  1264. goto out;
  1265. reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
  1266. if (reason == 0xffffffff) /* shared IRQ */
  1267. goto out;
  1268. ret = IRQ_HANDLED;
  1269. reason &= dev->irq_mask;
  1270. if (!reason)
  1271. goto out;
  1272. dev->dma_reason[0] = b43legacy_read32(dev,
  1273. B43legacy_MMIO_DMA0_REASON)
  1274. & 0x0001DC00;
  1275. dev->dma_reason[1] = b43legacy_read32(dev,
  1276. B43legacy_MMIO_DMA1_REASON)
  1277. & 0x0000DC00;
  1278. dev->dma_reason[2] = b43legacy_read32(dev,
  1279. B43legacy_MMIO_DMA2_REASON)
  1280. & 0x0000DC00;
  1281. dev->dma_reason[3] = b43legacy_read32(dev,
  1282. B43legacy_MMIO_DMA3_REASON)
  1283. & 0x0001DC00;
  1284. dev->dma_reason[4] = b43legacy_read32(dev,
  1285. B43legacy_MMIO_DMA4_REASON)
  1286. & 0x0000DC00;
  1287. dev->dma_reason[5] = b43legacy_read32(dev,
  1288. B43legacy_MMIO_DMA5_REASON)
  1289. & 0x0000DC00;
  1290. b43legacy_interrupt_ack(dev, reason);
  1291. /* Disable all IRQs. They are enabled again in the bottom half. */
  1292. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
  1293. /* Save the reason code and call our bottom half. */
  1294. dev->irq_reason = reason;
  1295. tasklet_schedule(&dev->isr_tasklet);
  1296. out:
  1297. mmiowb();
  1298. spin_unlock(&dev->wl->irq_lock);
  1299. return ret;
  1300. }
  1301. static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
  1302. {
  1303. release_firmware(dev->fw.ucode);
  1304. dev->fw.ucode = NULL;
  1305. release_firmware(dev->fw.pcm);
  1306. dev->fw.pcm = NULL;
  1307. release_firmware(dev->fw.initvals);
  1308. dev->fw.initvals = NULL;
  1309. release_firmware(dev->fw.initvals_band);
  1310. dev->fw.initvals_band = NULL;
  1311. }
  1312. static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
  1313. {
  1314. b43legacyerr(wl, "You must go to http://wireless.kernel.org/en/users/"
  1315. "Drivers/b43#devicefirmware "
  1316. "and download the correct firmware (version 3).\n");
  1317. }
  1318. static void b43legacy_fw_cb(const struct firmware *firmware, void *context)
  1319. {
  1320. struct b43legacy_wldev *dev = context;
  1321. dev->fwp = firmware;
  1322. complete(&dev->fw_load_complete);
  1323. }
  1324. static int do_request_fw(struct b43legacy_wldev *dev,
  1325. const char *name,
  1326. const struct firmware **fw, bool async)
  1327. {
  1328. char path[sizeof(modparam_fwpostfix) + 32];
  1329. struct b43legacy_fw_header *hdr;
  1330. u32 size;
  1331. int err;
  1332. if (!name)
  1333. return 0;
  1334. snprintf(path, ARRAY_SIZE(path),
  1335. "b43legacy%s/%s.fw",
  1336. modparam_fwpostfix, name);
  1337. b43legacyinfo(dev->wl, "Loading firmware %s\n", path);
  1338. if (async) {
  1339. init_completion(&dev->fw_load_complete);
  1340. err = request_firmware_nowait(THIS_MODULE, 1, path,
  1341. dev->dev->dev, GFP_KERNEL,
  1342. dev, b43legacy_fw_cb);
  1343. if (err) {
  1344. b43legacyerr(dev->wl, "Unable to load firmware\n");
  1345. return err;
  1346. }
  1347. /* stall here until fw ready */
  1348. wait_for_completion(&dev->fw_load_complete);
  1349. if (!dev->fwp)
  1350. err = -EINVAL;
  1351. *fw = dev->fwp;
  1352. } else {
  1353. err = request_firmware(fw, path, dev->dev->dev);
  1354. }
  1355. if (err) {
  1356. b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
  1357. "or load failed.\n", path);
  1358. return err;
  1359. }
  1360. if ((*fw)->size < sizeof(struct b43legacy_fw_header))
  1361. goto err_format;
  1362. hdr = (struct b43legacy_fw_header *)((*fw)->data);
  1363. switch (hdr->type) {
  1364. case B43legacy_FW_TYPE_UCODE:
  1365. case B43legacy_FW_TYPE_PCM:
  1366. size = be32_to_cpu(hdr->size);
  1367. if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
  1368. goto err_format;
  1369. /* fallthrough */
  1370. case B43legacy_FW_TYPE_IV:
  1371. if (hdr->ver != 1)
  1372. goto err_format;
  1373. break;
  1374. default:
  1375. goto err_format;
  1376. }
  1377. return err;
  1378. err_format:
  1379. b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
  1380. return -EPROTO;
  1381. }
  1382. static int b43legacy_one_core_attach(struct ssb_device *dev,
  1383. struct b43legacy_wl *wl);
  1384. static void b43legacy_one_core_detach(struct ssb_device *dev);
  1385. static void b43legacy_request_firmware(struct work_struct *work)
  1386. {
  1387. struct b43legacy_wl *wl = container_of(work,
  1388. struct b43legacy_wl, firmware_load);
  1389. struct b43legacy_wldev *dev = wl->current_dev;
  1390. struct b43legacy_firmware *fw = &dev->fw;
  1391. const u8 rev = dev->dev->id.revision;
  1392. const char *filename;
  1393. int err;
  1394. if (!fw->ucode) {
  1395. if (rev == 2)
  1396. filename = "ucode2";
  1397. else if (rev == 4)
  1398. filename = "ucode4";
  1399. else
  1400. filename = "ucode5";
  1401. err = do_request_fw(dev, filename, &fw->ucode, true);
  1402. if (err)
  1403. goto err_load;
  1404. }
  1405. if (!fw->pcm) {
  1406. if (rev < 5)
  1407. filename = "pcm4";
  1408. else
  1409. filename = "pcm5";
  1410. err = do_request_fw(dev, filename, &fw->pcm, false);
  1411. if (err)
  1412. goto err_load;
  1413. }
  1414. if (!fw->initvals) {
  1415. switch (dev->phy.type) {
  1416. case B43legacy_PHYTYPE_B:
  1417. case B43legacy_PHYTYPE_G:
  1418. if ((rev >= 5) && (rev <= 10))
  1419. filename = "b0g0initvals5";
  1420. else if (rev == 2 || rev == 4)
  1421. filename = "b0g0initvals2";
  1422. else
  1423. goto err_no_initvals;
  1424. break;
  1425. default:
  1426. goto err_no_initvals;
  1427. }
  1428. err = do_request_fw(dev, filename, &fw->initvals, false);
  1429. if (err)
  1430. goto err_load;
  1431. }
  1432. if (!fw->initvals_band) {
  1433. switch (dev->phy.type) {
  1434. case B43legacy_PHYTYPE_B:
  1435. case B43legacy_PHYTYPE_G:
  1436. if ((rev >= 5) && (rev <= 10))
  1437. filename = "b0g0bsinitvals5";
  1438. else if (rev >= 11)
  1439. filename = NULL;
  1440. else if (rev == 2 || rev == 4)
  1441. filename = NULL;
  1442. else
  1443. goto err_no_initvals;
  1444. break;
  1445. default:
  1446. goto err_no_initvals;
  1447. }
  1448. err = do_request_fw(dev, filename, &fw->initvals_band, false);
  1449. if (err)
  1450. goto err_load;
  1451. }
  1452. err = ieee80211_register_hw(wl->hw);
  1453. if (err)
  1454. goto err_one_core_detach;
  1455. return;
  1456. err_one_core_detach:
  1457. b43legacy_one_core_detach(dev->dev);
  1458. goto error;
  1459. err_load:
  1460. b43legacy_print_fw_helptext(dev->wl);
  1461. goto error;
  1462. err_no_initvals:
  1463. err = -ENODEV;
  1464. b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
  1465. "core rev %u\n", dev->phy.type, rev);
  1466. goto error;
  1467. error:
  1468. b43legacy_release_firmware(dev);
  1469. return;
  1470. }
  1471. static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
  1472. {
  1473. struct wiphy *wiphy = dev->wl->hw->wiphy;
  1474. const size_t hdr_len = sizeof(struct b43legacy_fw_header);
  1475. const __be32 *data;
  1476. unsigned int i;
  1477. unsigned int len;
  1478. u16 fwrev;
  1479. u16 fwpatch;
  1480. u16 fwdate;
  1481. u16 fwtime;
  1482. u32 tmp, macctl;
  1483. int err = 0;
  1484. /* Jump the microcode PSM to offset 0 */
  1485. macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  1486. B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
  1487. macctl |= B43legacy_MACCTL_PSM_JMP0;
  1488. b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
  1489. /* Zero out all microcode PSM registers and shared memory. */
  1490. for (i = 0; i < 64; i++)
  1491. b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
  1492. for (i = 0; i < 4096; i += 2)
  1493. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
  1494. /* Upload Microcode. */
  1495. data = (__be32 *) (dev->fw.ucode->data + hdr_len);
  1496. len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
  1497. b43legacy_shm_control_word(dev,
  1498. B43legacy_SHM_UCODE |
  1499. B43legacy_SHM_AUTOINC_W,
  1500. 0x0000);
  1501. for (i = 0; i < len; i++) {
  1502. b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
  1503. be32_to_cpu(data[i]));
  1504. udelay(10);
  1505. }
  1506. if (dev->fw.pcm) {
  1507. /* Upload PCM data. */
  1508. data = (__be32 *) (dev->fw.pcm->data + hdr_len);
  1509. len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
  1510. b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
  1511. b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
  1512. /* No need for autoinc bit in SHM_HW */
  1513. b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
  1514. for (i = 0; i < len; i++) {
  1515. b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
  1516. be32_to_cpu(data[i]));
  1517. udelay(10);
  1518. }
  1519. }
  1520. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
  1521. B43legacy_IRQ_ALL);
  1522. /* Start the microcode PSM */
  1523. macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  1524. macctl &= ~B43legacy_MACCTL_PSM_JMP0;
  1525. macctl |= B43legacy_MACCTL_PSM_RUN;
  1526. b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
  1527. /* Wait for the microcode to load and respond */
  1528. i = 0;
  1529. while (1) {
  1530. tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
  1531. if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
  1532. break;
  1533. i++;
  1534. if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
  1535. b43legacyerr(dev->wl, "Microcode not responding\n");
  1536. b43legacy_print_fw_helptext(dev->wl);
  1537. err = -ENODEV;
  1538. goto error;
  1539. }
  1540. msleep_interruptible(50);
  1541. if (signal_pending(current)) {
  1542. err = -EINTR;
  1543. goto error;
  1544. }
  1545. }
  1546. /* dummy read follows */
  1547. b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
  1548. /* Get and check the revisions. */
  1549. fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1550. B43legacy_SHM_SH_UCODEREV);
  1551. fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1552. B43legacy_SHM_SH_UCODEPATCH);
  1553. fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1554. B43legacy_SHM_SH_UCODEDATE);
  1555. fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1556. B43legacy_SHM_SH_UCODETIME);
  1557. if (fwrev > 0x128) {
  1558. b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
  1559. " Only firmware from binary drivers version 3.x"
  1560. " is supported. You must change your firmware"
  1561. " files.\n");
  1562. b43legacy_print_fw_helptext(dev->wl);
  1563. err = -EOPNOTSUPP;
  1564. goto error;
  1565. }
  1566. b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
  1567. "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
  1568. (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
  1569. (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
  1570. fwtime & 0x1F);
  1571. dev->fw.rev = fwrev;
  1572. dev->fw.patch = fwpatch;
  1573. snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
  1574. dev->fw.rev, dev->fw.patch);
  1575. wiphy->hw_version = dev->dev->id.coreid;
  1576. return 0;
  1577. error:
  1578. macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  1579. macctl &= ~B43legacy_MACCTL_PSM_RUN;
  1580. macctl |= B43legacy_MACCTL_PSM_JMP0;
  1581. b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
  1582. return err;
  1583. }
  1584. static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
  1585. const struct b43legacy_iv *ivals,
  1586. size_t count,
  1587. size_t array_size)
  1588. {
  1589. const struct b43legacy_iv *iv;
  1590. u16 offset;
  1591. size_t i;
  1592. bool bit32;
  1593. BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
  1594. iv = ivals;
  1595. for (i = 0; i < count; i++) {
  1596. if (array_size < sizeof(iv->offset_size))
  1597. goto err_format;
  1598. array_size -= sizeof(iv->offset_size);
  1599. offset = be16_to_cpu(iv->offset_size);
  1600. bit32 = !!(offset & B43legacy_IV_32BIT);
  1601. offset &= B43legacy_IV_OFFSET_MASK;
  1602. if (offset >= 0x1000)
  1603. goto err_format;
  1604. if (bit32) {
  1605. u32 value;
  1606. if (array_size < sizeof(iv->data.d32))
  1607. goto err_format;
  1608. array_size -= sizeof(iv->data.d32);
  1609. value = get_unaligned_be32(&iv->data.d32);
  1610. b43legacy_write32(dev, offset, value);
  1611. iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
  1612. sizeof(__be16) +
  1613. sizeof(__be32));
  1614. } else {
  1615. u16 value;
  1616. if (array_size < sizeof(iv->data.d16))
  1617. goto err_format;
  1618. array_size -= sizeof(iv->data.d16);
  1619. value = be16_to_cpu(iv->data.d16);
  1620. b43legacy_write16(dev, offset, value);
  1621. iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
  1622. sizeof(__be16) +
  1623. sizeof(__be16));
  1624. }
  1625. }
  1626. if (array_size)
  1627. goto err_format;
  1628. return 0;
  1629. err_format:
  1630. b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
  1631. b43legacy_print_fw_helptext(dev->wl);
  1632. return -EPROTO;
  1633. }
  1634. static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
  1635. {
  1636. const size_t hdr_len = sizeof(struct b43legacy_fw_header);
  1637. const struct b43legacy_fw_header *hdr;
  1638. struct b43legacy_firmware *fw = &dev->fw;
  1639. const struct b43legacy_iv *ivals;
  1640. size_t count;
  1641. int err;
  1642. hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
  1643. ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
  1644. count = be32_to_cpu(hdr->size);
  1645. err = b43legacy_write_initvals(dev, ivals, count,
  1646. fw->initvals->size - hdr_len);
  1647. if (err)
  1648. goto out;
  1649. if (fw->initvals_band) {
  1650. hdr = (const struct b43legacy_fw_header *)
  1651. (fw->initvals_band->data);
  1652. ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
  1653. + hdr_len);
  1654. count = be32_to_cpu(hdr->size);
  1655. err = b43legacy_write_initvals(dev, ivals, count,
  1656. fw->initvals_band->size - hdr_len);
  1657. if (err)
  1658. goto out;
  1659. }
  1660. out:
  1661. return err;
  1662. }
  1663. /* Initialize the GPIOs
  1664. * http://bcm-specs.sipsolutions.net/GPIO
  1665. */
  1666. static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
  1667. {
  1668. struct ssb_bus *bus = dev->dev->bus;
  1669. struct ssb_device *gpiodev, *pcidev = NULL;
  1670. u32 mask;
  1671. u32 set;
  1672. b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
  1673. b43legacy_read32(dev,
  1674. B43legacy_MMIO_MACCTL)
  1675. & 0xFFFF3FFF);
  1676. b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
  1677. b43legacy_read16(dev,
  1678. B43legacy_MMIO_GPIO_MASK)
  1679. | 0x000F);
  1680. mask = 0x0000001F;
  1681. set = 0x0000000F;
  1682. if (dev->dev->bus->chip_id == 0x4301) {
  1683. mask |= 0x0060;
  1684. set |= 0x0060;
  1685. }
  1686. if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
  1687. b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
  1688. b43legacy_read16(dev,
  1689. B43legacy_MMIO_GPIO_MASK)
  1690. | 0x0200);
  1691. mask |= 0x0200;
  1692. set |= 0x0200;
  1693. }
  1694. if (dev->dev->id.revision >= 2)
  1695. mask |= 0x0010; /* FIXME: This is redundant. */
  1696. #ifdef CONFIG_SSB_DRIVER_PCICORE
  1697. pcidev = bus->pcicore.dev;
  1698. #endif
  1699. gpiodev = bus->chipco.dev ? : pcidev;
  1700. if (!gpiodev)
  1701. return 0;
  1702. ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
  1703. (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
  1704. & ~mask) | set);
  1705. return 0;
  1706. }
  1707. /* Turn off all GPIO stuff. Call this on module unload, for example. */
  1708. static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
  1709. {
  1710. struct ssb_bus *bus = dev->dev->bus;
  1711. struct ssb_device *gpiodev, *pcidev = NULL;
  1712. #ifdef CONFIG_SSB_DRIVER_PCICORE
  1713. pcidev = bus->pcicore.dev;
  1714. #endif
  1715. gpiodev = bus->chipco.dev ? : pcidev;
  1716. if (!gpiodev)
  1717. return;
  1718. ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
  1719. }
  1720. /* http://bcm-specs.sipsolutions.net/EnableMac */
  1721. void b43legacy_mac_enable(struct b43legacy_wldev *dev)
  1722. {
  1723. dev->mac_suspended--;
  1724. B43legacy_WARN_ON(dev->mac_suspended < 0);
  1725. B43legacy_WARN_ON(irqs_disabled());
  1726. if (dev->mac_suspended == 0) {
  1727. b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
  1728. b43legacy_read32(dev,
  1729. B43legacy_MMIO_MACCTL)
  1730. | B43legacy_MACCTL_ENABLED);
  1731. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
  1732. B43legacy_IRQ_MAC_SUSPENDED);
  1733. /* the next two are dummy reads */
  1734. b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  1735. b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
  1736. b43legacy_power_saving_ctl_bits(dev, -1, -1);
  1737. /* Re-enable IRQs. */
  1738. spin_lock_irq(&dev->wl->irq_lock);
  1739. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
  1740. dev->irq_mask);
  1741. spin_unlock_irq(&dev->wl->irq_lock);
  1742. }
  1743. }
  1744. /* http://bcm-specs.sipsolutions.net/SuspendMAC */
  1745. void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
  1746. {
  1747. int i;
  1748. u32 tmp;
  1749. might_sleep();
  1750. B43legacy_WARN_ON(irqs_disabled());
  1751. B43legacy_WARN_ON(dev->mac_suspended < 0);
  1752. if (dev->mac_suspended == 0) {
  1753. /* Mask IRQs before suspending MAC. Otherwise
  1754. * the MAC stays busy and won't suspend. */
  1755. spin_lock_irq(&dev->wl->irq_lock);
  1756. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
  1757. spin_unlock_irq(&dev->wl->irq_lock);
  1758. b43legacy_synchronize_irq(dev);
  1759. b43legacy_power_saving_ctl_bits(dev, -1, 1);
  1760. b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
  1761. b43legacy_read32(dev,
  1762. B43legacy_MMIO_MACCTL)
  1763. & ~B43legacy_MACCTL_ENABLED);
  1764. b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
  1765. for (i = 40; i; i--) {
  1766. tmp = b43legacy_read32(dev,
  1767. B43legacy_MMIO_GEN_IRQ_REASON);
  1768. if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
  1769. goto out;
  1770. msleep(1);
  1771. }
  1772. b43legacyerr(dev->wl, "MAC suspend failed\n");
  1773. }
  1774. out:
  1775. dev->mac_suspended++;
  1776. }
  1777. static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
  1778. {
  1779. struct b43legacy_wl *wl = dev->wl;
  1780. u32 ctl;
  1781. u16 cfp_pretbtt;
  1782. ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  1783. /* Reset status to STA infrastructure mode. */
  1784. ctl &= ~B43legacy_MACCTL_AP;
  1785. ctl &= ~B43legacy_MACCTL_KEEP_CTL;
  1786. ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
  1787. ctl &= ~B43legacy_MACCTL_KEEP_BAD;
  1788. ctl &= ~B43legacy_MACCTL_PROMISC;
  1789. ctl &= ~B43legacy_MACCTL_BEACPROMISC;
  1790. ctl |= B43legacy_MACCTL_INFRA;
  1791. if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
  1792. ctl |= B43legacy_MACCTL_AP;
  1793. else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
  1794. ctl &= ~B43legacy_MACCTL_INFRA;
  1795. if (wl->filter_flags & FIF_CONTROL)
  1796. ctl |= B43legacy_MACCTL_KEEP_CTL;
  1797. if (wl->filter_flags & FIF_FCSFAIL)
  1798. ctl |= B43legacy_MACCTL_KEEP_BAD;
  1799. if (wl->filter_flags & FIF_PLCPFAIL)
  1800. ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
  1801. if (wl->filter_flags & FIF_PROMISC_IN_BSS)
  1802. ctl |= B43legacy_MACCTL_PROMISC;
  1803. if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
  1804. ctl |= B43legacy_MACCTL_BEACPROMISC;
  1805. /* Workaround: On old hardware the HW-MAC-address-filter
  1806. * doesn't work properly, so always run promisc in filter
  1807. * it in software. */
  1808. if (dev->dev->id.revision <= 4)
  1809. ctl |= B43legacy_MACCTL_PROMISC;
  1810. b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
  1811. cfp_pretbtt = 2;
  1812. if ((ctl & B43legacy_MACCTL_INFRA) &&
  1813. !(ctl & B43legacy_MACCTL_AP)) {
  1814. if (dev->dev->bus->chip_id == 0x4306 &&
  1815. dev->dev->bus->chip_rev == 3)
  1816. cfp_pretbtt = 100;
  1817. else
  1818. cfp_pretbtt = 50;
  1819. }
  1820. b43legacy_write16(dev, 0x612, cfp_pretbtt);
  1821. }
  1822. static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
  1823. u16 rate,
  1824. int is_ofdm)
  1825. {
  1826. u16 offset;
  1827. if (is_ofdm) {
  1828. offset = 0x480;
  1829. offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
  1830. } else {
  1831. offset = 0x4C0;
  1832. offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
  1833. }
  1834. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
  1835. b43legacy_shm_read16(dev,
  1836. B43legacy_SHM_SHARED, offset));
  1837. }
  1838. static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
  1839. {
  1840. switch (dev->phy.type) {
  1841. case B43legacy_PHYTYPE_G:
  1842. b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
  1843. b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
  1844. b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
  1845. b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
  1846. b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
  1847. b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
  1848. b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
  1849. /* fallthrough */
  1850. case B43legacy_PHYTYPE_B:
  1851. b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
  1852. b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
  1853. b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
  1854. b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
  1855. break;
  1856. default:
  1857. B43legacy_BUG_ON(1);
  1858. }
  1859. }
  1860. /* Set the TX-Antenna for management frames sent by firmware. */
  1861. static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
  1862. int antenna)
  1863. {
  1864. u16 ant = 0;
  1865. u16 tmp;
  1866. switch (antenna) {
  1867. case B43legacy_ANTENNA0:
  1868. ant |= B43legacy_TX4_PHY_ANT0;
  1869. break;
  1870. case B43legacy_ANTENNA1:
  1871. ant |= B43legacy_TX4_PHY_ANT1;
  1872. break;
  1873. case B43legacy_ANTENNA_AUTO:
  1874. ant |= B43legacy_TX4_PHY_ANTLAST;
  1875. break;
  1876. default:
  1877. B43legacy_BUG_ON(1);
  1878. }
  1879. /* FIXME We also need to set the other flags of the PHY control
  1880. * field somewhere. */
  1881. /* For Beacons */
  1882. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1883. B43legacy_SHM_SH_BEACPHYCTL);
  1884. tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
  1885. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  1886. B43legacy_SHM_SH_BEACPHYCTL, tmp);
  1887. /* For ACK/CTS */
  1888. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1889. B43legacy_SHM_SH_ACKCTSPHYCTL);
  1890. tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
  1891. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  1892. B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
  1893. /* For Probe Resposes */
  1894. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1895. B43legacy_SHM_SH_PRPHYCTL);
  1896. tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
  1897. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  1898. B43legacy_SHM_SH_PRPHYCTL, tmp);
  1899. }
  1900. /* This is the opposite of b43legacy_chip_init() */
  1901. static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
  1902. {
  1903. b43legacy_radio_turn_off(dev, 1);
  1904. b43legacy_gpio_cleanup(dev);
  1905. /* firmware is released later */
  1906. }
  1907. /* Initialize the chip
  1908. * http://bcm-specs.sipsolutions.net/ChipInit
  1909. */
  1910. static int b43legacy_chip_init(struct b43legacy_wldev *dev)
  1911. {
  1912. struct b43legacy_phy *phy = &dev->phy;
  1913. int err;
  1914. int tmp;
  1915. u32 value32, macctl;
  1916. u16 value16;
  1917. /* Initialize the MAC control */
  1918. macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
  1919. if (dev->phy.gmode)
  1920. macctl |= B43legacy_MACCTL_GMODE;
  1921. macctl |= B43legacy_MACCTL_INFRA;
  1922. b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
  1923. err = b43legacy_upload_microcode(dev);
  1924. if (err)
  1925. goto out; /* firmware is released later */
  1926. err = b43legacy_gpio_init(dev);
  1927. if (err)
  1928. goto out; /* firmware is released later */
  1929. err = b43legacy_upload_initvals(dev);
  1930. if (err)
  1931. goto err_gpio_clean;
  1932. b43legacy_radio_turn_on(dev);
  1933. b43legacy_write16(dev, 0x03E6, 0x0000);
  1934. err = b43legacy_phy_init(dev);
  1935. if (err)
  1936. goto err_radio_off;
  1937. /* Select initial Interference Mitigation. */
  1938. tmp = phy->interfmode;
  1939. phy->interfmode = B43legacy_INTERFMODE_NONE;
  1940. b43legacy_radio_set_interference_mitigation(dev, tmp);
  1941. b43legacy_phy_set_antenna_diversity(dev);
  1942. b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
  1943. if (phy->type == B43legacy_PHYTYPE_B) {
  1944. value16 = b43legacy_read16(dev, 0x005E);
  1945. value16 |= 0x0004;
  1946. b43legacy_write16(dev, 0x005E, value16);
  1947. }
  1948. b43legacy_write32(dev, 0x0100, 0x01000000);
  1949. if (dev->dev->id.revision < 5)
  1950. b43legacy_write32(dev, 0x010C, 0x01000000);
  1951. value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  1952. value32 &= ~B43legacy_MACCTL_INFRA;
  1953. b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
  1954. value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  1955. value32 |= B43legacy_MACCTL_INFRA;
  1956. b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
  1957. if (b43legacy_using_pio(dev)) {
  1958. b43legacy_write32(dev, 0x0210, 0x00000100);
  1959. b43legacy_write32(dev, 0x0230, 0x00000100);
  1960. b43legacy_write32(dev, 0x0250, 0x00000100);
  1961. b43legacy_write32(dev, 0x0270, 0x00000100);
  1962. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
  1963. 0x0000);
  1964. }
  1965. /* Probe Response Timeout value */
  1966. /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
  1967. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
  1968. /* Initially set the wireless operation mode. */
  1969. b43legacy_adjust_opmode(dev);
  1970. if (dev->dev->id.revision < 3) {
  1971. b43legacy_write16(dev, 0x060E, 0x0000);
  1972. b43legacy_write16(dev, 0x0610, 0x8000);
  1973. b43legacy_write16(dev, 0x0604, 0x0000);
  1974. b43legacy_write16(dev, 0x0606, 0x0200);
  1975. } else {
  1976. b43legacy_write32(dev, 0x0188, 0x80000000);
  1977. b43legacy_write32(dev, 0x018C, 0x02000000);
  1978. }
  1979. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
  1980. b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
  1981. b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
  1982. b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
  1983. b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
  1984. b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
  1985. b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
  1986. value32 = ssb_read32(dev->dev, SSB_TMSLOW);
  1987. value32 |= B43legacy_TMSLOW_MACPHYCLKEN;
  1988. ssb_write32(dev->dev, SSB_TMSLOW, value32);
  1989. b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
  1990. dev->dev->bus->chipco.fast_pwrup_delay);
  1991. /* PHY TX errors counter. */
  1992. atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
  1993. B43legacy_WARN_ON(err != 0);
  1994. b43legacydbg(dev->wl, "Chip initialized\n");
  1995. out:
  1996. return err;
  1997. err_radio_off:
  1998. b43legacy_radio_turn_off(dev, 1);
  1999. err_gpio_clean:
  2000. b43legacy_gpio_cleanup(dev);
  2001. goto out;
  2002. }
  2003. static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
  2004. {
  2005. struct b43legacy_phy *phy = &dev->phy;
  2006. if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
  2007. return;
  2008. b43legacy_mac_suspend(dev);
  2009. b43legacy_phy_lo_g_measure(dev);
  2010. b43legacy_mac_enable(dev);
  2011. }
  2012. static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
  2013. {
  2014. b43legacy_phy_lo_mark_all_unused(dev);
  2015. if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
  2016. b43legacy_mac_suspend(dev);
  2017. b43legacy_calc_nrssi_slope(dev);
  2018. b43legacy_mac_enable(dev);
  2019. }
  2020. }
  2021. static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
  2022. {
  2023. /* Update device statistics. */
  2024. b43legacy_calculate_link_quality(dev);
  2025. }
  2026. static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
  2027. {
  2028. b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
  2029. atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
  2030. wmb();
  2031. }
  2032. static void do_periodic_work(struct b43legacy_wldev *dev)
  2033. {
  2034. unsigned int state;
  2035. state = dev->periodic_state;
  2036. if (state % 8 == 0)
  2037. b43legacy_periodic_every120sec(dev);
  2038. if (state % 4 == 0)
  2039. b43legacy_periodic_every60sec(dev);
  2040. if (state % 2 == 0)
  2041. b43legacy_periodic_every30sec(dev);
  2042. b43legacy_periodic_every15sec(dev);
  2043. }
  2044. /* Periodic work locking policy:
  2045. * The whole periodic work handler is protected by
  2046. * wl->mutex. If another lock is needed somewhere in the
  2047. * pwork callchain, it's acquired in-place, where it's needed.
  2048. */
  2049. static void b43legacy_periodic_work_handler(struct work_struct *work)
  2050. {
  2051. struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
  2052. periodic_work.work);
  2053. struct b43legacy_wl *wl = dev->wl;
  2054. unsigned long delay;
  2055. mutex_lock(&wl->mutex);
  2056. if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
  2057. goto out;
  2058. if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
  2059. goto out_requeue;
  2060. do_periodic_work(dev);
  2061. dev->periodic_state++;
  2062. out_requeue:
  2063. if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
  2064. delay = msecs_to_jiffies(50);
  2065. else
  2066. delay = round_jiffies_relative(HZ * 15);
  2067. ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
  2068. out:
  2069. mutex_unlock(&wl->mutex);
  2070. }
  2071. static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
  2072. {
  2073. struct delayed_work *work = &dev->periodic_work;
  2074. dev->periodic_state = 0;
  2075. INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
  2076. ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
  2077. }
  2078. /* Validate access to the chip (SHM) */
  2079. static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
  2080. {
  2081. u32 value;
  2082. u32 shm_backup;
  2083. shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
  2084. b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
  2085. if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
  2086. 0xAA5555AA)
  2087. goto error;
  2088. b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
  2089. if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
  2090. 0x55AAAA55)
  2091. goto error;
  2092. b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
  2093. value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  2094. if ((value | B43legacy_MACCTL_GMODE) !=
  2095. (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
  2096. goto error;
  2097. value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
  2098. if (value)
  2099. goto error;
  2100. return 0;
  2101. error:
  2102. b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
  2103. return -ENODEV;
  2104. }
  2105. static void b43legacy_security_init(struct b43legacy_wldev *dev)
  2106. {
  2107. dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
  2108. B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
  2109. dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  2110. 0x0056);
  2111. /* KTP is a word address, but we address SHM bytewise.
  2112. * So multiply by two.
  2113. */
  2114. dev->ktp *= 2;
  2115. if (dev->dev->id.revision >= 5)
  2116. /* Number of RCMTA address slots */
  2117. b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
  2118. dev->max_nr_keys - 8);
  2119. }
  2120. #ifdef CONFIG_B43LEGACY_HWRNG
  2121. static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
  2122. {
  2123. struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
  2124. unsigned long flags;
  2125. /* Don't take wl->mutex here, as it could deadlock with
  2126. * hwrng internal locking. It's not needed to take
  2127. * wl->mutex here, anyway. */
  2128. spin_lock_irqsave(&wl->irq_lock, flags);
  2129. *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
  2130. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2131. return (sizeof(u16));
  2132. }
  2133. #endif
  2134. static void b43legacy_rng_exit(struct b43legacy_wl *wl)
  2135. {
  2136. #ifdef CONFIG_B43LEGACY_HWRNG
  2137. if (wl->rng_initialized)
  2138. hwrng_unregister(&wl->rng);
  2139. #endif
  2140. }
  2141. static int b43legacy_rng_init(struct b43legacy_wl *wl)
  2142. {
  2143. int err = 0;
  2144. #ifdef CONFIG_B43LEGACY_HWRNG
  2145. snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
  2146. "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
  2147. wl->rng.name = wl->rng_name;
  2148. wl->rng.data_read = b43legacy_rng_read;
  2149. wl->rng.priv = (unsigned long)wl;
  2150. wl->rng_initialized = 1;
  2151. err = hwrng_register(&wl->rng);
  2152. if (err) {
  2153. wl->rng_initialized = 0;
  2154. b43legacyerr(wl, "Failed to register the random "
  2155. "number generator (%d)\n", err);
  2156. }
  2157. #endif
  2158. return err;
  2159. }
  2160. static void b43legacy_tx_work(struct work_struct *work)
  2161. {
  2162. struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
  2163. tx_work);
  2164. struct b43legacy_wldev *dev;
  2165. struct sk_buff *skb;
  2166. int queue_num;
  2167. int err = 0;
  2168. mutex_lock(&wl->mutex);
  2169. dev = wl->current_dev;
  2170. if (unlikely(!dev || b43legacy_status(dev) < B43legacy_STAT_STARTED)) {
  2171. mutex_unlock(&wl->mutex);
  2172. return;
  2173. }
  2174. for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
  2175. while (skb_queue_len(&wl->tx_queue[queue_num])) {
  2176. skb = skb_dequeue(&wl->tx_queue[queue_num]);
  2177. if (b43legacy_using_pio(dev))
  2178. err = b43legacy_pio_tx(dev, skb);
  2179. else
  2180. err = b43legacy_dma_tx(dev, skb);
  2181. if (err == -ENOSPC) {
  2182. wl->tx_queue_stopped[queue_num] = 1;
  2183. ieee80211_stop_queue(wl->hw, queue_num);
  2184. skb_queue_head(&wl->tx_queue[queue_num], skb);
  2185. break;
  2186. }
  2187. if (unlikely(err))
  2188. dev_kfree_skb(skb); /* Drop it */
  2189. err = 0;
  2190. }
  2191. if (!err)
  2192. wl->tx_queue_stopped[queue_num] = 0;
  2193. }
  2194. mutex_unlock(&wl->mutex);
  2195. }
  2196. static void b43legacy_op_tx(struct ieee80211_hw *hw,
  2197. struct ieee80211_tx_control *control,
  2198. struct sk_buff *skb)
  2199. {
  2200. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2201. if (unlikely(skb->len < 2 + 2 + 6)) {
  2202. /* Too short, this can't be a valid frame. */
  2203. dev_kfree_skb_any(skb);
  2204. return;
  2205. }
  2206. B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags);
  2207. skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb);
  2208. if (!wl->tx_queue_stopped[skb->queue_mapping])
  2209. ieee80211_queue_work(wl->hw, &wl->tx_work);
  2210. else
  2211. ieee80211_stop_queue(wl->hw, skb->queue_mapping);
  2212. }
  2213. static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
  2214. struct ieee80211_vif *vif, u16 queue,
  2215. const struct ieee80211_tx_queue_params *params)
  2216. {
  2217. return 0;
  2218. }
  2219. static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
  2220. struct ieee80211_low_level_stats *stats)
  2221. {
  2222. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2223. unsigned long flags;
  2224. spin_lock_irqsave(&wl->irq_lock, flags);
  2225. memcpy(stats, &wl->ieee_stats, sizeof(*stats));
  2226. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2227. return 0;
  2228. }
  2229. static const char *phymode_to_string(unsigned int phymode)
  2230. {
  2231. switch (phymode) {
  2232. case B43legacy_PHYMODE_B:
  2233. return "B";
  2234. case B43legacy_PHYMODE_G:
  2235. return "G";
  2236. default:
  2237. B43legacy_BUG_ON(1);
  2238. }
  2239. return "";
  2240. }
  2241. static int find_wldev_for_phymode(struct b43legacy_wl *wl,
  2242. unsigned int phymode,
  2243. struct b43legacy_wldev **dev,
  2244. bool *gmode)
  2245. {
  2246. struct b43legacy_wldev *d;
  2247. list_for_each_entry(d, &wl->devlist, list) {
  2248. if (d->phy.possible_phymodes & phymode) {
  2249. /* Ok, this device supports the PHY-mode.
  2250. * Set the gmode bit. */
  2251. *gmode = true;
  2252. *dev = d;
  2253. return 0;
  2254. }
  2255. }
  2256. return -ESRCH;
  2257. }
  2258. static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
  2259. {
  2260. struct ssb_device *sdev = dev->dev;
  2261. u32 tmslow;
  2262. tmslow = ssb_read32(sdev, SSB_TMSLOW);
  2263. tmslow &= ~B43legacy_TMSLOW_GMODE;
  2264. tmslow |= B43legacy_TMSLOW_PHYRESET;
  2265. tmslow |= SSB_TMSLOW_FGC;
  2266. ssb_write32(sdev, SSB_TMSLOW, tmslow);
  2267. msleep(1);
  2268. tmslow = ssb_read32(sdev, SSB_TMSLOW);
  2269. tmslow &= ~SSB_TMSLOW_FGC;
  2270. tmslow |= B43legacy_TMSLOW_PHYRESET;
  2271. ssb_write32(sdev, SSB_TMSLOW, tmslow);
  2272. msleep(1);
  2273. }
  2274. /* Expects wl->mutex locked */
  2275. static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
  2276. unsigned int new_mode)
  2277. {
  2278. struct b43legacy_wldev *uninitialized_var(up_dev);
  2279. struct b43legacy_wldev *down_dev;
  2280. int err;
  2281. bool gmode = false;
  2282. int prev_status;
  2283. err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
  2284. if (err) {
  2285. b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
  2286. phymode_to_string(new_mode));
  2287. return err;
  2288. }
  2289. if ((up_dev == wl->current_dev) &&
  2290. (!!wl->current_dev->phy.gmode == !!gmode))
  2291. /* This device is already running. */
  2292. return 0;
  2293. b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
  2294. phymode_to_string(new_mode));
  2295. down_dev = wl->current_dev;
  2296. prev_status = b43legacy_status(down_dev);
  2297. /* Shutdown the currently running core. */
  2298. if (prev_status >= B43legacy_STAT_STARTED)
  2299. b43legacy_wireless_core_stop(down_dev);
  2300. if (prev_status >= B43legacy_STAT_INITIALIZED)
  2301. b43legacy_wireless_core_exit(down_dev);
  2302. if (down_dev != up_dev)
  2303. /* We switch to a different core, so we put PHY into
  2304. * RESET on the old core. */
  2305. b43legacy_put_phy_into_reset(down_dev);
  2306. /* Now start the new core. */
  2307. up_dev->phy.gmode = gmode;
  2308. if (prev_status >= B43legacy_STAT_INITIALIZED) {
  2309. err = b43legacy_wireless_core_init(up_dev);
  2310. if (err) {
  2311. b43legacyerr(wl, "Fatal: Could not initialize device"
  2312. " for newly selected %s-PHY mode\n",
  2313. phymode_to_string(new_mode));
  2314. goto init_failure;
  2315. }
  2316. }
  2317. if (prev_status >= B43legacy_STAT_STARTED) {
  2318. err = b43legacy_wireless_core_start(up_dev);
  2319. if (err) {
  2320. b43legacyerr(wl, "Fatal: Could not start device for "
  2321. "newly selected %s-PHY mode\n",
  2322. phymode_to_string(new_mode));
  2323. b43legacy_wireless_core_exit(up_dev);
  2324. goto init_failure;
  2325. }
  2326. }
  2327. B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
  2328. b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
  2329. wl->current_dev = up_dev;
  2330. return 0;
  2331. init_failure:
  2332. /* Whoops, failed to init the new core. No core is operating now. */
  2333. wl->current_dev = NULL;
  2334. return err;
  2335. }
  2336. /* Write the short and long frame retry limit values. */
  2337. static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
  2338. unsigned int short_retry,
  2339. unsigned int long_retry)
  2340. {
  2341. /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
  2342. * the chip-internal counter. */
  2343. short_retry = min(short_retry, (unsigned int)0xF);
  2344. long_retry = min(long_retry, (unsigned int)0xF);
  2345. b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
  2346. b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
  2347. }
  2348. static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
  2349. u32 changed)
  2350. {
  2351. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2352. struct b43legacy_wldev *dev;
  2353. struct b43legacy_phy *phy;
  2354. struct ieee80211_conf *conf = &hw->conf;
  2355. unsigned long flags;
  2356. unsigned int new_phymode = 0xFFFF;
  2357. int antenna_tx;
  2358. int err = 0;
  2359. antenna_tx = B43legacy_ANTENNA_DEFAULT;
  2360. mutex_lock(&wl->mutex);
  2361. dev = wl->current_dev;
  2362. phy = &dev->phy;
  2363. if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
  2364. b43legacy_set_retry_limits(dev,
  2365. conf->short_frame_max_tx_count,
  2366. conf->long_frame_max_tx_count);
  2367. changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
  2368. if (!changed)
  2369. goto out_unlock_mutex;
  2370. /* Switch the PHY mode (if necessary). */
  2371. switch (conf->channel->band) {
  2372. case IEEE80211_BAND_2GHZ:
  2373. if (phy->type == B43legacy_PHYTYPE_B)
  2374. new_phymode = B43legacy_PHYMODE_B;
  2375. else
  2376. new_phymode = B43legacy_PHYMODE_G;
  2377. break;
  2378. default:
  2379. B43legacy_WARN_ON(1);
  2380. }
  2381. err = b43legacy_switch_phymode(wl, new_phymode);
  2382. if (err)
  2383. goto out_unlock_mutex;
  2384. /* Disable IRQs while reconfiguring the device.
  2385. * This makes it possible to drop the spinlock throughout
  2386. * the reconfiguration process. */
  2387. spin_lock_irqsave(&wl->irq_lock, flags);
  2388. if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
  2389. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2390. goto out_unlock_mutex;
  2391. }
  2392. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
  2393. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2394. b43legacy_synchronize_irq(dev);
  2395. /* Switch to the requested channel.
  2396. * The firmware takes care of races with the TX handler. */
  2397. if (conf->channel->hw_value != phy->channel)
  2398. b43legacy_radio_selectchannel(dev, conf->channel->hw_value, 0);
  2399. dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
  2400. /* Adjust the desired TX power level. */
  2401. if (conf->power_level != 0) {
  2402. if (conf->power_level != phy->power_level) {
  2403. phy->power_level = conf->power_level;
  2404. b43legacy_phy_xmitpower(dev);
  2405. }
  2406. }
  2407. /* Antennas for RX and management frame TX. */
  2408. b43legacy_mgmtframe_txantenna(dev, antenna_tx);
  2409. if (wl->radio_enabled != phy->radio_on) {
  2410. if (wl->radio_enabled) {
  2411. b43legacy_radio_turn_on(dev);
  2412. b43legacyinfo(dev->wl, "Radio turned on by software\n");
  2413. if (!dev->radio_hw_enable)
  2414. b43legacyinfo(dev->wl, "The hardware RF-kill"
  2415. " button still turns the radio"
  2416. " physically off. Press the"
  2417. " button to turn it on.\n");
  2418. } else {
  2419. b43legacy_radio_turn_off(dev, 0);
  2420. b43legacyinfo(dev->wl, "Radio turned off by"
  2421. " software\n");
  2422. }
  2423. }
  2424. spin_lock_irqsave(&wl->irq_lock, flags);
  2425. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
  2426. mmiowb();
  2427. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2428. out_unlock_mutex:
  2429. mutex_unlock(&wl->mutex);
  2430. return err;
  2431. }
  2432. static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates)
  2433. {
  2434. struct ieee80211_supported_band *sband =
  2435. dev->wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  2436. struct ieee80211_rate *rate;
  2437. int i;
  2438. u16 basic, direct, offset, basic_offset, rateptr;
  2439. for (i = 0; i < sband->n_bitrates; i++) {
  2440. rate = &sband->bitrates[i];
  2441. if (b43legacy_is_cck_rate(rate->hw_value)) {
  2442. direct = B43legacy_SHM_SH_CCKDIRECT;
  2443. basic = B43legacy_SHM_SH_CCKBASIC;
  2444. offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
  2445. offset &= 0xF;
  2446. } else {
  2447. direct = B43legacy_SHM_SH_OFDMDIRECT;
  2448. basic = B43legacy_SHM_SH_OFDMBASIC;
  2449. offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
  2450. offset &= 0xF;
  2451. }
  2452. rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
  2453. if (b43legacy_is_cck_rate(rate->hw_value)) {
  2454. basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
  2455. basic_offset &= 0xF;
  2456. } else {
  2457. basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
  2458. basic_offset &= 0xF;
  2459. }
  2460. /*
  2461. * Get the pointer that we need to point to
  2462. * from the direct map
  2463. */
  2464. rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  2465. direct + 2 * basic_offset);
  2466. /* and write it to the basic map */
  2467. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  2468. basic + 2 * offset, rateptr);
  2469. }
  2470. }
  2471. static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
  2472. struct ieee80211_vif *vif,
  2473. struct ieee80211_bss_conf *conf,
  2474. u32 changed)
  2475. {
  2476. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2477. struct b43legacy_wldev *dev;
  2478. unsigned long flags;
  2479. mutex_lock(&wl->mutex);
  2480. B43legacy_WARN_ON(wl->vif != vif);
  2481. dev = wl->current_dev;
  2482. /* Disable IRQs while reconfiguring the device.
  2483. * This makes it possible to drop the spinlock throughout
  2484. * the reconfiguration process. */
  2485. spin_lock_irqsave(&wl->irq_lock, flags);
  2486. if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
  2487. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2488. goto out_unlock_mutex;
  2489. }
  2490. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
  2491. if (changed & BSS_CHANGED_BSSID) {
  2492. b43legacy_synchronize_irq(dev);
  2493. if (conf->bssid)
  2494. memcpy(wl->bssid, conf->bssid, ETH_ALEN);
  2495. else
  2496. memset(wl->bssid, 0, ETH_ALEN);
  2497. }
  2498. if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
  2499. if (changed & BSS_CHANGED_BEACON &&
  2500. (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
  2501. b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
  2502. b43legacy_update_templates(wl);
  2503. if (changed & BSS_CHANGED_BSSID)
  2504. b43legacy_write_mac_bssid_templates(dev);
  2505. }
  2506. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2507. b43legacy_mac_suspend(dev);
  2508. if (changed & BSS_CHANGED_BEACON_INT &&
  2509. (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
  2510. b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
  2511. b43legacy_set_beacon_int(dev, conf->beacon_int);
  2512. if (changed & BSS_CHANGED_BASIC_RATES)
  2513. b43legacy_update_basic_rates(dev, conf->basic_rates);
  2514. if (changed & BSS_CHANGED_ERP_SLOT) {
  2515. if (conf->use_short_slot)
  2516. b43legacy_short_slot_timing_enable(dev);
  2517. else
  2518. b43legacy_short_slot_timing_disable(dev);
  2519. }
  2520. b43legacy_mac_enable(dev);
  2521. spin_lock_irqsave(&wl->irq_lock, flags);
  2522. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
  2523. /* XXX: why? */
  2524. mmiowb();
  2525. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2526. out_unlock_mutex:
  2527. mutex_unlock(&wl->mutex);
  2528. }
  2529. static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
  2530. unsigned int changed,
  2531. unsigned int *fflags,u64 multicast)
  2532. {
  2533. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2534. struct b43legacy_wldev *dev = wl->current_dev;
  2535. unsigned long flags;
  2536. if (!dev) {
  2537. *fflags = 0;
  2538. return;
  2539. }
  2540. spin_lock_irqsave(&wl->irq_lock, flags);
  2541. *fflags &= FIF_PROMISC_IN_BSS |
  2542. FIF_ALLMULTI |
  2543. FIF_FCSFAIL |
  2544. FIF_PLCPFAIL |
  2545. FIF_CONTROL |
  2546. FIF_OTHER_BSS |
  2547. FIF_BCN_PRBRESP_PROMISC;
  2548. changed &= FIF_PROMISC_IN_BSS |
  2549. FIF_ALLMULTI |
  2550. FIF_FCSFAIL |
  2551. FIF_PLCPFAIL |
  2552. FIF_CONTROL |
  2553. FIF_OTHER_BSS |
  2554. FIF_BCN_PRBRESP_PROMISC;
  2555. wl->filter_flags = *fflags;
  2556. if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
  2557. b43legacy_adjust_opmode(dev);
  2558. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2559. }
  2560. /* Locking: wl->mutex */
  2561. static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
  2562. {
  2563. struct b43legacy_wl *wl = dev->wl;
  2564. unsigned long flags;
  2565. int queue_num;
  2566. if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
  2567. return;
  2568. /* Disable and sync interrupts. We must do this before than
  2569. * setting the status to INITIALIZED, as the interrupt handler
  2570. * won't care about IRQs then. */
  2571. spin_lock_irqsave(&wl->irq_lock, flags);
  2572. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
  2573. b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
  2574. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2575. b43legacy_synchronize_irq(dev);
  2576. b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
  2577. mutex_unlock(&wl->mutex);
  2578. /* Must unlock as it would otherwise deadlock. No races here.
  2579. * Cancel the possibly running self-rearming periodic work. */
  2580. cancel_delayed_work_sync(&dev->periodic_work);
  2581. cancel_work_sync(&wl->tx_work);
  2582. mutex_lock(&wl->mutex);
  2583. /* Drain all TX queues. */
  2584. for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
  2585. while (skb_queue_len(&wl->tx_queue[queue_num]))
  2586. dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num]));
  2587. }
  2588. b43legacy_mac_suspend(dev);
  2589. free_irq(dev->dev->irq, dev);
  2590. b43legacydbg(wl, "Wireless interface stopped\n");
  2591. }
  2592. /* Locking: wl->mutex */
  2593. static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
  2594. {
  2595. int err;
  2596. B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
  2597. drain_txstatus_queue(dev);
  2598. err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
  2599. IRQF_SHARED, KBUILD_MODNAME, dev);
  2600. if (err) {
  2601. b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
  2602. dev->dev->irq);
  2603. goto out;
  2604. }
  2605. /* We are ready to run. */
  2606. ieee80211_wake_queues(dev->wl->hw);
  2607. b43legacy_set_status(dev, B43legacy_STAT_STARTED);
  2608. /* Start data flow (TX/RX) */
  2609. b43legacy_mac_enable(dev);
  2610. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
  2611. /* Start maintenance work */
  2612. b43legacy_periodic_tasks_setup(dev);
  2613. b43legacydbg(dev->wl, "Wireless interface started\n");
  2614. out:
  2615. return err;
  2616. }
  2617. /* Get PHY and RADIO versioning numbers */
  2618. static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
  2619. {
  2620. struct b43legacy_phy *phy = &dev->phy;
  2621. u32 tmp;
  2622. u8 analog_type;
  2623. u8 phy_type;
  2624. u8 phy_rev;
  2625. u16 radio_manuf;
  2626. u16 radio_ver;
  2627. u16 radio_rev;
  2628. int unsupported = 0;
  2629. /* Get PHY versioning */
  2630. tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
  2631. analog_type = (tmp & B43legacy_PHYVER_ANALOG)
  2632. >> B43legacy_PHYVER_ANALOG_SHIFT;
  2633. phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
  2634. phy_rev = (tmp & B43legacy_PHYVER_VERSION);
  2635. switch (phy_type) {
  2636. case B43legacy_PHYTYPE_B:
  2637. if (phy_rev != 2 && phy_rev != 4
  2638. && phy_rev != 6 && phy_rev != 7)
  2639. unsupported = 1;
  2640. break;
  2641. case B43legacy_PHYTYPE_G:
  2642. if (phy_rev > 8)
  2643. unsupported = 1;
  2644. break;
  2645. default:
  2646. unsupported = 1;
  2647. }
  2648. if (unsupported) {
  2649. b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
  2650. "(Analog %u, Type %u, Revision %u)\n",
  2651. analog_type, phy_type, phy_rev);
  2652. return -EOPNOTSUPP;
  2653. }
  2654. b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
  2655. analog_type, phy_type, phy_rev);
  2656. /* Get RADIO versioning */
  2657. if (dev->dev->bus->chip_id == 0x4317) {
  2658. if (dev->dev->bus->chip_rev == 0)
  2659. tmp = 0x3205017F;
  2660. else if (dev->dev->bus->chip_rev == 1)
  2661. tmp = 0x4205017F;
  2662. else
  2663. tmp = 0x5205017F;
  2664. } else {
  2665. b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
  2666. B43legacy_RADIOCTL_ID);
  2667. tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
  2668. tmp <<= 16;
  2669. b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
  2670. B43legacy_RADIOCTL_ID);
  2671. tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
  2672. }
  2673. radio_manuf = (tmp & 0x00000FFF);
  2674. radio_ver = (tmp & 0x0FFFF000) >> 12;
  2675. radio_rev = (tmp & 0xF0000000) >> 28;
  2676. switch (phy_type) {
  2677. case B43legacy_PHYTYPE_B:
  2678. if ((radio_ver & 0xFFF0) != 0x2050)
  2679. unsupported = 1;
  2680. break;
  2681. case B43legacy_PHYTYPE_G:
  2682. if (radio_ver != 0x2050)
  2683. unsupported = 1;
  2684. break;
  2685. default:
  2686. B43legacy_BUG_ON(1);
  2687. }
  2688. if (unsupported) {
  2689. b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
  2690. "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
  2691. radio_manuf, radio_ver, radio_rev);
  2692. return -EOPNOTSUPP;
  2693. }
  2694. b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
  2695. " Revision %u\n", radio_manuf, radio_ver, radio_rev);
  2696. phy->radio_manuf = radio_manuf;
  2697. phy->radio_ver = radio_ver;
  2698. phy->radio_rev = radio_rev;
  2699. phy->analog = analog_type;
  2700. phy->type = phy_type;
  2701. phy->rev = phy_rev;
  2702. return 0;
  2703. }
  2704. static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
  2705. struct b43legacy_phy *phy)
  2706. {
  2707. struct b43legacy_lopair *lo;
  2708. int i;
  2709. memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
  2710. memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
  2711. /* Assume the radio is enabled. If it's not enabled, the state will
  2712. * immediately get fixed on the first periodic work run. */
  2713. dev->radio_hw_enable = true;
  2714. phy->savedpctlreg = 0xFFFF;
  2715. phy->aci_enable = false;
  2716. phy->aci_wlan_automatic = false;
  2717. phy->aci_hw_rssi = false;
  2718. lo = phy->_lo_pairs;
  2719. if (lo)
  2720. memset(lo, 0, sizeof(struct b43legacy_lopair) *
  2721. B43legacy_LO_COUNT);
  2722. phy->max_lb_gain = 0;
  2723. phy->trsw_rx_gain = 0;
  2724. /* Set default attenuation values. */
  2725. phy->bbatt = b43legacy_default_baseband_attenuation(dev);
  2726. phy->rfatt = b43legacy_default_radio_attenuation(dev);
  2727. phy->txctl1 = b43legacy_default_txctl1(dev);
  2728. phy->txpwr_offset = 0;
  2729. /* NRSSI */
  2730. phy->nrssislope = 0;
  2731. for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
  2732. phy->nrssi[i] = -1000;
  2733. for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
  2734. phy->nrssi_lt[i] = i;
  2735. phy->lofcal = 0xFFFF;
  2736. phy->initval = 0xFFFF;
  2737. phy->interfmode = B43legacy_INTERFMODE_NONE;
  2738. phy->channel = 0xFF;
  2739. }
  2740. static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
  2741. {
  2742. /* Flags */
  2743. dev->dfq_valid = false;
  2744. /* Stats */
  2745. memset(&dev->stats, 0, sizeof(dev->stats));
  2746. setup_struct_phy_for_init(dev, &dev->phy);
  2747. /* IRQ related flags */
  2748. dev->irq_reason = 0;
  2749. memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
  2750. dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
  2751. dev->mac_suspended = 1;
  2752. /* Noise calculation context */
  2753. memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
  2754. }
  2755. static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
  2756. bool idle) {
  2757. u16 pu_delay = 1050;
  2758. if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
  2759. pu_delay = 500;
  2760. if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
  2761. pu_delay = max(pu_delay, (u16)2400);
  2762. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  2763. B43legacy_SHM_SH_SPUWKUP, pu_delay);
  2764. }
  2765. /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
  2766. static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
  2767. {
  2768. u16 pretbtt;
  2769. /* The time value is in microseconds. */
  2770. if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
  2771. pretbtt = 2;
  2772. else
  2773. pretbtt = 250;
  2774. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  2775. B43legacy_SHM_SH_PRETBTT, pretbtt);
  2776. b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
  2777. }
  2778. /* Shutdown a wireless core */
  2779. /* Locking: wl->mutex */
  2780. static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
  2781. {
  2782. struct b43legacy_phy *phy = &dev->phy;
  2783. u32 macctl;
  2784. B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
  2785. if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
  2786. return;
  2787. b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
  2788. /* Stop the microcode PSM. */
  2789. macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  2790. macctl &= ~B43legacy_MACCTL_PSM_RUN;
  2791. macctl |= B43legacy_MACCTL_PSM_JMP0;
  2792. b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
  2793. b43legacy_leds_exit(dev);
  2794. b43legacy_rng_exit(dev->wl);
  2795. b43legacy_pio_free(dev);
  2796. b43legacy_dma_free(dev);
  2797. b43legacy_chip_exit(dev);
  2798. b43legacy_radio_turn_off(dev, 1);
  2799. b43legacy_switch_analog(dev, 0);
  2800. if (phy->dyn_tssi_tbl)
  2801. kfree(phy->tssi2dbm);
  2802. kfree(phy->lo_control);
  2803. phy->lo_control = NULL;
  2804. if (dev->wl->current_beacon) {
  2805. dev_kfree_skb_any(dev->wl->current_beacon);
  2806. dev->wl->current_beacon = NULL;
  2807. }
  2808. ssb_device_disable(dev->dev, 0);
  2809. ssb_bus_may_powerdown(dev->dev->bus);
  2810. }
  2811. static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
  2812. {
  2813. struct b43legacy_phy *phy = &dev->phy;
  2814. int i;
  2815. /* Set default attenuation values. */
  2816. phy->bbatt = b43legacy_default_baseband_attenuation(dev);
  2817. phy->rfatt = b43legacy_default_radio_attenuation(dev);
  2818. phy->txctl1 = b43legacy_default_txctl1(dev);
  2819. phy->txctl2 = 0xFFFF;
  2820. phy->txpwr_offset = 0;
  2821. /* NRSSI */
  2822. phy->nrssislope = 0;
  2823. for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
  2824. phy->nrssi[i] = -1000;
  2825. for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
  2826. phy->nrssi_lt[i] = i;
  2827. phy->lofcal = 0xFFFF;
  2828. phy->initval = 0xFFFF;
  2829. phy->aci_enable = false;
  2830. phy->aci_wlan_automatic = false;
  2831. phy->aci_hw_rssi = false;
  2832. phy->antenna_diversity = 0xFFFF;
  2833. memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
  2834. memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
  2835. /* Flags */
  2836. phy->calibrated = 0;
  2837. if (phy->_lo_pairs)
  2838. memset(phy->_lo_pairs, 0,
  2839. sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
  2840. memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
  2841. }
  2842. /* Initialize a wireless core */
  2843. static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
  2844. {
  2845. struct b43legacy_wl *wl = dev->wl;
  2846. struct ssb_bus *bus = dev->dev->bus;
  2847. struct b43legacy_phy *phy = &dev->phy;
  2848. struct ssb_sprom *sprom = &dev->dev->bus->sprom;
  2849. int err;
  2850. u32 hf;
  2851. u32 tmp;
  2852. B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
  2853. err = ssb_bus_powerup(bus, 0);
  2854. if (err)
  2855. goto out;
  2856. if (!ssb_device_is_enabled(dev->dev)) {
  2857. tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
  2858. b43legacy_wireless_core_reset(dev, tmp);
  2859. }
  2860. if ((phy->type == B43legacy_PHYTYPE_B) ||
  2861. (phy->type == B43legacy_PHYTYPE_G)) {
  2862. phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
  2863. * B43legacy_LO_COUNT,
  2864. GFP_KERNEL);
  2865. if (!phy->_lo_pairs)
  2866. return -ENOMEM;
  2867. }
  2868. setup_struct_wldev_for_init(dev);
  2869. err = b43legacy_phy_init_tssi2dbm_table(dev);
  2870. if (err)
  2871. goto err_kfree_lo_control;
  2872. /* Enable IRQ routing to this device. */
  2873. ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
  2874. prepare_phy_data_for_init(dev);
  2875. b43legacy_phy_calibrate(dev);
  2876. err = b43legacy_chip_init(dev);
  2877. if (err)
  2878. goto err_kfree_tssitbl;
  2879. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  2880. B43legacy_SHM_SH_WLCOREREV,
  2881. dev->dev->id.revision);
  2882. hf = b43legacy_hf_read(dev);
  2883. if (phy->type == B43legacy_PHYTYPE_G) {
  2884. hf |= B43legacy_HF_SYMW;
  2885. if (phy->rev == 1)
  2886. hf |= B43legacy_HF_GDCW;
  2887. if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
  2888. hf |= B43legacy_HF_OFDMPABOOST;
  2889. } else if (phy->type == B43legacy_PHYTYPE_B) {
  2890. hf |= B43legacy_HF_SYMW;
  2891. if (phy->rev >= 2 && phy->radio_ver == 0x2050)
  2892. hf &= ~B43legacy_HF_GDCW;
  2893. }
  2894. b43legacy_hf_write(dev, hf);
  2895. b43legacy_set_retry_limits(dev,
  2896. B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
  2897. B43legacy_DEFAULT_LONG_RETRY_LIMIT);
  2898. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  2899. 0x0044, 3);
  2900. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  2901. 0x0046, 2);
  2902. /* Disable sending probe responses from firmware.
  2903. * Setting the MaxTime to one usec will always trigger
  2904. * a timeout, so we never send any probe resp.
  2905. * A timeout of zero is infinite. */
  2906. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  2907. B43legacy_SHM_SH_PRMAXTIME, 1);
  2908. b43legacy_rate_memory_init(dev);
  2909. /* Minimum Contention Window */
  2910. if (phy->type == B43legacy_PHYTYPE_B)
  2911. b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
  2912. 0x0003, 31);
  2913. else
  2914. b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
  2915. 0x0003, 15);
  2916. /* Maximum Contention Window */
  2917. b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
  2918. 0x0004, 1023);
  2919. do {
  2920. if (b43legacy_using_pio(dev))
  2921. err = b43legacy_pio_init(dev);
  2922. else {
  2923. err = b43legacy_dma_init(dev);
  2924. if (!err)
  2925. b43legacy_qos_init(dev);
  2926. }
  2927. } while (err == -EAGAIN);
  2928. if (err)
  2929. goto err_chip_exit;
  2930. b43legacy_set_synth_pu_delay(dev, 1);
  2931. ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
  2932. b43legacy_upload_card_macaddress(dev);
  2933. b43legacy_security_init(dev);
  2934. b43legacy_rng_init(wl);
  2935. ieee80211_wake_queues(dev->wl->hw);
  2936. b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
  2937. b43legacy_leds_init(dev);
  2938. out:
  2939. return err;
  2940. err_chip_exit:
  2941. b43legacy_chip_exit(dev);
  2942. err_kfree_tssitbl:
  2943. if (phy->dyn_tssi_tbl)
  2944. kfree(phy->tssi2dbm);
  2945. err_kfree_lo_control:
  2946. kfree(phy->lo_control);
  2947. phy->lo_control = NULL;
  2948. ssb_bus_may_powerdown(bus);
  2949. B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
  2950. return err;
  2951. }
  2952. static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
  2953. struct ieee80211_vif *vif)
  2954. {
  2955. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2956. struct b43legacy_wldev *dev;
  2957. unsigned long flags;
  2958. int err = -EOPNOTSUPP;
  2959. /* TODO: allow WDS/AP devices to coexist */
  2960. if (vif->type != NL80211_IFTYPE_AP &&
  2961. vif->type != NL80211_IFTYPE_STATION &&
  2962. vif->type != NL80211_IFTYPE_WDS &&
  2963. vif->type != NL80211_IFTYPE_ADHOC)
  2964. return -EOPNOTSUPP;
  2965. mutex_lock(&wl->mutex);
  2966. if (wl->operating)
  2967. goto out_mutex_unlock;
  2968. b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
  2969. dev = wl->current_dev;
  2970. wl->operating = true;
  2971. wl->vif = vif;
  2972. wl->if_type = vif->type;
  2973. memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
  2974. spin_lock_irqsave(&wl->irq_lock, flags);
  2975. b43legacy_adjust_opmode(dev);
  2976. b43legacy_set_pretbtt(dev);
  2977. b43legacy_set_synth_pu_delay(dev, 0);
  2978. b43legacy_upload_card_macaddress(dev);
  2979. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2980. err = 0;
  2981. out_mutex_unlock:
  2982. mutex_unlock(&wl->mutex);
  2983. return err;
  2984. }
  2985. static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
  2986. struct ieee80211_vif *vif)
  2987. {
  2988. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2989. struct b43legacy_wldev *dev = wl->current_dev;
  2990. unsigned long flags;
  2991. b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
  2992. mutex_lock(&wl->mutex);
  2993. B43legacy_WARN_ON(!wl->operating);
  2994. B43legacy_WARN_ON(wl->vif != vif);
  2995. wl->vif = NULL;
  2996. wl->operating = false;
  2997. spin_lock_irqsave(&wl->irq_lock, flags);
  2998. b43legacy_adjust_opmode(dev);
  2999. memset(wl->mac_addr, 0, ETH_ALEN);
  3000. b43legacy_upload_card_macaddress(dev);
  3001. spin_unlock_irqrestore(&wl->irq_lock, flags);
  3002. mutex_unlock(&wl->mutex);
  3003. }
  3004. static int b43legacy_op_start(struct ieee80211_hw *hw)
  3005. {
  3006. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  3007. struct b43legacy_wldev *dev = wl->current_dev;
  3008. int did_init = 0;
  3009. int err = 0;
  3010. /* Kill all old instance specific information to make sure
  3011. * the card won't use it in the short timeframe between start
  3012. * and mac80211 reconfiguring it. */
  3013. memset(wl->bssid, 0, ETH_ALEN);
  3014. memset(wl->mac_addr, 0, ETH_ALEN);
  3015. wl->filter_flags = 0;
  3016. wl->beacon0_uploaded = false;
  3017. wl->beacon1_uploaded = false;
  3018. wl->beacon_templates_virgin = true;
  3019. wl->radio_enabled = true;
  3020. mutex_lock(&wl->mutex);
  3021. if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
  3022. err = b43legacy_wireless_core_init(dev);
  3023. if (err)
  3024. goto out_mutex_unlock;
  3025. did_init = 1;
  3026. }
  3027. if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
  3028. err = b43legacy_wireless_core_start(dev);
  3029. if (err) {
  3030. if (did_init)
  3031. b43legacy_wireless_core_exit(dev);
  3032. goto out_mutex_unlock;
  3033. }
  3034. }
  3035. wiphy_rfkill_start_polling(hw->wiphy);
  3036. out_mutex_unlock:
  3037. mutex_unlock(&wl->mutex);
  3038. return err;
  3039. }
  3040. static void b43legacy_op_stop(struct ieee80211_hw *hw)
  3041. {
  3042. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  3043. struct b43legacy_wldev *dev = wl->current_dev;
  3044. cancel_work_sync(&(wl->beacon_update_trigger));
  3045. mutex_lock(&wl->mutex);
  3046. if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
  3047. b43legacy_wireless_core_stop(dev);
  3048. b43legacy_wireless_core_exit(dev);
  3049. wl->radio_enabled = false;
  3050. mutex_unlock(&wl->mutex);
  3051. }
  3052. static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
  3053. struct ieee80211_sta *sta, bool set)
  3054. {
  3055. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  3056. unsigned long flags;
  3057. spin_lock_irqsave(&wl->irq_lock, flags);
  3058. b43legacy_update_templates(wl);
  3059. spin_unlock_irqrestore(&wl->irq_lock, flags);
  3060. return 0;
  3061. }
  3062. static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx,
  3063. struct survey_info *survey)
  3064. {
  3065. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  3066. struct b43legacy_wldev *dev = wl->current_dev;
  3067. struct ieee80211_conf *conf = &hw->conf;
  3068. if (idx != 0)
  3069. return -ENOENT;
  3070. survey->channel = conf->channel;
  3071. survey->filled = SURVEY_INFO_NOISE_DBM;
  3072. survey->noise = dev->stats.link_noise;
  3073. return 0;
  3074. }
  3075. static const struct ieee80211_ops b43legacy_hw_ops = {
  3076. .tx = b43legacy_op_tx,
  3077. .conf_tx = b43legacy_op_conf_tx,
  3078. .add_interface = b43legacy_op_add_interface,
  3079. .remove_interface = b43legacy_op_remove_interface,
  3080. .config = b43legacy_op_dev_config,
  3081. .bss_info_changed = b43legacy_op_bss_info_changed,
  3082. .configure_filter = b43legacy_op_configure_filter,
  3083. .get_stats = b43legacy_op_get_stats,
  3084. .start = b43legacy_op_start,
  3085. .stop = b43legacy_op_stop,
  3086. .set_tim = b43legacy_op_beacon_set_tim,
  3087. .get_survey = b43legacy_op_get_survey,
  3088. .rfkill_poll = b43legacy_rfkill_poll,
  3089. };
  3090. /* Hard-reset the chip. Do not call this directly.
  3091. * Use b43legacy_controller_restart()
  3092. */
  3093. static void b43legacy_chip_reset(struct work_struct *work)
  3094. {
  3095. struct b43legacy_wldev *dev =
  3096. container_of(work, struct b43legacy_wldev, restart_work);
  3097. struct b43legacy_wl *wl = dev->wl;
  3098. int err = 0;
  3099. int prev_status;
  3100. mutex_lock(&wl->mutex);
  3101. prev_status = b43legacy_status(dev);
  3102. /* Bring the device down... */
  3103. if (prev_status >= B43legacy_STAT_STARTED)
  3104. b43legacy_wireless_core_stop(dev);
  3105. if (prev_status >= B43legacy_STAT_INITIALIZED)
  3106. b43legacy_wireless_core_exit(dev);
  3107. /* ...and up again. */
  3108. if (prev_status >= B43legacy_STAT_INITIALIZED) {
  3109. err = b43legacy_wireless_core_init(dev);
  3110. if (err)
  3111. goto out;
  3112. }
  3113. if (prev_status >= B43legacy_STAT_STARTED) {
  3114. err = b43legacy_wireless_core_start(dev);
  3115. if (err) {
  3116. b43legacy_wireless_core_exit(dev);
  3117. goto out;
  3118. }
  3119. }
  3120. out:
  3121. if (err)
  3122. wl->current_dev = NULL; /* Failed to init the dev. */
  3123. mutex_unlock(&wl->mutex);
  3124. if (err)
  3125. b43legacyerr(wl, "Controller restart FAILED\n");
  3126. else
  3127. b43legacyinfo(wl, "Controller restarted\n");
  3128. }
  3129. static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
  3130. int have_bphy,
  3131. int have_gphy)
  3132. {
  3133. struct ieee80211_hw *hw = dev->wl->hw;
  3134. struct b43legacy_phy *phy = &dev->phy;
  3135. phy->possible_phymodes = 0;
  3136. if (have_bphy) {
  3137. hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3138. &b43legacy_band_2GHz_BPHY;
  3139. phy->possible_phymodes |= B43legacy_PHYMODE_B;
  3140. }
  3141. if (have_gphy) {
  3142. hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3143. &b43legacy_band_2GHz_GPHY;
  3144. phy->possible_phymodes |= B43legacy_PHYMODE_G;
  3145. }
  3146. return 0;
  3147. }
  3148. static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
  3149. {
  3150. /* We release firmware that late to not be required to re-request
  3151. * is all the time when we reinit the core. */
  3152. b43legacy_release_firmware(dev);
  3153. }
  3154. static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
  3155. {
  3156. struct b43legacy_wl *wl = dev->wl;
  3157. struct ssb_bus *bus = dev->dev->bus;
  3158. struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
  3159. int err;
  3160. int have_bphy = 0;
  3161. int have_gphy = 0;
  3162. u32 tmp;
  3163. /* Do NOT do any device initialization here.
  3164. * Do it in wireless_core_init() instead.
  3165. * This function is for gathering basic information about the HW, only.
  3166. * Also some structs may be set up here. But most likely you want to
  3167. * have that in core_init(), too.
  3168. */
  3169. err = ssb_bus_powerup(bus, 0);
  3170. if (err) {
  3171. b43legacyerr(wl, "Bus powerup failed\n");
  3172. goto out;
  3173. }
  3174. /* Get the PHY type. */
  3175. if (dev->dev->id.revision >= 5) {
  3176. u32 tmshigh;
  3177. tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
  3178. have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
  3179. if (!have_gphy)
  3180. have_bphy = 1;
  3181. } else if (dev->dev->id.revision == 4)
  3182. have_gphy = 1;
  3183. else
  3184. have_bphy = 1;
  3185. dev->phy.gmode = (have_gphy || have_bphy);
  3186. dev->phy.radio_on = true;
  3187. tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
  3188. b43legacy_wireless_core_reset(dev, tmp);
  3189. err = b43legacy_phy_versioning(dev);
  3190. if (err)
  3191. goto err_powerdown;
  3192. /* Check if this device supports multiband. */
  3193. if (!pdev ||
  3194. (pdev->device != 0x4312 &&
  3195. pdev->device != 0x4319 &&
  3196. pdev->device != 0x4324)) {
  3197. /* No multiband support. */
  3198. have_bphy = 0;
  3199. have_gphy = 0;
  3200. switch (dev->phy.type) {
  3201. case B43legacy_PHYTYPE_B:
  3202. have_bphy = 1;
  3203. break;
  3204. case B43legacy_PHYTYPE_G:
  3205. have_gphy = 1;
  3206. break;
  3207. default:
  3208. B43legacy_BUG_ON(1);
  3209. }
  3210. }
  3211. dev->phy.gmode = (have_gphy || have_bphy);
  3212. tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
  3213. b43legacy_wireless_core_reset(dev, tmp);
  3214. err = b43legacy_validate_chipaccess(dev);
  3215. if (err)
  3216. goto err_powerdown;
  3217. err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
  3218. if (err)
  3219. goto err_powerdown;
  3220. /* Now set some default "current_dev" */
  3221. if (!wl->current_dev)
  3222. wl->current_dev = dev;
  3223. INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
  3224. b43legacy_radio_turn_off(dev, 1);
  3225. b43legacy_switch_analog(dev, 0);
  3226. ssb_device_disable(dev->dev, 0);
  3227. ssb_bus_may_powerdown(bus);
  3228. out:
  3229. return err;
  3230. err_powerdown:
  3231. ssb_bus_may_powerdown(bus);
  3232. return err;
  3233. }
  3234. static void b43legacy_one_core_detach(struct ssb_device *dev)
  3235. {
  3236. struct b43legacy_wldev *wldev;
  3237. struct b43legacy_wl *wl;
  3238. /* Do not cancel ieee80211-workqueue based work here.
  3239. * See comment in b43legacy_remove(). */
  3240. wldev = ssb_get_drvdata(dev);
  3241. wl = wldev->wl;
  3242. b43legacy_debugfs_remove_device(wldev);
  3243. b43legacy_wireless_core_detach(wldev);
  3244. list_del(&wldev->list);
  3245. wl->nr_devs--;
  3246. ssb_set_drvdata(dev, NULL);
  3247. kfree(wldev);
  3248. }
  3249. static int b43legacy_one_core_attach(struct ssb_device *dev,
  3250. struct b43legacy_wl *wl)
  3251. {
  3252. struct b43legacy_wldev *wldev;
  3253. int err = -ENOMEM;
  3254. wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
  3255. if (!wldev)
  3256. goto out;
  3257. wldev->dev = dev;
  3258. wldev->wl = wl;
  3259. b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
  3260. wldev->bad_frames_preempt = modparam_bad_frames_preempt;
  3261. tasklet_init(&wldev->isr_tasklet,
  3262. (void (*)(unsigned long))b43legacy_interrupt_tasklet,
  3263. (unsigned long)wldev);
  3264. if (modparam_pio)
  3265. wldev->__using_pio = true;
  3266. INIT_LIST_HEAD(&wldev->list);
  3267. err = b43legacy_wireless_core_attach(wldev);
  3268. if (err)
  3269. goto err_kfree_wldev;
  3270. list_add(&wldev->list, &wl->devlist);
  3271. wl->nr_devs++;
  3272. ssb_set_drvdata(dev, wldev);
  3273. b43legacy_debugfs_add_device(wldev);
  3274. out:
  3275. return err;
  3276. err_kfree_wldev:
  3277. kfree(wldev);
  3278. return err;
  3279. }
  3280. static void b43legacy_sprom_fixup(struct ssb_bus *bus)
  3281. {
  3282. /* boardflags workarounds */
  3283. if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
  3284. bus->boardinfo.type == 0x4E &&
  3285. bus->sprom.board_rev > 0x40)
  3286. bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
  3287. }
  3288. static void b43legacy_wireless_exit(struct ssb_device *dev,
  3289. struct b43legacy_wl *wl)
  3290. {
  3291. struct ieee80211_hw *hw = wl->hw;
  3292. ssb_set_devtypedata(dev, NULL);
  3293. ieee80211_free_hw(hw);
  3294. }
  3295. static int b43legacy_wireless_init(struct ssb_device *dev)
  3296. {
  3297. struct ssb_sprom *sprom = &dev->bus->sprom;
  3298. struct ieee80211_hw *hw;
  3299. struct b43legacy_wl *wl;
  3300. int err = -ENOMEM;
  3301. int queue_num;
  3302. b43legacy_sprom_fixup(dev->bus);
  3303. hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
  3304. if (!hw) {
  3305. b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
  3306. goto out;
  3307. }
  3308. /* fill hw info */
  3309. hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
  3310. IEEE80211_HW_SIGNAL_DBM;
  3311. hw->wiphy->interface_modes =
  3312. BIT(NL80211_IFTYPE_AP) |
  3313. BIT(NL80211_IFTYPE_STATION) |
  3314. BIT(NL80211_IFTYPE_WDS) |
  3315. BIT(NL80211_IFTYPE_ADHOC);
  3316. hw->queues = 1; /* FIXME: hardware has more queues */
  3317. hw->max_rates = 2;
  3318. SET_IEEE80211_DEV(hw, dev->dev);
  3319. if (is_valid_ether_addr(sprom->et1mac))
  3320. SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
  3321. else
  3322. SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
  3323. /* Get and initialize struct b43legacy_wl */
  3324. wl = hw_to_b43legacy_wl(hw);
  3325. memset(wl, 0, sizeof(*wl));
  3326. wl->hw = hw;
  3327. spin_lock_init(&wl->irq_lock);
  3328. spin_lock_init(&wl->leds_lock);
  3329. mutex_init(&wl->mutex);
  3330. INIT_LIST_HEAD(&wl->devlist);
  3331. INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
  3332. INIT_WORK(&wl->tx_work, b43legacy_tx_work);
  3333. /* Initialize queues and flags. */
  3334. for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
  3335. skb_queue_head_init(&wl->tx_queue[queue_num]);
  3336. wl->tx_queue_stopped[queue_num] = 0;
  3337. }
  3338. ssb_set_devtypedata(dev, wl);
  3339. b43legacyinfo(wl, "Broadcom %04X WLAN found (core revision %u)\n",
  3340. dev->bus->chip_id, dev->id.revision);
  3341. err = 0;
  3342. out:
  3343. return err;
  3344. }
  3345. static int b43legacy_probe(struct ssb_device *dev,
  3346. const struct ssb_device_id *id)
  3347. {
  3348. struct b43legacy_wl *wl;
  3349. int err;
  3350. int first = 0;
  3351. wl = ssb_get_devtypedata(dev);
  3352. if (!wl) {
  3353. /* Probing the first core - setup common struct b43legacy_wl */
  3354. first = 1;
  3355. err = b43legacy_wireless_init(dev);
  3356. if (err)
  3357. goto out;
  3358. wl = ssb_get_devtypedata(dev);
  3359. B43legacy_WARN_ON(!wl);
  3360. }
  3361. err = b43legacy_one_core_attach(dev, wl);
  3362. if (err)
  3363. goto err_wireless_exit;
  3364. /* setup and start work to load firmware */
  3365. INIT_WORK(&wl->firmware_load, b43legacy_request_firmware);
  3366. schedule_work(&wl->firmware_load);
  3367. out:
  3368. return err;
  3369. err_wireless_exit:
  3370. if (first)
  3371. b43legacy_wireless_exit(dev, wl);
  3372. return err;
  3373. }
  3374. static void b43legacy_remove(struct ssb_device *dev)
  3375. {
  3376. struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
  3377. struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
  3378. /* We must cancel any work here before unregistering from ieee80211,
  3379. * as the ieee80211 unreg will destroy the workqueue. */
  3380. cancel_work_sync(&wldev->restart_work);
  3381. cancel_work_sync(&wl->firmware_load);
  3382. B43legacy_WARN_ON(!wl);
  3383. if (!wldev->fw.ucode)
  3384. return; /* NULL if fw never loaded */
  3385. if (wl->current_dev == wldev)
  3386. ieee80211_unregister_hw(wl->hw);
  3387. b43legacy_one_core_detach(dev);
  3388. if (list_empty(&wl->devlist))
  3389. /* Last core on the chip unregistered.
  3390. * We can destroy common struct b43legacy_wl.
  3391. */
  3392. b43legacy_wireless_exit(dev, wl);
  3393. }
  3394. /* Perform a hardware reset. This can be called from any context. */
  3395. void b43legacy_controller_restart(struct b43legacy_wldev *dev,
  3396. const char *reason)
  3397. {
  3398. /* Must avoid requeueing, if we are in shutdown. */
  3399. if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
  3400. return;
  3401. b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
  3402. ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
  3403. }
  3404. #ifdef CONFIG_PM
  3405. static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
  3406. {
  3407. struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
  3408. struct b43legacy_wl *wl = wldev->wl;
  3409. b43legacydbg(wl, "Suspending...\n");
  3410. mutex_lock(&wl->mutex);
  3411. wldev->suspend_init_status = b43legacy_status(wldev);
  3412. if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
  3413. b43legacy_wireless_core_stop(wldev);
  3414. if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
  3415. b43legacy_wireless_core_exit(wldev);
  3416. mutex_unlock(&wl->mutex);
  3417. b43legacydbg(wl, "Device suspended.\n");
  3418. return 0;
  3419. }
  3420. static int b43legacy_resume(struct ssb_device *dev)
  3421. {
  3422. struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
  3423. struct b43legacy_wl *wl = wldev->wl;
  3424. int err = 0;
  3425. b43legacydbg(wl, "Resuming...\n");
  3426. mutex_lock(&wl->mutex);
  3427. if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
  3428. err = b43legacy_wireless_core_init(wldev);
  3429. if (err) {
  3430. b43legacyerr(wl, "Resume failed at core init\n");
  3431. goto out;
  3432. }
  3433. }
  3434. if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
  3435. err = b43legacy_wireless_core_start(wldev);
  3436. if (err) {
  3437. b43legacy_wireless_core_exit(wldev);
  3438. b43legacyerr(wl, "Resume failed at core start\n");
  3439. goto out;
  3440. }
  3441. }
  3442. b43legacydbg(wl, "Device resumed.\n");
  3443. out:
  3444. mutex_unlock(&wl->mutex);
  3445. return err;
  3446. }
  3447. #else /* CONFIG_PM */
  3448. # define b43legacy_suspend NULL
  3449. # define b43legacy_resume NULL
  3450. #endif /* CONFIG_PM */
  3451. static struct ssb_driver b43legacy_ssb_driver = {
  3452. .name = KBUILD_MODNAME,
  3453. .id_table = b43legacy_ssb_tbl,
  3454. .probe = b43legacy_probe,
  3455. .remove = b43legacy_remove,
  3456. .suspend = b43legacy_suspend,
  3457. .resume = b43legacy_resume,
  3458. };
  3459. static void b43legacy_print_driverinfo(void)
  3460. {
  3461. const char *feat_pci = "", *feat_leds = "",
  3462. *feat_pio = "", *feat_dma = "";
  3463. #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
  3464. feat_pci = "P";
  3465. #endif
  3466. #ifdef CONFIG_B43LEGACY_LEDS
  3467. feat_leds = "L";
  3468. #endif
  3469. #ifdef CONFIG_B43LEGACY_PIO
  3470. feat_pio = "I";
  3471. #endif
  3472. #ifdef CONFIG_B43LEGACY_DMA
  3473. feat_dma = "D";
  3474. #endif
  3475. printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
  3476. "[ Features: %s%s%s%s ]\n",
  3477. feat_pci, feat_leds, feat_pio, feat_dma);
  3478. }
  3479. static int __init b43legacy_init(void)
  3480. {
  3481. int err;
  3482. b43legacy_debugfs_init();
  3483. err = ssb_driver_register(&b43legacy_ssb_driver);
  3484. if (err)
  3485. goto err_dfs_exit;
  3486. b43legacy_print_driverinfo();
  3487. return err;
  3488. err_dfs_exit:
  3489. b43legacy_debugfs_exit();
  3490. return err;
  3491. }
  3492. static void __exit b43legacy_exit(void)
  3493. {
  3494. ssb_driver_unregister(&b43legacy_ssb_driver);
  3495. b43legacy_debugfs_exit();
  3496. }
  3497. module_init(b43legacy_init)
  3498. module_exit(b43legacy_exit)