at803x.c 4.1 KB

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  1. /*
  2. * drivers/net/phy/at803x.c
  3. *
  4. * Driver for Atheros 803x PHY
  5. *
  6. * Author: Matus Ujhelyi <ujhelyi.m@gmail.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/phy.h>
  14. #include <linux/module.h>
  15. #include <linux/string.h>
  16. #include <linux/netdevice.h>
  17. #include <linux/etherdevice.h>
  18. #define AT803X_INTR_ENABLE 0x12
  19. #define AT803X_INTR_STATUS 0x13
  20. #define AT803X_WOL_ENABLE 0x01
  21. #define AT803X_DEVICE_ADDR 0x03
  22. #define AT803X_LOC_MAC_ADDR_0_15_OFFSET 0x804C
  23. #define AT803X_LOC_MAC_ADDR_16_31_OFFSET 0x804B
  24. #define AT803X_LOC_MAC_ADDR_32_47_OFFSET 0x804A
  25. #define AT803X_MMD_ACCESS_CONTROL 0x0D
  26. #define AT803X_MMD_ACCESS_CONTROL_DATA 0x0E
  27. #define AT803X_FUNC_DATA 0x4003
  28. MODULE_DESCRIPTION("Atheros 803x PHY driver");
  29. MODULE_AUTHOR("Matus Ujhelyi");
  30. MODULE_LICENSE("GPL");
  31. static void at803x_set_wol_mac_addr(struct phy_device *phydev)
  32. {
  33. struct net_device *ndev = phydev->attached_dev;
  34. const u8 *mac;
  35. unsigned int i, offsets[] = {
  36. AT803X_LOC_MAC_ADDR_32_47_OFFSET,
  37. AT803X_LOC_MAC_ADDR_16_31_OFFSET,
  38. AT803X_LOC_MAC_ADDR_0_15_OFFSET,
  39. };
  40. if (!ndev)
  41. return;
  42. mac = (const u8 *) ndev->dev_addr;
  43. if (!is_valid_ether_addr(mac))
  44. return;
  45. for (i = 0; i < 3; i++) {
  46. phy_write(phydev, AT803X_MMD_ACCESS_CONTROL,
  47. AT803X_DEVICE_ADDR);
  48. phy_write(phydev, AT803X_MMD_ACCESS_CONTROL_DATA,
  49. offsets[i]);
  50. phy_write(phydev, AT803X_MMD_ACCESS_CONTROL,
  51. AT803X_FUNC_DATA);
  52. phy_write(phydev, AT803X_MMD_ACCESS_CONTROL_DATA,
  53. mac[(i * 2) + 1] | (mac[(i * 2)] << 8));
  54. }
  55. }
  56. static int at803x_config_init(struct phy_device *phydev)
  57. {
  58. int val;
  59. u32 features;
  60. int status;
  61. features = SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_AUI |
  62. SUPPORTED_FIBRE | SUPPORTED_BNC;
  63. val = phy_read(phydev, MII_BMSR);
  64. if (val < 0)
  65. return val;
  66. if (val & BMSR_ANEGCAPABLE)
  67. features |= SUPPORTED_Autoneg;
  68. if (val & BMSR_100FULL)
  69. features |= SUPPORTED_100baseT_Full;
  70. if (val & BMSR_100HALF)
  71. features |= SUPPORTED_100baseT_Half;
  72. if (val & BMSR_10FULL)
  73. features |= SUPPORTED_10baseT_Full;
  74. if (val & BMSR_10HALF)
  75. features |= SUPPORTED_10baseT_Half;
  76. if (val & BMSR_ESTATEN) {
  77. val = phy_read(phydev, MII_ESTATUS);
  78. if (val < 0)
  79. return val;
  80. if (val & ESTATUS_1000_TFULL)
  81. features |= SUPPORTED_1000baseT_Full;
  82. if (val & ESTATUS_1000_THALF)
  83. features |= SUPPORTED_1000baseT_Half;
  84. }
  85. phydev->supported = features;
  86. phydev->advertising = features;
  87. /* enable WOL */
  88. at803x_set_wol_mac_addr(phydev);
  89. status = phy_write(phydev, AT803X_INTR_ENABLE, AT803X_WOL_ENABLE);
  90. status = phy_read(phydev, AT803X_INTR_STATUS);
  91. return 0;
  92. }
  93. /* ATHEROS 8035 */
  94. static struct phy_driver at8035_driver = {
  95. .phy_id = 0x004dd072,
  96. .name = "Atheros 8035 ethernet",
  97. .phy_id_mask = 0xffffffef,
  98. .config_init = at803x_config_init,
  99. .features = PHY_GBIT_FEATURES,
  100. .flags = PHY_HAS_INTERRUPT,
  101. .config_aneg = &genphy_config_aneg,
  102. .read_status = &genphy_read_status,
  103. .driver = {
  104. .owner = THIS_MODULE,
  105. },
  106. };
  107. /* ATHEROS 8030 */
  108. static struct phy_driver at8030_driver = {
  109. .phy_id = 0x004dd076,
  110. .name = "Atheros 8030 ethernet",
  111. .phy_id_mask = 0xffffffef,
  112. .config_init = at803x_config_init,
  113. .features = PHY_GBIT_FEATURES,
  114. .flags = PHY_HAS_INTERRUPT,
  115. .config_aneg = &genphy_config_aneg,
  116. .read_status = &genphy_read_status,
  117. .driver = {
  118. .owner = THIS_MODULE,
  119. },
  120. };
  121. static int __init atheros_init(void)
  122. {
  123. int ret;
  124. ret = phy_driver_register(&at8035_driver);
  125. if (ret)
  126. goto err1;
  127. ret = phy_driver_register(&at8030_driver);
  128. if (ret)
  129. goto err2;
  130. return 0;
  131. err2:
  132. phy_driver_unregister(&at8035_driver);
  133. err1:
  134. return ret;
  135. }
  136. static void __exit atheros_exit(void)
  137. {
  138. phy_driver_unregister(&at8035_driver);
  139. phy_driver_unregister(&at8030_driver);
  140. }
  141. module_init(atheros_init);
  142. module_exit(atheros_exit);
  143. static struct mdio_device_id __maybe_unused atheros_tbl[] = {
  144. { 0x004dd076, 0xffffffef },
  145. { 0x004dd072, 0xffffffef },
  146. { }
  147. };
  148. MODULE_DEVICE_TABLE(mdio, atheros_tbl);