smsc911x.c 68 KB

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  1. /***************************************************************************
  2. *
  3. * Copyright (C) 2004-2008 SMSC
  4. * Copyright (C) 2005-2008 ARM
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version 2
  9. * of the License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19. *
  20. ***************************************************************************
  21. * Rewritten, heavily based on smsc911x simple driver by SMSC.
  22. * Partly uses io macros from smc91x.c by Nicolas Pitre
  23. *
  24. * Supported devices:
  25. * LAN9115, LAN9116, LAN9117, LAN9118
  26. * LAN9215, LAN9216, LAN9217, LAN9218
  27. * LAN9210, LAN9211
  28. * LAN9220, LAN9221
  29. * LAN89218
  30. *
  31. */
  32. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  33. #include <linux/crc32.h>
  34. #include <linux/delay.h>
  35. #include <linux/errno.h>
  36. #include <linux/etherdevice.h>
  37. #include <linux/ethtool.h>
  38. #include <linux/init.h>
  39. #include <linux/interrupt.h>
  40. #include <linux/ioport.h>
  41. #include <linux/kernel.h>
  42. #include <linux/module.h>
  43. #include <linux/netdevice.h>
  44. #include <linux/platform_device.h>
  45. #include <linux/regulator/consumer.h>
  46. #include <linux/sched.h>
  47. #include <linux/timer.h>
  48. #include <linux/bug.h>
  49. #include <linux/bitops.h>
  50. #include <linux/irq.h>
  51. #include <linux/io.h>
  52. #include <linux/swab.h>
  53. #include <linux/phy.h>
  54. #include <linux/smsc911x.h>
  55. #include <linux/device.h>
  56. #include <linux/of.h>
  57. #include <linux/of_device.h>
  58. #include <linux/of_gpio.h>
  59. #include <linux/of_net.h>
  60. #include "smsc911x.h"
  61. #define SMSC_CHIPNAME "smsc911x"
  62. #define SMSC_MDIONAME "smsc911x-mdio"
  63. #define SMSC_DRV_VERSION "2008-10-21"
  64. MODULE_LICENSE("GPL");
  65. MODULE_VERSION(SMSC_DRV_VERSION);
  66. MODULE_ALIAS("platform:smsc911x");
  67. #if USE_DEBUG > 0
  68. static int debug = 16;
  69. #else
  70. static int debug = 3;
  71. #endif
  72. module_param(debug, int, 0);
  73. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  74. struct smsc911x_data;
  75. struct smsc911x_ops {
  76. u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
  77. void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
  78. void (*rx_readfifo)(struct smsc911x_data *pdata,
  79. unsigned int *buf, unsigned int wordcount);
  80. void (*tx_writefifo)(struct smsc911x_data *pdata,
  81. unsigned int *buf, unsigned int wordcount);
  82. };
  83. #define SMSC911X_NUM_SUPPLIES 2
  84. struct smsc911x_data {
  85. void __iomem *ioaddr;
  86. unsigned int idrev;
  87. /* used to decide which workarounds apply */
  88. unsigned int generation;
  89. /* device configuration (copied from platform_data during probe) */
  90. struct smsc911x_platform_config config;
  91. /* This needs to be acquired before calling any of below:
  92. * smsc911x_mac_read(), smsc911x_mac_write()
  93. */
  94. spinlock_t mac_lock;
  95. /* spinlock to ensure register accesses are serialised */
  96. spinlock_t dev_lock;
  97. struct phy_device *phy_dev;
  98. struct mii_bus *mii_bus;
  99. int phy_irq[PHY_MAX_ADDR];
  100. unsigned int using_extphy;
  101. int last_duplex;
  102. int last_carrier;
  103. u32 msg_enable;
  104. unsigned int gpio_setting;
  105. unsigned int gpio_orig_setting;
  106. struct net_device *dev;
  107. struct napi_struct napi;
  108. unsigned int software_irq_signal;
  109. #ifdef USE_PHY_WORK_AROUND
  110. #define MIN_PACKET_SIZE (64)
  111. char loopback_tx_pkt[MIN_PACKET_SIZE];
  112. char loopback_rx_pkt[MIN_PACKET_SIZE];
  113. unsigned int resetcount;
  114. #endif
  115. /* Members for Multicast filter workaround */
  116. unsigned int multicast_update_pending;
  117. unsigned int set_bits_mask;
  118. unsigned int clear_bits_mask;
  119. unsigned int hashhi;
  120. unsigned int hashlo;
  121. /* register access functions */
  122. const struct smsc911x_ops *ops;
  123. /* regulators */
  124. struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
  125. };
  126. /* Easy access to information */
  127. #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
  128. static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
  129. {
  130. if (pdata->config.flags & SMSC911X_USE_32BIT)
  131. return readl(pdata->ioaddr + reg);
  132. if (pdata->config.flags & SMSC911X_USE_16BIT)
  133. return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
  134. ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
  135. BUG();
  136. return 0;
  137. }
  138. static inline u32
  139. __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
  140. {
  141. if (pdata->config.flags & SMSC911X_USE_32BIT)
  142. return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
  143. if (pdata->config.flags & SMSC911X_USE_16BIT)
  144. return (readw(pdata->ioaddr +
  145. __smsc_shift(pdata, reg)) & 0xFFFF) |
  146. ((readw(pdata->ioaddr +
  147. __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
  148. BUG();
  149. return 0;
  150. }
  151. static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
  152. {
  153. u32 data;
  154. unsigned long flags;
  155. spin_lock_irqsave(&pdata->dev_lock, flags);
  156. data = pdata->ops->reg_read(pdata, reg);
  157. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  158. return data;
  159. }
  160. static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
  161. u32 val)
  162. {
  163. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  164. writel(val, pdata->ioaddr + reg);
  165. return;
  166. }
  167. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  168. writew(val & 0xFFFF, pdata->ioaddr + reg);
  169. writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
  170. return;
  171. }
  172. BUG();
  173. }
  174. static inline void
  175. __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
  176. {
  177. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  178. writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
  179. return;
  180. }
  181. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  182. writew(val & 0xFFFF,
  183. pdata->ioaddr + __smsc_shift(pdata, reg));
  184. writew((val >> 16) & 0xFFFF,
  185. pdata->ioaddr + __smsc_shift(pdata, reg + 2));
  186. return;
  187. }
  188. BUG();
  189. }
  190. static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
  191. u32 val)
  192. {
  193. unsigned long flags;
  194. spin_lock_irqsave(&pdata->dev_lock, flags);
  195. pdata->ops->reg_write(pdata, reg, val);
  196. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  197. }
  198. /* Writes a packet to the TX_DATA_FIFO */
  199. static inline void
  200. smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
  201. unsigned int wordcount)
  202. {
  203. unsigned long flags;
  204. spin_lock_irqsave(&pdata->dev_lock, flags);
  205. if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
  206. while (wordcount--)
  207. __smsc911x_reg_write(pdata, TX_DATA_FIFO,
  208. swab32(*buf++));
  209. goto out;
  210. }
  211. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  212. iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
  213. goto out;
  214. }
  215. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  216. while (wordcount--)
  217. __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
  218. goto out;
  219. }
  220. BUG();
  221. out:
  222. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  223. }
  224. /* Writes a packet to the TX_DATA_FIFO - shifted version */
  225. static inline void
  226. smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
  227. unsigned int wordcount)
  228. {
  229. unsigned long flags;
  230. spin_lock_irqsave(&pdata->dev_lock, flags);
  231. if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
  232. while (wordcount--)
  233. __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
  234. swab32(*buf++));
  235. goto out;
  236. }
  237. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  238. iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata,
  239. TX_DATA_FIFO), buf, wordcount);
  240. goto out;
  241. }
  242. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  243. while (wordcount--)
  244. __smsc911x_reg_write_shift(pdata,
  245. TX_DATA_FIFO, *buf++);
  246. goto out;
  247. }
  248. BUG();
  249. out:
  250. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  251. }
  252. /* Reads a packet out of the RX_DATA_FIFO */
  253. static inline void
  254. smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
  255. unsigned int wordcount)
  256. {
  257. unsigned long flags;
  258. spin_lock_irqsave(&pdata->dev_lock, flags);
  259. if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
  260. while (wordcount--)
  261. *buf++ = swab32(__smsc911x_reg_read(pdata,
  262. RX_DATA_FIFO));
  263. goto out;
  264. }
  265. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  266. ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
  267. goto out;
  268. }
  269. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  270. while (wordcount--)
  271. *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
  272. goto out;
  273. }
  274. BUG();
  275. out:
  276. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  277. }
  278. /* Reads a packet out of the RX_DATA_FIFO - shifted version */
  279. static inline void
  280. smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
  281. unsigned int wordcount)
  282. {
  283. unsigned long flags;
  284. spin_lock_irqsave(&pdata->dev_lock, flags);
  285. if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
  286. while (wordcount--)
  287. *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
  288. RX_DATA_FIFO));
  289. goto out;
  290. }
  291. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  292. ioread32_rep(pdata->ioaddr + __smsc_shift(pdata,
  293. RX_DATA_FIFO), buf, wordcount);
  294. goto out;
  295. }
  296. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  297. while (wordcount--)
  298. *buf++ = __smsc911x_reg_read_shift(pdata,
  299. RX_DATA_FIFO);
  300. goto out;
  301. }
  302. BUG();
  303. out:
  304. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  305. }
  306. /*
  307. * enable resources, currently just regulators.
  308. */
  309. static int smsc911x_enable_resources(struct platform_device *pdev)
  310. {
  311. struct net_device *ndev = platform_get_drvdata(pdev);
  312. struct smsc911x_data *pdata = netdev_priv(ndev);
  313. int ret = 0;
  314. ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
  315. pdata->supplies);
  316. if (ret)
  317. netdev_err(ndev, "failed to enable regulators %d\n",
  318. ret);
  319. return ret;
  320. }
  321. /*
  322. * disable resources, currently just regulators.
  323. */
  324. static int smsc911x_disable_resources(struct platform_device *pdev)
  325. {
  326. struct net_device *ndev = platform_get_drvdata(pdev);
  327. struct smsc911x_data *pdata = netdev_priv(ndev);
  328. int ret = 0;
  329. ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
  330. pdata->supplies);
  331. return ret;
  332. }
  333. /*
  334. * Request resources, currently just regulators.
  335. *
  336. * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
  337. * these are not always-on we need to request regulators to be turned on
  338. * before we can try to access the device registers.
  339. */
  340. static int smsc911x_request_resources(struct platform_device *pdev)
  341. {
  342. struct net_device *ndev = platform_get_drvdata(pdev);
  343. struct smsc911x_data *pdata = netdev_priv(ndev);
  344. int ret = 0;
  345. /* Request regulators */
  346. pdata->supplies[0].supply = "vdd33a";
  347. pdata->supplies[1].supply = "vddvario";
  348. ret = regulator_bulk_get(&pdev->dev,
  349. ARRAY_SIZE(pdata->supplies),
  350. pdata->supplies);
  351. if (ret)
  352. netdev_err(ndev, "couldn't get regulators %d\n",
  353. ret);
  354. return ret;
  355. }
  356. /*
  357. * Free resources, currently just regulators.
  358. *
  359. */
  360. static void smsc911x_free_resources(struct platform_device *pdev)
  361. {
  362. struct net_device *ndev = platform_get_drvdata(pdev);
  363. struct smsc911x_data *pdata = netdev_priv(ndev);
  364. /* Free regulators */
  365. regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
  366. pdata->supplies);
  367. }
  368. /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
  369. * and smsc911x_mac_write, so assumes mac_lock is held */
  370. static int smsc911x_mac_complete(struct smsc911x_data *pdata)
  371. {
  372. int i;
  373. u32 val;
  374. SMSC_ASSERT_MAC_LOCK(pdata);
  375. for (i = 0; i < 40; i++) {
  376. val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
  377. if (!(val & MAC_CSR_CMD_CSR_BUSY_))
  378. return 0;
  379. }
  380. SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
  381. "MAC_CSR_CMD: 0x%08X", val);
  382. return -EIO;
  383. }
  384. /* Fetches a MAC register value. Assumes mac_lock is acquired */
  385. static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
  386. {
  387. unsigned int temp;
  388. SMSC_ASSERT_MAC_LOCK(pdata);
  389. temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
  390. if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
  391. SMSC_WARN(pdata, hw, "MAC busy at entry");
  392. return 0xFFFFFFFF;
  393. }
  394. /* Send the MAC cmd */
  395. smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
  396. MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
  397. /* Workaround for hardware read-after-write restriction */
  398. temp = smsc911x_reg_read(pdata, BYTE_TEST);
  399. /* Wait for the read to complete */
  400. if (likely(smsc911x_mac_complete(pdata) == 0))
  401. return smsc911x_reg_read(pdata, MAC_CSR_DATA);
  402. SMSC_WARN(pdata, hw, "MAC busy after read");
  403. return 0xFFFFFFFF;
  404. }
  405. /* Set a mac register, mac_lock must be acquired before calling */
  406. static void smsc911x_mac_write(struct smsc911x_data *pdata,
  407. unsigned int offset, u32 val)
  408. {
  409. unsigned int temp;
  410. SMSC_ASSERT_MAC_LOCK(pdata);
  411. temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
  412. if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
  413. SMSC_WARN(pdata, hw,
  414. "smsc911x_mac_write failed, MAC busy at entry");
  415. return;
  416. }
  417. /* Send data to write */
  418. smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
  419. /* Write the actual data */
  420. smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
  421. MAC_CSR_CMD_CSR_BUSY_));
  422. /* Workaround for hardware read-after-write restriction */
  423. temp = smsc911x_reg_read(pdata, BYTE_TEST);
  424. /* Wait for the write to complete */
  425. if (likely(smsc911x_mac_complete(pdata) == 0))
  426. return;
  427. SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
  428. }
  429. /* Get a phy register */
  430. static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
  431. {
  432. struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
  433. unsigned long flags;
  434. unsigned int addr;
  435. int i, reg;
  436. spin_lock_irqsave(&pdata->mac_lock, flags);
  437. /* Confirm MII not busy */
  438. if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
  439. SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
  440. reg = -EIO;
  441. goto out;
  442. }
  443. /* Set the address, index & direction (read from PHY) */
  444. addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
  445. smsc911x_mac_write(pdata, MII_ACC, addr);
  446. /* Wait for read to complete w/ timeout */
  447. for (i = 0; i < 100; i++)
  448. if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
  449. reg = smsc911x_mac_read(pdata, MII_DATA);
  450. goto out;
  451. }
  452. SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
  453. reg = -EIO;
  454. out:
  455. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  456. return reg;
  457. }
  458. /* Set a phy register */
  459. static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
  460. u16 val)
  461. {
  462. struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
  463. unsigned long flags;
  464. unsigned int addr;
  465. int i, reg;
  466. spin_lock_irqsave(&pdata->mac_lock, flags);
  467. /* Confirm MII not busy */
  468. if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
  469. SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
  470. reg = -EIO;
  471. goto out;
  472. }
  473. /* Put the data to write in the MAC */
  474. smsc911x_mac_write(pdata, MII_DATA, val);
  475. /* Set the address, index & direction (write to PHY) */
  476. addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
  477. MII_ACC_MII_WRITE_;
  478. smsc911x_mac_write(pdata, MII_ACC, addr);
  479. /* Wait for write to complete w/ timeout */
  480. for (i = 0; i < 100; i++)
  481. if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
  482. reg = 0;
  483. goto out;
  484. }
  485. SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
  486. reg = -EIO;
  487. out:
  488. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  489. return reg;
  490. }
  491. /* Switch to external phy. Assumes tx and rx are stopped. */
  492. static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
  493. {
  494. unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
  495. /* Disable phy clocks to the MAC */
  496. hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
  497. hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
  498. smsc911x_reg_write(pdata, HW_CFG, hwcfg);
  499. udelay(10); /* Enough time for clocks to stop */
  500. /* Switch to external phy */
  501. hwcfg |= HW_CFG_EXT_PHY_EN_;
  502. smsc911x_reg_write(pdata, HW_CFG, hwcfg);
  503. /* Enable phy clocks to the MAC */
  504. hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
  505. hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
  506. smsc911x_reg_write(pdata, HW_CFG, hwcfg);
  507. udelay(10); /* Enough time for clocks to restart */
  508. hwcfg |= HW_CFG_SMI_SEL_;
  509. smsc911x_reg_write(pdata, HW_CFG, hwcfg);
  510. }
  511. /* Autodetects and enables external phy if present on supported chips.
  512. * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
  513. * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
  514. static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
  515. {
  516. unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
  517. if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
  518. SMSC_TRACE(pdata, hw, "Forcing internal PHY");
  519. pdata->using_extphy = 0;
  520. } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
  521. SMSC_TRACE(pdata, hw, "Forcing external PHY");
  522. smsc911x_phy_enable_external(pdata);
  523. pdata->using_extphy = 1;
  524. } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
  525. SMSC_TRACE(pdata, hw,
  526. "HW_CFG EXT_PHY_DET set, using external PHY");
  527. smsc911x_phy_enable_external(pdata);
  528. pdata->using_extphy = 1;
  529. } else {
  530. SMSC_TRACE(pdata, hw,
  531. "HW_CFG EXT_PHY_DET clear, using internal PHY");
  532. pdata->using_extphy = 0;
  533. }
  534. }
  535. /* Fetches a tx status out of the status fifo */
  536. static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
  537. {
  538. unsigned int result =
  539. smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
  540. if (result != 0)
  541. result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
  542. return result;
  543. }
  544. /* Fetches the next rx status */
  545. static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
  546. {
  547. unsigned int result =
  548. smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
  549. if (result != 0)
  550. result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
  551. return result;
  552. }
  553. #ifdef USE_PHY_WORK_AROUND
  554. static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
  555. {
  556. unsigned int tries;
  557. u32 wrsz;
  558. u32 rdsz;
  559. ulong bufp;
  560. for (tries = 0; tries < 10; tries++) {
  561. unsigned int txcmd_a;
  562. unsigned int txcmd_b;
  563. unsigned int status;
  564. unsigned int pktlength;
  565. unsigned int i;
  566. /* Zero-out rx packet memory */
  567. memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
  568. /* Write tx packet to 118 */
  569. txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
  570. txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
  571. txcmd_a |= MIN_PACKET_SIZE;
  572. txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
  573. smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
  574. smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
  575. bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
  576. wrsz = MIN_PACKET_SIZE + 3;
  577. wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
  578. wrsz >>= 2;
  579. pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
  580. /* Wait till transmit is done */
  581. i = 60;
  582. do {
  583. udelay(5);
  584. status = smsc911x_tx_get_txstatus(pdata);
  585. } while ((i--) && (!status));
  586. if (!status) {
  587. SMSC_WARN(pdata, hw,
  588. "Failed to transmit during loopback test");
  589. continue;
  590. }
  591. if (status & TX_STS_ES_) {
  592. SMSC_WARN(pdata, hw,
  593. "Transmit encountered errors during loopback test");
  594. continue;
  595. }
  596. /* Wait till receive is done */
  597. i = 60;
  598. do {
  599. udelay(5);
  600. status = smsc911x_rx_get_rxstatus(pdata);
  601. } while ((i--) && (!status));
  602. if (!status) {
  603. SMSC_WARN(pdata, hw,
  604. "Failed to receive during loopback test");
  605. continue;
  606. }
  607. if (status & RX_STS_ES_) {
  608. SMSC_WARN(pdata, hw,
  609. "Receive encountered errors during loopback test");
  610. continue;
  611. }
  612. pktlength = ((status & 0x3FFF0000UL) >> 16);
  613. bufp = (ulong)pdata->loopback_rx_pkt;
  614. rdsz = pktlength + 3;
  615. rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
  616. rdsz >>= 2;
  617. pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
  618. if (pktlength != (MIN_PACKET_SIZE + 4)) {
  619. SMSC_WARN(pdata, hw, "Unexpected packet size "
  620. "during loop back test, size=%d, will retry",
  621. pktlength);
  622. } else {
  623. unsigned int j;
  624. int mismatch = 0;
  625. for (j = 0; j < MIN_PACKET_SIZE; j++) {
  626. if (pdata->loopback_tx_pkt[j]
  627. != pdata->loopback_rx_pkt[j]) {
  628. mismatch = 1;
  629. break;
  630. }
  631. }
  632. if (!mismatch) {
  633. SMSC_TRACE(pdata, hw, "Successfully verified "
  634. "loopback packet");
  635. return 0;
  636. } else {
  637. SMSC_WARN(pdata, hw, "Data mismatch "
  638. "during loop back test, will retry");
  639. }
  640. }
  641. }
  642. return -EIO;
  643. }
  644. static int smsc911x_phy_reset(struct smsc911x_data *pdata)
  645. {
  646. struct phy_device *phy_dev = pdata->phy_dev;
  647. unsigned int temp;
  648. unsigned int i = 100000;
  649. BUG_ON(!phy_dev);
  650. BUG_ON(!phy_dev->bus);
  651. SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset");
  652. smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
  653. do {
  654. msleep(1);
  655. temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
  656. MII_BMCR);
  657. } while ((i--) && (temp & BMCR_RESET));
  658. if (temp & BMCR_RESET) {
  659. SMSC_WARN(pdata, hw, "PHY reset failed to complete");
  660. return -EIO;
  661. }
  662. /* Extra delay required because the phy may not be completed with
  663. * its reset when BMCR_RESET is cleared. Specs say 256 uS is
  664. * enough delay but using 1ms here to be safe */
  665. msleep(1);
  666. return 0;
  667. }
  668. static int smsc911x_phy_loopbacktest(struct net_device *dev)
  669. {
  670. struct smsc911x_data *pdata = netdev_priv(dev);
  671. struct phy_device *phy_dev = pdata->phy_dev;
  672. int result = -EIO;
  673. unsigned int i, val;
  674. unsigned long flags;
  675. /* Initialise tx packet using broadcast destination address */
  676. memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
  677. /* Use incrementing source address */
  678. for (i = 6; i < 12; i++)
  679. pdata->loopback_tx_pkt[i] = (char)i;
  680. /* Set length type field */
  681. pdata->loopback_tx_pkt[12] = 0x00;
  682. pdata->loopback_tx_pkt[13] = 0x00;
  683. for (i = 14; i < MIN_PACKET_SIZE; i++)
  684. pdata->loopback_tx_pkt[i] = (char)i;
  685. val = smsc911x_reg_read(pdata, HW_CFG);
  686. val &= HW_CFG_TX_FIF_SZ_;
  687. val |= HW_CFG_SF_;
  688. smsc911x_reg_write(pdata, HW_CFG, val);
  689. smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
  690. smsc911x_reg_write(pdata, RX_CFG,
  691. (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
  692. for (i = 0; i < 10; i++) {
  693. /* Set PHY to 10/FD, no ANEG, and loopback mode */
  694. smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
  695. BMCR_LOOPBACK | BMCR_FULLDPLX);
  696. /* Enable MAC tx/rx, FD */
  697. spin_lock_irqsave(&pdata->mac_lock, flags);
  698. smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
  699. | MAC_CR_TXEN_ | MAC_CR_RXEN_);
  700. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  701. if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
  702. result = 0;
  703. break;
  704. }
  705. pdata->resetcount++;
  706. /* Disable MAC rx */
  707. spin_lock_irqsave(&pdata->mac_lock, flags);
  708. smsc911x_mac_write(pdata, MAC_CR, 0);
  709. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  710. smsc911x_phy_reset(pdata);
  711. }
  712. /* Disable MAC */
  713. spin_lock_irqsave(&pdata->mac_lock, flags);
  714. smsc911x_mac_write(pdata, MAC_CR, 0);
  715. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  716. /* Cancel PHY loopback mode */
  717. smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
  718. smsc911x_reg_write(pdata, TX_CFG, 0);
  719. smsc911x_reg_write(pdata, RX_CFG, 0);
  720. return result;
  721. }
  722. #endif /* USE_PHY_WORK_AROUND */
  723. static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
  724. {
  725. struct phy_device *phy_dev = pdata->phy_dev;
  726. u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
  727. u32 flow;
  728. unsigned long flags;
  729. if (phy_dev->duplex == DUPLEX_FULL) {
  730. u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
  731. u16 rmtadv = phy_read(phy_dev, MII_LPA);
  732. u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
  733. if (cap & FLOW_CTRL_RX)
  734. flow = 0xFFFF0002;
  735. else
  736. flow = 0;
  737. if (cap & FLOW_CTRL_TX)
  738. afc |= 0xF;
  739. else
  740. afc &= ~0xF;
  741. SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
  742. (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
  743. (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
  744. } else {
  745. SMSC_TRACE(pdata, hw, "half duplex");
  746. flow = 0;
  747. afc |= 0xF;
  748. }
  749. spin_lock_irqsave(&pdata->mac_lock, flags);
  750. smsc911x_mac_write(pdata, FLOW, flow);
  751. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  752. smsc911x_reg_write(pdata, AFC_CFG, afc);
  753. }
  754. /* Update link mode if anything has changed. Called periodically when the
  755. * PHY is in polling mode, even if nothing has changed. */
  756. static void smsc911x_phy_adjust_link(struct net_device *dev)
  757. {
  758. struct smsc911x_data *pdata = netdev_priv(dev);
  759. struct phy_device *phy_dev = pdata->phy_dev;
  760. unsigned long flags;
  761. int carrier;
  762. if (phy_dev->duplex != pdata->last_duplex) {
  763. unsigned int mac_cr;
  764. SMSC_TRACE(pdata, hw, "duplex state has changed");
  765. spin_lock_irqsave(&pdata->mac_lock, flags);
  766. mac_cr = smsc911x_mac_read(pdata, MAC_CR);
  767. if (phy_dev->duplex) {
  768. SMSC_TRACE(pdata, hw,
  769. "configuring for full duplex mode");
  770. mac_cr |= MAC_CR_FDPX_;
  771. } else {
  772. SMSC_TRACE(pdata, hw,
  773. "configuring for half duplex mode");
  774. mac_cr &= ~MAC_CR_FDPX_;
  775. }
  776. smsc911x_mac_write(pdata, MAC_CR, mac_cr);
  777. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  778. smsc911x_phy_update_flowcontrol(pdata);
  779. pdata->last_duplex = phy_dev->duplex;
  780. }
  781. carrier = netif_carrier_ok(dev);
  782. if (carrier != pdata->last_carrier) {
  783. SMSC_TRACE(pdata, hw, "carrier state has changed");
  784. if (carrier) {
  785. SMSC_TRACE(pdata, hw, "configuring for carrier OK");
  786. if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
  787. (!pdata->using_extphy)) {
  788. /* Restore original GPIO configuration */
  789. pdata->gpio_setting = pdata->gpio_orig_setting;
  790. smsc911x_reg_write(pdata, GPIO_CFG,
  791. pdata->gpio_setting);
  792. }
  793. } else {
  794. SMSC_TRACE(pdata, hw, "configuring for no carrier");
  795. /* Check global setting that LED1
  796. * usage is 10/100 indicator */
  797. pdata->gpio_setting = smsc911x_reg_read(pdata,
  798. GPIO_CFG);
  799. if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
  800. (!pdata->using_extphy)) {
  801. /* Force 10/100 LED off, after saving
  802. * original GPIO configuration */
  803. pdata->gpio_orig_setting = pdata->gpio_setting;
  804. pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
  805. pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
  806. | GPIO_CFG_GPIODIR0_
  807. | GPIO_CFG_GPIOD0_);
  808. smsc911x_reg_write(pdata, GPIO_CFG,
  809. pdata->gpio_setting);
  810. }
  811. }
  812. pdata->last_carrier = carrier;
  813. }
  814. }
  815. static int smsc911x_mii_probe(struct net_device *dev)
  816. {
  817. struct smsc911x_data *pdata = netdev_priv(dev);
  818. struct phy_device *phydev = NULL;
  819. int ret;
  820. /* find the first phy */
  821. phydev = phy_find_first(pdata->mii_bus);
  822. if (!phydev) {
  823. netdev_err(dev, "no PHY found\n");
  824. return -ENODEV;
  825. }
  826. SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
  827. phydev->addr, phydev->phy_id);
  828. ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link,
  829. pdata->config.phy_interface);
  830. if (ret) {
  831. netdev_err(dev, "Could not attach to PHY\n");
  832. return ret;
  833. }
  834. netdev_info(dev,
  835. "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
  836. phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
  837. /* mask with MAC supported features */
  838. phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
  839. SUPPORTED_Asym_Pause);
  840. phydev->advertising = phydev->supported;
  841. pdata->phy_dev = phydev;
  842. pdata->last_duplex = -1;
  843. pdata->last_carrier = -1;
  844. #ifdef USE_PHY_WORK_AROUND
  845. if (smsc911x_phy_loopbacktest(dev) < 0) {
  846. SMSC_WARN(pdata, hw, "Failed Loop Back Test");
  847. return -ENODEV;
  848. }
  849. SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
  850. #endif /* USE_PHY_WORK_AROUND */
  851. SMSC_TRACE(pdata, hw, "phy initialised successfully");
  852. return 0;
  853. }
  854. static int smsc911x_mii_init(struct platform_device *pdev,
  855. struct net_device *dev)
  856. {
  857. struct smsc911x_data *pdata = netdev_priv(dev);
  858. int err = -ENXIO, i;
  859. pdata->mii_bus = mdiobus_alloc();
  860. if (!pdata->mii_bus) {
  861. err = -ENOMEM;
  862. goto err_out_1;
  863. }
  864. pdata->mii_bus->name = SMSC_MDIONAME;
  865. snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
  866. pdev->name, pdev->id);
  867. pdata->mii_bus->priv = pdata;
  868. pdata->mii_bus->read = smsc911x_mii_read;
  869. pdata->mii_bus->write = smsc911x_mii_write;
  870. pdata->mii_bus->irq = pdata->phy_irq;
  871. for (i = 0; i < PHY_MAX_ADDR; ++i)
  872. pdata->mii_bus->irq[i] = PHY_POLL;
  873. pdata->mii_bus->parent = &pdev->dev;
  874. switch (pdata->idrev & 0xFFFF0000) {
  875. case 0x01170000:
  876. case 0x01150000:
  877. case 0x117A0000:
  878. case 0x115A0000:
  879. /* External PHY supported, try to autodetect */
  880. smsc911x_phy_initialise_external(pdata);
  881. break;
  882. default:
  883. SMSC_TRACE(pdata, hw, "External PHY is not supported, "
  884. "using internal PHY");
  885. pdata->using_extphy = 0;
  886. break;
  887. }
  888. if (!pdata->using_extphy) {
  889. /* Mask all PHYs except ID 1 (internal) */
  890. pdata->mii_bus->phy_mask = ~(1 << 1);
  891. }
  892. if (mdiobus_register(pdata->mii_bus)) {
  893. SMSC_WARN(pdata, probe, "Error registering mii bus");
  894. goto err_out_free_bus_2;
  895. }
  896. if (smsc911x_mii_probe(dev) < 0) {
  897. SMSC_WARN(pdata, probe, "Error registering mii bus");
  898. goto err_out_unregister_bus_3;
  899. }
  900. return 0;
  901. err_out_unregister_bus_3:
  902. mdiobus_unregister(pdata->mii_bus);
  903. err_out_free_bus_2:
  904. mdiobus_free(pdata->mii_bus);
  905. err_out_1:
  906. return err;
  907. }
  908. /* Gets the number of tx statuses in the fifo */
  909. static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
  910. {
  911. return (smsc911x_reg_read(pdata, TX_FIFO_INF)
  912. & TX_FIFO_INF_TSUSED_) >> 16;
  913. }
  914. /* Reads tx statuses and increments counters where necessary */
  915. static void smsc911x_tx_update_txcounters(struct net_device *dev)
  916. {
  917. struct smsc911x_data *pdata = netdev_priv(dev);
  918. unsigned int tx_stat;
  919. while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
  920. if (unlikely(tx_stat & 0x80000000)) {
  921. /* In this driver the packet tag is used as the packet
  922. * length. Since a packet length can never reach the
  923. * size of 0x8000, this bit is reserved. It is worth
  924. * noting that the "reserved bit" in the warning above
  925. * does not reference a hardware defined reserved bit
  926. * but rather a driver defined one.
  927. */
  928. SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
  929. } else {
  930. if (unlikely(tx_stat & TX_STS_ES_)) {
  931. dev->stats.tx_errors++;
  932. } else {
  933. dev->stats.tx_packets++;
  934. dev->stats.tx_bytes += (tx_stat >> 16);
  935. }
  936. if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
  937. dev->stats.collisions += 16;
  938. dev->stats.tx_aborted_errors += 1;
  939. } else {
  940. dev->stats.collisions +=
  941. ((tx_stat >> 3) & 0xF);
  942. }
  943. if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
  944. dev->stats.tx_carrier_errors += 1;
  945. if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
  946. dev->stats.collisions++;
  947. dev->stats.tx_aborted_errors++;
  948. }
  949. }
  950. }
  951. }
  952. /* Increments the Rx error counters */
  953. static void
  954. smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
  955. {
  956. int crc_err = 0;
  957. if (unlikely(rxstat & RX_STS_ES_)) {
  958. dev->stats.rx_errors++;
  959. if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
  960. dev->stats.rx_crc_errors++;
  961. crc_err = 1;
  962. }
  963. }
  964. if (likely(!crc_err)) {
  965. if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
  966. (rxstat & RX_STS_LENGTH_ERR_)))
  967. dev->stats.rx_length_errors++;
  968. if (rxstat & RX_STS_MCAST_)
  969. dev->stats.multicast++;
  970. }
  971. }
  972. /* Quickly dumps bad packets */
  973. static void
  974. smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
  975. {
  976. if (likely(pktwords >= 4)) {
  977. unsigned int timeout = 500;
  978. unsigned int val;
  979. smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
  980. do {
  981. udelay(1);
  982. val = smsc911x_reg_read(pdata, RX_DP_CTRL);
  983. } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
  984. if (unlikely(timeout == 0))
  985. SMSC_WARN(pdata, hw, "Timed out waiting for "
  986. "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
  987. } else {
  988. unsigned int temp;
  989. while (pktwords--)
  990. temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
  991. }
  992. }
  993. /* NAPI poll function */
  994. static int smsc911x_poll(struct napi_struct *napi, int budget)
  995. {
  996. struct smsc911x_data *pdata =
  997. container_of(napi, struct smsc911x_data, napi);
  998. struct net_device *dev = pdata->dev;
  999. int npackets = 0;
  1000. while (npackets < budget) {
  1001. unsigned int pktlength;
  1002. unsigned int pktwords;
  1003. struct sk_buff *skb;
  1004. unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
  1005. if (!rxstat) {
  1006. unsigned int temp;
  1007. /* We processed all packets available. Tell NAPI it can
  1008. * stop polling then re-enable rx interrupts */
  1009. smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
  1010. napi_complete(napi);
  1011. temp = smsc911x_reg_read(pdata, INT_EN);
  1012. temp |= INT_EN_RSFL_EN_;
  1013. smsc911x_reg_write(pdata, INT_EN, temp);
  1014. break;
  1015. }
  1016. /* Count packet for NAPI scheduling, even if it has an error.
  1017. * Error packets still require cycles to discard */
  1018. npackets++;
  1019. pktlength = ((rxstat & 0x3FFF0000) >> 16);
  1020. pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
  1021. smsc911x_rx_counterrors(dev, rxstat);
  1022. if (unlikely(rxstat & RX_STS_ES_)) {
  1023. SMSC_WARN(pdata, rx_err,
  1024. "Discarding packet with error bit set");
  1025. /* Packet has an error, discard it and continue with
  1026. * the next */
  1027. smsc911x_rx_fastforward(pdata, pktwords);
  1028. dev->stats.rx_dropped++;
  1029. continue;
  1030. }
  1031. skb = netdev_alloc_skb(dev, pktwords << 2);
  1032. if (unlikely(!skb)) {
  1033. SMSC_WARN(pdata, rx_err,
  1034. "Unable to allocate skb for rx packet");
  1035. /* Drop the packet and stop this polling iteration */
  1036. smsc911x_rx_fastforward(pdata, pktwords);
  1037. dev->stats.rx_dropped++;
  1038. break;
  1039. }
  1040. pdata->ops->rx_readfifo(pdata,
  1041. (unsigned int *)skb->data, pktwords);
  1042. /* Align IP on 16B boundary */
  1043. skb_reserve(skb, NET_IP_ALIGN);
  1044. skb_put(skb, pktlength - 4);
  1045. skb->protocol = eth_type_trans(skb, dev);
  1046. skb_checksum_none_assert(skb);
  1047. netif_receive_skb(skb);
  1048. /* Update counters */
  1049. dev->stats.rx_packets++;
  1050. dev->stats.rx_bytes += (pktlength - 4);
  1051. }
  1052. /* Return total received packets */
  1053. return npackets;
  1054. }
  1055. /* Returns hash bit number for given MAC address
  1056. * Example:
  1057. * 01 00 5E 00 00 01 -> returns bit number 31 */
  1058. static unsigned int smsc911x_hash(char addr[ETH_ALEN])
  1059. {
  1060. return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
  1061. }
  1062. static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
  1063. {
  1064. /* Performs the multicast & mac_cr update. This is called when
  1065. * safe on the current hardware, and with the mac_lock held */
  1066. unsigned int mac_cr;
  1067. SMSC_ASSERT_MAC_LOCK(pdata);
  1068. mac_cr = smsc911x_mac_read(pdata, MAC_CR);
  1069. mac_cr |= pdata->set_bits_mask;
  1070. mac_cr &= ~(pdata->clear_bits_mask);
  1071. smsc911x_mac_write(pdata, MAC_CR, mac_cr);
  1072. smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
  1073. smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
  1074. SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
  1075. mac_cr, pdata->hashhi, pdata->hashlo);
  1076. }
  1077. static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
  1078. {
  1079. unsigned int mac_cr;
  1080. /* This function is only called for older LAN911x devices
  1081. * (revA or revB), where MAC_CR, HASHH and HASHL should not
  1082. * be modified during Rx - newer devices immediately update the
  1083. * registers.
  1084. *
  1085. * This is called from interrupt context */
  1086. spin_lock(&pdata->mac_lock);
  1087. /* Check Rx has stopped */
  1088. if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
  1089. SMSC_WARN(pdata, drv, "Rx not stopped");
  1090. /* Perform the update - safe to do now Rx has stopped */
  1091. smsc911x_rx_multicast_update(pdata);
  1092. /* Re-enable Rx */
  1093. mac_cr = smsc911x_mac_read(pdata, MAC_CR);
  1094. mac_cr |= MAC_CR_RXEN_;
  1095. smsc911x_mac_write(pdata, MAC_CR, mac_cr);
  1096. pdata->multicast_update_pending = 0;
  1097. spin_unlock(&pdata->mac_lock);
  1098. }
  1099. static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
  1100. {
  1101. int rc = 0;
  1102. if (!pdata->phy_dev)
  1103. return rc;
  1104. rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
  1105. if (rc < 0) {
  1106. SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
  1107. return rc;
  1108. }
  1109. /*
  1110. * If energy is detected the PHY is already awake so is not necessary
  1111. * to disable the energy detect power-down mode.
  1112. */
  1113. if ((rc & MII_LAN83C185_EDPWRDOWN) &&
  1114. !(rc & MII_LAN83C185_ENERGYON)) {
  1115. /* Disable energy detect mode for this SMSC Transceivers */
  1116. rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
  1117. rc & (~MII_LAN83C185_EDPWRDOWN));
  1118. if (rc < 0) {
  1119. SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
  1120. return rc;
  1121. }
  1122. mdelay(1);
  1123. }
  1124. return 0;
  1125. }
  1126. static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
  1127. {
  1128. int rc = 0;
  1129. if (!pdata->phy_dev)
  1130. return rc;
  1131. rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
  1132. if (rc < 0) {
  1133. SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
  1134. return rc;
  1135. }
  1136. /* Only enable if energy detect mode is already disabled */
  1137. if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
  1138. mdelay(100);
  1139. /* Enable energy detect mode for this SMSC Transceivers */
  1140. rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
  1141. rc | MII_LAN83C185_EDPWRDOWN);
  1142. if (rc < 0) {
  1143. SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
  1144. return rc;
  1145. }
  1146. mdelay(1);
  1147. }
  1148. return 0;
  1149. }
  1150. static int smsc911x_soft_reset(struct smsc911x_data *pdata)
  1151. {
  1152. unsigned int timeout;
  1153. unsigned int temp;
  1154. int ret;
  1155. /*
  1156. * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
  1157. * are initialized in a Energy Detect Power-Down mode that prevents
  1158. * the MAC chip to be software reseted. So we have to wakeup the PHY
  1159. * before.
  1160. */
  1161. if (pdata->generation == 4) {
  1162. ret = smsc911x_phy_disable_energy_detect(pdata);
  1163. if (ret) {
  1164. SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
  1165. return ret;
  1166. }
  1167. }
  1168. /* Reset the LAN911x */
  1169. smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
  1170. timeout = 10;
  1171. do {
  1172. udelay(10);
  1173. temp = smsc911x_reg_read(pdata, HW_CFG);
  1174. } while ((--timeout) && (temp & HW_CFG_SRST_));
  1175. if (unlikely(temp & HW_CFG_SRST_)) {
  1176. SMSC_WARN(pdata, drv, "Failed to complete reset");
  1177. return -EIO;
  1178. }
  1179. if (pdata->generation == 4) {
  1180. ret = smsc911x_phy_enable_energy_detect(pdata);
  1181. if (ret) {
  1182. SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
  1183. return ret;
  1184. }
  1185. }
  1186. return 0;
  1187. }
  1188. /* Sets the device MAC address to dev_addr, called with mac_lock held */
  1189. static void
  1190. smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
  1191. {
  1192. u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
  1193. u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
  1194. (dev_addr[1] << 8) | dev_addr[0];
  1195. SMSC_ASSERT_MAC_LOCK(pdata);
  1196. smsc911x_mac_write(pdata, ADDRH, mac_high16);
  1197. smsc911x_mac_write(pdata, ADDRL, mac_low32);
  1198. }
  1199. static void smsc911x_disable_irq_chip(struct net_device *dev)
  1200. {
  1201. struct smsc911x_data *pdata = netdev_priv(dev);
  1202. smsc911x_reg_write(pdata, INT_EN, 0);
  1203. smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
  1204. }
  1205. static int smsc911x_open(struct net_device *dev)
  1206. {
  1207. struct smsc911x_data *pdata = netdev_priv(dev);
  1208. unsigned int timeout;
  1209. unsigned int temp;
  1210. unsigned int intcfg;
  1211. /* if the phy is not yet registered, retry later*/
  1212. if (!pdata->phy_dev) {
  1213. SMSC_WARN(pdata, hw, "phy_dev is NULL");
  1214. return -EAGAIN;
  1215. }
  1216. /* Reset the LAN911x */
  1217. if (smsc911x_soft_reset(pdata)) {
  1218. SMSC_WARN(pdata, hw, "soft reset failed");
  1219. return -EIO;
  1220. }
  1221. smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
  1222. smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
  1223. /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
  1224. spin_lock_irq(&pdata->mac_lock);
  1225. smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
  1226. spin_unlock_irq(&pdata->mac_lock);
  1227. /* Make sure EEPROM has finished loading before setting GPIO_CFG */
  1228. timeout = 50;
  1229. while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
  1230. --timeout) {
  1231. udelay(10);
  1232. }
  1233. if (unlikely(timeout == 0))
  1234. SMSC_WARN(pdata, ifup,
  1235. "Timed out waiting for EEPROM busy bit to clear");
  1236. smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
  1237. /* The soft reset above cleared the device's MAC address,
  1238. * restore it from local copy (set in probe) */
  1239. spin_lock_irq(&pdata->mac_lock);
  1240. smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
  1241. spin_unlock_irq(&pdata->mac_lock);
  1242. /* Initialise irqs, but leave all sources disabled */
  1243. smsc911x_disable_irq_chip(dev);
  1244. /* Set interrupt deassertion to 100uS */
  1245. intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
  1246. if (pdata->config.irq_polarity) {
  1247. SMSC_TRACE(pdata, ifup, "irq polarity: active high");
  1248. intcfg |= INT_CFG_IRQ_POL_;
  1249. } else {
  1250. SMSC_TRACE(pdata, ifup, "irq polarity: active low");
  1251. }
  1252. if (pdata->config.irq_type) {
  1253. SMSC_TRACE(pdata, ifup, "irq type: push-pull");
  1254. intcfg |= INT_CFG_IRQ_TYPE_;
  1255. } else {
  1256. SMSC_TRACE(pdata, ifup, "irq type: open drain");
  1257. }
  1258. smsc911x_reg_write(pdata, INT_CFG, intcfg);
  1259. SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
  1260. pdata->software_irq_signal = 0;
  1261. smp_wmb();
  1262. temp = smsc911x_reg_read(pdata, INT_EN);
  1263. temp |= INT_EN_SW_INT_EN_;
  1264. smsc911x_reg_write(pdata, INT_EN, temp);
  1265. timeout = 1000;
  1266. while (timeout--) {
  1267. if (pdata->software_irq_signal)
  1268. break;
  1269. msleep(1);
  1270. }
  1271. if (!pdata->software_irq_signal) {
  1272. netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
  1273. dev->irq);
  1274. return -ENODEV;
  1275. }
  1276. SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
  1277. dev->irq);
  1278. netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
  1279. (unsigned long)pdata->ioaddr, dev->irq);
  1280. /* Reset the last known duplex and carrier */
  1281. pdata->last_duplex = -1;
  1282. pdata->last_carrier = -1;
  1283. /* Bring the PHY up */
  1284. phy_start(pdata->phy_dev);
  1285. temp = smsc911x_reg_read(pdata, HW_CFG);
  1286. /* Preserve TX FIFO size and external PHY configuration */
  1287. temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
  1288. temp |= HW_CFG_SF_;
  1289. smsc911x_reg_write(pdata, HW_CFG, temp);
  1290. temp = smsc911x_reg_read(pdata, FIFO_INT);
  1291. temp |= FIFO_INT_TX_AVAIL_LEVEL_;
  1292. temp &= ~(FIFO_INT_RX_STS_LEVEL_);
  1293. smsc911x_reg_write(pdata, FIFO_INT, temp);
  1294. /* set RX Data offset to 2 bytes for alignment */
  1295. smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
  1296. /* enable NAPI polling before enabling RX interrupts */
  1297. napi_enable(&pdata->napi);
  1298. temp = smsc911x_reg_read(pdata, INT_EN);
  1299. temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
  1300. smsc911x_reg_write(pdata, INT_EN, temp);
  1301. spin_lock_irq(&pdata->mac_lock);
  1302. temp = smsc911x_mac_read(pdata, MAC_CR);
  1303. temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
  1304. smsc911x_mac_write(pdata, MAC_CR, temp);
  1305. spin_unlock_irq(&pdata->mac_lock);
  1306. smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
  1307. netif_start_queue(dev);
  1308. return 0;
  1309. }
  1310. /* Entry point for stopping the interface */
  1311. static int smsc911x_stop(struct net_device *dev)
  1312. {
  1313. struct smsc911x_data *pdata = netdev_priv(dev);
  1314. unsigned int temp;
  1315. /* Disable all device interrupts */
  1316. temp = smsc911x_reg_read(pdata, INT_CFG);
  1317. temp &= ~INT_CFG_IRQ_EN_;
  1318. smsc911x_reg_write(pdata, INT_CFG, temp);
  1319. /* Stop Tx and Rx polling */
  1320. netif_stop_queue(dev);
  1321. napi_disable(&pdata->napi);
  1322. /* At this point all Rx and Tx activity is stopped */
  1323. dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
  1324. smsc911x_tx_update_txcounters(dev);
  1325. /* Bring the PHY down */
  1326. if (pdata->phy_dev)
  1327. phy_stop(pdata->phy_dev);
  1328. SMSC_TRACE(pdata, ifdown, "Interface stopped");
  1329. return 0;
  1330. }
  1331. /* Entry point for transmitting a packet */
  1332. static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  1333. {
  1334. struct smsc911x_data *pdata = netdev_priv(dev);
  1335. unsigned int freespace;
  1336. unsigned int tx_cmd_a;
  1337. unsigned int tx_cmd_b;
  1338. unsigned int temp;
  1339. u32 wrsz;
  1340. ulong bufp;
  1341. freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
  1342. if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
  1343. SMSC_WARN(pdata, tx_err,
  1344. "Tx data fifo low, space available: %d", freespace);
  1345. /* Word alignment adjustment */
  1346. tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
  1347. tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
  1348. tx_cmd_a |= (unsigned int)skb->len;
  1349. tx_cmd_b = ((unsigned int)skb->len) << 16;
  1350. tx_cmd_b |= (unsigned int)skb->len;
  1351. smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
  1352. smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
  1353. bufp = (ulong)skb->data & (~0x3);
  1354. wrsz = (u32)skb->len + 3;
  1355. wrsz += (u32)((ulong)skb->data & 0x3);
  1356. wrsz >>= 2;
  1357. pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
  1358. freespace -= (skb->len + 32);
  1359. skb_tx_timestamp(skb);
  1360. dev_kfree_skb(skb);
  1361. if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
  1362. smsc911x_tx_update_txcounters(dev);
  1363. if (freespace < TX_FIFO_LOW_THRESHOLD) {
  1364. netif_stop_queue(dev);
  1365. temp = smsc911x_reg_read(pdata, FIFO_INT);
  1366. temp &= 0x00FFFFFF;
  1367. temp |= 0x32000000;
  1368. smsc911x_reg_write(pdata, FIFO_INT, temp);
  1369. }
  1370. return NETDEV_TX_OK;
  1371. }
  1372. /* Entry point for getting status counters */
  1373. static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
  1374. {
  1375. struct smsc911x_data *pdata = netdev_priv(dev);
  1376. smsc911x_tx_update_txcounters(dev);
  1377. dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
  1378. return &dev->stats;
  1379. }
  1380. /* Entry point for setting addressing modes */
  1381. static void smsc911x_set_multicast_list(struct net_device *dev)
  1382. {
  1383. struct smsc911x_data *pdata = netdev_priv(dev);
  1384. unsigned long flags;
  1385. if (dev->flags & IFF_PROMISC) {
  1386. /* Enabling promiscuous mode */
  1387. pdata->set_bits_mask = MAC_CR_PRMS_;
  1388. pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
  1389. pdata->hashhi = 0;
  1390. pdata->hashlo = 0;
  1391. } else if (dev->flags & IFF_ALLMULTI) {
  1392. /* Enabling all multicast mode */
  1393. pdata->set_bits_mask = MAC_CR_MCPAS_;
  1394. pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
  1395. pdata->hashhi = 0;
  1396. pdata->hashlo = 0;
  1397. } else if (!netdev_mc_empty(dev)) {
  1398. /* Enabling specific multicast addresses */
  1399. unsigned int hash_high = 0;
  1400. unsigned int hash_low = 0;
  1401. struct netdev_hw_addr *ha;
  1402. pdata->set_bits_mask = MAC_CR_HPFILT_;
  1403. pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1404. netdev_for_each_mc_addr(ha, dev) {
  1405. unsigned int bitnum = smsc911x_hash(ha->addr);
  1406. unsigned int mask = 0x01 << (bitnum & 0x1F);
  1407. if (bitnum & 0x20)
  1408. hash_high |= mask;
  1409. else
  1410. hash_low |= mask;
  1411. }
  1412. pdata->hashhi = hash_high;
  1413. pdata->hashlo = hash_low;
  1414. } else {
  1415. /* Enabling local MAC address only */
  1416. pdata->set_bits_mask = 0;
  1417. pdata->clear_bits_mask =
  1418. (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
  1419. pdata->hashhi = 0;
  1420. pdata->hashlo = 0;
  1421. }
  1422. spin_lock_irqsave(&pdata->mac_lock, flags);
  1423. if (pdata->generation <= 1) {
  1424. /* Older hardware revision - cannot change these flags while
  1425. * receiving data */
  1426. if (!pdata->multicast_update_pending) {
  1427. unsigned int temp;
  1428. SMSC_TRACE(pdata, hw, "scheduling mcast update");
  1429. pdata->multicast_update_pending = 1;
  1430. /* Request the hardware to stop, then perform the
  1431. * update when we get an RX_STOP interrupt */
  1432. temp = smsc911x_mac_read(pdata, MAC_CR);
  1433. temp &= ~(MAC_CR_RXEN_);
  1434. smsc911x_mac_write(pdata, MAC_CR, temp);
  1435. } else {
  1436. /* There is another update pending, this should now
  1437. * use the newer values */
  1438. }
  1439. } else {
  1440. /* Newer hardware revision - can write immediately */
  1441. smsc911x_rx_multicast_update(pdata);
  1442. }
  1443. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  1444. }
  1445. static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
  1446. {
  1447. struct net_device *dev = dev_id;
  1448. struct smsc911x_data *pdata = netdev_priv(dev);
  1449. u32 intsts = smsc911x_reg_read(pdata, INT_STS);
  1450. u32 inten = smsc911x_reg_read(pdata, INT_EN);
  1451. int serviced = IRQ_NONE;
  1452. u32 temp;
  1453. if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
  1454. temp = smsc911x_reg_read(pdata, INT_EN);
  1455. temp &= (~INT_EN_SW_INT_EN_);
  1456. smsc911x_reg_write(pdata, INT_EN, temp);
  1457. smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
  1458. pdata->software_irq_signal = 1;
  1459. smp_wmb();
  1460. serviced = IRQ_HANDLED;
  1461. }
  1462. if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
  1463. /* Called when there is a multicast update scheduled and
  1464. * it is now safe to complete the update */
  1465. SMSC_TRACE(pdata, intr, "RX Stop interrupt");
  1466. smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
  1467. if (pdata->multicast_update_pending)
  1468. smsc911x_rx_multicast_update_workaround(pdata);
  1469. serviced = IRQ_HANDLED;
  1470. }
  1471. if (intsts & inten & INT_STS_TDFA_) {
  1472. temp = smsc911x_reg_read(pdata, FIFO_INT);
  1473. temp |= FIFO_INT_TX_AVAIL_LEVEL_;
  1474. smsc911x_reg_write(pdata, FIFO_INT, temp);
  1475. smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
  1476. netif_wake_queue(dev);
  1477. serviced = IRQ_HANDLED;
  1478. }
  1479. if (unlikely(intsts & inten & INT_STS_RXE_)) {
  1480. SMSC_TRACE(pdata, intr, "RX Error interrupt");
  1481. smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
  1482. serviced = IRQ_HANDLED;
  1483. }
  1484. if (likely(intsts & inten & INT_STS_RSFL_)) {
  1485. if (likely(napi_schedule_prep(&pdata->napi))) {
  1486. /* Disable Rx interrupts */
  1487. temp = smsc911x_reg_read(pdata, INT_EN);
  1488. temp &= (~INT_EN_RSFL_EN_);
  1489. smsc911x_reg_write(pdata, INT_EN, temp);
  1490. /* Schedule a NAPI poll */
  1491. __napi_schedule(&pdata->napi);
  1492. } else {
  1493. SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
  1494. }
  1495. serviced = IRQ_HANDLED;
  1496. }
  1497. return serviced;
  1498. }
  1499. #ifdef CONFIG_NET_POLL_CONTROLLER
  1500. static void smsc911x_poll_controller(struct net_device *dev)
  1501. {
  1502. disable_irq(dev->irq);
  1503. smsc911x_irqhandler(0, dev);
  1504. enable_irq(dev->irq);
  1505. }
  1506. #endif /* CONFIG_NET_POLL_CONTROLLER */
  1507. static int smsc911x_set_mac_address(struct net_device *dev, void *p)
  1508. {
  1509. struct smsc911x_data *pdata = netdev_priv(dev);
  1510. struct sockaddr *addr = p;
  1511. /* On older hardware revisions we cannot change the mac address
  1512. * registers while receiving data. Newer devices can safely change
  1513. * this at any time. */
  1514. if (pdata->generation <= 1 && netif_running(dev))
  1515. return -EBUSY;
  1516. if (!is_valid_ether_addr(addr->sa_data))
  1517. return -EADDRNOTAVAIL;
  1518. memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
  1519. spin_lock_irq(&pdata->mac_lock);
  1520. smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
  1521. spin_unlock_irq(&pdata->mac_lock);
  1522. netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
  1523. return 0;
  1524. }
  1525. /* Standard ioctls for mii-tool */
  1526. static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  1527. {
  1528. struct smsc911x_data *pdata = netdev_priv(dev);
  1529. if (!netif_running(dev) || !pdata->phy_dev)
  1530. return -EINVAL;
  1531. return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
  1532. }
  1533. static int
  1534. smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1535. {
  1536. struct smsc911x_data *pdata = netdev_priv(dev);
  1537. cmd->maxtxpkt = 1;
  1538. cmd->maxrxpkt = 1;
  1539. return phy_ethtool_gset(pdata->phy_dev, cmd);
  1540. }
  1541. static int
  1542. smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1543. {
  1544. struct smsc911x_data *pdata = netdev_priv(dev);
  1545. return phy_ethtool_sset(pdata->phy_dev, cmd);
  1546. }
  1547. static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
  1548. struct ethtool_drvinfo *info)
  1549. {
  1550. strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
  1551. strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
  1552. strlcpy(info->bus_info, dev_name(dev->dev.parent),
  1553. sizeof(info->bus_info));
  1554. }
  1555. static int smsc911x_ethtool_nwayreset(struct net_device *dev)
  1556. {
  1557. struct smsc911x_data *pdata = netdev_priv(dev);
  1558. return phy_start_aneg(pdata->phy_dev);
  1559. }
  1560. static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
  1561. {
  1562. struct smsc911x_data *pdata = netdev_priv(dev);
  1563. return pdata->msg_enable;
  1564. }
  1565. static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1566. {
  1567. struct smsc911x_data *pdata = netdev_priv(dev);
  1568. pdata->msg_enable = level;
  1569. }
  1570. static int smsc911x_ethtool_getregslen(struct net_device *dev)
  1571. {
  1572. return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
  1573. sizeof(u32);
  1574. }
  1575. static void
  1576. smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
  1577. void *buf)
  1578. {
  1579. struct smsc911x_data *pdata = netdev_priv(dev);
  1580. struct phy_device *phy_dev = pdata->phy_dev;
  1581. unsigned long flags;
  1582. unsigned int i;
  1583. unsigned int j = 0;
  1584. u32 *data = buf;
  1585. regs->version = pdata->idrev;
  1586. for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
  1587. data[j++] = smsc911x_reg_read(pdata, i);
  1588. for (i = MAC_CR; i <= WUCSR; i++) {
  1589. spin_lock_irqsave(&pdata->mac_lock, flags);
  1590. data[j++] = smsc911x_mac_read(pdata, i);
  1591. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  1592. }
  1593. for (i = 0; i <= 31; i++)
  1594. data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
  1595. }
  1596. static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
  1597. {
  1598. unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
  1599. temp &= ~GPIO_CFG_EEPR_EN_;
  1600. smsc911x_reg_write(pdata, GPIO_CFG, temp);
  1601. msleep(1);
  1602. }
  1603. static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
  1604. {
  1605. int timeout = 100;
  1606. u32 e2cmd;
  1607. SMSC_TRACE(pdata, drv, "op 0x%08x", op);
  1608. if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
  1609. SMSC_WARN(pdata, drv, "Busy at start");
  1610. return -EBUSY;
  1611. }
  1612. e2cmd = op | E2P_CMD_EPC_BUSY_;
  1613. smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
  1614. do {
  1615. msleep(1);
  1616. e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
  1617. } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
  1618. if (!timeout) {
  1619. SMSC_TRACE(pdata, drv, "TIMED OUT");
  1620. return -EAGAIN;
  1621. }
  1622. if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
  1623. SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
  1624. return -EINVAL;
  1625. }
  1626. return 0;
  1627. }
  1628. static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
  1629. u8 address, u8 *data)
  1630. {
  1631. u32 op = E2P_CMD_EPC_CMD_READ_ | address;
  1632. int ret;
  1633. SMSC_TRACE(pdata, drv, "address 0x%x", address);
  1634. ret = smsc911x_eeprom_send_cmd(pdata, op);
  1635. if (!ret)
  1636. data[address] = smsc911x_reg_read(pdata, E2P_DATA);
  1637. return ret;
  1638. }
  1639. static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
  1640. u8 address, u8 data)
  1641. {
  1642. u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
  1643. u32 temp;
  1644. int ret;
  1645. SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
  1646. ret = smsc911x_eeprom_send_cmd(pdata, op);
  1647. if (!ret) {
  1648. op = E2P_CMD_EPC_CMD_WRITE_ | address;
  1649. smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
  1650. /* Workaround for hardware read-after-write restriction */
  1651. temp = smsc911x_reg_read(pdata, BYTE_TEST);
  1652. ret = smsc911x_eeprom_send_cmd(pdata, op);
  1653. }
  1654. return ret;
  1655. }
  1656. static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
  1657. {
  1658. return SMSC911X_EEPROM_SIZE;
  1659. }
  1660. static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
  1661. struct ethtool_eeprom *eeprom, u8 *data)
  1662. {
  1663. struct smsc911x_data *pdata = netdev_priv(dev);
  1664. u8 eeprom_data[SMSC911X_EEPROM_SIZE];
  1665. int len;
  1666. int i;
  1667. smsc911x_eeprom_enable_access(pdata);
  1668. len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
  1669. for (i = 0; i < len; i++) {
  1670. int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
  1671. if (ret < 0) {
  1672. eeprom->len = 0;
  1673. return ret;
  1674. }
  1675. }
  1676. memcpy(data, &eeprom_data[eeprom->offset], len);
  1677. eeprom->len = len;
  1678. return 0;
  1679. }
  1680. static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
  1681. struct ethtool_eeprom *eeprom, u8 *data)
  1682. {
  1683. int ret;
  1684. struct smsc911x_data *pdata = netdev_priv(dev);
  1685. smsc911x_eeprom_enable_access(pdata);
  1686. smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
  1687. ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
  1688. smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
  1689. /* Single byte write, according to man page */
  1690. eeprom->len = 1;
  1691. return ret;
  1692. }
  1693. static const struct ethtool_ops smsc911x_ethtool_ops = {
  1694. .get_settings = smsc911x_ethtool_getsettings,
  1695. .set_settings = smsc911x_ethtool_setsettings,
  1696. .get_link = ethtool_op_get_link,
  1697. .get_drvinfo = smsc911x_ethtool_getdrvinfo,
  1698. .nway_reset = smsc911x_ethtool_nwayreset,
  1699. .get_msglevel = smsc911x_ethtool_getmsglevel,
  1700. .set_msglevel = smsc911x_ethtool_setmsglevel,
  1701. .get_regs_len = smsc911x_ethtool_getregslen,
  1702. .get_regs = smsc911x_ethtool_getregs,
  1703. .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
  1704. .get_eeprom = smsc911x_ethtool_get_eeprom,
  1705. .set_eeprom = smsc911x_ethtool_set_eeprom,
  1706. .get_ts_info = ethtool_op_get_ts_info,
  1707. };
  1708. static const struct net_device_ops smsc911x_netdev_ops = {
  1709. .ndo_open = smsc911x_open,
  1710. .ndo_stop = smsc911x_stop,
  1711. .ndo_start_xmit = smsc911x_hard_start_xmit,
  1712. .ndo_get_stats = smsc911x_get_stats,
  1713. .ndo_set_rx_mode = smsc911x_set_multicast_list,
  1714. .ndo_do_ioctl = smsc911x_do_ioctl,
  1715. .ndo_change_mtu = eth_change_mtu,
  1716. .ndo_validate_addr = eth_validate_addr,
  1717. .ndo_set_mac_address = smsc911x_set_mac_address,
  1718. #ifdef CONFIG_NET_POLL_CONTROLLER
  1719. .ndo_poll_controller = smsc911x_poll_controller,
  1720. #endif
  1721. };
  1722. /* copies the current mac address from hardware to dev->dev_addr */
  1723. static void smsc911x_read_mac_address(struct net_device *dev)
  1724. {
  1725. struct smsc911x_data *pdata = netdev_priv(dev);
  1726. u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
  1727. u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
  1728. dev->dev_addr[0] = (u8)(mac_low32);
  1729. dev->dev_addr[1] = (u8)(mac_low32 >> 8);
  1730. dev->dev_addr[2] = (u8)(mac_low32 >> 16);
  1731. dev->dev_addr[3] = (u8)(mac_low32 >> 24);
  1732. dev->dev_addr[4] = (u8)(mac_high16);
  1733. dev->dev_addr[5] = (u8)(mac_high16 >> 8);
  1734. }
  1735. /* Initializing private device structures, only called from probe */
  1736. static int smsc911x_init(struct net_device *dev)
  1737. {
  1738. struct smsc911x_data *pdata = netdev_priv(dev);
  1739. unsigned int byte_test, mask;
  1740. unsigned int to = 100;
  1741. SMSC_TRACE(pdata, probe, "Driver Parameters:");
  1742. SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
  1743. (unsigned long)pdata->ioaddr);
  1744. SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
  1745. SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
  1746. spin_lock_init(&pdata->dev_lock);
  1747. spin_lock_init(&pdata->mac_lock);
  1748. if (pdata->ioaddr == 0) {
  1749. SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
  1750. return -ENODEV;
  1751. }
  1752. /*
  1753. * poll the READY bit in PMT_CTRL. Any other access to the device is
  1754. * forbidden while this bit isn't set. Try for 100ms
  1755. *
  1756. * Note that this test is done before the WORD_SWAP register is
  1757. * programmed. So in some configurations the READY bit is at 16 before
  1758. * WORD_SWAP is written to. This issue is worked around by waiting
  1759. * until either bit 0 or bit 16 gets set in PMT_CTRL.
  1760. *
  1761. * SMSC has confirmed that checking bit 16 (marked as reserved in
  1762. * the datasheet) is fine since these bits "will either never be set
  1763. * or can only go high after READY does (so also indicate the device
  1764. * is ready)".
  1765. */
  1766. mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_);
  1767. while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
  1768. udelay(1000);
  1769. if (to == 0) {
  1770. pr_err("Device not READY in 100ms aborting\n");
  1771. return -ENODEV;
  1772. }
  1773. /* Check byte ordering */
  1774. byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
  1775. SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
  1776. if (byte_test == 0x43218765) {
  1777. SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
  1778. "applying WORD_SWAP");
  1779. smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
  1780. /* 1 dummy read of BYTE_TEST is needed after a write to
  1781. * WORD_SWAP before its contents are valid */
  1782. byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
  1783. byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
  1784. }
  1785. if (byte_test != 0x87654321) {
  1786. SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
  1787. if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
  1788. SMSC_WARN(pdata, probe,
  1789. "top 16 bits equal to bottom 16 bits");
  1790. SMSC_TRACE(pdata, probe,
  1791. "This may mean the chip is set "
  1792. "for 32 bit while the bus is reading 16 bit");
  1793. }
  1794. return -ENODEV;
  1795. }
  1796. /* Default generation to zero (all workarounds apply) */
  1797. pdata->generation = 0;
  1798. pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
  1799. switch (pdata->idrev & 0xFFFF0000) {
  1800. case 0x01180000:
  1801. case 0x01170000:
  1802. case 0x01160000:
  1803. case 0x01150000:
  1804. case 0x218A0000:
  1805. /* LAN911[5678] family */
  1806. pdata->generation = pdata->idrev & 0x0000FFFF;
  1807. break;
  1808. case 0x118A0000:
  1809. case 0x117A0000:
  1810. case 0x116A0000:
  1811. case 0x115A0000:
  1812. /* LAN921[5678] family */
  1813. pdata->generation = 3;
  1814. break;
  1815. case 0x92100000:
  1816. case 0x92110000:
  1817. case 0x92200000:
  1818. case 0x92210000:
  1819. /* LAN9210/LAN9211/LAN9220/LAN9221 */
  1820. pdata->generation = 4;
  1821. break;
  1822. default:
  1823. SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
  1824. pdata->idrev);
  1825. return -ENODEV;
  1826. }
  1827. SMSC_TRACE(pdata, probe,
  1828. "LAN911x identified, idrev: 0x%08X, generation: %d",
  1829. pdata->idrev, pdata->generation);
  1830. if (pdata->generation == 0)
  1831. SMSC_WARN(pdata, probe,
  1832. "This driver is not intended for this chip revision");
  1833. /* workaround for platforms without an eeprom, where the mac address
  1834. * is stored elsewhere and set by the bootloader. This saves the
  1835. * mac address before resetting the device */
  1836. if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
  1837. spin_lock_irq(&pdata->mac_lock);
  1838. smsc911x_read_mac_address(dev);
  1839. spin_unlock_irq(&pdata->mac_lock);
  1840. }
  1841. /* Reset the LAN911x */
  1842. if (smsc911x_soft_reset(pdata))
  1843. return -ENODEV;
  1844. ether_setup(dev);
  1845. dev->flags |= IFF_MULTICAST;
  1846. netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
  1847. dev->netdev_ops = &smsc911x_netdev_ops;
  1848. dev->ethtool_ops = &smsc911x_ethtool_ops;
  1849. return 0;
  1850. }
  1851. static int smsc911x_drv_remove(struct platform_device *pdev)
  1852. {
  1853. struct net_device *dev;
  1854. struct smsc911x_data *pdata;
  1855. struct resource *res;
  1856. dev = platform_get_drvdata(pdev);
  1857. BUG_ON(!dev);
  1858. pdata = netdev_priv(dev);
  1859. BUG_ON(!pdata);
  1860. BUG_ON(!pdata->ioaddr);
  1861. BUG_ON(!pdata->phy_dev);
  1862. SMSC_TRACE(pdata, ifdown, "Stopping driver");
  1863. phy_disconnect(pdata->phy_dev);
  1864. pdata->phy_dev = NULL;
  1865. mdiobus_unregister(pdata->mii_bus);
  1866. mdiobus_free(pdata->mii_bus);
  1867. platform_set_drvdata(pdev, NULL);
  1868. unregister_netdev(dev);
  1869. free_irq(dev->irq, dev);
  1870. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  1871. "smsc911x-memory");
  1872. if (!res)
  1873. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1874. release_mem_region(res->start, resource_size(res));
  1875. iounmap(pdata->ioaddr);
  1876. (void)smsc911x_disable_resources(pdev);
  1877. smsc911x_free_resources(pdev);
  1878. free_netdev(dev);
  1879. return 0;
  1880. }
  1881. /* standard register acces */
  1882. static const struct smsc911x_ops standard_smsc911x_ops = {
  1883. .reg_read = __smsc911x_reg_read,
  1884. .reg_write = __smsc911x_reg_write,
  1885. .rx_readfifo = smsc911x_rx_readfifo,
  1886. .tx_writefifo = smsc911x_tx_writefifo,
  1887. };
  1888. /* shifted register access */
  1889. static const struct smsc911x_ops shifted_smsc911x_ops = {
  1890. .reg_read = __smsc911x_reg_read_shift,
  1891. .reg_write = __smsc911x_reg_write_shift,
  1892. .rx_readfifo = smsc911x_rx_readfifo_shift,
  1893. .tx_writefifo = smsc911x_tx_writefifo_shift,
  1894. };
  1895. #ifdef CONFIG_OF
  1896. static int smsc911x_probe_config_dt(struct smsc911x_platform_config *config,
  1897. struct device_node *np)
  1898. {
  1899. const char *mac;
  1900. u32 width = 0;
  1901. if (!np)
  1902. return -ENODEV;
  1903. config->phy_interface = of_get_phy_mode(np);
  1904. mac = of_get_mac_address(np);
  1905. if (mac)
  1906. memcpy(config->mac, mac, ETH_ALEN);
  1907. of_property_read_u32(np, "reg-shift", &config->shift);
  1908. of_property_read_u32(np, "reg-io-width", &width);
  1909. if (width == 4)
  1910. config->flags |= SMSC911X_USE_32BIT;
  1911. else
  1912. config->flags |= SMSC911X_USE_16BIT;
  1913. if (of_get_property(np, "smsc,irq-active-high", NULL))
  1914. config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
  1915. if (of_get_property(np, "smsc,irq-push-pull", NULL))
  1916. config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
  1917. if (of_get_property(np, "smsc,force-internal-phy", NULL))
  1918. config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
  1919. if (of_get_property(np, "smsc,force-external-phy", NULL))
  1920. config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
  1921. if (of_get_property(np, "smsc,save-mac-address", NULL))
  1922. config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
  1923. return 0;
  1924. }
  1925. #else
  1926. static inline int smsc911x_probe_config_dt(
  1927. struct smsc911x_platform_config *config,
  1928. struct device_node *np)
  1929. {
  1930. return -ENODEV;
  1931. }
  1932. #endif /* CONFIG_OF */
  1933. static int smsc911x_drv_probe(struct platform_device *pdev)
  1934. {
  1935. struct device_node *np = pdev->dev.of_node;
  1936. struct net_device *dev;
  1937. struct smsc911x_data *pdata;
  1938. struct smsc911x_platform_config *config = pdev->dev.platform_data;
  1939. struct resource *res, *irq_res;
  1940. unsigned int intcfg = 0;
  1941. int res_size, irq_flags;
  1942. int retval;
  1943. pr_info("Driver version %s\n", SMSC_DRV_VERSION);
  1944. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  1945. "smsc911x-memory");
  1946. if (!res)
  1947. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1948. if (!res) {
  1949. pr_warn("Could not allocate resource\n");
  1950. retval = -ENODEV;
  1951. goto out_0;
  1952. }
  1953. res_size = resource_size(res);
  1954. irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1955. if (!irq_res) {
  1956. pr_warn("Could not allocate irq resource\n");
  1957. retval = -ENODEV;
  1958. goto out_0;
  1959. }
  1960. if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
  1961. retval = -EBUSY;
  1962. goto out_0;
  1963. }
  1964. dev = alloc_etherdev(sizeof(struct smsc911x_data));
  1965. if (!dev) {
  1966. retval = -ENOMEM;
  1967. goto out_release_io_1;
  1968. }
  1969. SET_NETDEV_DEV(dev, &pdev->dev);
  1970. pdata = netdev_priv(dev);
  1971. dev->irq = irq_res->start;
  1972. irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
  1973. pdata->ioaddr = ioremap_nocache(res->start, res_size);
  1974. pdata->dev = dev;
  1975. pdata->msg_enable = ((1 << debug) - 1);
  1976. platform_set_drvdata(pdev, dev);
  1977. retval = smsc911x_request_resources(pdev);
  1978. if (retval)
  1979. goto out_request_resources_fail;
  1980. retval = smsc911x_enable_resources(pdev);
  1981. if (retval)
  1982. goto out_enable_resources_fail;
  1983. if (pdata->ioaddr == NULL) {
  1984. SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
  1985. retval = -ENOMEM;
  1986. goto out_disable_resources;
  1987. }
  1988. retval = smsc911x_probe_config_dt(&pdata->config, np);
  1989. if (retval && config) {
  1990. /* copy config parameters across to pdata */
  1991. memcpy(&pdata->config, config, sizeof(pdata->config));
  1992. retval = 0;
  1993. }
  1994. if (retval) {
  1995. SMSC_WARN(pdata, probe, "Error smsc911x config not found");
  1996. goto out_disable_resources;
  1997. }
  1998. /* assume standard, non-shifted, access to HW registers */
  1999. pdata->ops = &standard_smsc911x_ops;
  2000. /* apply the right access if shifting is needed */
  2001. if (pdata->config.shift)
  2002. pdata->ops = &shifted_smsc911x_ops;
  2003. retval = smsc911x_init(dev);
  2004. if (retval < 0)
  2005. goto out_disable_resources;
  2006. /* configure irq polarity and type before connecting isr */
  2007. if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
  2008. intcfg |= INT_CFG_IRQ_POL_;
  2009. if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
  2010. intcfg |= INT_CFG_IRQ_TYPE_;
  2011. smsc911x_reg_write(pdata, INT_CFG, intcfg);
  2012. /* Ensure interrupts are globally disabled before connecting ISR */
  2013. smsc911x_disable_irq_chip(dev);
  2014. retval = request_irq(dev->irq, smsc911x_irqhandler,
  2015. irq_flags | IRQF_SHARED, dev->name, dev);
  2016. if (retval) {
  2017. SMSC_WARN(pdata, probe,
  2018. "Unable to claim requested irq: %d", dev->irq);
  2019. goto out_disable_resources;
  2020. }
  2021. retval = register_netdev(dev);
  2022. if (retval) {
  2023. SMSC_WARN(pdata, probe, "Error %i registering device", retval);
  2024. goto out_free_irq;
  2025. } else {
  2026. SMSC_TRACE(pdata, probe,
  2027. "Network interface: \"%s\"", dev->name);
  2028. }
  2029. retval = smsc911x_mii_init(pdev, dev);
  2030. if (retval) {
  2031. SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
  2032. goto out_unregister_netdev_5;
  2033. }
  2034. spin_lock_irq(&pdata->mac_lock);
  2035. /* Check if mac address has been specified when bringing interface up */
  2036. if (is_valid_ether_addr(dev->dev_addr)) {
  2037. smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
  2038. SMSC_TRACE(pdata, probe,
  2039. "MAC Address is specified by configuration");
  2040. } else if (is_valid_ether_addr(pdata->config.mac)) {
  2041. memcpy(dev->dev_addr, pdata->config.mac, 6);
  2042. SMSC_TRACE(pdata, probe,
  2043. "MAC Address specified by platform data");
  2044. } else {
  2045. /* Try reading mac address from device. if EEPROM is present
  2046. * it will already have been set */
  2047. smsc_get_mac(dev);
  2048. if (is_valid_ether_addr(dev->dev_addr)) {
  2049. /* eeprom values are valid so use them */
  2050. SMSC_TRACE(pdata, probe,
  2051. "Mac Address is read from LAN911x EEPROM");
  2052. } else {
  2053. /* eeprom values are invalid, generate random MAC */
  2054. eth_hw_addr_random(dev);
  2055. smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
  2056. SMSC_TRACE(pdata, probe,
  2057. "MAC Address is set to eth_random_addr");
  2058. }
  2059. }
  2060. spin_unlock_irq(&pdata->mac_lock);
  2061. netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
  2062. return 0;
  2063. out_unregister_netdev_5:
  2064. unregister_netdev(dev);
  2065. out_free_irq:
  2066. free_irq(dev->irq, dev);
  2067. out_disable_resources:
  2068. (void)smsc911x_disable_resources(pdev);
  2069. out_enable_resources_fail:
  2070. smsc911x_free_resources(pdev);
  2071. out_request_resources_fail:
  2072. platform_set_drvdata(pdev, NULL);
  2073. iounmap(pdata->ioaddr);
  2074. free_netdev(dev);
  2075. out_release_io_1:
  2076. release_mem_region(res->start, resource_size(res));
  2077. out_0:
  2078. return retval;
  2079. }
  2080. #ifdef CONFIG_PM
  2081. /* This implementation assumes the devices remains powered on its VDDVARIO
  2082. * pins during suspend. */
  2083. /* TODO: implement freeze/thaw callbacks for hibernation.*/
  2084. static int smsc911x_suspend(struct device *dev)
  2085. {
  2086. struct net_device *ndev = dev_get_drvdata(dev);
  2087. struct smsc911x_data *pdata = netdev_priv(ndev);
  2088. /* enable wake on LAN, energy detection and the external PME
  2089. * signal. */
  2090. smsc911x_reg_write(pdata, PMT_CTRL,
  2091. PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
  2092. PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
  2093. return 0;
  2094. }
  2095. static int smsc911x_resume(struct device *dev)
  2096. {
  2097. struct net_device *ndev = dev_get_drvdata(dev);
  2098. struct smsc911x_data *pdata = netdev_priv(ndev);
  2099. unsigned int to = 100;
  2100. /* Note 3.11 from the datasheet:
  2101. * "When the LAN9220 is in a power saving state, a write of any
  2102. * data to the BYTE_TEST register will wake-up the device."
  2103. */
  2104. smsc911x_reg_write(pdata, BYTE_TEST, 0);
  2105. /* poll the READY bit in PMT_CTRL. Any other access to the device is
  2106. * forbidden while this bit isn't set. Try for 100ms and return -EIO
  2107. * if it failed. */
  2108. while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
  2109. udelay(1000);
  2110. return (to == 0) ? -EIO : 0;
  2111. }
  2112. static const struct dev_pm_ops smsc911x_pm_ops = {
  2113. .suspend = smsc911x_suspend,
  2114. .resume = smsc911x_resume,
  2115. };
  2116. #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
  2117. #else
  2118. #define SMSC911X_PM_OPS NULL
  2119. #endif
  2120. #ifdef CONFIG_OF
  2121. static const struct of_device_id smsc911x_dt_ids[] = {
  2122. { .compatible = "smsc,lan9115", },
  2123. { /* sentinel */ }
  2124. };
  2125. MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
  2126. #endif
  2127. static struct platform_driver smsc911x_driver = {
  2128. .probe = smsc911x_drv_probe,
  2129. .remove = smsc911x_drv_remove,
  2130. .driver = {
  2131. .name = SMSC_CHIPNAME,
  2132. .owner = THIS_MODULE,
  2133. .pm = SMSC911X_PM_OPS,
  2134. .of_match_table = of_match_ptr(smsc911x_dt_ids),
  2135. },
  2136. };
  2137. /* Entry point for loading the module */
  2138. static int __init smsc911x_init_module(void)
  2139. {
  2140. SMSC_INITIALIZE();
  2141. return platform_driver_register(&smsc911x_driver);
  2142. }
  2143. /* entry point for unloading the module */
  2144. static void __exit smsc911x_cleanup_module(void)
  2145. {
  2146. platform_driver_unregister(&smsc911x_driver);
  2147. }
  2148. module_init(smsc911x_init_module);
  2149. module_exit(smsc911x_cleanup_module);